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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.99 99.19 94.27 99.72 100.00 96.03 99.12 97.62


Total test records in report: 1038
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

T308 /workspace/coverage/default/15.sram_ctrl_stress_all.401028054 Jul 27 06:46:52 PM PDT 24 Jul 27 08:05:18 PM PDT 24 129552516751 ps
T309 /workspace/coverage/default/10.sram_ctrl_partial_access.7531973 Jul 27 06:45:58 PM PDT 24 Jul 27 06:47:56 PM PDT 24 3694539782 ps
T310 /workspace/coverage/default/38.sram_ctrl_executable.1211182898 Jul 27 06:51:23 PM PDT 24 Jul 27 07:04:14 PM PDT 24 48080987900 ps
T311 /workspace/coverage/default/22.sram_ctrl_stress_all.1593886129 Jul 27 06:48:11 PM PDT 24 Jul 27 07:26:57 PM PDT 24 44861038775 ps
T312 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3424052054 Jul 27 06:47:18 PM PDT 24 Jul 27 06:48:18 PM PDT 24 2995317095 ps
T313 /workspace/coverage/default/46.sram_ctrl_lc_escalation.3068530694 Jul 27 06:53:07 PM PDT 24 Jul 27 06:54:05 PM PDT 24 42333054366 ps
T314 /workspace/coverage/default/42.sram_ctrl_ram_cfg.3411503840 Jul 27 06:52:04 PM PDT 24 Jul 27 06:52:07 PM PDT 24 1875584536 ps
T315 /workspace/coverage/default/6.sram_ctrl_max_throughput.992095082 Jul 27 06:45:28 PM PDT 24 Jul 27 06:46:08 PM PDT 24 1577097585 ps
T316 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3096945791 Jul 27 06:45:20 PM PDT 24 Jul 27 06:45:41 PM PDT 24 2949106421 ps
T317 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3873766791 Jul 27 06:45:57 PM PDT 24 Jul 27 06:47:12 PM PDT 24 3369823482 ps
T318 /workspace/coverage/default/34.sram_ctrl_bijection.615278471 Jul 27 06:50:26 PM PDT 24 Jul 27 06:59:46 PM PDT 24 32804542657 ps
T319 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.794336714 Jul 27 06:53:20 PM PDT 24 Jul 27 07:00:22 PM PDT 24 35483125754 ps
T320 /workspace/coverage/default/18.sram_ctrl_lc_escalation.3087816840 Jul 27 06:47:21 PM PDT 24 Jul 27 06:48:31 PM PDT 24 10096560861 ps
T321 /workspace/coverage/default/6.sram_ctrl_executable.1570480648 Jul 27 06:45:33 PM PDT 24 Jul 27 07:08:42 PM PDT 24 25255935813 ps
T322 /workspace/coverage/default/32.sram_ctrl_multiple_keys.3147259866 Jul 27 06:49:54 PM PDT 24 Jul 27 07:00:41 PM PDT 24 33861291788 ps
T323 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.3031416684 Jul 27 06:52:57 PM PDT 24 Jul 27 06:54:10 PM PDT 24 5529666261 ps
T324 /workspace/coverage/default/41.sram_ctrl_stress_all.1369758851 Jul 27 06:51:55 PM PDT 24 Jul 27 07:51:14 PM PDT 24 104839814093 ps
T325 /workspace/coverage/default/10.sram_ctrl_executable.1538693976 Jul 27 06:45:59 PM PDT 24 Jul 27 07:04:45 PM PDT 24 49330504331 ps
T326 /workspace/coverage/default/5.sram_ctrl_mem_walk.26543433 Jul 27 06:45:30 PM PDT 24 Jul 27 06:50:21 PM PDT 24 10721611837 ps
T327 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2806206186 Jul 27 06:46:01 PM PDT 24 Jul 27 06:49:15 PM PDT 24 9357336657 ps
T328 /workspace/coverage/default/13.sram_ctrl_executable.3224788067 Jul 27 06:46:23 PM PDT 24 Jul 27 06:54:39 PM PDT 24 25221851380 ps
T329 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1037695014 Jul 27 06:45:27 PM PDT 24 Jul 27 06:46:05 PM PDT 24 4064882839 ps
T118 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.778067021 Jul 27 06:47:01 PM PDT 24 Jul 27 06:47:38 PM PDT 24 6159067634 ps
T330 /workspace/coverage/default/29.sram_ctrl_mem_walk.904985646 Jul 27 06:49:29 PM PDT 24 Jul 27 06:55:16 PM PDT 24 23013089733 ps
T331 /workspace/coverage/default/23.sram_ctrl_stress_all.3176322593 Jul 27 06:48:23 PM PDT 24 Jul 27 07:36:23 PM PDT 24 151485313833 ps
T332 /workspace/coverage/default/13.sram_ctrl_multiple_keys.3657752409 Jul 27 06:46:16 PM PDT 24 Jul 27 07:06:52 PM PDT 24 22336452238 ps
T333 /workspace/coverage/default/33.sram_ctrl_stress_all.3925000242 Jul 27 06:50:26 PM PDT 24 Jul 27 08:51:34 PM PDT 24 373197474103 ps
T334 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.2314110270 Jul 27 06:46:08 PM PDT 24 Jul 27 06:48:53 PM PDT 24 20402831543 ps
T335 /workspace/coverage/default/34.sram_ctrl_ram_cfg.745058063 Jul 27 06:50:32 PM PDT 24 Jul 27 06:50:36 PM PDT 24 366818158 ps
T336 /workspace/coverage/default/30.sram_ctrl_lc_escalation.2483418632 Jul 27 06:49:39 PM PDT 24 Jul 27 06:50:11 PM PDT 24 20732959094 ps
T337 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.3500398653 Jul 27 06:45:20 PM PDT 24 Jul 27 06:46:48 PM PDT 24 29640472982 ps
T338 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.715400954 Jul 27 06:50:24 PM PDT 24 Jul 27 06:51:30 PM PDT 24 968139111 ps
T339 /workspace/coverage/default/37.sram_ctrl_alert_test.2560878829 Jul 27 06:51:14 PM PDT 24 Jul 27 06:51:15 PM PDT 24 29393608 ps
T340 /workspace/coverage/default/7.sram_ctrl_mem_walk.3119905078 Jul 27 06:45:37 PM PDT 24 Jul 27 06:50:32 PM PDT 24 65634234709 ps
T341 /workspace/coverage/default/25.sram_ctrl_smoke.3105574454 Jul 27 06:48:38 PM PDT 24 Jul 27 06:48:49 PM PDT 24 1589244033 ps
T342 /workspace/coverage/default/27.sram_ctrl_lc_escalation.2122556298 Jul 27 06:49:07 PM PDT 24 Jul 27 06:50:17 PM PDT 24 44193209386 ps
T343 /workspace/coverage/default/25.sram_ctrl_stress_all.4032887550 Jul 27 06:48:48 PM PDT 24 Jul 27 07:52:39 PM PDT 24 108266355577 ps
T344 /workspace/coverage/default/45.sram_ctrl_ram_cfg.32356912 Jul 27 06:52:55 PM PDT 24 Jul 27 06:52:58 PM PDT 24 357727772 ps
T345 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.374521481 Jul 27 06:52:04 PM PDT 24 Jul 27 06:52:42 PM PDT 24 775524000 ps
T346 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.3467982201 Jul 27 06:48:56 PM PDT 24 Jul 27 07:07:03 PM PDT 24 65120949025 ps
T347 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.701674649 Jul 27 06:47:08 PM PDT 24 Jul 27 06:53:00 PM PDT 24 15339354626 ps
T348 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.1010889042 Jul 27 06:45:49 PM PDT 24 Jul 27 06:48:00 PM PDT 24 6288605641 ps
T349 /workspace/coverage/default/16.sram_ctrl_ram_cfg.4029587394 Jul 27 06:47:02 PM PDT 24 Jul 27 06:47:05 PM PDT 24 1346784443 ps
T350 /workspace/coverage/default/40.sram_ctrl_bijection.3585020469 Jul 27 06:51:38 PM PDT 24 Jul 27 07:24:54 PM PDT 24 116881653021 ps
T351 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.2540104870 Jul 27 06:45:10 PM PDT 24 Jul 27 06:47:42 PM PDT 24 2066424251 ps
T352 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.2684218573 Jul 27 06:50:49 PM PDT 24 Jul 27 06:55:07 PM PDT 24 18108960032 ps
T353 /workspace/coverage/default/27.sram_ctrl_max_throughput.3674808242 Jul 27 06:49:06 PM PDT 24 Jul 27 06:49:22 PM PDT 24 1450748140 ps
T354 /workspace/coverage/default/37.sram_ctrl_smoke.866173550 Jul 27 06:50:58 PM PDT 24 Jul 27 06:51:03 PM PDT 24 346536998 ps
T355 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1974948444 Jul 27 06:45:27 PM PDT 24 Jul 27 06:54:55 PM PDT 24 84443744100 ps
T356 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3079881330 Jul 27 06:52:12 PM PDT 24 Jul 27 06:58:17 PM PDT 24 27687432032 ps
T357 /workspace/coverage/default/27.sram_ctrl_stress_all.1863137700 Jul 27 06:49:13 PM PDT 24 Jul 27 07:34:17 PM PDT 24 46310478606 ps
T358 /workspace/coverage/default/42.sram_ctrl_bijection.3860266562 Jul 27 06:52:04 PM PDT 24 Jul 27 07:28:35 PM PDT 24 95922024081 ps
T359 /workspace/coverage/default/19.sram_ctrl_max_throughput.742757265 Jul 27 06:47:27 PM PDT 24 Jul 27 06:50:12 PM PDT 24 2726809978 ps
T360 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.1830859040 Jul 27 06:45:51 PM PDT 24 Jul 27 06:55:57 PM PDT 24 11216330965 ps
T361 /workspace/coverage/default/39.sram_ctrl_max_throughput.2264089706 Jul 27 06:51:33 PM PDT 24 Jul 27 06:52:22 PM PDT 24 2177914493 ps
T362 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.2895014451 Jul 27 06:45:10 PM PDT 24 Jul 27 06:47:36 PM PDT 24 5116713136 ps
T363 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.4221366380 Jul 27 06:50:24 PM PDT 24 Jul 27 06:57:48 PM PDT 24 8346816876 ps
T364 /workspace/coverage/default/31.sram_ctrl_regwen.2555222062 Jul 27 06:49:53 PM PDT 24 Jul 27 07:10:43 PM PDT 24 35908656247 ps
T365 /workspace/coverage/default/41.sram_ctrl_mem_walk.1033883375 Jul 27 06:51:53 PM PDT 24 Jul 27 06:57:02 PM PDT 24 10937971126 ps
T366 /workspace/coverage/default/20.sram_ctrl_bijection.3316032297 Jul 27 06:47:36 PM PDT 24 Jul 27 06:55:41 PM PDT 24 57423168127 ps
T367 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.1946456339 Jul 27 06:45:57 PM PDT 24 Jul 27 06:50:15 PM PDT 24 9412253053 ps
T368 /workspace/coverage/default/21.sram_ctrl_ram_cfg.237443746 Jul 27 06:47:52 PM PDT 24 Jul 27 06:47:56 PM PDT 24 4194827460 ps
T369 /workspace/coverage/default/0.sram_ctrl_bijection.2038862635 Jul 27 06:45:03 PM PDT 24 Jul 27 07:20:33 PM PDT 24 448922100492 ps
T370 /workspace/coverage/default/44.sram_ctrl_bijection.95707116 Jul 27 06:52:33 PM PDT 24 Jul 27 07:24:44 PM PDT 24 34949425470 ps
T371 /workspace/coverage/default/41.sram_ctrl_alert_test.3725528173 Jul 27 06:51:56 PM PDT 24 Jul 27 06:51:56 PM PDT 24 14778371 ps
T372 /workspace/coverage/default/33.sram_ctrl_bijection.2294368955 Jul 27 06:50:15 PM PDT 24 Jul 27 07:27:46 PM PDT 24 33462704355 ps
T373 /workspace/coverage/default/39.sram_ctrl_lc_escalation.3007621259 Jul 27 06:51:34 PM PDT 24 Jul 27 06:52:44 PM PDT 24 12951627866 ps
T374 /workspace/coverage/default/25.sram_ctrl_mem_walk.2240021282 Jul 27 06:48:39 PM PDT 24 Jul 27 06:55:07 PM PDT 24 82709303197 ps
T375 /workspace/coverage/default/5.sram_ctrl_lc_escalation.1690407388 Jul 27 06:45:20 PM PDT 24 Jul 27 06:46:49 PM PDT 24 27706033390 ps
T376 /workspace/coverage/default/12.sram_ctrl_alert_test.404554399 Jul 27 06:46:16 PM PDT 24 Jul 27 06:46:17 PM PDT 24 18382612 ps
T377 /workspace/coverage/default/37.sram_ctrl_max_throughput.3278863607 Jul 27 06:50:57 PM PDT 24 Jul 27 06:51:36 PM PDT 24 7928304303 ps
T51 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.3359996487 Jul 27 06:51:23 PM PDT 24 Jul 27 06:51:56 PM PDT 24 4810467570 ps
T378 /workspace/coverage/default/25.sram_ctrl_ram_cfg.1695045937 Jul 27 06:48:35 PM PDT 24 Jul 27 06:48:39 PM PDT 24 1529010221 ps
T379 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1764740709 Jul 27 06:46:24 PM PDT 24 Jul 27 06:48:29 PM PDT 24 11175961350 ps
T380 /workspace/coverage/default/6.sram_ctrl_partial_access.3438522721 Jul 27 06:45:28 PM PDT 24 Jul 27 06:45:40 PM PDT 24 1564013863 ps
T381 /workspace/coverage/default/19.sram_ctrl_smoke.2870370202 Jul 27 06:47:27 PM PDT 24 Jul 27 06:47:33 PM PDT 24 1713031584 ps
T119 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2456222186 Jul 27 06:50:04 PM PDT 24 Jul 27 06:50:12 PM PDT 24 200849593 ps
T120 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3601419105 Jul 27 06:48:30 PM PDT 24 Jul 27 06:50:17 PM PDT 24 1947103795 ps
T382 /workspace/coverage/default/14.sram_ctrl_lc_escalation.379060257 Jul 27 06:46:33 PM PDT 24 Jul 27 06:47:36 PM PDT 24 10475519096 ps
T383 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.714648710 Jul 27 06:46:44 PM PDT 24 Jul 27 06:51:47 PM PDT 24 5751899858 ps
T384 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.3846051936 Jul 27 06:48:09 PM PDT 24 Jul 27 06:52:23 PM PDT 24 6796224695 ps
T385 /workspace/coverage/default/17.sram_ctrl_bijection.3490494486 Jul 27 06:47:03 PM PDT 24 Jul 27 07:26:17 PM PDT 24 101245294674 ps
T386 /workspace/coverage/default/49.sram_ctrl_ram_cfg.761965830 Jul 27 06:53:55 PM PDT 24 Jul 27 06:53:58 PM PDT 24 2176414710 ps
T387 /workspace/coverage/default/5.sram_ctrl_ram_cfg.616849493 Jul 27 06:45:21 PM PDT 24 Jul 27 06:45:25 PM PDT 24 2390616225 ps
T388 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1942910893 Jul 27 06:49:36 PM PDT 24 Jul 27 06:50:53 PM PDT 24 1572938152 ps
T389 /workspace/coverage/default/9.sram_ctrl_regwen.3765389647 Jul 27 06:45:50 PM PDT 24 Jul 27 07:09:50 PM PDT 24 16198344896 ps
T390 /workspace/coverage/default/3.sram_ctrl_stress_all.3357675477 Jul 27 06:45:10 PM PDT 24 Jul 27 07:58:09 PM PDT 24 62196358573 ps
T99 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.1988896087 Jul 27 06:53:52 PM PDT 24 Jul 27 06:56:25 PM PDT 24 4990741880 ps
T391 /workspace/coverage/default/15.sram_ctrl_multiple_keys.608491826 Jul 27 06:46:43 PM PDT 24 Jul 27 07:12:02 PM PDT 24 10509242160 ps
T392 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1953061523 Jul 27 06:50:16 PM PDT 24 Jul 27 06:51:04 PM PDT 24 773964389 ps
T393 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.3230743757 Jul 27 06:51:47 PM PDT 24 Jul 27 06:52:47 PM PDT 24 767615408 ps
T394 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.1250104709 Jul 27 06:45:09 PM PDT 24 Jul 27 06:55:14 PM PDT 24 42530849059 ps
T395 /workspace/coverage/default/9.sram_ctrl_ram_cfg.987623214 Jul 27 06:45:48 PM PDT 24 Jul 27 06:45:52 PM PDT 24 696489103 ps
T396 /workspace/coverage/default/7.sram_ctrl_regwen.1591664737 Jul 27 06:45:39 PM PDT 24 Jul 27 06:58:20 PM PDT 24 2709066548 ps
T397 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.2675035361 Jul 27 06:53:25 PM PDT 24 Jul 27 06:58:37 PM PDT 24 4729670433 ps
T398 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1910259287 Jul 27 06:52:11 PM PDT 24 Jul 27 06:53:21 PM PDT 24 3111635311 ps
T399 /workspace/coverage/default/17.sram_ctrl_multiple_keys.1936182366 Jul 27 06:47:04 PM PDT 24 Jul 27 06:56:25 PM PDT 24 4030975240 ps
T400 /workspace/coverage/default/47.sram_ctrl_mem_walk.1192829206 Jul 27 06:53:30 PM PDT 24 Jul 27 06:56:30 PM PDT 24 114932692539 ps
T401 /workspace/coverage/default/0.sram_ctrl_executable.1001166228 Jul 27 06:45:07 PM PDT 24 Jul 27 06:57:46 PM PDT 24 13238360879 ps
T402 /workspace/coverage/default/10.sram_ctrl_mem_walk.2180242033 Jul 27 06:45:59 PM PDT 24 Jul 27 06:52:26 PM PDT 24 163379428808 ps
T403 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.639165652 Jul 27 06:51:34 PM PDT 24 Jul 27 06:54:20 PM PDT 24 2843145406 ps
T404 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.1222110547 Jul 27 06:47:55 PM PDT 24 Jul 27 07:14:52 PM PDT 24 16329654846 ps
T405 /workspace/coverage/default/21.sram_ctrl_bijection.1285123976 Jul 27 06:47:45 PM PDT 24 Jul 27 07:07:16 PM PDT 24 276507303339 ps
T406 /workspace/coverage/default/10.sram_ctrl_lc_escalation.2962151415 Jul 27 06:46:01 PM PDT 24 Jul 27 06:47:03 PM PDT 24 141085465643 ps
T407 /workspace/coverage/default/45.sram_ctrl_mem_walk.104273274 Jul 27 06:52:55 PM PDT 24 Jul 27 06:58:29 PM PDT 24 14580785391 ps
T408 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2560549800 Jul 27 06:50:50 PM PDT 24 Jul 27 06:51:03 PM PDT 24 1192998772 ps
T409 /workspace/coverage/default/16.sram_ctrl_mem_walk.2749874265 Jul 27 06:47:01 PM PDT 24 Jul 27 06:49:05 PM PDT 24 1976701750 ps
T410 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.3453333318 Jul 27 06:50:57 PM PDT 24 Jul 27 07:01:39 PM PDT 24 20099580011 ps
T411 /workspace/coverage/default/24.sram_ctrl_alert_test.251977499 Jul 27 06:48:36 PM PDT 24 Jul 27 06:48:36 PM PDT 24 39884634 ps
T412 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.482350067 Jul 27 06:52:04 PM PDT 24 Jul 27 07:07:07 PM PDT 24 10579362031 ps
T413 /workspace/coverage/default/29.sram_ctrl_alert_test.2422023292 Jul 27 06:49:29 PM PDT 24 Jul 27 06:49:30 PM PDT 24 17750402 ps
T414 /workspace/coverage/default/10.sram_ctrl_max_throughput.3034896896 Jul 27 06:46:01 PM PDT 24 Jul 27 06:46:12 PM PDT 24 726031310 ps
T415 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.3582811043 Jul 27 06:49:55 PM PDT 24 Jul 27 06:52:43 PM PDT 24 3542749371 ps
T416 /workspace/coverage/default/34.sram_ctrl_lc_escalation.881613782 Jul 27 06:50:31 PM PDT 24 Jul 27 06:51:36 PM PDT 24 28947860550 ps
T417 /workspace/coverage/default/10.sram_ctrl_smoke.3305218855 Jul 27 06:45:58 PM PDT 24 Jul 27 06:46:10 PM PDT 24 2909136385 ps
T418 /workspace/coverage/default/48.sram_ctrl_lc_escalation.3280323027 Jul 27 06:53:38 PM PDT 24 Jul 27 06:54:38 PM PDT 24 10327383788 ps
T419 /workspace/coverage/default/31.sram_ctrl_stress_all.3951869338 Jul 27 06:49:55 PM PDT 24 Jul 27 08:19:19 PM PDT 24 281351820094 ps
T420 /workspace/coverage/default/40.sram_ctrl_executable.3817947403 Jul 27 06:51:40 PM PDT 24 Jul 27 07:10:50 PM PDT 24 43725187457 ps
T421 /workspace/coverage/default/7.sram_ctrl_multiple_keys.4238661561 Jul 27 06:45:30 PM PDT 24 Jul 27 07:01:27 PM PDT 24 18010748918 ps
T422 /workspace/coverage/default/1.sram_ctrl_bijection.1006103919 Jul 27 06:45:08 PM PDT 24 Jul 27 07:27:34 PM PDT 24 153424975577 ps
T423 /workspace/coverage/default/42.sram_ctrl_stress_all.3646207860 Jul 27 06:52:12 PM PDT 24 Jul 27 07:23:24 PM PDT 24 55816618712 ps
T424 /workspace/coverage/default/3.sram_ctrl_bijection.144528472 Jul 27 06:45:11 PM PDT 24 Jul 27 06:58:07 PM PDT 24 649230049475 ps
T425 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.2797036513 Jul 27 06:53:44 PM PDT 24 Jul 27 07:17:09 PM PDT 24 10873483114 ps
T426 /workspace/coverage/default/21.sram_ctrl_mem_walk.2557136778 Jul 27 06:47:52 PM PDT 24 Jul 27 06:52:54 PM PDT 24 10719723795 ps
T427 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.1100105827 Jul 27 06:48:20 PM PDT 24 Jul 27 06:52:12 PM PDT 24 4582150685 ps
T428 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.1765700019 Jul 27 06:48:03 PM PDT 24 Jul 27 06:58:36 PM PDT 24 194947953046 ps
T429 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.109564478 Jul 27 06:46:17 PM PDT 24 Jul 27 06:46:44 PM PDT 24 3402843674 ps
T430 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.179902193 Jul 27 06:46:55 PM PDT 24 Jul 27 06:49:16 PM PDT 24 2445349371 ps
T431 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.147837275 Jul 27 06:48:46 PM PDT 24 Jul 27 06:49:42 PM PDT 24 2997961886 ps
T432 /workspace/coverage/default/37.sram_ctrl_stress_all.905501990 Jul 27 06:51:14 PM PDT 24 Jul 27 07:55:10 PM PDT 24 21507302901 ps
T433 /workspace/coverage/default/0.sram_ctrl_stress_all.1198732850 Jul 27 06:45:07 PM PDT 24 Jul 27 07:51:30 PM PDT 24 102233081551 ps
T434 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.3475283369 Jul 27 06:52:23 PM PDT 24 Jul 27 07:01:16 PM PDT 24 8008080476 ps
T435 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.4161036958 Jul 27 06:50:42 PM PDT 24 Jul 27 06:51:08 PM PDT 24 3000116385 ps
T436 /workspace/coverage/default/48.sram_ctrl_max_throughput.149714276 Jul 27 06:53:28 PM PDT 24 Jul 27 06:53:51 PM PDT 24 5384466202 ps
T437 /workspace/coverage/default/0.sram_ctrl_ram_cfg.3990553646 Jul 27 06:45:06 PM PDT 24 Jul 27 06:45:09 PM PDT 24 762545862 ps
T438 /workspace/coverage/default/38.sram_ctrl_ram_cfg.1255198324 Jul 27 06:51:23 PM PDT 24 Jul 27 06:51:26 PM PDT 24 357798593 ps
T439 /workspace/coverage/default/49.sram_ctrl_executable.3192402678 Jul 27 06:53:46 PM PDT 24 Jul 27 07:09:16 PM PDT 24 66685199740 ps
T440 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.4080640274 Jul 27 06:46:54 PM PDT 24 Jul 27 06:56:28 PM PDT 24 38261782852 ps
T441 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.80814594 Jul 27 06:44:56 PM PDT 24 Jul 27 06:45:10 PM PDT 24 1402226008 ps
T442 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.651533533 Jul 27 06:48:35 PM PDT 24 Jul 27 06:53:53 PM PDT 24 14658117109 ps
T443 /workspace/coverage/default/39.sram_ctrl_multiple_keys.116247411 Jul 27 06:51:30 PM PDT 24 Jul 27 06:54:43 PM PDT 24 3663718971 ps
T444 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.2179103764 Jul 27 06:48:12 PM PDT 24 Jul 27 07:08:15 PM PDT 24 60669217111 ps
T445 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.3536787659 Jul 27 06:50:17 PM PDT 24 Jul 27 06:55:08 PM PDT 24 10435727736 ps
T446 /workspace/coverage/default/49.sram_ctrl_stress_all.3161571545 Jul 27 06:53:53 PM PDT 24 Jul 27 07:26:46 PM PDT 24 321307847167 ps
T447 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.3729736492 Jul 27 06:52:47 PM PDT 24 Jul 27 07:06:22 PM PDT 24 11857651506 ps
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T533 /workspace/coverage/default/22.sram_ctrl_max_throughput.2572345546 Jul 27 06:48:04 PM PDT 24 Jul 27 06:48:59 PM PDT 24 14619761818 ps
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T536 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1055462773 Jul 27 06:44:54 PM PDT 24 Jul 27 06:48:58 PM PDT 24 8347038727 ps
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T538 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.192726198 Jul 27 06:47:36 PM PDT 24 Jul 27 06:49:48 PM PDT 24 3256090317 ps
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T541 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2659193897 Jul 27 06:47:27 PM PDT 24 Jul 27 06:50:35 PM PDT 24 6183892164 ps
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T543 /workspace/coverage/default/27.sram_ctrl_mem_walk.1126177860 Jul 27 06:49:02 PM PDT 24 Jul 27 06:54:48 PM PDT 24 21320109112 ps
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T545 /workspace/coverage/default/8.sram_ctrl_bijection.2579832504 Jul 27 06:45:43 PM PDT 24 Jul 27 07:13:33 PM PDT 24 84654579093 ps
T546 /workspace/coverage/default/1.sram_ctrl_smoke.3803505339 Jul 27 06:45:06 PM PDT 24 Jul 27 06:45:21 PM PDT 24 2204739499 ps
T547 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.2086734273 Jul 27 06:53:38 PM PDT 24 Jul 27 06:55:02 PM PDT 24 7304600888 ps
T548 /workspace/coverage/default/13.sram_ctrl_max_throughput.1376182766 Jul 27 06:46:26 PM PDT 24 Jul 27 06:47:45 PM PDT 24 5778321666 ps
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