Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3969723125 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3077383513 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2836946122 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.4283865637 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3233099410 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.482253095 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3238668916 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2685802822 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1870086078 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2187443196 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.726101506 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3523694928 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.4055345395 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2047380789 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.448198022 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1164379709 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1384883615 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2642827498 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2040885467 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2621745986 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2906051737 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3938316047 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1574503232 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2498646302 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.4147295571 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1076688821 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3142479034 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1638240601 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.833076440 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.4239728891 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.929817370 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2532176993 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.841148395 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1869085551 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2966352394 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2265516400 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2545550715 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3481185876 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2702254230 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2839536932 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.4009451113 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1606275895 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2065317243 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2378609311 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1237864944 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3335137295 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3557486617 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.759387982 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3186243076 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.143452727 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3424326329 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.3057569607 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.4216086228 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2221315941 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2875166456 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.139140414 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.4091845219 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.272665566 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3129189479 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3059791393 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1500719852 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3090336559 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1383313446 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1517427176 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3731697105 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.4268346230 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1731427754 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3038675012 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3104411529 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2850523384 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2786651566 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1603641294 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2067195058 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3505682940 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1120526988 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1653362745 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.576520603 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3804859562 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3007823820 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3429562212 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3975837947 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2151811799 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.130647156 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3339416809 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1867866627 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3721309821 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1450700970 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3769621898 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.731494989 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2659099072 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1615111708 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1002474534 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3211913158 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2833091864 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2901819400 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.606755621 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3446398216 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1264352039 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.4006756866 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.4216634052 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3385535117 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.62215692 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2275168207 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2707107387 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1075535047 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.389576422 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1323306110 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1009320986 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3594670206 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.4045312552 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1695828839 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1351554055 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2115000807 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1945630021 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2376003667 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2961697175 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1690650424 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.453052557 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3544918338 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3288734600 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2288299406 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2932927490 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1682864779 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1737557652 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.3276163196 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2957054814 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2251971636 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1386261791 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3825962553 |
/workspace/coverage/default/0.sram_ctrl_alert_test.4251031289 |
/workspace/coverage/default/0.sram_ctrl_bijection.2038862635 |
/workspace/coverage/default/0.sram_ctrl_executable.1001166228 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3594624372 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.2892055511 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2438937687 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.3031199346 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3012728534 |
/workspace/coverage/default/0.sram_ctrl_partial_access.2704537826 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1055462773 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3990553646 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.1628710846 |
/workspace/coverage/default/0.sram_ctrl_smoke.1432678337 |
/workspace/coverage/default/0.sram_ctrl_stress_all.1198732850 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.16221709 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3590036233 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.80814594 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.591760207 |
/workspace/coverage/default/1.sram_ctrl_bijection.1006103919 |
/workspace/coverage/default/1.sram_ctrl_executable.1468772477 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2975686915 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.1805753521 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2895014451 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.3668838069 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2385443375 |
/workspace/coverage/default/1.sram_ctrl_partial_access.1211244582 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.625061224 |
/workspace/coverage/default/1.sram_ctrl_regwen.4080608216 |
/workspace/coverage/default/1.sram_ctrl_smoke.3803505339 |
/workspace/coverage/default/1.sram_ctrl_stress_all.3513973158 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1318029261 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.768087082 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2058167349 |
/workspace/coverage/default/10.sram_ctrl_alert_test.272540731 |
/workspace/coverage/default/10.sram_ctrl_bijection.165969425 |
/workspace/coverage/default/10.sram_ctrl_executable.1538693976 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2962151415 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.3034896896 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.94046414 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.2180242033 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.408829899 |
/workspace/coverage/default/10.sram_ctrl_partial_access.7531973 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2499252179 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.368327472 |
/workspace/coverage/default/10.sram_ctrl_regwen.3331689684 |
/workspace/coverage/default/10.sram_ctrl_smoke.3305218855 |
/workspace/coverage/default/10.sram_ctrl_stress_all.3188214793 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1870691811 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3625897591 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3873766791 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3634711130 |
/workspace/coverage/default/11.sram_ctrl_alert_test.2725822350 |
/workspace/coverage/default/11.sram_ctrl_bijection.3312746465 |
/workspace/coverage/default/11.sram_ctrl_executable.2621995843 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.4287716355 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.2968129231 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2314110270 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.14874129 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.4041571290 |
/workspace/coverage/default/11.sram_ctrl_partial_access.716364430 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3036545852 |
/workspace/coverage/default/11.sram_ctrl_regwen.2652304448 |
/workspace/coverage/default/11.sram_ctrl_smoke.2817053378 |
/workspace/coverage/default/11.sram_ctrl_stress_all.898165311 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3592840705 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1272892765 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.4177243720 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.406474528 |
/workspace/coverage/default/12.sram_ctrl_alert_test.404554399 |
/workspace/coverage/default/12.sram_ctrl_bijection.2726659759 |
/workspace/coverage/default/12.sram_ctrl_executable.3985703560 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3658514559 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.1649521156 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3188151343 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.375113881 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1113765671 |
/workspace/coverage/default/12.sram_ctrl_partial_access.2989033114 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3699173421 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.448856747 |
/workspace/coverage/default/12.sram_ctrl_regwen.3176995243 |
/workspace/coverage/default/12.sram_ctrl_smoke.3644955591 |
/workspace/coverage/default/12.sram_ctrl_stress_all.638290706 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1907859774 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3831187106 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.109564478 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.103132821 |
/workspace/coverage/default/13.sram_ctrl_alert_test.3707216884 |
/workspace/coverage/default/13.sram_ctrl_bijection.2286258455 |
/workspace/coverage/default/13.sram_ctrl_executable.3224788067 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.2317326798 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.1376182766 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2139827397 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.4170934804 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.3657752409 |
/workspace/coverage/default/13.sram_ctrl_partial_access.2128214933 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3871857494 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.186526584 |
/workspace/coverage/default/13.sram_ctrl_regwen.3679634476 |
/workspace/coverage/default/13.sram_ctrl_smoke.212995371 |
/workspace/coverage/default/13.sram_ctrl_stress_all.1859591863 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1661224704 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.2590743525 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1764740709 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.1877061188 |
/workspace/coverage/default/14.sram_ctrl_alert_test.441503091 |
/workspace/coverage/default/14.sram_ctrl_bijection.269579434 |
/workspace/coverage/default/14.sram_ctrl_executable.3914934489 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.379060257 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.1748471746 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.1780554370 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.1849969220 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.1768634585 |
/workspace/coverage/default/14.sram_ctrl_partial_access.3513010933 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.4052531968 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.514742308 |
/workspace/coverage/default/14.sram_ctrl_regwen.4048615559 |
/workspace/coverage/default/14.sram_ctrl_smoke.4159864441 |
/workspace/coverage/default/14.sram_ctrl_stress_all.4202548727 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.2017049472 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1420756038 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.4068438643 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1484967011 |
/workspace/coverage/default/15.sram_ctrl_alert_test.95609380 |
/workspace/coverage/default/15.sram_ctrl_bijection.2475586524 |
/workspace/coverage/default/15.sram_ctrl_executable.2525750183 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.4187681829 |
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/workspace/coverage/default/44.sram_ctrl_mem_walk.3964340450 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.106977988 |
/workspace/coverage/default/44.sram_ctrl_partial_access.835969702 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1423853423 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.427051474 |
/workspace/coverage/default/44.sram_ctrl_regwen.3442284297 |
/workspace/coverage/default/44.sram_ctrl_smoke.324917465 |
/workspace/coverage/default/44.sram_ctrl_stress_all.787332040 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.360538766 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2738039456 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1228638587 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3729736492 |
/workspace/coverage/default/45.sram_ctrl_alert_test.3657362109 |
/workspace/coverage/default/45.sram_ctrl_bijection.3190868438 |
/workspace/coverage/default/45.sram_ctrl_executable.2945173772 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1284934026 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.1280357146 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3031416684 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.104273274 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3165105343 |
/workspace/coverage/default/45.sram_ctrl_partial_access.2630246040 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2899889093 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.32356912 |
/workspace/coverage/default/45.sram_ctrl_regwen.2358690532 |
/workspace/coverage/default/45.sram_ctrl_smoke.2177232533 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1054263024 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1604024718 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.613059531 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.310754953 |
/workspace/coverage/default/46.sram_ctrl_alert_test.353556841 |
/workspace/coverage/default/46.sram_ctrl_bijection.1854824415 |
/workspace/coverage/default/46.sram_ctrl_executable.441481775 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3068530694 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2570022399 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.947532520 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.120808912 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.128122746 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1156070123 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3033181611 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3831791164 |
/workspace/coverage/default/46.sram_ctrl_regwen.2814673217 |
/workspace/coverage/default/46.sram_ctrl_smoke.2540605549 |
/workspace/coverage/default/46.sram_ctrl_stress_all.2591067547 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.968747913 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3342574369 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3910860607 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.794336714 |
/workspace/coverage/default/47.sram_ctrl_alert_test.1595824526 |
/workspace/coverage/default/47.sram_ctrl_bijection.2447756017 |
/workspace/coverage/default/47.sram_ctrl_executable.1274598630 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2435207504 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.4128635934 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3219782523 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.1192829206 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.215766057 |
/workspace/coverage/default/47.sram_ctrl_partial_access.3198852003 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1231676155 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3563165865 |
/workspace/coverage/default/47.sram_ctrl_regwen.548809184 |
/workspace/coverage/default/47.sram_ctrl_smoke.711474480 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2435881717 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2675035361 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3138321384 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.4050436560 |
/workspace/coverage/default/48.sram_ctrl_alert_test.3255967602 |
/workspace/coverage/default/48.sram_ctrl_bijection.1565494090 |
/workspace/coverage/default/48.sram_ctrl_executable.1135779663 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3280323027 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.149714276 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2086734273 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.1475117026 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3328373000 |
/workspace/coverage/default/48.sram_ctrl_partial_access.2196984064 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1634711315 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.845925103 |
/workspace/coverage/default/48.sram_ctrl_regwen.3145889061 |
/workspace/coverage/default/48.sram_ctrl_smoke.4159157746 |
/workspace/coverage/default/48.sram_ctrl_stress_all.2318771382 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.4294589618 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1532766558 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.781721866 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2797036513 |
/workspace/coverage/default/49.sram_ctrl_alert_test.4268684994 |
/workspace/coverage/default/49.sram_ctrl_bijection.887126823 |
/workspace/coverage/default/49.sram_ctrl_executable.3192402678 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3718845360 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.1340993647 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1988896087 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.1377942617 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3565450809 |
/workspace/coverage/default/49.sram_ctrl_partial_access.2984249038 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3130466257 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.761965830 |
/workspace/coverage/default/49.sram_ctrl_regwen.1378726408 |
/workspace/coverage/default/49.sram_ctrl_smoke.4260990030 |
/workspace/coverage/default/49.sram_ctrl_stress_all.3161571545 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.215413134 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1589071140 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2668600557 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.611246490 |
/workspace/coverage/default/5.sram_ctrl_alert_test.1012048341 |
/workspace/coverage/default/5.sram_ctrl_bijection.2419927508 |
/workspace/coverage/default/5.sram_ctrl_executable.685389464 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1690407388 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.241214800 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2855533199 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.26543433 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3671590540 |
/workspace/coverage/default/5.sram_ctrl_partial_access.40007165 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2371988497 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.616849493 |
/workspace/coverage/default/5.sram_ctrl_regwen.682475541 |
/workspace/coverage/default/5.sram_ctrl_smoke.1436385581 |
/workspace/coverage/default/5.sram_ctrl_stress_all.447088514 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2364473770 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3917285945 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1317130573 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.4174213107 |
/workspace/coverage/default/6.sram_ctrl_alert_test.1480109605 |
/workspace/coverage/default/6.sram_ctrl_bijection.2417847849 |
/workspace/coverage/default/6.sram_ctrl_executable.1570480648 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.110270848 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.992095082 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2253048767 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.2219785468 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1777986592 |
/workspace/coverage/default/6.sram_ctrl_partial_access.3438522721 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1974948444 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.902550244 |
/workspace/coverage/default/6.sram_ctrl_regwen.2037763355 |
/workspace/coverage/default/6.sram_ctrl_smoke.3407896202 |
/workspace/coverage/default/6.sram_ctrl_stress_all.3542548416 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1037695014 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3256552485 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.567377490 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1481515186 |
/workspace/coverage/default/7.sram_ctrl_alert_test.3669824003 |
/workspace/coverage/default/7.sram_ctrl_bijection.1148055349 |
/workspace/coverage/default/7.sram_ctrl_executable.752072162 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3899502237 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.702274567 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2402909311 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.3119905078 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.4238661561 |
/workspace/coverage/default/7.sram_ctrl_partial_access.3069427245 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2453302418 |
/workspace/coverage/default/7.sram_ctrl_regwen.1591664737 |
/workspace/coverage/default/7.sram_ctrl_smoke.1138902681 |
/workspace/coverage/default/7.sram_ctrl_stress_all.2248603440 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2410756014 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1307342318 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2592144080 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2852499941 |
/workspace/coverage/default/8.sram_ctrl_alert_test.1058113572 |
/workspace/coverage/default/8.sram_ctrl_bijection.2579832504 |
/workspace/coverage/default/8.sram_ctrl_executable.1388445928 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.351872343 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.1518791840 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.4051102075 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.485925231 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1015447632 |
/workspace/coverage/default/8.sram_ctrl_partial_access.3499820706 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2566300446 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.626473092 |
/workspace/coverage/default/8.sram_ctrl_regwen.1092182373 |
/workspace/coverage/default/8.sram_ctrl_smoke.1313682405 |
/workspace/coverage/default/8.sram_ctrl_stress_all.2280274230 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1518413577 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2196575836 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3719530351 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1830859040 |
/workspace/coverage/default/9.sram_ctrl_alert_test.2821826426 |
/workspace/coverage/default/9.sram_ctrl_bijection.653733607 |
/workspace/coverage/default/9.sram_ctrl_executable.2154288879 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.4118607544 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.3585191031 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1010889042 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.3998904262 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3565840929 |
/workspace/coverage/default/9.sram_ctrl_partial_access.3179216405 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.218908964 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.987623214 |
/workspace/coverage/default/9.sram_ctrl_regwen.3765389647 |
/workspace/coverage/default/9.sram_ctrl_smoke.2071980474 |
/workspace/coverage/default/9.sram_ctrl_stress_all.1014479943 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1243206441 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1946456339 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1648320033 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/26.sram_ctrl_bijection.3639706117 |
|
|
Jul 27 06:48:46 PM PDT 24 |
Jul 27 07:10:10 PM PDT 24 |
200114534107 ps |
T2 |
/workspace/coverage/default/46.sram_ctrl_smoke.2540605549 |
|
|
Jul 27 06:52:56 PM PDT 24 |
Jul 27 06:55:14 PM PDT 24 |
2712305874 ps |
T3 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.941903362 |
|
|
Jul 27 06:47:44 PM PDT 24 |
Jul 27 06:49:18 PM PDT 24 |
1591479211 ps |
T5 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.3497921798 |
|
|
Jul 27 06:49:38 PM PDT 24 |
Jul 27 06:51:08 PM PDT 24 |
3164975588 ps |
T4 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.515664706 |
|
|
Jul 27 06:50:41 PM PDT 24 |
Jul 27 07:04:33 PM PDT 24 |
10364437654 ps |
T9 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.3829762989 |
|
|
Jul 27 06:48:30 PM PDT 24 |
Jul 27 06:50:37 PM PDT 24 |
3909615711 ps |
T10 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1011168123 |
|
|
Jul 27 06:45:29 PM PDT 24 |
Jul 27 06:51:54 PM PDT 24 |
16043151580 ps |
T11 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.2724466626 |
|
|
Jul 27 06:48:05 PM PDT 24 |
Jul 27 06:54:01 PM PDT 24 |
36154305264 ps |
T12 |
/workspace/coverage/default/10.sram_ctrl_bijection.165969425 |
|
|
Jul 27 06:45:58 PM PDT 24 |
Jul 27 07:22:57 PM PDT 24 |
32154806543 ps |
T13 |
/workspace/coverage/default/25.sram_ctrl_executable.3389140530 |
|
|
Jul 27 06:48:37 PM PDT 24 |
Jul 27 06:57:41 PM PDT 24 |
37453850993 ps |
T46 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.1551346672 |
|
|
Jul 27 06:45:15 PM PDT 24 |
Jul 27 06:47:58 PM PDT 24 |
10659211440 ps |
T47 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.218838340 |
|
|
Jul 27 06:51:16 PM PDT 24 |
Jul 27 07:06:27 PM PDT 24 |
33611378710 ps |
T14 |
/workspace/coverage/default/22.sram_ctrl_alert_test.3643999532 |
|
|
Jul 27 06:48:11 PM PDT 24 |
Jul 27 06:48:12 PM PDT 24 |
22246375 ps |
T45 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.4051102075 |
|
|
Jul 27 06:45:57 PM PDT 24 |
Jul 27 06:47:11 PM PDT 24 |
2685206178 ps |
T48 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.2451355163 |
|
|
Jul 27 06:51:43 PM PDT 24 |
Jul 27 06:54:10 PM PDT 24 |
3066879061 ps |
T21 |
/workspace/coverage/default/14.sram_ctrl_bijection.269579434 |
|
|
Jul 27 06:46:32 PM PDT 24 |
Jul 27 07:32:37 PM PDT 24 |
689636475693 ps |
T59 |
/workspace/coverage/default/27.sram_ctrl_partial_access.2012748530 |
|
|
Jul 27 06:49:05 PM PDT 24 |
Jul 27 06:49:19 PM PDT 24 |
966106140 ps |
T22 |
/workspace/coverage/default/18.sram_ctrl_regwen.1506497202 |
|
|
Jul 27 06:47:18 PM PDT 24 |
Jul 27 07:06:41 PM PDT 24 |
16310555490 ps |
T49 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1484967011 |
|
|
Jul 27 06:46:44 PM PDT 24 |
Jul 27 07:02:42 PM PDT 24 |
11966501388 ps |
T27 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.547340744 |
|
|
Jul 27 06:51:58 PM PDT 24 |
Jul 27 06:52:43 PM PDT 24 |
2241884105 ps |
T71 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3831187106 |
|
|
Jul 27 06:46:19 PM PDT 24 |
Jul 27 06:51:16 PM PDT 24 |
5331132129 ps |
T72 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.387340479 |
|
|
Jul 27 06:51:37 PM PDT 24 |
Jul 27 06:59:31 PM PDT 24 |
53389364649 ps |
T30 |
/workspace/coverage/default/45.sram_ctrl_regwen.2358690532 |
|
|
Jul 27 06:52:48 PM PDT 24 |
Jul 27 07:12:55 PM PDT 24 |
13653789445 ps |
T23 |
/workspace/coverage/default/0.sram_ctrl_regwen.2036182909 |
|
|
Jul 27 06:45:09 PM PDT 24 |
Jul 27 07:06:02 PM PDT 24 |
73711410211 ps |
T73 |
/workspace/coverage/default/34.sram_ctrl_executable.322343651 |
|
|
Jul 27 06:50:36 PM PDT 24 |
Jul 27 07:04:03 PM PDT 24 |
113831431278 ps |
T24 |
/workspace/coverage/default/17.sram_ctrl_regwen.469545700 |
|
|
Jul 27 06:47:10 PM PDT 24 |
Jul 27 06:58:49 PM PDT 24 |
17314525177 ps |
T50 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.2377406622 |
|
|
Jul 27 06:51:25 PM PDT 24 |
Jul 27 06:56:41 PM PDT 24 |
52503958664 ps |
T80 |
/workspace/coverage/default/23.sram_ctrl_partial_access.633743298 |
|
|
Jul 27 06:48:14 PM PDT 24 |
Jul 27 06:48:37 PM PDT 24 |
6086497566 ps |
T81 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.1735984980 |
|
|
Jul 27 06:50:04 PM PDT 24 |
Jul 27 06:56:47 PM PDT 24 |
18937533020 ps |
T96 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.774980278 |
|
|
Jul 27 06:49:04 PM PDT 24 |
Jul 27 06:50:20 PM PDT 24 |
18163064109 ps |
T111 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.1121687800 |
|
|
Jul 27 06:49:55 PM PDT 24 |
Jul 27 06:57:46 PM PDT 24 |
78203413615 ps |
T6 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.3699765773 |
|
|
Jul 27 06:50:17 PM PDT 24 |
Jul 27 06:50:53 PM PDT 24 |
22186588950 ps |
T145 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.1321008527 |
|
|
Jul 27 06:48:37 PM PDT 24 |
Jul 27 06:49:20 PM PDT 24 |
746802160 ps |
T7 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3899502237 |
|
|
Jul 27 06:45:38 PM PDT 24 |
Jul 27 06:46:42 PM PDT 24 |
41630710150 ps |
T147 |
/workspace/coverage/default/32.sram_ctrl_partial_access.1770086961 |
|
|
Jul 27 06:49:56 PM PDT 24 |
Jul 27 06:51:08 PM PDT 24 |
8687371739 ps |
T8 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.47447618 |
|
|
Jul 27 06:50:40 PM PDT 24 |
Jul 27 06:51:18 PM PDT 24 |
5625535282 ps |
T146 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.567377490 |
|
|
Jul 27 06:45:30 PM PDT 24 |
Jul 27 06:46:07 PM PDT 24 |
1459223447 ps |
T144 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.2630946208 |
|
|
Jul 27 06:48:13 PM PDT 24 |
Jul 27 06:49:05 PM PDT 24 |
2892399375 ps |
T69 |
/workspace/coverage/default/14.sram_ctrl_stress_all.4202548727 |
|
|
Jul 27 06:46:45 PM PDT 24 |
Jul 27 08:36:59 PM PDT 24 |
1112846420965 ps |
T149 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.1805753521 |
|
|
Jul 27 06:45:08 PM PDT 24 |
Jul 27 06:46:01 PM PDT 24 |
1567691658 ps |
T112 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3142778988 |
|
|
Jul 27 06:45:17 PM PDT 24 |
Jul 27 06:48:45 PM PDT 24 |
3759848462 ps |
T143 |
/workspace/coverage/default/39.sram_ctrl_bijection.1928444174 |
|
|
Jul 27 06:51:33 PM PDT 24 |
Jul 27 07:28:16 PM PDT 24 |
539753353114 ps |
T31 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.427051474 |
|
|
Jul 27 06:52:52 PM PDT 24 |
Jul 27 06:52:56 PM PDT 24 |
1001177642 ps |
T70 |
/workspace/coverage/default/26.sram_ctrl_stress_all.1175347692 |
|
|
Jul 27 06:48:56 PM PDT 24 |
Jul 27 07:55:28 PM PDT 24 |
277657080969 ps |
T53 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.1943523975 |
|
|
Jul 27 06:50:58 PM PDT 24 |
Jul 27 06:53:30 PM PDT 24 |
16321230960 ps |
T82 |
/workspace/coverage/default/30.sram_ctrl_regwen.1276186129 |
|
|
Jul 27 06:49:37 PM PDT 24 |
Jul 27 07:16:16 PM PDT 24 |
44783692287 ps |
T150 |
/workspace/coverage/default/38.sram_ctrl_regwen.4076252175 |
|
|
Jul 27 06:51:24 PM PDT 24 |
Jul 27 07:00:04 PM PDT 24 |
6163884850 ps |
T25 |
/workspace/coverage/default/29.sram_ctrl_stress_all.1858811606 |
|
|
Jul 27 06:49:32 PM PDT 24 |
Jul 27 07:44:09 PM PDT 24 |
1792652457159 ps |
T151 |
/workspace/coverage/default/16.sram_ctrl_smoke.2435108937 |
|
|
Jul 27 06:46:51 PM PDT 24 |
Jul 27 06:46:58 PM PDT 24 |
1476010574 ps |
T97 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.2798128199 |
|
|
Jul 27 06:47:44 PM PDT 24 |
Jul 27 07:04:09 PM PDT 24 |
35891393527 ps |
T28 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.1281967043 |
|
|
Jul 27 06:49:54 PM PDT 24 |
Jul 27 06:50:21 PM PDT 24 |
3492433424 ps |
T29 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3905816173 |
|
|
Jul 27 06:45:09 PM PDT 24 |
Jul 27 06:45:34 PM PDT 24 |
1038259578 ps |
T148 |
/workspace/coverage/default/48.sram_ctrl_bijection.1565494090 |
|
|
Jul 27 06:53:29 PM PDT 24 |
Jul 27 07:27:39 PM PDT 24 |
364981784578 ps |
T152 |
/workspace/coverage/default/22.sram_ctrl_partial_access.2985744364 |
|
|
Jul 27 06:48:04 PM PDT 24 |
Jul 27 06:48:23 PM PDT 24 |
7140321229 ps |
T98 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3825962553 |
|
|
Jul 27 06:45:07 PM PDT 24 |
Jul 27 07:00:32 PM PDT 24 |
65907847900 ps |
T153 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.127354086 |
|
|
Jul 27 06:51:14 PM PDT 24 |
Jul 27 06:51:23 PM PDT 24 |
696377405 ps |
T154 |
/workspace/coverage/default/31.sram_ctrl_smoke.1990866578 |
|
|
Jul 27 06:49:49 PM PDT 24 |
Jul 27 06:50:00 PM PDT 24 |
3875346802 ps |
T155 |
/workspace/coverage/default/18.sram_ctrl_bijection.1132367747 |
|
|
Jul 27 06:47:17 PM PDT 24 |
Jul 27 07:14:01 PM PDT 24 |
97638205467 ps |
T26 |
/workspace/coverage/default/47.sram_ctrl_stress_all.861841917 |
|
|
Jul 27 06:53:30 PM PDT 24 |
Jul 27 07:45:52 PM PDT 24 |
450132751217 ps |
T137 |
/workspace/coverage/default/35.sram_ctrl_stress_all.1043759886 |
|
|
Jul 27 06:50:48 PM PDT 24 |
Jul 27 09:30:55 PM PDT 24 |
278422155004 ps |
T156 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2385443375 |
|
|
Jul 27 06:45:08 PM PDT 24 |
Jul 27 06:55:28 PM PDT 24 |
22996609209 ps |
T157 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.2040932696 |
|
|
Jul 27 06:51:57 PM PDT 24 |
Jul 27 07:04:07 PM PDT 24 |
11304296110 ps |
T158 |
/workspace/coverage/default/35.sram_ctrl_bijection.4173769135 |
|
|
Jul 27 06:50:33 PM PDT 24 |
Jul 27 07:02:58 PM PDT 24 |
32472090133 ps |
T55 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.109149196 |
|
|
Jul 27 06:51:30 PM PDT 24 |
Jul 27 06:52:53 PM PDT 24 |
2623970516 ps |
T159 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.2195975955 |
|
|
Jul 27 06:46:52 PM PDT 24 |
Jul 27 06:47:51 PM PDT 24 |
786978365 ps |
T160 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.1301897867 |
|
|
Jul 27 06:47:28 PM PDT 24 |
Jul 27 06:49:34 PM PDT 24 |
3730061470 ps |
T74 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.1342023866 |
|
|
Jul 27 06:50:33 PM PDT 24 |
Jul 27 06:51:02 PM PDT 24 |
2170773519 ps |
T161 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.811424234 |
|
|
Jul 27 06:49:49 PM PDT 24 |
Jul 27 06:59:54 PM PDT 24 |
5575031503 ps |
T123 |
/workspace/coverage/default/34.sram_ctrl_stress_all.3791202902 |
|
|
Jul 27 06:50:32 PM PDT 24 |
Jul 27 08:15:21 PM PDT 24 |
206789306343 ps |
T162 |
/workspace/coverage/default/15.sram_ctrl_regwen.214023074 |
|
|
Jul 27 06:46:42 PM PDT 24 |
Jul 27 06:47:14 PM PDT 24 |
949211271 ps |
T163 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3634711130 |
|
|
Jul 27 06:46:06 PM PDT 24 |
Jul 27 06:52:21 PM PDT 24 |
10414495466 ps |
T57 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.485925231 |
|
|
Jul 27 06:45:52 PM PDT 24 |
Jul 27 06:51:06 PM PDT 24 |
21875113025 ps |
T164 |
/workspace/coverage/default/12.sram_ctrl_smoke.3644955591 |
|
|
Jul 27 06:46:08 PM PDT 24 |
Jul 27 06:46:19 PM PDT 24 |
1877840182 ps |
T138 |
/workspace/coverage/default/37.sram_ctrl_regwen.3262500911 |
|
|
Jul 27 06:51:06 PM PDT 24 |
Jul 27 07:00:16 PM PDT 24 |
8752216893 ps |
T165 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3165105343 |
|
|
Jul 27 06:52:40 PM PDT 24 |
Jul 27 07:11:05 PM PDT 24 |
37131179996 ps |
T166 |
/workspace/coverage/default/19.sram_ctrl_stress_all.1678480200 |
|
|
Jul 27 06:47:35 PM PDT 24 |
Jul 27 08:00:05 PM PDT 24 |
83152402129 ps |
T107 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1481515186 |
|
|
Jul 27 06:45:40 PM PDT 24 |
Jul 27 07:11:55 PM PDT 24 |
191846877528 ps |
T167 |
/workspace/coverage/default/32.sram_ctrl_stress_all.1153719227 |
|
|
Jul 27 06:50:08 PM PDT 24 |
Jul 27 07:26:59 PM PDT 24 |
114671812763 ps |
T168 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1398807113 |
|
|
Jul 27 06:50:36 PM PDT 24 |
Jul 27 06:51:13 PM PDT 24 |
1418217446 ps |
T169 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.2892055511 |
|
|
Jul 27 06:45:03 PM PDT 24 |
Jul 27 06:46:18 PM PDT 24 |
799500156 ps |
T170 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2058167349 |
|
|
Jul 27 06:46:05 PM PDT 24 |
Jul 27 07:14:44 PM PDT 24 |
20262844689 ps |
T171 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.4276932912 |
|
|
Jul 27 06:46:55 PM PDT 24 |
Jul 27 06:47:05 PM PDT 24 |
698157243 ps |
T172 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.3132301521 |
|
|
Jul 27 06:46:54 PM PDT 24 |
Jul 27 06:48:22 PM PDT 24 |
26702918361 ps |
T113 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.1685379343 |
|
|
Jul 27 06:50:36 PM PDT 24 |
Jul 27 06:55:14 PM PDT 24 |
6833241525 ps |
T173 |
/workspace/coverage/default/18.sram_ctrl_partial_access.1402702934 |
|
|
Jul 27 06:47:18 PM PDT 24 |
Jul 27 06:47:33 PM PDT 24 |
1739671382 ps |
T58 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1560783649 |
|
|
Jul 27 06:52:41 PM PDT 24 |
Jul 27 06:55:29 PM PDT 24 |
5113709188 ps |
T75 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.931433881 |
|
|
Jul 27 06:47:42 PM PDT 24 |
Jul 27 06:47:55 PM PDT 24 |
364535403 ps |
T139 |
/workspace/coverage/default/4.sram_ctrl_stress_all.333975140 |
|
|
Jul 27 06:45:22 PM PDT 24 |
Jul 27 07:41:56 PM PDT 24 |
138017577169 ps |
T114 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2032957324 |
|
|
Jul 27 06:49:22 PM PDT 24 |
Jul 27 06:53:43 PM PDT 24 |
6441693424 ps |
T174 |
/workspace/coverage/default/9.sram_ctrl_partial_access.3179216405 |
|
|
Jul 27 06:45:56 PM PDT 24 |
Jul 27 06:46:03 PM PDT 24 |
2710523302 ps |
T175 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.123681108 |
|
|
Jul 27 06:51:46 PM PDT 24 |
Jul 27 06:52:48 PM PDT 24 |
741031941 ps |
T176 |
/workspace/coverage/default/14.sram_ctrl_executable.3914934489 |
|
|
Jul 27 06:46:43 PM PDT 24 |
Jul 27 07:02:43 PM PDT 24 |
9479137648 ps |
T177 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.3585191031 |
|
|
Jul 27 06:45:49 PM PDT 24 |
Jul 27 06:46:03 PM PDT 24 |
2865245287 ps |
T178 |
/workspace/coverage/default/23.sram_ctrl_smoke.1104232858 |
|
|
Jul 27 06:48:13 PM PDT 24 |
Jul 27 06:48:34 PM PDT 24 |
9775038662 ps |
T76 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2364473770 |
|
|
Jul 27 06:45:36 PM PDT 24 |
Jul 27 06:45:45 PM PDT 24 |
871917448 ps |
T179 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.2752573207 |
|
|
Jul 27 06:48:22 PM PDT 24 |
Jul 27 07:02:51 PM PDT 24 |
76472937764 ps |
T32 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.514742308 |
|
|
Jul 27 06:46:44 PM PDT 24 |
Jul 27 06:46:47 PM PDT 24 |
1491891060 ps |
T18 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.994294860 |
|
|
Jul 27 06:45:19 PM PDT 24 |
Jul 27 06:45:22 PM PDT 24 |
336316938 ps |
T36 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.1225486249 |
|
|
Jul 27 06:49:15 PM PDT 24 |
Jul 27 07:17:23 PM PDT 24 |
161995023031 ps |
T37 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.3050521674 |
|
|
Jul 27 06:45:25 PM PDT 24 |
Jul 27 06:51:16 PM PDT 24 |
77993703377 ps |
T38 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.1788324969 |
|
|
Jul 27 06:47:52 PM PDT 24 |
Jul 27 06:48:01 PM PDT 24 |
570711231 ps |
T39 |
/workspace/coverage/default/10.sram_ctrl_regwen.3331689684 |
|
|
Jul 27 06:46:00 PM PDT 24 |
Jul 27 06:56:55 PM PDT 24 |
49950385867 ps |
T40 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.1127464753 |
|
|
Jul 27 06:50:49 PM PDT 24 |
Jul 27 06:56:02 PM PDT 24 |
54414149157 ps |
T41 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.406474528 |
|
|
Jul 27 06:46:17 PM PDT 24 |
Jul 27 07:05:05 PM PDT 24 |
271401535842 ps |
T42 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.1563223370 |
|
|
Jul 27 06:49:13 PM PDT 24 |
Jul 27 06:50:37 PM PDT 24 |
1525926485 ps |
T43 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.4068438643 |
|
|
Jul 27 06:46:36 PM PDT 24 |
Jul 27 06:47:41 PM PDT 24 |
1573224924 ps |
T44 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.3609075476 |
|
|
Jul 27 06:47:16 PM PDT 24 |
Jul 27 06:50:55 PM PDT 24 |
9436312317 ps |
T180 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2577578922 |
|
|
Jul 27 06:49:48 PM PDT 24 |
Jul 27 06:57:18 PM PDT 24 |
31530661196 ps |
T181 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1473618692 |
|
|
Jul 27 06:45:12 PM PDT 24 |
Jul 27 06:52:23 PM PDT 24 |
18171576677 ps |
T182 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.974570027 |
|
|
Jul 27 06:45:10 PM PDT 24 |
Jul 27 06:46:02 PM PDT 24 |
33050083147 ps |
T183 |
/workspace/coverage/default/4.sram_ctrl_regwen.663196453 |
|
|
Jul 27 06:45:18 PM PDT 24 |
Jul 27 06:54:40 PM PDT 24 |
11425686117 ps |
T184 |
/workspace/coverage/default/30.sram_ctrl_bijection.3625491425 |
|
|
Jul 27 06:49:38 PM PDT 24 |
Jul 27 07:10:11 PM PDT 24 |
211761687823 ps |
T19 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.3909198102 |
|
|
Jul 27 06:45:13 PM PDT 24 |
Jul 27 06:45:15 PM PDT 24 |
183210680 ps |
T185 |
/workspace/coverage/default/30.sram_ctrl_executable.1486900932 |
|
|
Jul 27 06:49:38 PM PDT 24 |
Jul 27 07:04:45 PM PDT 24 |
40066855572 ps |
T186 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.3000783364 |
|
|
Jul 27 06:45:19 PM PDT 24 |
Jul 27 06:55:59 PM PDT 24 |
16879208820 ps |
T187 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.4050436560 |
|
|
Jul 27 06:53:37 PM PDT 24 |
Jul 27 07:00:29 PM PDT 24 |
19944596259 ps |
T188 |
/workspace/coverage/default/3.sram_ctrl_executable.3169167111 |
|
|
Jul 27 06:45:15 PM PDT 24 |
Jul 27 06:48:22 PM PDT 24 |
10486039647 ps |
T189 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.241214800 |
|
|
Jul 27 06:45:20 PM PDT 24 |
Jul 27 06:46:11 PM PDT 24 |
744743912 ps |
T190 |
/workspace/coverage/default/40.sram_ctrl_smoke.3045144542 |
|
|
Jul 27 06:51:37 PM PDT 24 |
Jul 27 06:52:15 PM PDT 24 |
3272788837 ps |
T191 |
/workspace/coverage/default/21.sram_ctrl_regwen.274722866 |
|
|
Jul 27 06:47:54 PM PDT 24 |
Jul 27 07:03:13 PM PDT 24 |
12374690507 ps |
T192 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.763522321 |
|
|
Jul 27 06:47:34 PM PDT 24 |
Jul 27 06:52:49 PM PDT 24 |
37813087060 ps |
T193 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2566300446 |
|
|
Jul 27 06:45:38 PM PDT 24 |
Jul 27 06:49:38 PM PDT 24 |
4182043979 ps |
T15 |
/workspace/coverage/default/23.sram_ctrl_alert_test.154405295 |
|
|
Jul 27 06:48:21 PM PDT 24 |
Jul 27 06:48:21 PM PDT 24 |
15024208 ps |
T194 |
/workspace/coverage/default/16.sram_ctrl_regwen.2553717295 |
|
|
Jul 27 06:47:00 PM PDT 24 |
Jul 27 06:57:01 PM PDT 24 |
35769086668 ps |
T195 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.2302643611 |
|
|
Jul 27 06:48:12 PM PDT 24 |
Jul 27 06:48:32 PM PDT 24 |
5972599104 ps |
T196 |
/workspace/coverage/default/8.sram_ctrl_stress_all.2280274230 |
|
|
Jul 27 06:45:50 PM PDT 24 |
Jul 27 08:39:28 PM PDT 24 |
949760022783 ps |
T197 |
/workspace/coverage/default/2.sram_ctrl_stress_all.2813607260 |
|
|
Jul 27 06:45:12 PM PDT 24 |
Jul 27 07:22:39 PM PDT 24 |
69618401052 ps |
T198 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1312378450 |
|
|
Jul 27 06:52:32 PM PDT 24 |
Jul 27 07:22:54 PM PDT 24 |
170102262093 ps |
T60 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3219782523 |
|
|
Jul 27 06:53:30 PM PDT 24 |
Jul 27 06:54:55 PM PDT 24 |
6558707874 ps |
T199 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.4006673672 |
|
|
Jul 27 06:49:20 PM PDT 24 |
Jul 27 06:51:11 PM PDT 24 |
48907310280 ps |
T33 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.1089320022 |
|
|
Jul 27 06:47:18 PM PDT 24 |
Jul 27 06:47:21 PM PDT 24 |
690848365 ps |
T200 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.2055899122 |
|
|
Jul 27 06:48:31 PM PDT 24 |
Jul 27 06:56:40 PM PDT 24 |
39264724469 ps |
T17 |
/workspace/coverage/default/39.sram_ctrl_alert_test.3977648548 |
|
|
Jul 27 06:51:40 PM PDT 24 |
Jul 27 06:51:40 PM PDT 24 |
47930871 ps |
T201 |
/workspace/coverage/default/30.sram_ctrl_stress_all.3281439850 |
|
|
Jul 27 06:49:38 PM PDT 24 |
Jul 27 08:42:20 PM PDT 24 |
97424188595 ps |
T202 |
/workspace/coverage/default/3.sram_ctrl_smoke.23647368 |
|
|
Jul 27 06:45:12 PM PDT 24 |
Jul 27 06:46:15 PM PDT 24 |
799745964 ps |
T20 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.3843487858 |
|
|
Jul 27 06:45:09 PM PDT 24 |
Jul 27 06:45:12 PM PDT 24 |
354860815 ps |
T203 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1532766558 |
|
|
Jul 27 06:53:29 PM PDT 24 |
Jul 27 06:57:34 PM PDT 24 |
23428456433 ps |
T140 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.3690306755 |
|
|
Jul 27 06:51:16 PM PDT 24 |
Jul 27 06:55:51 PM PDT 24 |
12952049457 ps |
T204 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.591760207 |
|
|
Jul 27 06:45:05 PM PDT 24 |
Jul 27 06:48:20 PM PDT 24 |
10468925032 ps |
T205 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.3471031153 |
|
|
Jul 27 06:48:04 PM PDT 24 |
Jul 27 06:48:54 PM PDT 24 |
6900816513 ps |
T206 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.2590743525 |
|
|
Jul 27 06:46:15 PM PDT 24 |
Jul 27 06:48:29 PM PDT 24 |
6335403179 ps |
T207 |
/workspace/coverage/default/10.sram_ctrl_stress_all.3188214793 |
|
|
Jul 27 06:46:01 PM PDT 24 |
Jul 27 07:38:17 PM PDT 24 |
475836795410 ps |
T208 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2435207504 |
|
|
Jul 27 06:53:20 PM PDT 24 |
Jul 27 06:54:34 PM PDT 24 |
41206360061 ps |
T209 |
/workspace/coverage/default/7.sram_ctrl_stress_all.2248603440 |
|
|
Jul 27 06:45:39 PM PDT 24 |
Jul 27 08:31:01 PM PDT 24 |
230067251760 ps |
T210 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.215766057 |
|
|
Jul 27 06:53:21 PM PDT 24 |
Jul 27 07:01:16 PM PDT 24 |
6463151633 ps |
T16 |
/workspace/coverage/default/6.sram_ctrl_alert_test.1480109605 |
|
|
Jul 27 06:45:34 PM PDT 24 |
Jul 27 06:45:35 PM PDT 24 |
16213154 ps |
T211 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.3159671079 |
|
|
Jul 27 06:47:55 PM PDT 24 |
Jul 27 07:03:06 PM PDT 24 |
21814400769 ps |
T212 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.120808912 |
|
|
Jul 27 06:53:12 PM PDT 24 |
Jul 27 06:55:50 PM PDT 24 |
23047530363 ps |
T213 |
/workspace/coverage/default/31.sram_ctrl_executable.1440221152 |
|
|
Jul 27 06:49:56 PM PDT 24 |
Jul 27 07:00:36 PM PDT 24 |
28266510117 ps |
T77 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1518413577 |
|
|
Jul 27 06:45:49 PM PDT 24 |
Jul 27 06:46:39 PM PDT 24 |
1077072394 ps |
T214 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.1814146587 |
|
|
Jul 27 06:49:48 PM PDT 24 |
Jul 27 07:19:50 PM PDT 24 |
88096430589 ps |
T215 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.3066275195 |
|
|
Jul 27 06:45:12 PM PDT 24 |
Jul 27 06:45:15 PM PDT 24 |
390972342 ps |
T216 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.2218750086 |
|
|
Jul 27 06:50:35 PM PDT 24 |
Jul 27 07:14:54 PM PDT 24 |
19122390119 ps |
T78 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.2017049472 |
|
|
Jul 27 06:46:45 PM PDT 24 |
Jul 27 06:47:04 PM PDT 24 |
1868761047 ps |
T217 |
/workspace/coverage/default/49.sram_ctrl_partial_access.2984249038 |
|
|
Jul 27 06:53:46 PM PDT 24 |
Jul 27 06:54:21 PM PDT 24 |
3980178450 ps |
T218 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.845925103 |
|
|
Jul 27 06:53:36 PM PDT 24 |
Jul 27 06:53:39 PM PDT 24 |
715566545 ps |
T219 |
/workspace/coverage/default/30.sram_ctrl_alert_test.1018063350 |
|
|
Jul 27 06:49:46 PM PDT 24 |
Jul 27 06:49:47 PM PDT 24 |
79243834 ps |
T220 |
/workspace/coverage/default/16.sram_ctrl_executable.4117014132 |
|
|
Jul 27 06:47:02 PM PDT 24 |
Jul 27 07:09:33 PM PDT 24 |
242998078569 ps |
T221 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3932171658 |
|
|
Jul 27 06:45:12 PM PDT 24 |
Jul 27 06:48:45 PM PDT 24 |
32126068174 ps |
T222 |
/workspace/coverage/default/16.sram_ctrl_stress_all.1724082683 |
|
|
Jul 27 06:47:01 PM PDT 24 |
Jul 27 07:21:41 PM PDT 24 |
28317469582 ps |
T223 |
/workspace/coverage/default/43.sram_ctrl_partial_access.263658573 |
|
|
Jul 27 06:52:12 PM PDT 24 |
Jul 27 06:52:16 PM PDT 24 |
1565357186 ps |
T224 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3328373000 |
|
|
Jul 27 06:53:29 PM PDT 24 |
Jul 27 07:08:19 PM PDT 24 |
24073718592 ps |
T225 |
/workspace/coverage/default/27.sram_ctrl_executable.2449140995 |
|
|
Jul 27 06:49:05 PM PDT 24 |
Jul 27 06:52:59 PM PDT 24 |
8121675537 ps |
T226 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.310754953 |
|
|
Jul 27 06:53:05 PM PDT 24 |
Jul 27 07:01:43 PM PDT 24 |
19331422068 ps |
T56 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.4230457742 |
|
|
Jul 27 06:52:05 PM PDT 24 |
Jul 27 06:54:45 PM PDT 24 |
11748095971 ps |
T227 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.1377942617 |
|
|
Jul 27 06:53:52 PM PDT 24 |
Jul 27 06:56:48 PM PDT 24 |
41377182394 ps |
T228 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.1849969220 |
|
|
Jul 27 06:46:44 PM PDT 24 |
Jul 27 06:52:22 PM PDT 24 |
51207942953 ps |
T229 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.2314497958 |
|
|
Jul 27 06:45:19 PM PDT 24 |
Jul 27 06:46:39 PM PDT 24 |
3313892066 ps |
T230 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.781721866 |
|
|
Jul 27 06:53:31 PM PDT 24 |
Jul 27 06:54:11 PM PDT 24 |
1126347907 ps |
T231 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.91462215 |
|
|
Jul 27 06:48:56 PM PDT 24 |
Jul 27 06:48:59 PM PDT 24 |
1539111292 ps |
T232 |
/workspace/coverage/default/27.sram_ctrl_regwen.402541914 |
|
|
Jul 27 06:49:03 PM PDT 24 |
Jul 27 07:01:52 PM PDT 24 |
10073092375 ps |
T233 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2065716908 |
|
|
Jul 27 06:49:03 PM PDT 24 |
Jul 27 06:55:17 PM PDT 24 |
27627367802 ps |
T234 |
/workspace/coverage/default/9.sram_ctrl_smoke.2071980474 |
|
|
Jul 27 06:45:50 PM PDT 24 |
Jul 27 06:45:58 PM PDT 24 |
412064044 ps |
T235 |
/workspace/coverage/default/11.sram_ctrl_smoke.2817053378 |
|
|
Jul 27 06:45:58 PM PDT 24 |
Jul 27 06:46:11 PM PDT 24 |
3147184637 ps |
T236 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.1689236378 |
|
|
Jul 27 06:49:21 PM PDT 24 |
Jul 27 06:50:52 PM PDT 24 |
793172149 ps |
T237 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.345764356 |
|
|
Jul 27 06:52:23 PM PDT 24 |
Jul 27 06:52:26 PM PDT 24 |
716165053 ps |
T238 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.230019193 |
|
|
Jul 27 06:51:30 PM PDT 24 |
Jul 27 07:23:43 PM PDT 24 |
14664096514 ps |
T239 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.4041571290 |
|
|
Jul 27 06:45:59 PM PDT 24 |
Jul 27 06:54:41 PM PDT 24 |
9241317538 ps |
T240 |
/workspace/coverage/default/46.sram_ctrl_alert_test.353556841 |
|
|
Jul 27 06:53:12 PM PDT 24 |
Jul 27 06:53:12 PM PDT 24 |
14484516 ps |
T241 |
/workspace/coverage/default/28.sram_ctrl_executable.2319549767 |
|
|
Jul 27 06:49:14 PM PDT 24 |
Jul 27 07:08:11 PM PDT 24 |
23553918117 ps |
T242 |
/workspace/coverage/default/1.sram_ctrl_alert_test.886639238 |
|
|
Jul 27 06:45:13 PM PDT 24 |
Jul 27 06:45:14 PM PDT 24 |
41522387 ps |
T243 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.1684594617 |
|
|
Jul 27 06:48:11 PM PDT 24 |
Jul 27 06:49:17 PM PDT 24 |
3997787080 ps |
T244 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.3161941237 |
|
|
Jul 27 06:45:12 PM PDT 24 |
Jul 27 06:54:14 PM PDT 24 |
29937733840 ps |
T245 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.1340993647 |
|
|
Jul 27 06:53:45 PM PDT 24 |
Jul 27 06:54:53 PM PDT 24 |
1525136792 ps |
T246 |
/workspace/coverage/default/13.sram_ctrl_stress_all.1859591863 |
|
|
Jul 27 06:46:25 PM PDT 24 |
Jul 27 08:19:53 PM PDT 24 |
411503756505 ps |
T247 |
/workspace/coverage/default/48.sram_ctrl_regwen.3145889061 |
|
|
Jul 27 06:53:37 PM PDT 24 |
Jul 27 07:18:01 PM PDT 24 |
7705902671 ps |
T248 |
/workspace/coverage/default/21.sram_ctrl_stress_all.3124027642 |
|
|
Jul 27 06:47:53 PM PDT 24 |
Jul 27 08:22:00 PM PDT 24 |
225351313144 ps |
T141 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3130466257 |
|
|
Jul 27 06:53:44 PM PDT 24 |
Jul 27 06:58:22 PM PDT 24 |
26070582319 ps |
T249 |
/workspace/coverage/default/45.sram_ctrl_alert_test.3657362109 |
|
|
Jul 27 06:52:57 PM PDT 24 |
Jul 27 06:52:58 PM PDT 24 |
14181102 ps |
T250 |
/workspace/coverage/default/49.sram_ctrl_alert_test.4268684994 |
|
|
Jul 27 06:53:55 PM PDT 24 |
Jul 27 06:53:56 PM PDT 24 |
22812555 ps |
T251 |
/workspace/coverage/default/25.sram_ctrl_bijection.1721918724 |
|
|
Jul 27 06:48:38 PM PDT 24 |
Jul 27 07:13:22 PM PDT 24 |
64552094605 ps |
T252 |
/workspace/coverage/default/28.sram_ctrl_bijection.2323818392 |
|
|
Jul 27 06:49:13 PM PDT 24 |
Jul 27 07:08:56 PM PDT 24 |
50808584781 ps |
T253 |
/workspace/coverage/default/8.sram_ctrl_executable.1388445928 |
|
|
Jul 27 06:45:40 PM PDT 24 |
Jul 27 06:54:55 PM PDT 24 |
22876447155 ps |
T61 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2438879034 |
|
|
Jul 27 06:51:07 PM PDT 24 |
Jul 27 06:52:23 PM PDT 24 |
1444140448 ps |
T254 |
/workspace/coverage/default/47.sram_ctrl_partial_access.3198852003 |
|
|
Jul 27 06:53:21 PM PDT 24 |
Jul 27 06:53:39 PM PDT 24 |
13695579983 ps |
T255 |
/workspace/coverage/default/43.sram_ctrl_regwen.2635245580 |
|
|
Jul 27 06:52:22 PM PDT 24 |
Jul 27 07:28:45 PM PDT 24 |
83452635209 ps |
T256 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2975686915 |
|
|
Jul 27 06:45:08 PM PDT 24 |
Jul 27 06:45:12 PM PDT 24 |
454452963 ps |
T257 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2402909311 |
|
|
Jul 27 06:45:43 PM PDT 24 |
Jul 27 06:47:03 PM PDT 24 |
5160338409 ps |
T258 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.1654787176 |
|
|
Jul 27 06:49:14 PM PDT 24 |
Jul 27 06:49:17 PM PDT 24 |
376149942 ps |
T259 |
/workspace/coverage/default/9.sram_ctrl_alert_test.2821826426 |
|
|
Jul 27 06:45:59 PM PDT 24 |
Jul 27 06:46:00 PM PDT 24 |
45217116 ps |
T260 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3671590540 |
|
|
Jul 27 06:45:18 PM PDT 24 |
Jul 27 07:02:56 PM PDT 24 |
36083561145 ps |
T261 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.329620732 |
|
|
Jul 27 06:48:29 PM PDT 24 |
Jul 27 06:49:30 PM PDT 24 |
9746377748 ps |
T262 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.2210055231 |
|
|
Jul 27 06:49:37 PM PDT 24 |
Jul 27 06:52:25 PM PDT 24 |
13341749881 ps |
T263 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.3634974761 |
|
|
Jul 27 06:51:07 PM PDT 24 |
Jul 27 06:51:13 PM PDT 24 |
2790981125 ps |
T79 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1219820257 |
|
|
Jul 27 06:48:56 PM PDT 24 |
Jul 27 06:49:04 PM PDT 24 |
925991671 ps |
T264 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.2170394345 |
|
|
Jul 27 06:46:53 PM PDT 24 |
Jul 27 06:49:51 PM PDT 24 |
13610340067 ps |
T265 |
/workspace/coverage/default/19.sram_ctrl_regwen.1051008353 |
|
|
Jul 27 06:47:35 PM PDT 24 |
Jul 27 06:54:09 PM PDT 24 |
19956558949 ps |
T266 |
/workspace/coverage/default/15.sram_ctrl_alert_test.95609380 |
|
|
Jul 27 06:46:52 PM PDT 24 |
Jul 27 06:46:53 PM PDT 24 |
14091813 ps |
T267 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.920494973 |
|
|
Jul 27 06:49:53 PM PDT 24 |
Jul 27 06:51:13 PM PDT 24 |
11875415101 ps |
T268 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.161906837 |
|
|
Jul 27 06:45:08 PM PDT 24 |
Jul 27 06:45:11 PM PDT 24 |
655926332 ps |
T269 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.448856747 |
|
|
Jul 27 06:46:16 PM PDT 24 |
Jul 27 06:46:20 PM PDT 24 |
631373187 ps |
T270 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.3369226724 |
|
|
Jul 27 06:47:16 PM PDT 24 |
Jul 27 06:50:57 PM PDT 24 |
51041445917 ps |
T271 |
/workspace/coverage/default/17.sram_ctrl_executable.657087714 |
|
|
Jul 27 06:47:12 PM PDT 24 |
Jul 27 06:57:38 PM PDT 24 |
19600332122 ps |
T272 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.2632926135 |
|
|
Jul 27 06:47:02 PM PDT 24 |
Jul 27 06:48:04 PM PDT 24 |
1010711469 ps |
T273 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2899889093 |
|
|
Jul 27 06:52:53 PM PDT 24 |
Jul 27 06:57:31 PM PDT 24 |
5318219445 ps |
T274 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.2207877254 |
|
|
Jul 27 06:51:45 PM PDT 24 |
Jul 27 07:06:20 PM PDT 24 |
21718128398 ps |
T275 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.2859274644 |
|
|
Jul 27 06:47:44 PM PDT 24 |
Jul 27 06:50:22 PM PDT 24 |
20225406570 ps |
T276 |
/workspace/coverage/default/46.sram_ctrl_stress_all.2591067547 |
|
|
Jul 27 06:53:13 PM PDT 24 |
Jul 27 08:56:04 PM PDT 24 |
929408994587 ps |
T277 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1589071140 |
|
|
Jul 27 06:53:43 PM PDT 24 |
Jul 27 06:58:19 PM PDT 24 |
7756794290 ps |
T278 |
/workspace/coverage/default/12.sram_ctrl_partial_access.2989033114 |
|
|
Jul 27 06:46:17 PM PDT 24 |
Jul 27 06:46:36 PM PDT 24 |
2283753969 ps |
T279 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.3376018293 |
|
|
Jul 27 06:52:03 PM PDT 24 |
Jul 27 06:52:35 PM PDT 24 |
754263376 ps |
T280 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.3668838069 |
|
|
Jul 27 06:45:09 PM PDT 24 |
Jul 27 06:50:05 PM PDT 24 |
5533709200 ps |
T281 |
/workspace/coverage/default/33.sram_ctrl_partial_access.223393990 |
|
|
Jul 27 06:50:16 PM PDT 24 |
Jul 27 06:50:26 PM PDT 24 |
770027192 ps |
T282 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.846542062 |
|
|
Jul 27 06:47:38 PM PDT 24 |
Jul 27 06:53:06 PM PDT 24 |
51238388044 ps |
T283 |
/workspace/coverage/default/11.sram_ctrl_stress_all.898165311 |
|
|
Jul 27 06:46:08 PM PDT 24 |
Jul 27 07:31:54 PM PDT 24 |
73651785429 ps |
T284 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.947532520 |
|
|
Jul 27 06:53:13 PM PDT 24 |
Jul 27 06:54:18 PM PDT 24 |
973666918 ps |
T285 |
/workspace/coverage/default/33.sram_ctrl_smoke.2547208401 |
|
|
Jul 27 06:50:17 PM PDT 24 |
Jul 27 06:50:26 PM PDT 24 |
857205147 ps |
T286 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.218908964 |
|
|
Jul 27 06:45:57 PM PDT 24 |
Jul 27 06:51:35 PM PDT 24 |
5959287541 ps |
T287 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.3909074804 |
|
|
Jul 27 06:47:34 PM PDT 24 |
Jul 27 06:47:46 PM PDT 24 |
285807146 ps |
T288 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.2968948593 |
|
|
Jul 27 06:49:14 PM PDT 24 |
Jul 27 06:51:27 PM PDT 24 |
7898661042 ps |
T289 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.1519190733 |
|
|
Jul 27 06:45:15 PM PDT 24 |
Jul 27 06:45:22 PM PDT 24 |
690521461 ps |
T290 |
/workspace/coverage/default/24.sram_ctrl_smoke.235321921 |
|
|
Jul 27 06:48:23 PM PDT 24 |
Jul 27 06:48:31 PM PDT 24 |
762502189 ps |
T291 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.3962020146 |
|
|
Jul 27 06:51:15 PM PDT 24 |
Jul 27 06:54:31 PM PDT 24 |
3184905659 ps |
T292 |
/workspace/coverage/default/45.sram_ctrl_partial_access.2630246040 |
|
|
Jul 27 06:52:39 PM PDT 24 |
Jul 27 06:53:11 PM PDT 24 |
2158537998 ps |
T62 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.2979541032 |
|
|
Jul 27 06:45:10 PM PDT 24 |
Jul 27 06:46:03 PM PDT 24 |
1975422147 ps |
T293 |
/workspace/coverage/default/13.sram_ctrl_partial_access.2128214933 |
|
|
Jul 27 06:46:16 PM PDT 24 |
Jul 27 06:46:38 PM PDT 24 |
8145791088 ps |
T294 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3565840929 |
|
|
Jul 27 06:45:52 PM PDT 24 |
Jul 27 06:50:22 PM PDT 24 |
9874570978 ps |
T295 |
/workspace/coverage/default/49.sram_ctrl_smoke.4260990030 |
|
|
Jul 27 06:53:38 PM PDT 24 |
Jul 27 06:53:57 PM PDT 24 |
3099961872 ps |
T296 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.486195446 |
|
|
Jul 27 06:45:20 PM PDT 24 |
Jul 27 06:50:16 PM PDT 24 |
8593592072 ps |
T297 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.221552181 |
|
|
Jul 27 06:52:04 PM PDT 24 |
Jul 27 06:56:15 PM PDT 24 |
27887883533 ps |
T298 |
/workspace/coverage/default/48.sram_ctrl_alert_test.3255967602 |
|
|
Jul 27 06:53:36 PM PDT 24 |
Jul 27 06:53:37 PM PDT 24 |
14804775 ps |
T299 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2438937687 |
|
|
Jul 27 06:45:07 PM PDT 24 |
Jul 27 06:47:08 PM PDT 24 |
1628237419 ps |
T300 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.3188303846 |
|
|
Jul 27 06:48:21 PM PDT 24 |
Jul 27 06:48:24 PM PDT 24 |
704848926 ps |
T301 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.3817607375 |
|
|
Jul 27 06:51:15 PM PDT 24 |
Jul 27 07:00:51 PM PDT 24 |
34441723207 ps |
T302 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.374894175 |
|
|
Jul 27 06:49:30 PM PDT 24 |
Jul 27 06:59:41 PM PDT 24 |
49610863980 ps |
T303 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.1018340805 |
|
|
Jul 27 06:48:47 PM PDT 24 |
Jul 27 06:52:18 PM PDT 24 |
12415277082 ps |
T304 |
/workspace/coverage/default/45.sram_ctrl_executable.2945173772 |
|
|
Jul 27 06:52:49 PM PDT 24 |
Jul 27 07:04:52 PM PDT 24 |
79217036864 ps |
T305 |
/workspace/coverage/default/18.sram_ctrl_executable.2914096326 |
|
|
Jul 27 06:47:18 PM PDT 24 |
Jul 27 06:59:22 PM PDT 24 |
73886762838 ps |
T306 |
/workspace/coverage/default/20.sram_ctrl_smoke.2068418541 |
|
|
Jul 27 06:47:38 PM PDT 24 |
Jul 27 06:48:49 PM PDT 24 |
3083374693 ps |
T307 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2738039456 |
|
|
Jul 27 06:52:32 PM PDT 24 |
Jul 27 06:54:54 PM PDT 24 |
13490708232 ps |