| T311 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.4132229628 |
|
|
Aug 05 06:21:55 PM PDT 24 |
Aug 05 06:33:34 PM PDT 24 |
12312276007 ps |
| T312 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.893641022 |
|
|
Aug 05 06:17:13 PM PDT 24 |
Aug 05 06:18:37 PM PDT 24 |
779162944 ps |
| T313 |
/workspace/coverage/default/43.sram_ctrl_regwen.1918666361 |
|
|
Aug 05 06:21:51 PM PDT 24 |
Aug 05 06:41:49 PM PDT 24 |
82963190964 ps |
| T80 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3956930750 |
|
|
Aug 05 06:21:47 PM PDT 24 |
Aug 05 06:22:46 PM PDT 24 |
28190140443 ps |
| T314 |
/workspace/coverage/default/20.sram_ctrl_executable.2581281721 |
|
|
Aug 05 06:18:19 PM PDT 24 |
Aug 05 06:33:56 PM PDT 24 |
7380860172 ps |
| T315 |
/workspace/coverage/default/4.sram_ctrl_partial_access.1387558193 |
|
|
Aug 05 06:16:05 PM PDT 24 |
Aug 05 06:16:22 PM PDT 24 |
7298489972 ps |
| T81 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.1444148678 |
|
|
Aug 05 06:21:34 PM PDT 24 |
Aug 05 06:24:42 PM PDT 24 |
1105522758 ps |
| T316 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.1462141697 |
|
|
Aug 05 06:21:06 PM PDT 24 |
Aug 05 06:21:15 PM PDT 24 |
1358594172 ps |
| T317 |
/workspace/coverage/default/23.sram_ctrl_bijection.4205048237 |
|
|
Aug 05 06:18:38 PM PDT 24 |
Aug 05 06:37:19 PM PDT 24 |
16236215454 ps |
| T318 |
/workspace/coverage/default/39.sram_ctrl_smoke.3553919555 |
|
|
Aug 05 06:21:02 PM PDT 24 |
Aug 05 06:21:22 PM PDT 24 |
2490956147 ps |
| T319 |
/workspace/coverage/default/7.sram_ctrl_alert_test.2949671802 |
|
|
Aug 05 06:16:27 PM PDT 24 |
Aug 05 06:16:28 PM PDT 24 |
22341368 ps |
| T320 |
/workspace/coverage/default/24.sram_ctrl_smoke.2223767343 |
|
|
Aug 05 06:18:43 PM PDT 24 |
Aug 05 06:19:20 PM PDT 24 |
2686201610 ps |
| T321 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.2947012053 |
|
|
Aug 05 06:21:39 PM PDT 24 |
Aug 05 06:22:58 PM PDT 24 |
6014586256 ps |
| T322 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.552977675 |
|
|
Aug 05 06:17:03 PM PDT 24 |
Aug 05 06:31:33 PM PDT 24 |
48132190749 ps |
| T323 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3440198000 |
|
|
Aug 05 06:22:28 PM PDT 24 |
Aug 05 06:32:53 PM PDT 24 |
12471356071 ps |
| T324 |
/workspace/coverage/default/17.sram_ctrl_stress_all.4021828213 |
|
|
Aug 05 06:17:51 PM PDT 24 |
Aug 05 07:29:47 PM PDT 24 |
213483239951 ps |
| T325 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.829670266 |
|
|
Aug 05 06:21:24 PM PDT 24 |
Aug 05 06:21:27 PM PDT 24 |
344509328 ps |
| T326 |
/workspace/coverage/default/30.sram_ctrl_stress_all.181681427 |
|
|
Aug 05 06:19:44 PM PDT 24 |
Aug 05 06:54:10 PM PDT 24 |
37416197607 ps |
| T327 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.62153399 |
|
|
Aug 05 06:21:18 PM PDT 24 |
Aug 05 06:30:06 PM PDT 24 |
24034659261 ps |
| T328 |
/workspace/coverage/default/13.sram_ctrl_partial_access.272173941 |
|
|
Aug 05 06:17:15 PM PDT 24 |
Aug 05 06:19:39 PM PDT 24 |
1277950433 ps |
| T329 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3668454594 |
|
|
Aug 05 06:19:59 PM PDT 24 |
Aug 05 06:21:39 PM PDT 24 |
3116871697 ps |
| T330 |
/workspace/coverage/default/45.sram_ctrl_bijection.3413443886 |
|
|
Aug 05 06:22:09 PM PDT 24 |
Aug 05 06:54:48 PM PDT 24 |
82982194189 ps |
| T331 |
/workspace/coverage/default/7.sram_ctrl_partial_access.39196725 |
|
|
Aug 05 06:16:18 PM PDT 24 |
Aug 05 06:18:04 PM PDT 24 |
2169097328 ps |
| T332 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.2648528698 |
|
|
Aug 05 06:20:46 PM PDT 24 |
Aug 05 06:21:46 PM PDT 24 |
786094283 ps |
| T333 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2889150404 |
|
|
Aug 05 06:16:19 PM PDT 24 |
Aug 05 06:16:22 PM PDT 24 |
713029871 ps |
| T334 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.2042985403 |
|
|
Aug 05 06:21:56 PM PDT 24 |
Aug 05 06:24:28 PM PDT 24 |
1591512335 ps |
| T335 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.2610604088 |
|
|
Aug 05 06:19:40 PM PDT 24 |
Aug 05 06:21:55 PM PDT 24 |
2342882388 ps |
| T336 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.613848536 |
|
|
Aug 05 06:16:06 PM PDT 24 |
Aug 05 06:25:10 PM PDT 24 |
10178191990 ps |
| T337 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.1504212297 |
|
|
Aug 05 06:21:53 PM PDT 24 |
Aug 05 06:22:56 PM PDT 24 |
37146632014 ps |
| T338 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.724594981 |
|
|
Aug 05 06:20:34 PM PDT 24 |
Aug 05 06:26:10 PM PDT 24 |
85018063795 ps |
| T339 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3712673216 |
|
|
Aug 05 06:22:23 PM PDT 24 |
Aug 05 06:23:43 PM PDT 24 |
8727827325 ps |
| T340 |
/workspace/coverage/default/33.sram_ctrl_stress_all.3281449630 |
|
|
Aug 05 06:20:11 PM PDT 24 |
Aug 05 06:39:16 PM PDT 24 |
118664885320 ps |
| T341 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.3155407072 |
|
|
Aug 05 06:17:38 PM PDT 24 |
Aug 05 06:30:33 PM PDT 24 |
133034576588 ps |
| T342 |
/workspace/coverage/default/25.sram_ctrl_regwen.3857683175 |
|
|
Aug 05 06:19:00 PM PDT 24 |
Aug 05 06:32:58 PM PDT 24 |
31086631057 ps |
| T343 |
/workspace/coverage/default/38.sram_ctrl_regwen.3978723935 |
|
|
Aug 05 06:20:58 PM PDT 24 |
Aug 05 06:30:19 PM PDT 24 |
11382086428 ps |
| T344 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.1435747681 |
|
|
Aug 05 06:18:54 PM PDT 24 |
Aug 05 06:19:00 PM PDT 24 |
676413534 ps |
| T345 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.584890781 |
|
|
Aug 05 06:22:13 PM PDT 24 |
Aug 05 06:22:23 PM PDT 24 |
214227511 ps |
| T346 |
/workspace/coverage/default/14.sram_ctrl_bijection.2466003687 |
|
|
Aug 05 06:17:20 PM PDT 24 |
Aug 05 07:04:04 PM PDT 24 |
234677855076 ps |
| T347 |
/workspace/coverage/default/35.sram_ctrl_bijection.4290728349 |
|
|
Aug 05 06:20:24 PM PDT 24 |
Aug 05 07:03:41 PM PDT 24 |
127189005006 ps |
| T348 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.738269621 |
|
|
Aug 05 06:21:38 PM PDT 24 |
Aug 05 06:22:30 PM PDT 24 |
33106806018 ps |
| T349 |
/workspace/coverage/default/40.sram_ctrl_executable.103558630 |
|
|
Aug 05 06:21:22 PM PDT 24 |
Aug 05 06:32:12 PM PDT 24 |
38780497805 ps |
| T350 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.921510565 |
|
|
Aug 05 06:19:15 PM PDT 24 |
Aug 05 06:19:39 PM PDT 24 |
727331106 ps |
| T351 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.2929572560 |
|
|
Aug 05 06:16:00 PM PDT 24 |
Aug 05 06:18:27 PM PDT 24 |
19941904659 ps |
| T352 |
/workspace/coverage/default/40.sram_ctrl_smoke.514733940 |
|
|
Aug 05 06:21:16 PM PDT 24 |
Aug 05 06:22:20 PM PDT 24 |
6014709004 ps |
| T353 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.2481716044 |
|
|
Aug 05 06:18:02 PM PDT 24 |
Aug 05 06:18:09 PM PDT 24 |
3747771945 ps |
| T354 |
/workspace/coverage/default/21.sram_ctrl_alert_test.3902905876 |
|
|
Aug 05 06:18:26 PM PDT 24 |
Aug 05 06:18:27 PM PDT 24 |
107716060 ps |
| T355 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.3590762576 |
|
|
Aug 05 06:19:36 PM PDT 24 |
Aug 05 06:19:40 PM PDT 24 |
1473053835 ps |
| T356 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.2624098748 |
|
|
Aug 05 06:20:40 PM PDT 24 |
Aug 05 06:25:38 PM PDT 24 |
23053828191 ps |
| T357 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.396062018 |
|
|
Aug 05 06:17:53 PM PDT 24 |
Aug 05 06:23:39 PM PDT 24 |
41343936732 ps |
| T358 |
/workspace/coverage/default/36.sram_ctrl_smoke.485758442 |
|
|
Aug 05 06:20:39 PM PDT 24 |
Aug 05 06:20:57 PM PDT 24 |
2674168617 ps |
| T359 |
/workspace/coverage/default/11.sram_ctrl_regwen.636571875 |
|
|
Aug 05 06:16:57 PM PDT 24 |
Aug 05 06:31:32 PM PDT 24 |
151111280197 ps |
| T360 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.3404552608 |
|
|
Aug 05 06:18:49 PM PDT 24 |
Aug 05 06:24:13 PM PDT 24 |
57774621691 ps |
| T361 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3295052541 |
|
|
Aug 05 06:17:01 PM PDT 24 |
Aug 05 06:33:46 PM PDT 24 |
8401378352 ps |
| T362 |
/workspace/coverage/default/39.sram_ctrl_regwen.3936416269 |
|
|
Aug 05 06:21:10 PM PDT 24 |
Aug 05 06:21:53 PM PDT 24 |
2148667448 ps |
| T363 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.838034474 |
|
|
Aug 05 06:22:10 PM PDT 24 |
Aug 05 06:24:32 PM PDT 24 |
3123965321 ps |
| T364 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.4009298245 |
|
|
Aug 05 06:18:10 PM PDT 24 |
Aug 05 06:23:46 PM PDT 24 |
125820565008 ps |
| T365 |
/workspace/coverage/default/7.sram_ctrl_executable.1702539088 |
|
|
Aug 05 06:16:18 PM PDT 24 |
Aug 05 06:45:36 PM PDT 24 |
116110276210 ps |
| T366 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.364507904 |
|
|
Aug 05 06:19:20 PM PDT 24 |
Aug 05 06:21:05 PM PDT 24 |
52480573462 ps |
| T367 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3555799540 |
|
|
Aug 05 06:16:45 PM PDT 24 |
Aug 05 06:19:33 PM PDT 24 |
7562365658 ps |
| T368 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.1432889267 |
|
|
Aug 05 06:18:36 PM PDT 24 |
Aug 05 06:20:50 PM PDT 24 |
3466366361 ps |
| T369 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.4159733233 |
|
|
Aug 05 06:17:25 PM PDT 24 |
Aug 05 06:17:28 PM PDT 24 |
345019956 ps |
| T370 |
/workspace/coverage/default/19.sram_ctrl_regwen.3898617693 |
|
|
Aug 05 06:18:09 PM PDT 24 |
Aug 05 06:36:02 PM PDT 24 |
15266217550 ps |
| T371 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.2654531202 |
|
|
Aug 05 06:16:11 PM PDT 24 |
Aug 05 06:21:41 PM PDT 24 |
17964363488 ps |
| T372 |
/workspace/coverage/default/4.sram_ctrl_stress_all.1528915901 |
|
|
Aug 05 06:16:12 PM PDT 24 |
Aug 05 07:02:07 PM PDT 24 |
353461748942 ps |
| T373 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.3300016986 |
|
|
Aug 05 06:20:29 PM PDT 24 |
Aug 05 06:21:19 PM PDT 24 |
3040986331 ps |
| T374 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.4064931468 |
|
|
Aug 05 06:20:07 PM PDT 24 |
Aug 05 06:22:07 PM PDT 24 |
2824444131 ps |
| T375 |
/workspace/coverage/default/18.sram_ctrl_smoke.606788983 |
|
|
Aug 05 06:17:52 PM PDT 24 |
Aug 05 06:18:22 PM PDT 24 |
2623845443 ps |
| T376 |
/workspace/coverage/default/19.sram_ctrl_executable.3421164389 |
|
|
Aug 05 06:18:08 PM PDT 24 |
Aug 05 06:26:44 PM PDT 24 |
111303074298 ps |
| T377 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2129261928 |
|
|
Aug 05 06:22:52 PM PDT 24 |
Aug 05 06:28:39 PM PDT 24 |
28031153069 ps |
| T378 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.1419773269 |
|
|
Aug 05 06:20:57 PM PDT 24 |
Aug 05 06:22:14 PM PDT 24 |
11847245336 ps |
| T379 |
/workspace/coverage/default/10.sram_ctrl_executable.670907622 |
|
|
Aug 05 06:16:44 PM PDT 24 |
Aug 05 06:27:15 PM PDT 24 |
9013733268 ps |
| T380 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1179551618 |
|
|
Aug 05 06:22:53 PM PDT 24 |
Aug 05 06:28:28 PM PDT 24 |
4787700402 ps |
| T381 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.3940610194 |
|
|
Aug 05 06:21:03 PM PDT 24 |
Aug 05 06:24:04 PM PDT 24 |
7263167792 ps |
| T382 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3068624482 |
|
|
Aug 05 06:22:39 PM PDT 24 |
Aug 05 06:26:52 PM PDT 24 |
3742560122 ps |
| T383 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.3167485169 |
|
|
Aug 05 06:16:18 PM PDT 24 |
Aug 05 06:18:58 PM PDT 24 |
32937191693 ps |
| T384 |
/workspace/coverage/default/24.sram_ctrl_bijection.2567164932 |
|
|
Aug 05 06:18:42 PM PDT 24 |
Aug 05 06:27:34 PM PDT 24 |
34229445667 ps |
| T385 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.3051302946 |
|
|
Aug 05 06:22:18 PM PDT 24 |
Aug 05 06:22:46 PM PDT 24 |
1592001441 ps |
| T386 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.3373868730 |
|
|
Aug 05 06:18:23 PM PDT 24 |
Aug 05 06:25:26 PM PDT 24 |
13587195480 ps |
| T387 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.3675309901 |
|
|
Aug 05 06:22:35 PM PDT 24 |
Aug 05 06:25:36 PM PDT 24 |
9002101916 ps |
| T388 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2841000072 |
|
|
Aug 05 06:22:22 PM PDT 24 |
Aug 05 06:35:24 PM PDT 24 |
12533153071 ps |
| T389 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.3438537165 |
|
|
Aug 05 06:16:01 PM PDT 24 |
Aug 05 06:21:07 PM PDT 24 |
20198005299 ps |
| T390 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3376895424 |
|
|
Aug 05 06:22:51 PM PDT 24 |
Aug 05 06:22:55 PM PDT 24 |
1353178738 ps |
| T391 |
/workspace/coverage/default/14.sram_ctrl_stress_all.2172505071 |
|
|
Aug 05 06:17:27 PM PDT 24 |
Aug 05 06:41:29 PM PDT 24 |
10393786722 ps |
| T392 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.3781895655 |
|
|
Aug 05 06:18:09 PM PDT 24 |
Aug 05 06:18:13 PM PDT 24 |
1350561428 ps |
| T393 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1258250407 |
|
|
Aug 05 06:15:47 PM PDT 24 |
Aug 05 06:16:04 PM PDT 24 |
461413589 ps |
| T394 |
/workspace/coverage/default/42.sram_ctrl_stress_all.3619357204 |
|
|
Aug 05 06:21:48 PM PDT 24 |
Aug 05 07:04:29 PM PDT 24 |
64680337458 ps |
| T395 |
/workspace/coverage/default/21.sram_ctrl_executable.4202295211 |
|
|
Aug 05 06:18:22 PM PDT 24 |
Aug 05 06:24:50 PM PDT 24 |
9534115062 ps |
| T396 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.1948777879 |
|
|
Aug 05 06:16:45 PM PDT 24 |
Aug 05 06:16:51 PM PDT 24 |
685799013 ps |
| T397 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.3937930241 |
|
|
Aug 05 06:18:43 PM PDT 24 |
Aug 05 06:18:46 PM PDT 24 |
1355856008 ps |
| T398 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.938999850 |
|
|
Aug 05 06:19:34 PM PDT 24 |
Aug 05 06:19:57 PM PDT 24 |
2846513148 ps |
| T399 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.4173204552 |
|
|
Aug 05 06:15:53 PM PDT 24 |
Aug 05 06:22:12 PM PDT 24 |
23072889578 ps |
| T400 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3513282299 |
|
|
Aug 05 06:16:18 PM PDT 24 |
Aug 05 06:30:48 PM PDT 24 |
17169409255 ps |
| T401 |
/workspace/coverage/default/26.sram_ctrl_partial_access.1732434861 |
|
|
Aug 05 06:19:01 PM PDT 24 |
Aug 05 06:19:17 PM PDT 24 |
1136972531 ps |
| T402 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.3982334618 |
|
|
Aug 05 06:19:16 PM PDT 24 |
Aug 05 06:21:59 PM PDT 24 |
7844303433 ps |
| T403 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3624324954 |
|
|
Aug 05 06:16:11 PM PDT 24 |
Aug 05 06:17:08 PM PDT 24 |
767706846 ps |
| T404 |
/workspace/coverage/default/40.sram_ctrl_alert_test.2722568305 |
|
|
Aug 05 06:21:28 PM PDT 24 |
Aug 05 06:21:29 PM PDT 24 |
31869719 ps |
| T405 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.4076496295 |
|
|
Aug 05 06:19:17 PM PDT 24 |
Aug 05 06:19:41 PM PDT 24 |
10392783581 ps |
| T406 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.3706566173 |
|
|
Aug 05 06:19:53 PM PDT 24 |
Aug 05 06:21:33 PM PDT 24 |
1527957148 ps |
| T407 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.245747351 |
|
|
Aug 05 06:18:02 PM PDT 24 |
Aug 05 06:18:06 PM PDT 24 |
352286025 ps |
| T408 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2860217503 |
|
|
Aug 05 06:21:56 PM PDT 24 |
Aug 05 06:23:38 PM PDT 24 |
1551053913 ps |
| T409 |
/workspace/coverage/default/27.sram_ctrl_bijection.608353288 |
|
|
Aug 05 06:19:17 PM PDT 24 |
Aug 05 06:47:51 PM PDT 24 |
111841625448 ps |
| T410 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2474815598 |
|
|
Aug 05 06:16:39 PM PDT 24 |
Aug 05 06:18:47 PM PDT 24 |
3332433556 ps |
| T411 |
/workspace/coverage/default/33.sram_ctrl_smoke.3215923780 |
|
|
Aug 05 06:20:08 PM PDT 24 |
Aug 05 06:20:26 PM PDT 24 |
9514472695 ps |
| T412 |
/workspace/coverage/default/31.sram_ctrl_bijection.1199160109 |
|
|
Aug 05 06:19:50 PM PDT 24 |
Aug 05 06:49:58 PM PDT 24 |
295086859238 ps |
| T413 |
/workspace/coverage/default/38.sram_ctrl_alert_test.1208048999 |
|
|
Aug 05 06:21:02 PM PDT 24 |
Aug 05 06:21:03 PM PDT 24 |
99725858 ps |
| T414 |
/workspace/coverage/default/34.sram_ctrl_alert_test.201255230 |
|
|
Aug 05 06:20:23 PM PDT 24 |
Aug 05 06:20:24 PM PDT 24 |
45758503 ps |
| T415 |
/workspace/coverage/default/24.sram_ctrl_stress_all.2242582921 |
|
|
Aug 05 06:18:48 PM PDT 24 |
Aug 05 07:34:41 PM PDT 24 |
711221868007 ps |
| T416 |
/workspace/coverage/default/42.sram_ctrl_alert_test.3961331018 |
|
|
Aug 05 06:21:45 PM PDT 24 |
Aug 05 06:21:46 PM PDT 24 |
12022075 ps |
| T417 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3318023260 |
|
|
Aug 05 06:15:40 PM PDT 24 |
Aug 05 06:20:39 PM PDT 24 |
18183831066 ps |
| T418 |
/workspace/coverage/default/28.sram_ctrl_bijection.1922566002 |
|
|
Aug 05 06:19:18 PM PDT 24 |
Aug 05 07:01:18 PM PDT 24 |
105490372213 ps |
| T119 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3295651548 |
|
|
Aug 05 06:16:59 PM PDT 24 |
Aug 05 06:17:12 PM PDT 24 |
375667655 ps |
| T419 |
/workspace/coverage/default/34.sram_ctrl_stress_all.719031110 |
|
|
Aug 05 06:20:25 PM PDT 24 |
Aug 05 07:18:37 PM PDT 24 |
34505572821 ps |
| T420 |
/workspace/coverage/default/46.sram_ctrl_stress_all.3105784347 |
|
|
Aug 05 06:22:24 PM PDT 24 |
Aug 05 08:04:35 PM PDT 24 |
1101195015262 ps |
| T421 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.2302410420 |
|
|
Aug 05 06:20:25 PM PDT 24 |
Aug 05 06:25:18 PM PDT 24 |
10720335263 ps |
| T422 |
/workspace/coverage/default/1.sram_ctrl_executable.1170051196 |
|
|
Aug 05 06:15:52 PM PDT 24 |
Aug 05 06:28:21 PM PDT 24 |
45969590163 ps |
| T423 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.320378649 |
|
|
Aug 05 06:18:32 PM PDT 24 |
Aug 05 06:19:11 PM PDT 24 |
1135482627 ps |
| T424 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.2918426126 |
|
|
Aug 05 06:18:39 PM PDT 24 |
Aug 05 06:21:53 PM PDT 24 |
9398718102 ps |
| T425 |
/workspace/coverage/default/22.sram_ctrl_regwen.2051925656 |
|
|
Aug 05 06:18:31 PM PDT 24 |
Aug 05 06:21:00 PM PDT 24 |
1557481744 ps |
| T426 |
/workspace/coverage/default/44.sram_ctrl_partial_access.3866225276 |
|
|
Aug 05 06:21:57 PM PDT 24 |
Aug 05 06:22:36 PM PDT 24 |
707232397 ps |
| T427 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.1038738053 |
|
|
Aug 05 06:18:22 PM PDT 24 |
Aug 05 06:18:32 PM PDT 24 |
938648940 ps |
| T428 |
/workspace/coverage/default/40.sram_ctrl_stress_all.3150893982 |
|
|
Aug 05 06:21:29 PM PDT 24 |
Aug 05 06:53:01 PM PDT 24 |
106164822900 ps |
| T429 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.4106488948 |
|
|
Aug 05 06:19:55 PM PDT 24 |
Aug 05 06:21:18 PM PDT 24 |
2627451118 ps |
| T430 |
/workspace/coverage/default/27.sram_ctrl_regwen.1469766402 |
|
|
Aug 05 06:19:15 PM PDT 24 |
Aug 05 06:39:30 PM PDT 24 |
5150239471 ps |
| T431 |
/workspace/coverage/default/8.sram_ctrl_regwen.3165059170 |
|
|
Aug 05 06:16:31 PM PDT 24 |
Aug 05 06:23:41 PM PDT 24 |
8924098846 ps |
| T432 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2247898452 |
|
|
Aug 05 06:22:19 PM PDT 24 |
Aug 05 06:25:15 PM PDT 24 |
8642308502 ps |
| T433 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.2095238106 |
|
|
Aug 05 06:18:12 PM PDT 24 |
Aug 05 06:32:50 PM PDT 24 |
9170043013 ps |
| T434 |
/workspace/coverage/default/5.sram_ctrl_partial_access.2211588766 |
|
|
Aug 05 06:16:14 PM PDT 24 |
Aug 05 06:16:42 PM PDT 24 |
1923543737 ps |
| T435 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.880389263 |
|
|
Aug 05 06:16:46 PM PDT 24 |
Aug 05 06:36:48 PM PDT 24 |
8658486172 ps |
| T436 |
/workspace/coverage/default/14.sram_ctrl_alert_test.960173669 |
|
|
Aug 05 06:17:33 PM PDT 24 |
Aug 05 06:17:34 PM PDT 24 |
11879660 ps |
| T437 |
/workspace/coverage/default/0.sram_ctrl_smoke.2908132607 |
|
|
Aug 05 06:15:40 PM PDT 24 |
Aug 05 06:15:52 PM PDT 24 |
907026118 ps |
| T438 |
/workspace/coverage/default/46.sram_ctrl_regwen.1333584231 |
|
|
Aug 05 06:22:19 PM PDT 24 |
Aug 05 06:49:01 PM PDT 24 |
74680740475 ps |
| T439 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.2724948850 |
|
|
Aug 05 06:19:14 PM PDT 24 |
Aug 05 06:24:01 PM PDT 24 |
5503367686 ps |
| T440 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3321532163 |
|
|
Aug 05 06:16:19 PM PDT 24 |
Aug 05 06:18:56 PM PDT 24 |
9232936437 ps |
| T441 |
/workspace/coverage/default/49.sram_ctrl_bijection.3026273958 |
|
|
Aug 05 06:22:46 PM PDT 24 |
Aug 05 06:48:07 PM PDT 24 |
93566773570 ps |
| T442 |
/workspace/coverage/default/36.sram_ctrl_bijection.3899330927 |
|
|
Aug 05 06:20:40 PM PDT 24 |
Aug 05 06:55:53 PM PDT 24 |
118529993099 ps |
| T443 |
/workspace/coverage/default/37.sram_ctrl_alert_test.1103789933 |
|
|
Aug 05 06:20:53 PM PDT 24 |
Aug 05 06:20:54 PM PDT 24 |
13057464 ps |
| T444 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2916482407 |
|
|
Aug 05 06:20:23 PM PDT 24 |
Aug 05 06:27:40 PM PDT 24 |
14617619417 ps |
| T445 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.65295360 |
|
|
Aug 05 06:17:20 PM PDT 24 |
Aug 05 06:21:58 PM PDT 24 |
20013706329 ps |
| T446 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.1463053725 |
|
|
Aug 05 06:18:37 PM PDT 24 |
Aug 05 06:19:58 PM PDT 24 |
3316818159 ps |
| T447 |
/workspace/coverage/default/3.sram_ctrl_partial_access.1863715101 |
|
|
Aug 05 06:15:59 PM PDT 24 |
Aug 05 06:16:50 PM PDT 24 |
1049347910 ps |
| T120 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3535808314 |
|
|
Aug 05 06:18:48 PM PDT 24 |
Aug 05 06:19:02 PM PDT 24 |
503987737 ps |
| T448 |
/workspace/coverage/default/5.sram_ctrl_stress_all.2123038891 |
|
|
Aug 05 06:16:14 PM PDT 24 |
Aug 05 06:37:43 PM PDT 24 |
89834980256 ps |
| T449 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.3165021300 |
|
|
Aug 05 06:20:19 PM PDT 24 |
Aug 05 06:26:23 PM PDT 24 |
93557211804 ps |
| T450 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1880655319 |
|
|
Aug 05 06:16:29 PM PDT 24 |
Aug 05 06:16:53 PM PDT 24 |
5811916078 ps |
| T451 |
/workspace/coverage/default/41.sram_ctrl_stress_all.2577965857 |
|
|
Aug 05 06:21:35 PM PDT 24 |
Aug 05 07:10:38 PM PDT 24 |
67066023791 ps |
| T452 |
/workspace/coverage/default/9.sram_ctrl_partial_access.2159845137 |
|
|
Aug 05 06:16:34 PM PDT 24 |
Aug 05 06:16:50 PM PDT 24 |
954071130 ps |
| T453 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.733513638 |
|
|
Aug 05 06:19:01 PM PDT 24 |
Aug 05 06:19:04 PM PDT 24 |
356027535 ps |
| T454 |
/workspace/coverage/default/47.sram_ctrl_partial_access.1165605237 |
|
|
Aug 05 06:22:29 PM PDT 24 |
Aug 05 06:22:57 PM PDT 24 |
2968611945 ps |
| T455 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2215385874 |
|
|
Aug 05 06:16:27 PM PDT 24 |
Aug 05 06:27:53 PM PDT 24 |
15640039646 ps |
| T456 |
/workspace/coverage/default/30.sram_ctrl_alert_test.1396113841 |
|
|
Aug 05 06:19:44 PM PDT 24 |
Aug 05 06:19:44 PM PDT 24 |
11496315 ps |
| T457 |
/workspace/coverage/default/22.sram_ctrl_partial_access.3370924493 |
|
|
Aug 05 06:18:33 PM PDT 24 |
Aug 05 06:18:43 PM PDT 24 |
1745704433 ps |
| T458 |
/workspace/coverage/default/27.sram_ctrl_partial_access.1456236559 |
|
|
Aug 05 06:19:17 PM PDT 24 |
Aug 05 06:19:28 PM PDT 24 |
3292489006 ps |
| T459 |
/workspace/coverage/default/35.sram_ctrl_smoke.2010529285 |
|
|
Aug 05 06:20:25 PM PDT 24 |
Aug 05 06:20:37 PM PDT 24 |
1585652717 ps |
| T460 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.427887451 |
|
|
Aug 05 06:17:38 PM PDT 24 |
Aug 05 06:17:41 PM PDT 24 |
346843004 ps |
| T461 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.1539957802 |
|
|
Aug 05 06:21:28 PM PDT 24 |
Aug 05 06:24:03 PM PDT 24 |
19649712854 ps |
| T462 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.607272221 |
|
|
Aug 05 06:17:03 PM PDT 24 |
Aug 05 06:18:57 PM PDT 24 |
7634460129 ps |
| T463 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.1430294498 |
|
|
Aug 05 06:20:08 PM PDT 24 |
Aug 05 06:35:38 PM PDT 24 |
44825039153 ps |
| T464 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.1811862469 |
|
|
Aug 05 06:18:26 PM PDT 24 |
Aug 05 06:18:36 PM PDT 24 |
485357216 ps |
| T465 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.3855314275 |
|
|
Aug 05 06:17:37 PM PDT 24 |
Aug 05 06:20:16 PM PDT 24 |
52604571347 ps |
| T466 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.951524770 |
|
|
Aug 05 06:19:19 PM PDT 24 |
Aug 05 06:19:23 PM PDT 24 |
684376193 ps |
| T467 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.1558942258 |
|
|
Aug 05 06:21:03 PM PDT 24 |
Aug 05 06:22:39 PM PDT 24 |
80477415557 ps |
| T468 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.2111455424 |
|
|
Aug 05 06:16:06 PM PDT 24 |
Aug 05 06:16:31 PM PDT 24 |
2878352221 ps |
| T469 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.568135776 |
|
|
Aug 05 06:19:18 PM PDT 24 |
Aug 05 06:22:17 PM PDT 24 |
41361861281 ps |
| T470 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.1733453401 |
|
|
Aug 05 06:20:56 PM PDT 24 |
Aug 05 06:23:57 PM PDT 24 |
21136342857 ps |
| T471 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.329766572 |
|
|
Aug 05 06:20:51 PM PDT 24 |
Aug 05 06:21:16 PM PDT 24 |
3236308811 ps |
| T472 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.708717763 |
|
|
Aug 05 06:18:49 PM PDT 24 |
Aug 05 06:21:03 PM PDT 24 |
26533301002 ps |
| T473 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.329861603 |
|
|
Aug 05 06:17:14 PM PDT 24 |
Aug 05 06:18:35 PM PDT 24 |
13616462131 ps |
| T474 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1167596042 |
|
|
Aug 05 06:22:18 PM PDT 24 |
Aug 05 06:27:51 PM PDT 24 |
13503502651 ps |
| T475 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.660095575 |
|
|
Aug 05 06:21:40 PM PDT 24 |
Aug 05 06:37:59 PM PDT 24 |
67283604088 ps |
| T476 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3272096934 |
|
|
Aug 05 06:15:40 PM PDT 24 |
Aug 05 06:36:47 PM PDT 24 |
17785822151 ps |
| T477 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.4072326372 |
|
|
Aug 05 06:22:19 PM PDT 24 |
Aug 05 06:23:17 PM PDT 24 |
10623970676 ps |
| T478 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.4022527019 |
|
|
Aug 05 06:16:24 PM PDT 24 |
Aug 05 06:20:28 PM PDT 24 |
45055479221 ps |
| T479 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3591989088 |
|
|
Aug 05 06:22:30 PM PDT 24 |
Aug 05 06:28:23 PM PDT 24 |
65812567149 ps |
| T480 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.1237091472 |
|
|
Aug 05 06:16:15 PM PDT 24 |
Aug 05 06:16:18 PM PDT 24 |
380777083 ps |
| T481 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1312019690 |
|
|
Aug 05 06:17:00 PM PDT 24 |
Aug 05 06:34:17 PM PDT 24 |
20771744230 ps |
| T482 |
/workspace/coverage/default/23.sram_ctrl_alert_test.1794742807 |
|
|
Aug 05 06:18:41 PM PDT 24 |
Aug 05 06:18:42 PM PDT 24 |
45274142 ps |
| T483 |
/workspace/coverage/default/10.sram_ctrl_regwen.1020880024 |
|
|
Aug 05 06:16:54 PM PDT 24 |
Aug 05 06:31:09 PM PDT 24 |
24746731811 ps |
| T484 |
/workspace/coverage/default/28.sram_ctrl_partial_access.3729130872 |
|
|
Aug 05 06:19:21 PM PDT 24 |
Aug 05 06:20:00 PM PDT 24 |
794825406 ps |
| T485 |
/workspace/coverage/default/48.sram_ctrl_stress_all.3326353627 |
|
|
Aug 05 06:22:46 PM PDT 24 |
Aug 05 07:16:52 PM PDT 24 |
104785128684 ps |
| T486 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.3237473617 |
|
|
Aug 05 06:20:59 PM PDT 24 |
Aug 05 06:26:50 PM PDT 24 |
5501325885 ps |
| T487 |
/workspace/coverage/default/0.sram_ctrl_regwen.1862250126 |
|
|
Aug 05 06:15:51 PM PDT 24 |
Aug 05 06:24:50 PM PDT 24 |
2555247751 ps |
| T488 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.1516770988 |
|
|
Aug 05 06:15:51 PM PDT 24 |
Aug 05 06:16:11 PM PDT 24 |
10742650599 ps |
| T489 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.1981000652 |
|
|
Aug 05 06:22:57 PM PDT 24 |
Aug 05 06:25:40 PM PDT 24 |
14157955082 ps |
| T490 |
/workspace/coverage/default/22.sram_ctrl_bijection.3710550863 |
|
|
Aug 05 06:18:27 PM PDT 24 |
Aug 05 06:45:05 PM PDT 24 |
88794810796 ps |
| T491 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.3472728243 |
|
|
Aug 05 06:21:44 PM PDT 24 |
Aug 05 06:23:19 PM PDT 24 |
3492042376 ps |
| T492 |
/workspace/coverage/default/30.sram_ctrl_regwen.2864947395 |
|
|
Aug 05 06:19:44 PM PDT 24 |
Aug 05 06:29:57 PM PDT 24 |
2941692476 ps |
| T493 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.4222618085 |
|
|
Aug 05 06:16:18 PM PDT 24 |
Aug 05 06:24:44 PM PDT 24 |
96092453750 ps |
| T494 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.1095517900 |
|
|
Aug 05 06:21:11 PM PDT 24 |
Aug 05 06:23:46 PM PDT 24 |
28769162846 ps |
| T495 |
/workspace/coverage/default/41.sram_ctrl_executable.3342087977 |
|
|
Aug 05 06:21:45 PM PDT 24 |
Aug 05 06:34:29 PM PDT 24 |
140092548898 ps |
| T496 |
/workspace/coverage/default/15.sram_ctrl_smoke.3073603907 |
|
|
Aug 05 06:17:38 PM PDT 24 |
Aug 05 06:18:06 PM PDT 24 |
767439573 ps |
| T497 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.53598107 |
|
|
Aug 05 06:19:32 PM PDT 24 |
Aug 05 06:23:44 PM PDT 24 |
8578033110 ps |
| T498 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.619925638 |
|
|
Aug 05 06:16:19 PM PDT 24 |
Aug 05 06:16:36 PM PDT 24 |
561093562 ps |
| T499 |
/workspace/coverage/default/22.sram_ctrl_executable.2604059555 |
|
|
Aug 05 06:18:32 PM PDT 24 |
Aug 05 06:32:51 PM PDT 24 |
36050063501 ps |
| T500 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.1148176701 |
|
|
Aug 05 06:20:52 PM PDT 24 |
Aug 05 06:28:24 PM PDT 24 |
8604204215 ps |
| T501 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1250649201 |
|
|
Aug 05 06:16:53 PM PDT 24 |
Aug 05 06:21:18 PM PDT 24 |
3950598411 ps |
| T502 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.3685958444 |
|
|
Aug 05 06:18:37 PM PDT 24 |
Aug 05 06:19:31 PM PDT 24 |
9439869838 ps |
| T503 |
/workspace/coverage/default/13.sram_ctrl_executable.3496485317 |
|
|
Aug 05 06:17:20 PM PDT 24 |
Aug 05 06:17:55 PM PDT 24 |
10421010465 ps |
| T504 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2334393331 |
|
|
Aug 05 06:19:15 PM PDT 24 |
Aug 05 06:19:32 PM PDT 24 |
2805877518 ps |
| T505 |
/workspace/coverage/default/4.sram_ctrl_alert_test.2896513106 |
|
|
Aug 05 06:16:11 PM PDT 24 |
Aug 05 06:16:12 PM PDT 24 |
16191340 ps |
| T506 |
/workspace/coverage/default/28.sram_ctrl_alert_test.507784549 |
|
|
Aug 05 06:19:31 PM PDT 24 |
Aug 05 06:19:31 PM PDT 24 |
73907845 ps |
| T507 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.549023173 |
|
|
Aug 05 06:22:19 PM PDT 24 |
Aug 05 06:22:24 PM PDT 24 |
3063626470 ps |
| T508 |
/workspace/coverage/default/4.sram_ctrl_smoke.125599061 |
|
|
Aug 05 06:16:06 PM PDT 24 |
Aug 05 06:16:11 PM PDT 24 |
446828009 ps |
| T509 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.4079621448 |
|
|
Aug 05 06:16:39 PM PDT 24 |
Aug 05 06:18:09 PM PDT 24 |
170864360249 ps |
| T510 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.13750303 |
|
|
Aug 05 06:19:55 PM PDT 24 |
Aug 05 06:26:10 PM PDT 24 |
82735130071 ps |
| T511 |
/workspace/coverage/default/9.sram_ctrl_bijection.1713676310 |
|
|
Aug 05 06:16:37 PM PDT 24 |
Aug 05 06:54:35 PM PDT 24 |
504274976797 ps |
| T512 |
/workspace/coverage/default/20.sram_ctrl_smoke.331010026 |
|
|
Aug 05 06:18:08 PM PDT 24 |
Aug 05 06:19:48 PM PDT 24 |
1278860204 ps |
| T513 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.347905773 |
|
|
Aug 05 06:20:20 PM PDT 24 |
Aug 05 06:21:51 PM PDT 24 |
49238503837 ps |
| T514 |
/workspace/coverage/default/16.sram_ctrl_stress_all.742113482 |
|
|
Aug 05 06:17:53 PM PDT 24 |
Aug 05 06:39:29 PM PDT 24 |
55343267269 ps |
| T515 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.3743722307 |
|
|
Aug 05 06:19:29 PM PDT 24 |
Aug 05 06:25:59 PM PDT 24 |
23669267204 ps |
| T516 |
/workspace/coverage/default/35.sram_ctrl_executable.1006562383 |
|
|
Aug 05 06:20:29 PM PDT 24 |
Aug 05 06:23:49 PM PDT 24 |
3276709672 ps |
| T517 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.1892081037 |
|
|
Aug 05 06:16:52 PM PDT 24 |
Aug 05 06:18:13 PM PDT 24 |
4695739344 ps |
| T518 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3327679992 |
|
|
Aug 05 06:16:03 PM PDT 24 |
Aug 05 06:17:11 PM PDT 24 |
1007319666 ps |
| T519 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.3853663612 |
|
|
Aug 05 06:16:51 PM PDT 24 |
Aug 05 06:19:32 PM PDT 24 |
26528880180 ps |
| T520 |
/workspace/coverage/default/34.sram_ctrl_smoke.1833133470 |
|
|
Aug 05 06:20:13 PM PDT 24 |
Aug 05 06:20:25 PM PDT 24 |
1560382598 ps |
| T521 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.703355139 |
|
|
Aug 05 06:20:06 PM PDT 24 |
Aug 05 06:36:54 PM PDT 24 |
14302300085 ps |
| T522 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.758717934 |
|
|
Aug 05 06:18:09 PM PDT 24 |
Aug 05 06:18:51 PM PDT 24 |
26276489207 ps |
| T523 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.2233548533 |
|
|
Aug 05 06:16:05 PM PDT 24 |
Aug 05 06:16:11 PM PDT 24 |
2792366516 ps |
| T524 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.3676901814 |
|
|
Aug 05 06:21:22 PM PDT 24 |
Aug 05 06:26:19 PM PDT 24 |
5256823054 ps |
| T525 |
/workspace/coverage/default/44.sram_ctrl_stress_all.3957597526 |
|
|
Aug 05 06:22:08 PM PDT 24 |
Aug 05 08:09:07 PM PDT 24 |
1600993299892 ps |
| T526 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.616413729 |
|
|
Aug 05 06:16:57 PM PDT 24 |
Aug 05 06:17:59 PM PDT 24 |
21891500672 ps |
| T527 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.1610157628 |
|
|
Aug 05 06:19:41 PM PDT 24 |
Aug 05 06:21:14 PM PDT 24 |
32540465617 ps |
| T528 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.2350263855 |
|
|
Aug 05 06:20:29 PM PDT 24 |
Aug 05 06:22:42 PM PDT 24 |
21935788247 ps |
| T529 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.3459899572 |
|
|
Aug 05 06:20:22 PM PDT 24 |
Aug 05 06:25:14 PM PDT 24 |
5051042562 ps |
| T530 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3481221807 |
|
|
Aug 05 06:18:42 PM PDT 24 |
Aug 05 06:19:07 PM PDT 24 |
572695681 ps |
| T531 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.1573449052 |
|
|
Aug 05 06:20:56 PM PDT 24 |
Aug 05 06:21:00 PM PDT 24 |
2390157307 ps |
| T532 |
/workspace/coverage/default/9.sram_ctrl_regwen.4047672047 |
|
|
Aug 05 06:16:40 PM PDT 24 |
Aug 05 06:34:41 PM PDT 24 |
65288355343 ps |
| T533 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.528706795 |
|
|
Aug 05 06:16:12 PM PDT 24 |
Aug 05 06:16:57 PM PDT 24 |
8297817044 ps |
| T534 |
/workspace/coverage/default/0.sram_ctrl_stress_all.3691243130 |
|
|
Aug 05 06:15:48 PM PDT 24 |
Aug 05 06:55:48 PM PDT 24 |
120613767692 ps |
| T535 |
/workspace/coverage/default/38.sram_ctrl_bijection.850621311 |
|
|
Aug 05 06:20:51 PM PDT 24 |
Aug 05 06:32:13 PM PDT 24 |
348199402433 ps |
| T536 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2909997780 |
|
|
Aug 05 06:16:54 PM PDT 24 |
Aug 05 06:17:57 PM PDT 24 |
4354610092 ps |
| T537 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3829201150 |
|
|
Aug 05 06:22:51 PM PDT 24 |
Aug 05 06:23:06 PM PDT 24 |
2886650985 ps |
| T538 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.3948797503 |
|
|
Aug 05 06:16:07 PM PDT 24 |
Aug 05 06:16:10 PM PDT 24 |
3773472691 ps |
| T539 |
/workspace/coverage/default/3.sram_ctrl_bijection.2718499763 |
|
|
Aug 05 06:15:57 PM PDT 24 |
Aug 05 06:57:39 PM PDT 24 |
33135078574 ps |
| T540 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.3467559336 |
|
|
Aug 05 06:20:11 PM PDT 24 |
Aug 05 06:26:44 PM PDT 24 |
345009550885 ps |
| T541 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.2098455733 |
|
|
Aug 05 06:19:03 PM PDT 24 |
Aug 05 06:20:17 PM PDT 24 |
3069266219 ps |
| T542 |
/workspace/coverage/default/36.sram_ctrl_executable.4070078887 |
|
|
Aug 05 06:20:34 PM PDT 24 |
Aug 05 06:36:05 PM PDT 24 |
29731224030 ps |
| T543 |
/workspace/coverage/default/19.sram_ctrl_stress_all.2565241970 |
|
|
Aug 05 06:18:10 PM PDT 24 |
Aug 05 07:02:02 PM PDT 24 |
35724577251 ps |
| T544 |
/workspace/coverage/default/13.sram_ctrl_regwen.2465283661 |
|
|
Aug 05 06:17:18 PM PDT 24 |
Aug 05 06:28:52 PM PDT 24 |
157438550622 ps |
| T545 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.1705154695 |
|
|
Aug 05 06:17:16 PM PDT 24 |
Aug 05 06:23:13 PM PDT 24 |
19145765148 ps |
| T546 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.2282270816 |
|
|
Aug 05 06:19:01 PM PDT 24 |
Aug 05 06:20:16 PM PDT 24 |
7571896346 ps |
| T547 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.3075546628 |
|
|
Aug 05 06:20:51 PM PDT 24 |
Aug 05 06:23:25 PM PDT 24 |
4914950721 ps |
| T548 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3542761439 |
|
|
Aug 05 06:20:07 PM PDT 24 |
Aug 05 06:20:33 PM PDT 24 |
2868513148 ps |
| T549 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.4246912102 |
|
|
Aug 05 06:20:24 PM PDT 24 |
Aug 05 06:29:05 PM PDT 24 |
36792523309 ps |
| T550 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.1489996437 |
|
|
Aug 05 06:19:16 PM PDT 24 |
Aug 05 06:21:23 PM PDT 24 |
1330988116 ps |
| T551 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.652322619 |
|
|
Aug 05 06:17:34 PM PDT 24 |
Aug 05 06:19:59 PM PDT 24 |
9715460806 ps |
| T552 |
/workspace/coverage/default/34.sram_ctrl_regwen.2662421339 |
|
|
Aug 05 06:20:20 PM PDT 24 |
Aug 05 06:47:28 PM PDT 24 |
24725567717 ps |
| T553 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.3992813768 |
|
|
Aug 05 06:20:36 PM PDT 24 |
Aug 05 06:38:56 PM PDT 24 |
95351333817 ps |
| T554 |
/workspace/coverage/default/31.sram_ctrl_stress_all.2096480265 |
|
|
Aug 05 06:19:55 PM PDT 24 |
Aug 05 07:25:07 PM PDT 24 |
177273674582 ps |
| T555 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1409587276 |
|
|
Aug 05 06:16:18 PM PDT 24 |
Aug 05 06:23:58 PM PDT 24 |
91756246918 ps |
| T556 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.526127493 |
|
|
Aug 05 06:18:42 PM PDT 24 |
Aug 05 06:21:31 PM PDT 24 |
14416932107 ps |