Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total tests in report: 1032
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
69.51 69.51 93.21 93.21 67.89 67.89 57.85 57.85 57.14 57.14 80.81 80.81 94.59 94.59 35.10 35.10 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.540509537
77.63 8.12 94.77 1.55 71.45 3.55 90.77 32.92 61.90 4.76 84.12 3.32 94.88 0.29 45.52 10.42 /workspace/coverage/default/4.sram_ctrl_executable.574424010
84.65 7.02 95.58 0.82 79.98 8.53 93.80 3.03 61.90 0.00 85.78 1.66 96.35 1.46 79.16 33.64 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.4019009154
88.17 3.52 96.89 1.31 84.24 4.27 95.21 1.41 71.43 9.52 89.57 3.79 96.49 0.15 83.36 4.20 /workspace/coverage/default/45.sram_ctrl_stress_all.1635973068
91.34 3.17 98.04 1.14 84.36 0.12 95.21 0.00 90.48 19.05 91.47 1.90 96.49 0.00 83.36 0.00 /workspace/coverage/default/37.sram_ctrl_mem_walk.430753942
93.01 1.67 98.53 0.49 84.36 0.00 95.21 0.00 100.00 9.52 92.42 0.95 97.22 0.73 83.36 0.00 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3956930750
94.40 1.39 98.77 0.25 86.97 2.61 97.00 1.79 100.00 0.00 93.84 1.42 97.22 0.00 87.02 3.66 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3299131250
95.36 0.95 98.94 0.16 87.80 0.83 97.21 0.21 100.00 0.00 94.55 0.71 97.22 0.00 91.77 4.75 /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3927123043
96.12 0.76 99.10 0.16 89.81 2.01 97.97 0.76 100.00 0.00 95.26 0.71 97.81 0.58 92.87 1.10 /workspace/coverage/default/1.sram_ctrl_sec_cm.2359295161
96.48 0.36 99.10 0.00 90.05 0.24 98.17 0.21 100.00 0.00 95.50 0.24 97.81 0.00 94.70 1.83 /workspace/coverage/default/49.sram_ctrl_regwen.3806159923
96.70 0.22 99.10 0.00 90.52 0.47 98.66 0.48 100.00 0.00 95.73 0.24 97.81 0.00 95.06 0.37 /workspace/coverage/default/9.sram_ctrl_smoke.910844675
96.87 0.18 99.10 0.00 90.52 0.00 98.73 0.07 100.00 0.00 95.73 0.00 98.98 1.17 95.06 0.00 /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1649952349
97.03 0.16 99.10 0.00 90.52 0.00 98.73 0.00 100.00 0.00 95.73 0.00 98.98 0.00 96.16 1.10 /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3510186409
97.17 0.14 99.18 0.08 90.52 0.00 99.62 0.90 100.00 0.00 95.73 0.00 98.98 0.00 96.16 0.00 /workspace/coverage/default/35.sram_ctrl_ram_cfg.2180006041
97.26 0.08 99.18 0.00 90.64 0.12 99.62 0.00 100.00 0.00 96.21 0.47 98.98 0.00 96.16 0.00 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2500090267
97.32 0.07 99.18 0.00 91.00 0.36 99.72 0.10 100.00 0.00 96.21 0.00 98.98 0.00 96.16 0.00 /workspace/coverage/default/12.sram_ctrl_alert_test.2973603242
97.37 0.05 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.98 0.00 96.53 0.37 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1848852052
97.43 0.05 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.98 0.00 96.89 0.37 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3555799540
97.48 0.05 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.98 0.00 97.26 0.37 /workspace/coverage/default/15.sram_ctrl_stress_all.1913762888
97.50 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.98 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1361339004
97.52 0.02 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.15 97.44 0.00 /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1802207425

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3987546425
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2436046662
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1676996677
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.441924134
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.746546120
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.4220827148
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3653613849
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.4271443027
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.232581429
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3384559314
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1310854248
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.992229675
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.279736347
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3555244704
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.4104610729
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.4239824471
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1378533203
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3319120911
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1365175340
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.250305233
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2941476925
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2255840415
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1874008761
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.935660936
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1275700060
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2204239543
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1438993524
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2847398034
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.4112238717
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3093303102
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.4121835824
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2405044305
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2979917279
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.832098918
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2191400591
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3775176019
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3171381927
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.4255287421
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.881158840
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1597146987
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1060551821
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3709835571
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3238412949
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.901986332
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.325515502
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3930409935
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1200717360
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1221273302
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.4251021575
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.384702860
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2403050540
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.233195312
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2325234111
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2471428161
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1956929525
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1151416384
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2671697673
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.505625082
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2861493853
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2342745087
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2373811952
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1068187737
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3786992514
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.859179460
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1770928861
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2113616335
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1038541750
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2115067797
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.378788995
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1263340144
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2519136140
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.4280507411
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2783674896
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1594120045
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.4264060574
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2232908050
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.4169141144
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1489797826
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1437997892
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3855129427
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2697771867
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3310664938
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.81938626
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2229900258
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3722132090
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3936028531
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2188035359
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3964679748
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3985873412
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.605062304
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1591390293
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.645174940
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.127301276
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1651088931
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3474684757
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2505241018
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1082562449
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.9435912
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3659570865
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1700431331
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2891654435
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1804693112
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2500307881
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2189736027
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3161847031
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3287380491
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.51451189
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.864412021
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1184986973
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.305927066
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3087525778
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2892700812
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2641166516
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.894829786
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.496711705
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2856923462
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3769427341
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3629743319
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.455853467
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2746276550
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.4057950249
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2490069857
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3805824156
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2931482898
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.938817268
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3533989630
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2569465880
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3658940913
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.649846020
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.574063022
/workspace/coverage/default/0.sram_ctrl_alert_test.2176701481
/workspace/coverage/default/0.sram_ctrl_bijection.571333264
/workspace/coverage/default/0.sram_ctrl_executable.2010424150
/workspace/coverage/default/0.sram_ctrl_lc_escalation.654563510
/workspace/coverage/default/0.sram_ctrl_max_throughput.4066717445
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2462979366
/workspace/coverage/default/0.sram_ctrl_mem_walk.2804541292
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3272096934
/workspace/coverage/default/0.sram_ctrl_partial_access.2217304397
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.4007119835
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1296272323
/workspace/coverage/default/0.sram_ctrl_regwen.1862250126
/workspace/coverage/default/0.sram_ctrl_sec_cm.669633792
/workspace/coverage/default/0.sram_ctrl_smoke.2908132607
/workspace/coverage/default/0.sram_ctrl_stress_all.3691243130
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1258250407
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3318023260
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.246457593
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.526472908
/workspace/coverage/default/1.sram_ctrl_alert_test.242210147
/workspace/coverage/default/1.sram_ctrl_bijection.3347452142
/workspace/coverage/default/1.sram_ctrl_executable.1170051196
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3475439652
/workspace/coverage/default/1.sram_ctrl_max_throughput.2727132140
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3327679992
/workspace/coverage/default/1.sram_ctrl_mem_walk.3438537165
/workspace/coverage/default/1.sram_ctrl_multiple_keys.4114318227
/workspace/coverage/default/1.sram_ctrl_partial_access.282867069
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.4173204552
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1496730373
/workspace/coverage/default/1.sram_ctrl_regwen.1929266705
/workspace/coverage/default/1.sram_ctrl_smoke.2512031856
/workspace/coverage/default/1.sram_ctrl_stress_all.2965543374
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3098457213
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.486487905
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.303376519
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2722439596
/workspace/coverage/default/10.sram_ctrl_alert_test.1816751766
/workspace/coverage/default/10.sram_ctrl_bijection.3410247860
/workspace/coverage/default/10.sram_ctrl_executable.670907622
/workspace/coverage/default/10.sram_ctrl_lc_escalation.4091291874
/workspace/coverage/default/10.sram_ctrl_max_throughput.1948777879
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2909997780
/workspace/coverage/default/10.sram_ctrl_mem_walk.3853663612
/workspace/coverage/default/10.sram_ctrl_multiple_keys.880389263
/workspace/coverage/default/10.sram_ctrl_partial_access.2627188537
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1422163343
/workspace/coverage/default/10.sram_ctrl_regwen.1020880024
/workspace/coverage/default/10.sram_ctrl_smoke.4107801646
/workspace/coverage/default/10.sram_ctrl_stress_all.698453820
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2361354424
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1851144785
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3341435885
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1312019690
/workspace/coverage/default/11.sram_ctrl_alert_test.3454487653
/workspace/coverage/default/11.sram_ctrl_bijection.2327935659
/workspace/coverage/default/11.sram_ctrl_executable.294015625
/workspace/coverage/default/11.sram_ctrl_lc_escalation.616413729
/workspace/coverage/default/11.sram_ctrl_max_throughput.1892081037
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3910089479
/workspace/coverage/default/11.sram_ctrl_mem_walk.2523371144
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2034212526
/workspace/coverage/default/11.sram_ctrl_partial_access.1368520415
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4106950573
/workspace/coverage/default/11.sram_ctrl_ram_cfg.464025710
/workspace/coverage/default/11.sram_ctrl_regwen.636571875
/workspace/coverage/default/11.sram_ctrl_smoke.3085026634
/workspace/coverage/default/11.sram_ctrl_stress_all.3145097553
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3295651548
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1250649201
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/workspace/coverage/default/42.sram_ctrl_regwen.3961454324
/workspace/coverage/default/42.sram_ctrl_smoke.1228541753
/workspace/coverage/default/42.sram_ctrl_stress_all.3619357204
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.2707750050
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.4173084922
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.2272129499
/workspace/coverage/default/43.sram_ctrl_alert_test.3366388911
/workspace/coverage/default/43.sram_ctrl_bijection.1821295306
/workspace/coverage/default/43.sram_ctrl_lc_escalation.1504212297
/workspace/coverage/default/43.sram_ctrl_max_throughput.1162490151
/workspace/coverage/default/43.sram_ctrl_mem_walk.1209746126
/workspace/coverage/default/43.sram_ctrl_multiple_keys.1574282766
/workspace/coverage/default/43.sram_ctrl_partial_access.3296590810
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.557984270
/workspace/coverage/default/43.sram_ctrl_ram_cfg.3920331238
/workspace/coverage/default/43.sram_ctrl_regwen.1918666361
/workspace/coverage/default/43.sram_ctrl_smoke.1642790016
/workspace/coverage/default/43.sram_ctrl_stress_all.2282324054
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2277282423
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3732972985
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2870152693
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.4132229628
/workspace/coverage/default/44.sram_ctrl_alert_test.293533977
/workspace/coverage/default/44.sram_ctrl_bijection.3923176217
/workspace/coverage/default/44.sram_ctrl_executable.1081312014
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1760595932
/workspace/coverage/default/44.sram_ctrl_max_throughput.2042985403
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1885801229
/workspace/coverage/default/44.sram_ctrl_mem_walk.2885382615
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3407651353
/workspace/coverage/default/44.sram_ctrl_partial_access.3866225276
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1657373673
/workspace/coverage/default/44.sram_ctrl_ram_cfg.948518642
/workspace/coverage/default/44.sram_ctrl_regwen.1001375278
/workspace/coverage/default/44.sram_ctrl_smoke.1555836986
/workspace/coverage/default/44.sram_ctrl_stress_all.3957597526
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.524970790
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.685777417
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2860217503
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.747362794
/workspace/coverage/default/45.sram_ctrl_alert_test.2992954487
/workspace/coverage/default/45.sram_ctrl_bijection.3413443886
/workspace/coverage/default/45.sram_ctrl_executable.1941641180
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2968730839
/workspace/coverage/default/45.sram_ctrl_max_throughput.3620169234
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.522981385
/workspace/coverage/default/45.sram_ctrl_mem_walk.1101622580
/workspace/coverage/default/45.sram_ctrl_multiple_keys.129116369
/workspace/coverage/default/45.sram_ctrl_partial_access.758670060
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2730322710
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1022592546
/workspace/coverage/default/45.sram_ctrl_regwen.2499397586
/workspace/coverage/default/45.sram_ctrl_smoke.1863808835
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.584890781
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3144108771
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.838034474
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2247898452
/workspace/coverage/default/46.sram_ctrl_alert_test.3057157455
/workspace/coverage/default/46.sram_ctrl_bijection.1712833150
/workspace/coverage/default/46.sram_ctrl_executable.537195043
/workspace/coverage/default/46.sram_ctrl_lc_escalation.4072326372
/workspace/coverage/default/46.sram_ctrl_max_throughput.3051302946
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3712673216
/workspace/coverage/default/46.sram_ctrl_mem_walk.3243209775
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2841000072
/workspace/coverage/default/46.sram_ctrl_partial_access.2697859714
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2061477513
/workspace/coverage/default/46.sram_ctrl_ram_cfg.549023173
/workspace/coverage/default/46.sram_ctrl_regwen.1333584231
/workspace/coverage/default/46.sram_ctrl_smoke.740422188
/workspace/coverage/default/46.sram_ctrl_stress_all.3105784347
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2360650678
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1167596042
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1220458828
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3440198000
/workspace/coverage/default/47.sram_ctrl_alert_test.725362575
/workspace/coverage/default/47.sram_ctrl_bijection.3245326301
/workspace/coverage/default/47.sram_ctrl_executable.2772618596
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1693172075
/workspace/coverage/default/47.sram_ctrl_max_throughput.346651169
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1205046044
/workspace/coverage/default/47.sram_ctrl_mem_walk.3675309901
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1334355265
/workspace/coverage/default/47.sram_ctrl_partial_access.1165605237
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3591989088
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1983310301
/workspace/coverage/default/47.sram_ctrl_regwen.1476764128
/workspace/coverage/default/47.sram_ctrl_smoke.936475891
/workspace/coverage/default/47.sram_ctrl_stress_all.3689137167
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2648494583
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2019286077
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1509599239
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1264625518
/workspace/coverage/default/48.sram_ctrl_alert_test.3520336746
/workspace/coverage/default/48.sram_ctrl_bijection.1689036292
/workspace/coverage/default/48.sram_ctrl_executable.3574335898
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2001208460
/workspace/coverage/default/48.sram_ctrl_max_throughput.1630983990
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3576536851
/workspace/coverage/default/48.sram_ctrl_mem_walk.1668139625
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1619278515
/workspace/coverage/default/48.sram_ctrl_partial_access.4229585579
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.184068686
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2188446649
/workspace/coverage/default/48.sram_ctrl_regwen.2862851203
/workspace/coverage/default/48.sram_ctrl_smoke.950724340
/workspace/coverage/default/48.sram_ctrl_stress_all.3326353627
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3068624482
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1044626849
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2129261928
/workspace/coverage/default/49.sram_ctrl_alert_test.1219877191
/workspace/coverage/default/49.sram_ctrl_bijection.3026273958
/workspace/coverage/default/49.sram_ctrl_executable.56417904
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2815218189
/workspace/coverage/default/49.sram_ctrl_max_throughput.4091213528
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1121352294
/workspace/coverage/default/49.sram_ctrl_mem_walk.1981000652
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1604606056
/workspace/coverage/default/49.sram_ctrl_partial_access.3040990916
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2935201958
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3376895424
/workspace/coverage/default/49.sram_ctrl_smoke.4281770473
/workspace/coverage/default/49.sram_ctrl_stress_all.4285448556
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2403831481
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1179551618
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3829201150
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.4234445527
/workspace/coverage/default/5.sram_ctrl_alert_test.274607813
/workspace/coverage/default/5.sram_ctrl_bijection.4185131796
/workspace/coverage/default/5.sram_ctrl_executable.1689832425
/workspace/coverage/default/5.sram_ctrl_lc_escalation.528706795
/workspace/coverage/default/5.sram_ctrl_max_throughput.2771703855
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3145521432
/workspace/coverage/default/5.sram_ctrl_mem_walk.2654531202
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2593301012
/workspace/coverage/default/5.sram_ctrl_partial_access.2211588766
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3101221012
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1612612609
/workspace/coverage/default/5.sram_ctrl_regwen.2003065139
/workspace/coverage/default/5.sram_ctrl_smoke.1688918050
/workspace/coverage/default/5.sram_ctrl_stress_all.2123038891
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2083389468
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2411503595
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3624324954
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2009269385
/workspace/coverage/default/6.sram_ctrl_alert_test.2215497008
/workspace/coverage/default/6.sram_ctrl_bijection.3305419966
/workspace/coverage/default/6.sram_ctrl_executable.10644815
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1233387591
/workspace/coverage/default/6.sram_ctrl_max_throughput.2362709556
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3321532163
/workspace/coverage/default/6.sram_ctrl_mem_walk.4290588346
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2012031184
/workspace/coverage/default/6.sram_ctrl_partial_access.122065617
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.4222618085
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3417471131
/workspace/coverage/default/6.sram_ctrl_regwen.1425820482
/workspace/coverage/default/6.sram_ctrl_smoke.1646254969
/workspace/coverage/default/6.sram_ctrl_stress_all.3296464761
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.619925638
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1227505917
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3121452018
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3513282299
/workspace/coverage/default/7.sram_ctrl_alert_test.2949671802
/workspace/coverage/default/7.sram_ctrl_bijection.4055691214
/workspace/coverage/default/7.sram_ctrl_executable.1702539088
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1459700055
/workspace/coverage/default/7.sram_ctrl_max_throughput.2138367274
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3877173982
/workspace/coverage/default/7.sram_ctrl_mem_walk.3167485169
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1409587276
/workspace/coverage/default/7.sram_ctrl_partial_access.39196725
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2434445567
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2889150404
/workspace/coverage/default/7.sram_ctrl_regwen.3709416210
/workspace/coverage/default/7.sram_ctrl_smoke.684458093
/workspace/coverage/default/7.sram_ctrl_stress_all.1219064258
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.332776991
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3991738949
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1626093137
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1880655319
/workspace/coverage/default/8.sram_ctrl_alert_test.2880752499
/workspace/coverage/default/8.sram_ctrl_bijection.2587818278
/workspace/coverage/default/8.sram_ctrl_executable.3313378559
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3647626127
/workspace/coverage/default/8.sram_ctrl_max_throughput.327851434
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2255241152
/workspace/coverage/default/8.sram_ctrl_mem_walk.2626996943
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2215385874
/workspace/coverage/default/8.sram_ctrl_partial_access.3805617047
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.4022527019
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2808239917
/workspace/coverage/default/8.sram_ctrl_regwen.3165059170
/workspace/coverage/default/8.sram_ctrl_smoke.1399256532
/workspace/coverage/default/8.sram_ctrl_stress_all.439454609
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2336878485
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.712532095
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2216846979
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2474815598
/workspace/coverage/default/9.sram_ctrl_alert_test.1961587361
/workspace/coverage/default/9.sram_ctrl_bijection.1713676310
/workspace/coverage/default/9.sram_ctrl_executable.1320806891
/workspace/coverage/default/9.sram_ctrl_lc_escalation.4079621448
/workspace/coverage/default/9.sram_ctrl_max_throughput.2971186158
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1503304762
/workspace/coverage/default/9.sram_ctrl_mem_walk.2278959287
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2617665013
/workspace/coverage/default/9.sram_ctrl_partial_access.2159845137
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.368312153
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3342096170
/workspace/coverage/default/9.sram_ctrl_regwen.4047672047
/workspace/coverage/default/9.sram_ctrl_stress_all.4039358289
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2659437007
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1394583947
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.4240706999



Total test records in report: 1032
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.540509537 Aug 05 06:21:53 PM PDT 24 Aug 05 06:23:10 PM PDT 24 5823221548 ps
T2 /workspace/coverage/default/43.sram_ctrl_partial_access.3296590810 Aug 05 06:21:45 PM PDT 24 Aug 05 06:22:03 PM PDT 24 5909920827 ps
T3 /workspace/coverage/default/44.sram_ctrl_smoke.1555836986 Aug 05 06:21:57 PM PDT 24 Aug 05 06:23:00 PM PDT 24 3396973841 ps
T7 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.2450533854 Aug 05 06:20:18 PM PDT 24 Aug 05 06:26:31 PM PDT 24 5848720664 ps
T4 /workspace/coverage/default/33.sram_ctrl_partial_access.906411515 Aug 05 06:20:07 PM PDT 24 Aug 05 06:21:28 PM PDT 24 4656428467 ps
T11 /workspace/coverage/default/4.sram_ctrl_executable.574424010 Aug 05 06:16:11 PM PDT 24 Aug 05 06:29:07 PM PDT 24 22905284869 ps
T5 /workspace/coverage/default/26.sram_ctrl_smoke.4137019738 Aug 05 06:19:03 PM PDT 24 Aug 05 06:21:07 PM PDT 24 1849810857 ps
T12 /workspace/coverage/default/19.sram_ctrl_max_throughput.1856948841 Aug 05 06:18:05 PM PDT 24 Aug 05 06:18:21 PM PDT 24 1458274954 ps
T13 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.3829444957 Aug 05 06:16:11 PM PDT 24 Aug 05 06:33:11 PM PDT 24 15750380368 ps
T14 /workspace/coverage/default/12.sram_ctrl_mem_walk.4033133020 Aug 05 06:17:07 PM PDT 24 Aug 05 06:21:30 PM PDT 24 16414789953 ps
T6 /workspace/coverage/default/30.sram_ctrl_smoke.1356406498 Aug 05 06:19:33 PM PDT 24 Aug 05 06:19:58 PM PDT 24 4664323148 ps
T27 /workspace/coverage/default/35.sram_ctrl_partial_access.2996935506 Aug 05 06:20:23 PM PDT 24 Aug 05 06:20:30 PM PDT 24 726680541 ps
T21 /workspace/coverage/default/43.sram_ctrl_bijection.1821295306 Aug 05 06:21:45 PM PDT 24 Aug 05 06:43:45 PM PDT 24 304091417132 ps
T15 /workspace/coverage/default/48.sram_ctrl_alert_test.3520336746 Aug 05 06:22:47 PM PDT 24 Aug 05 06:22:47 PM PDT 24 85598215 ps
T97 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2255241152 Aug 05 06:16:29 PM PDT 24 Aug 05 06:19:09 PM PDT 24 5045860561 ps
T59 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.1715830545 Aug 05 06:20:51 PM PDT 24 Aug 05 06:25:29 PM PDT 24 9235026447 ps
T63 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.3793402582 Aug 05 06:21:23 PM PDT 24 Aug 05 06:22:52 PM PDT 24 16783647408 ps
T31 /workspace/coverage/default/35.sram_ctrl_ram_cfg.2180006041 Aug 05 06:20:33 PM PDT 24 Aug 05 06:20:37 PM PDT 24 1350800279 ps
T22 /workspace/coverage/default/8.sram_ctrl_bijection.2587818278 Aug 05 06:16:24 PM PDT 24 Aug 05 06:34:58 PM PDT 24 216122829208 ps
T47 /workspace/coverage/default/14.sram_ctrl_mem_walk.290690653 Aug 05 06:17:27 PM PDT 24 Aug 05 06:19:59 PM PDT 24 2632759966 ps
T23 /workspace/coverage/default/49.sram_ctrl_regwen.3806159923 Aug 05 06:22:53 PM PDT 24 Aug 05 06:42:24 PM PDT 24 44911907403 ps
T45 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.65609180 Aug 05 06:20:58 PM PDT 24 Aug 05 06:33:30 PM PDT 24 46265825317 ps
T73 /workspace/coverage/default/48.sram_ctrl_bijection.1689036292 Aug 05 06:22:40 PM PDT 24 Aug 05 06:53:21 PM PDT 24 315507375630 ps
T74 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3299131250 Aug 05 06:17:44 PM PDT 24 Aug 05 06:23:48 PM PDT 24 202896828855 ps
T75 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.368312153 Aug 05 06:16:34 PM PDT 24 Aug 05 06:23:18 PM PDT 24 6377616171 ps
T64 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3287996368 Aug 05 06:20:19 PM PDT 24 Aug 05 06:21:01 PM PDT 24 10312244042 ps
T28 /workspace/coverage/default/39.sram_ctrl_executable.1600801446 Aug 05 06:21:11 PM PDT 24 Aug 05 06:38:06 PM PDT 24 134069643443 ps
T66 /workspace/coverage/default/20.sram_ctrl_partial_access.3579429021 Aug 05 06:18:14 PM PDT 24 Aug 05 06:18:31 PM PDT 24 2495104659 ps
T16 /workspace/coverage/default/26.sram_ctrl_alert_test.3619720716 Aug 05 06:19:15 PM PDT 24 Aug 05 06:19:16 PM PDT 24 17605827 ps
T67 /workspace/coverage/default/9.sram_ctrl_smoke.910844675 Aug 05 06:16:33 PM PDT 24 Aug 05 06:18:06 PM PDT 24 1753037828 ps
T158 /workspace/coverage/default/11.sram_ctrl_mem_walk.2523371144 Aug 05 06:16:57 PM PDT 24 Aug 05 06:19:05 PM PDT 24 8217856580 ps
T24 /workspace/coverage/default/13.sram_ctrl_stress_all.1300976336 Aug 05 06:17:21 PM PDT 24 Aug 05 08:07:13 PM PDT 24 41312515408 ps
T17 /workspace/coverage/default/12.sram_ctrl_alert_test.2973603242 Aug 05 06:17:07 PM PDT 24 Aug 05 06:17:08 PM PDT 24 13884705 ps
T164 /workspace/coverage/default/4.sram_ctrl_multiple_keys.3866145994 Aug 05 06:16:07 PM PDT 24 Aug 05 06:16:30 PM PDT 24 4828363379 ps
T26 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.4019009154 Aug 05 06:17:55 PM PDT 24 Aug 05 06:18:12 PM PDT 24 540522633 ps
T82 /workspace/coverage/default/39.sram_ctrl_partial_access.3373492757 Aug 05 06:21:02 PM PDT 24 Aug 05 06:21:15 PM PDT 24 5526941956 ps
T83 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2730322710 Aug 05 06:22:08 PM PDT 24 Aug 05 06:27:33 PM PDT 24 27943791707 ps
T25 /workspace/coverage/default/48.sram_ctrl_regwen.2862851203 Aug 05 06:22:41 PM PDT 24 Aug 05 06:47:37 PM PDT 24 16991218200 ps
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T153 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.1433275170 Aug 05 06:19:41 PM PDT 24 Aug 05 06:28:49 PM PDT 24 20973380714 ps
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T33 /workspace/coverage/default/48.sram_ctrl_ram_cfg.2188446649 Aug 05 06:22:40 PM PDT 24 Aug 05 06:22:43 PM PDT 24 1354655053 ps
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T50 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.2852629464 Aug 05 06:21:36 PM PDT 24 Aug 05 06:24:37 PM PDT 24 20095378407 ps
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T175 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.1643408029 Aug 05 06:16:05 PM PDT 24 Aug 05 06:16:58 PM PDT 24 10578130471 ps
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T178 /workspace/coverage/default/0.sram_ctrl_partial_access.2217304397 Aug 05 06:15:43 PM PDT 24 Aug 05 06:15:50 PM PDT 24 1126489834 ps
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T51 /workspace/coverage/default/6.sram_ctrl_mem_walk.4290588346 Aug 05 06:16:19 PM PDT 24 Aug 05 06:18:50 PM PDT 24 8320208011 ps
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T101 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.2097700939 Aug 05 06:18:23 PM PDT 24 Aug 05 06:24:24 PM PDT 24 46179308555 ps
T18 /workspace/coverage/default/1.sram_ctrl_sec_cm.2359295161 Aug 05 06:15:52 PM PDT 24 Aug 05 06:15:56 PM PDT 24 1307022291 ps
T36 /workspace/coverage/default/27.sram_ctrl_executable.1896458345 Aug 05 06:19:16 PM PDT 24 Aug 05 06:31:02 PM PDT 24 25417781386 ps
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T38 /workspace/coverage/default/8.sram_ctrl_mem_walk.2626996943 Aug 05 06:16:28 PM PDT 24 Aug 05 06:18:51 PM PDT 24 5368760967 ps
T39 /workspace/coverage/default/22.sram_ctrl_mem_walk.908925052 Aug 05 06:18:32 PM PDT 24 Aug 05 06:20:59 PM PDT 24 2659707307 ps
T40 /workspace/coverage/default/10.sram_ctrl_lc_escalation.4091291874 Aug 05 06:16:46 PM PDT 24 Aug 05 06:17:28 PM PDT 24 6976010453 ps
T41 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3145521432 Aug 05 06:16:11 PM PDT 24 Aug 05 06:18:36 PM PDT 24 5091110347 ps
T42 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2855216615 Aug 05 06:20:40 PM PDT 24 Aug 05 06:24:18 PM PDT 24 34748791513 ps
T43 /workspace/coverage/default/15.sram_ctrl_bijection.153076372 Aug 05 06:17:31 PM PDT 24 Aug 05 06:48:27 PM PDT 24 489618878368 ps
T44 /workspace/coverage/default/37.sram_ctrl_mem_walk.430753942 Aug 05 06:20:45 PM PDT 24 Aug 05 06:27:51 PM PDT 24 230155673512 ps
T182 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.4127533768 Aug 05 06:20:17 PM PDT 24 Aug 05 06:45:33 PM PDT 24 171112436279 ps
T183 /workspace/coverage/default/2.sram_ctrl_alert_test.2859447748 Aug 05 06:16:00 PM PDT 24 Aug 05 06:16:01 PM PDT 24 33842726 ps
T184 /workspace/coverage/default/38.sram_ctrl_max_throughput.523304815 Aug 05 06:20:51 PM PDT 24 Aug 05 06:20:59 PM PDT 24 2706585022 ps
T185 /workspace/coverage/default/46.sram_ctrl_smoke.740422188 Aug 05 06:22:19 PM PDT 24 Aug 05 06:22:24 PM PDT 24 1519594985 ps
T186 /workspace/coverage/default/24.sram_ctrl_regwen.3484387398 Aug 05 06:18:48 PM PDT 24 Aug 05 06:34:31 PM PDT 24 3286675630 ps
T187 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1439850369 Aug 05 06:19:04 PM PDT 24 Aug 05 06:23:52 PM PDT 24 21677860680 ps
T188 /workspace/coverage/default/5.sram_ctrl_multiple_keys.2593301012 Aug 05 06:16:12 PM PDT 24 Aug 05 06:20:05 PM PDT 24 15246894519 ps
T189 /workspace/coverage/default/41.sram_ctrl_multiple_keys.2035095392 Aug 05 06:21:29 PM PDT 24 Aug 05 06:29:04 PM PDT 24 30186956537 ps
T53 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.3576536851 Aug 05 06:22:40 PM PDT 24 Aug 05 06:25:38 PM PDT 24 62658223983 ps
T29 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2277282423 Aug 05 06:21:51 PM PDT 24 Aug 05 06:22:06 PM PDT 24 1759905763 ps
T30 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.332776991 Aug 05 06:16:25 PM PDT 24 Aug 05 06:16:51 PM PDT 24 5683161571 ps
T190 /workspace/coverage/default/16.sram_ctrl_max_throughput.1902697417 Aug 05 06:17:37 PM PDT 24 Aug 05 06:17:44 PM PDT 24 721902763 ps
T191 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.1710657047 Aug 05 06:17:37 PM PDT 24 Aug 05 06:21:52 PM PDT 24 6949530268 ps
T192 /workspace/coverage/default/12.sram_ctrl_partial_access.678589744 Aug 05 06:17:03 PM PDT 24 Aug 05 06:18:45 PM PDT 24 1075734767 ps
T193 /workspace/coverage/default/10.sram_ctrl_bijection.3410247860 Aug 05 06:16:46 PM PDT 24 Aug 05 06:37:36 PM PDT 24 211633784281 ps
T194 /workspace/coverage/default/10.sram_ctrl_smoke.4107801646 Aug 05 06:16:45 PM PDT 24 Aug 05 06:17:03 PM PDT 24 8269589857 ps
T195 /workspace/coverage/default/35.sram_ctrl_max_throughput.356258868 Aug 05 06:20:23 PM PDT 24 Aug 05 06:22:29 PM PDT 24 800208913 ps
T196 /workspace/coverage/default/33.sram_ctrl_max_throughput.2666606306 Aug 05 06:20:06 PM PDT 24 Aug 05 06:20:46 PM PDT 24 1468714058 ps
T197 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.2410921831 Aug 05 06:19:39 PM PDT 24 Aug 05 06:20:51 PM PDT 24 1602614309 ps
T198 /workspace/coverage/default/17.sram_ctrl_bijection.895070599 Aug 05 06:17:45 PM PDT 24 Aug 05 06:34:56 PM PDT 24 15707867525 ps
T150 /workspace/coverage/default/40.sram_ctrl_regwen.3638511073 Aug 05 06:21:23 PM PDT 24 Aug 05 06:31:05 PM PDT 24 11512484298 ps
T199 /workspace/coverage/default/34.sram_ctrl_multiple_keys.754045871 Aug 05 06:20:13 PM PDT 24 Aug 05 06:22:45 PM PDT 24 3572163208 ps
T200 /workspace/coverage/default/18.sram_ctrl_multiple_keys.3661353821 Aug 05 06:17:52 PM PDT 24 Aug 05 06:23:41 PM PDT 24 4986039031 ps
T201 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.1448806355 Aug 05 06:19:01 PM PDT 24 Aug 05 06:21:34 PM PDT 24 5197347712 ps
T76 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2403831481 Aug 05 06:22:57 PM PDT 24 Aug 05 06:23:34 PM PDT 24 8952158082 ps
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T128 /workspace/coverage/default/15.sram_ctrl_lc_escalation.3817564989 Aug 05 06:17:32 PM PDT 24 Aug 05 06:18:10 PM PDT 24 12269282250 ps
T129 /workspace/coverage/default/27.sram_ctrl_stress_all.2947855419 Aug 05 06:19:18 PM PDT 24 Aug 05 07:11:33 PM PDT 24 38696786673 ps
T130 /workspace/coverage/default/8.sram_ctrl_partial_access.3805617047 Aug 05 06:16:24 PM PDT 24 Aug 05 06:16:29 PM PDT 24 1692177278 ps
T131 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.3374652454 Aug 05 06:20:46 PM PDT 24 Aug 05 06:39:24 PM PDT 24 13285101658 ps
T132 /workspace/coverage/default/21.sram_ctrl_lc_escalation.747171621 Aug 05 06:18:23 PM PDT 24 Aug 05 06:20:20 PM PDT 24 61823019777 ps
T133 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.768036027 Aug 05 06:17:04 PM PDT 24 Aug 05 06:17:17 PM PDT 24 737799638 ps
T134 /workspace/coverage/default/33.sram_ctrl_bijection.2857777398 Aug 05 06:20:06 PM PDT 24 Aug 05 07:01:29 PM PDT 24 301665180683 ps
T202 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2902287618 Aug 05 06:18:38 PM PDT 24 Aug 05 06:19:01 PM PDT 24 729491889 ps
T203 /workspace/coverage/default/34.sram_ctrl_executable.4052732245 Aug 05 06:20:19 PM PDT 24 Aug 05 06:21:35 PM PDT 24 4128158194 ps
T204 /workspace/coverage/default/3.sram_ctrl_alert_test.3824822662 Aug 05 06:16:05 PM PDT 24 Aug 05 06:16:06 PM PDT 24 33801441 ps
T205 /workspace/coverage/default/6.sram_ctrl_lc_escalation.1233387591 Aug 05 06:16:19 PM PDT 24 Aug 05 06:17:13 PM PDT 24 26519501086 ps
T54 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.3910089479 Aug 05 06:16:57 PM PDT 24 Aug 05 06:18:20 PM PDT 24 2803179188 ps
T155 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2111940333 Aug 05 06:21:41 PM PDT 24 Aug 05 06:29:22 PM PDT 24 18616132034 ps
T206 /workspace/coverage/default/45.sram_ctrl_regwen.2499397586 Aug 05 06:22:14 PM PDT 24 Aug 05 06:37:34 PM PDT 24 2334112648 ps
T207 /workspace/coverage/default/20.sram_ctrl_mem_walk.69000173 Aug 05 06:18:18 PM PDT 24 Aug 05 06:20:56 PM PDT 24 2770326642 ps
T208 /workspace/coverage/default/12.sram_ctrl_lc_escalation.862102118 Aug 05 06:17:02 PM PDT 24 Aug 05 06:17:56 PM PDT 24 9076095733 ps
T209 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.4026338466 Aug 05 06:19:01 PM PDT 24 Aug 05 06:22:41 PM PDT 24 13692049265 ps
T210 /workspace/coverage/default/16.sram_ctrl_regwen.2227739633 Aug 05 06:17:38 PM PDT 24 Aug 05 06:31:38 PM PDT 24 46413120794 ps
T211 /workspace/coverage/default/7.sram_ctrl_stress_all.1219064258 Aug 05 06:16:23 PM PDT 24 Aug 05 07:58:12 PM PDT 24 850528253534 ps
T212 /workspace/coverage/default/20.sram_ctrl_multiple_keys.1684885335 Aug 05 06:18:15 PM PDT 24 Aug 05 06:39:16 PM PDT 24 38497824818 ps
T213 /workspace/coverage/default/16.sram_ctrl_partial_access.3353401976 Aug 05 06:17:38 PM PDT 24 Aug 05 06:17:42 PM PDT 24 398893076 ps
T214 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.2914607761 Aug 05 06:18:08 PM PDT 24 Aug 05 06:44:50 PM PDT 24 86499376426 ps
T215 /workspace/coverage/default/24.sram_ctrl_alert_test.1677431114 Aug 05 06:18:48 PM PDT 24 Aug 05 06:18:48 PM PDT 24 23482115 ps
T216 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2325028319 Aug 05 06:19:23 PM PDT 24 Aug 05 06:23:01 PM PDT 24 4096458688 ps
T217 /workspace/coverage/default/25.sram_ctrl_bijection.3627813118 Aug 05 06:18:55 PM PDT 24 Aug 05 06:26:52 PM PDT 24 28707325276 ps
T218 /workspace/coverage/default/29.sram_ctrl_alert_test.640205572 Aug 05 06:19:35 PM PDT 24 Aug 05 06:19:36 PM PDT 24 20016299 ps
T219 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1044626849 Aug 05 06:22:39 PM PDT 24 Aug 05 06:22:49 PM PDT 24 689210841 ps
T220 /workspace/coverage/default/25.sram_ctrl_smoke.1024202592 Aug 05 06:18:48 PM PDT 24 Aug 05 06:19:18 PM PDT 24 1572128203 ps
T221 /workspace/coverage/default/12.sram_ctrl_ram_cfg.1336689621 Aug 05 06:17:08 PM PDT 24 Aug 05 06:17:12 PM PDT 24 1397631901 ps
T222 /workspace/coverage/default/3.sram_ctrl_regwen.4212416614 Aug 05 06:16:04 PM PDT 24 Aug 05 06:26:59 PM PDT 24 28241426124 ps
T223 /workspace/coverage/default/14.sram_ctrl_partial_access.2751968518 Aug 05 06:17:25 PM PDT 24 Aug 05 06:17:43 PM PDT 24 5097052325 ps
T224 /workspace/coverage/default/31.sram_ctrl_executable.1394035391 Aug 05 06:19:49 PM PDT 24 Aug 05 06:39:52 PM PDT 24 56863746480 ps
T225 /workspace/coverage/default/45.sram_ctrl_alert_test.2992954487 Aug 05 06:22:13 PM PDT 24 Aug 05 06:22:14 PM PDT 24 38761285 ps
T226 /workspace/coverage/default/13.sram_ctrl_alert_test.254682643 Aug 05 06:17:21 PM PDT 24 Aug 05 06:17:22 PM PDT 24 21465611 ps
T227 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.3025182206 Aug 05 06:17:35 PM PDT 24 Aug 05 06:21:34 PM PDT 24 4220381526 ps
T228 /workspace/coverage/default/4.sram_ctrl_max_throughput.1526374551 Aug 05 06:16:05 PM PDT 24 Aug 05 06:16:15 PM PDT 24 2718228099 ps
T229 /workspace/coverage/default/35.sram_ctrl_alert_test.1100937109 Aug 05 06:20:39 PM PDT 24 Aug 05 06:20:40 PM PDT 24 31340491 ps
T230 /workspace/coverage/default/44.sram_ctrl_lc_escalation.1760595932 Aug 05 06:21:57 PM PDT 24 Aug 05 06:22:40 PM PDT 24 16426237940 ps
T231 /workspace/coverage/default/20.sram_ctrl_bijection.3637636689 Aug 05 06:18:18 PM PDT 24 Aug 05 06:47:22 PM PDT 24 103536654685 ps
T232 /workspace/coverage/default/0.sram_ctrl_alert_test.2176701481 Aug 05 06:15:47 PM PDT 24 Aug 05 06:15:47 PM PDT 24 51972103 ps
T233 /workspace/coverage/default/43.sram_ctrl_stress_all.2282324054 Aug 05 06:21:56 PM PDT 24 Aug 05 07:18:21 PM PDT 24 368584603654 ps
T234 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.1746562982 Aug 05 06:18:43 PM PDT 24 Aug 05 06:21:41 PM PDT 24 5637979150 ps
T235 /workspace/coverage/default/7.sram_ctrl_max_throughput.2138367274 Aug 05 06:16:22 PM PDT 24 Aug 05 06:17:52 PM PDT 24 1041857203 ps
T236 /workspace/coverage/default/32.sram_ctrl_bijection.3166358155 Aug 05 06:19:55 PM PDT 24 Aug 05 06:38:08 PM PDT 24 61480771753 ps
T237 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.184068686 Aug 05 06:22:41 PM PDT 24 Aug 05 06:29:05 PM PDT 24 132575478188 ps
T238 /workspace/coverage/default/39.sram_ctrl_ram_cfg.708525158 Aug 05 06:21:11 PM PDT 24 Aug 05 06:21:14 PM PDT 24 709804732 ps
T239 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.2857872128 Aug 05 06:17:16 PM PDT 24 Aug 05 06:28:39 PM PDT 24 7295551460 ps
T240 /workspace/coverage/default/13.sram_ctrl_mem_walk.521349283 Aug 05 06:17:21 PM PDT 24 Aug 05 06:20:03 PM PDT 24 6912537189 ps
T241 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.1207271632 Aug 05 06:18:32 PM PDT 24 Aug 05 06:38:05 PM PDT 24 29401252980 ps
T242 /workspace/coverage/default/20.sram_ctrl_ram_cfg.2785172668 Aug 05 06:18:14 PM PDT 24 Aug 05 06:18:18 PM PDT 24 1412343875 ps
T55 /workspace/coverage/default/21.sram_ctrl_mem_walk.1607463274 Aug 05 06:18:26 PM PDT 24 Aug 05 06:21:23 PM PDT 24 9165574916 ps
T243 /workspace/coverage/default/24.sram_ctrl_max_throughput.954131793 Aug 05 06:18:43 PM PDT 24 Aug 05 06:19:19 PM PDT 24 2863330202 ps
T244 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.921075295 Aug 05 06:19:50 PM PDT 24 Aug 05 06:22:43 PM PDT 24 16467347268 ps
T245 /workspace/coverage/default/16.sram_ctrl_alert_test.727133972 Aug 05 06:17:46 PM PDT 24 Aug 05 06:17:47 PM PDT 24 42154221 ps
T246 /workspace/coverage/default/26.sram_ctrl_stress_all.2107520754 Aug 05 06:19:15 PM PDT 24 Aug 05 07:10:13 PM PDT 24 169093203780 ps
T247 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.296301090 Aug 05 06:19:15 PM PDT 24 Aug 05 06:36:16 PM PDT 24 55038327615 ps
T248 /workspace/coverage/default/9.sram_ctrl_alert_test.1961587361 Aug 05 06:16:38 PM PDT 24 Aug 05 06:16:39 PM PDT 24 10255277 ps
T249 /workspace/coverage/default/42.sram_ctrl_multiple_keys.41988747 Aug 05 06:21:43 PM PDT 24 Aug 05 06:27:04 PM PDT 24 3423483379 ps
T250 /workspace/coverage/default/32.sram_ctrl_multiple_keys.2845660554 Aug 05 06:19:55 PM PDT 24 Aug 05 06:44:19 PM PDT 24 78782450761 ps
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T310 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.364936057 Aug 05 06:18:23 PM PDT 24 Aug 05 06:19:46 PM PDT 24 798361624 ps
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