| T557 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1693172075 |
|
|
Aug 05 06:22:28 PM PDT 24 |
Aug 05 06:23:44 PM PDT 24 |
25407461155 ps |
| T558 |
/workspace/coverage/default/11.sram_ctrl_executable.294015625 |
|
|
Aug 05 06:16:58 PM PDT 24 |
Aug 05 06:43:08 PM PDT 24 |
110030944959 ps |
| T559 |
/workspace/coverage/default/44.sram_ctrl_bijection.3923176217 |
|
|
Aug 05 06:22:01 PM PDT 24 |
Aug 05 07:11:03 PM PDT 24 |
150943945781 ps |
| T560 |
/workspace/coverage/default/35.sram_ctrl_regwen.3001157592 |
|
|
Aug 05 06:20:29 PM PDT 24 |
Aug 05 06:35:39 PM PDT 24 |
5174998444 ps |
| T561 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.3279780913 |
|
|
Aug 05 06:19:44 PM PDT 24 |
Aug 05 06:19:52 PM PDT 24 |
652672079 ps |
| T562 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.2173687547 |
|
|
Aug 05 06:18:31 PM PDT 24 |
Aug 05 06:19:17 PM PDT 24 |
6630746143 ps |
| T563 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2336878485 |
|
|
Aug 05 06:16:35 PM PDT 24 |
Aug 05 06:17:04 PM PDT 24 |
1115202425 ps |
| T564 |
/workspace/coverage/default/2.sram_ctrl_bijection.952624373 |
|
|
Aug 05 06:15:53 PM PDT 24 |
Aug 05 06:32:45 PM PDT 24 |
15329594694 ps |
| T565 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.4209568132 |
|
|
Aug 05 06:17:14 PM PDT 24 |
Aug 05 06:25:46 PM PDT 24 |
177940764320 ps |
| T566 |
/workspace/coverage/default/22.sram_ctrl_alert_test.357000775 |
|
|
Aug 05 06:18:39 PM PDT 24 |
Aug 05 06:18:40 PM PDT 24 |
24771570 ps |
| T567 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.845585682 |
|
|
Aug 05 06:18:12 PM PDT 24 |
Aug 05 06:18:16 PM PDT 24 |
1354712503 ps |
| T568 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1503304762 |
|
|
Aug 05 06:16:41 PM PDT 24 |
Aug 05 06:17:46 PM PDT 24 |
3996651514 ps |
| T569 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3144108771 |
|
|
Aug 05 06:22:08 PM PDT 24 |
Aug 05 06:27:15 PM PDT 24 |
10156085253 ps |
| T570 |
/workspace/coverage/default/29.sram_ctrl_executable.825272912 |
|
|
Aug 05 06:19:33 PM PDT 24 |
Aug 05 06:30:26 PM PDT 24 |
33993580653 ps |
| T571 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.1584011232 |
|
|
Aug 05 06:21:02 PM PDT 24 |
Aug 05 06:39:52 PM PDT 24 |
29270926088 ps |
| T572 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.1574282766 |
|
|
Aug 05 06:21:45 PM PDT 24 |
Aug 05 06:45:18 PM PDT 24 |
126055004032 ps |
| T573 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.1946308878 |
|
|
Aug 05 06:18:42 PM PDT 24 |
Aug 05 06:19:57 PM PDT 24 |
1418689235 ps |
| T574 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.2538068618 |
|
|
Aug 05 06:18:56 PM PDT 24 |
Aug 05 06:19:41 PM PDT 24 |
26483849225 ps |
| T575 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.561302416 |
|
|
Aug 05 06:19:28 PM PDT 24 |
Aug 05 06:22:28 PM PDT 24 |
8982640530 ps |
| T576 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1220458828 |
|
|
Aug 05 06:22:20 PM PDT 24 |
Aug 05 06:24:17 PM PDT 24 |
2637587088 ps |
| T577 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.3720395999 |
|
|
Aug 05 06:18:38 PM PDT 24 |
Aug 05 06:38:10 PM PDT 24 |
180530875474 ps |
| T578 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3352895446 |
|
|
Aug 05 06:17:20 PM PDT 24 |
Aug 05 06:17:44 PM PDT 24 |
909437539 ps |
| T579 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.2162459349 |
|
|
Aug 05 06:19:14 PM PDT 24 |
Aug 05 06:24:58 PM PDT 24 |
21308281740 ps |
| T580 |
/workspace/coverage/default/12.sram_ctrl_executable.2534014499 |
|
|
Aug 05 06:17:10 PM PDT 24 |
Aug 05 06:28:43 PM PDT 24 |
30096122838 ps |
| T581 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.61067261 |
|
|
Aug 05 06:17:08 PM PDT 24 |
Aug 05 06:19:50 PM PDT 24 |
5520990228 ps |
| T582 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3734827195 |
|
|
Aug 05 06:16:09 PM PDT 24 |
Aug 05 06:16:18 PM PDT 24 |
303460066 ps |
| T583 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.3070071483 |
|
|
Aug 05 06:19:44 PM PDT 24 |
Aug 05 06:40:14 PM PDT 24 |
19854270414 ps |
| T584 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1604606056 |
|
|
Aug 05 06:22:46 PM PDT 24 |
Aug 05 06:33:01 PM PDT 24 |
14175406720 ps |
| T585 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1626093137 |
|
|
Aug 05 06:16:18 PM PDT 24 |
Aug 05 06:16:46 PM PDT 24 |
2891464422 ps |
| T586 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.798025279 |
|
|
Aug 05 06:17:45 PM PDT 24 |
Aug 05 06:22:45 PM PDT 24 |
7436692449 ps |
| T587 |
/workspace/coverage/default/31.sram_ctrl_alert_test.1219346446 |
|
|
Aug 05 06:19:56 PM PDT 24 |
Aug 05 06:19:57 PM PDT 24 |
15552227 ps |
| T588 |
/workspace/coverage/default/17.sram_ctrl_partial_access.3003609307 |
|
|
Aug 05 06:17:45 PM PDT 24 |
Aug 05 06:19:01 PM PDT 24 |
1776409937 ps |
| T589 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.1466491453 |
|
|
Aug 05 06:19:47 PM PDT 24 |
Aug 05 06:32:40 PM PDT 24 |
12624563228 ps |
| T590 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.2018358263 |
|
|
Aug 05 06:21:11 PM PDT 24 |
Aug 05 06:48:33 PM PDT 24 |
30273009461 ps |
| T591 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1459700055 |
|
|
Aug 05 06:16:18 PM PDT 24 |
Aug 05 06:16:52 PM PDT 24 |
17026222004 ps |
| T592 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.2465628779 |
|
|
Aug 05 06:18:48 PM PDT 24 |
Aug 05 06:44:00 PM PDT 24 |
81777095649 ps |
| T593 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4106950573 |
|
|
Aug 05 06:16:52 PM PDT 24 |
Aug 05 06:22:17 PM PDT 24 |
26401242919 ps |
| T594 |
/workspace/coverage/default/1.sram_ctrl_stress_all.2965543374 |
|
|
Aug 05 06:15:56 PM PDT 24 |
Aug 05 07:48:22 PM PDT 24 |
702111807581 ps |
| T595 |
/workspace/coverage/default/5.sram_ctrl_bijection.4185131796 |
|
|
Aug 05 06:16:12 PM PDT 24 |
Aug 05 07:00:33 PM PDT 24 |
479077758052 ps |
| T596 |
/workspace/coverage/default/38.sram_ctrl_stress_all.768630916 |
|
|
Aug 05 06:21:03 PM PDT 24 |
Aug 05 08:13:29 PM PDT 24 |
326981740221 ps |
| T597 |
/workspace/coverage/default/29.sram_ctrl_smoke.2082705047 |
|
|
Aug 05 06:19:28 PM PDT 24 |
Aug 05 06:19:46 PM PDT 24 |
3315049883 ps |
| T598 |
/workspace/coverage/default/21.sram_ctrl_regwen.1269632254 |
|
|
Aug 05 06:18:21 PM PDT 24 |
Aug 05 06:20:51 PM PDT 24 |
1723547082 ps |
| T599 |
/workspace/coverage/default/37.sram_ctrl_partial_access.2109119879 |
|
|
Aug 05 06:20:41 PM PDT 24 |
Aug 05 06:20:57 PM PDT 24 |
2985333015 ps |
| T600 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.4240706999 |
|
|
Aug 05 06:16:42 PM PDT 24 |
Aug 05 06:17:35 PM PDT 24 |
7408747335 ps |
| T601 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.3531067387 |
|
|
Aug 05 06:18:22 PM PDT 24 |
Aug 05 06:23:13 PM PDT 24 |
50062623126 ps |
| T602 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.327851434 |
|
|
Aug 05 06:16:24 PM PDT 24 |
Aug 05 06:16:41 PM PDT 24 |
770955122 ps |
| T603 |
/workspace/coverage/default/5.sram_ctrl_smoke.1688918050 |
|
|
Aug 05 06:16:11 PM PDT 24 |
Aug 05 06:16:26 PM PDT 24 |
993771981 ps |
| T604 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.2056350157 |
|
|
Aug 05 06:18:43 PM PDT 24 |
Aug 05 06:24:24 PM PDT 24 |
12208750285 ps |
| T605 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2648494583 |
|
|
Aug 05 06:22:33 PM PDT 24 |
Aug 05 06:22:52 PM PDT 24 |
2130937940 ps |
| T606 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.2872221126 |
|
|
Aug 05 06:21:16 PM PDT 24 |
Aug 05 06:22:28 PM PDT 24 |
11935102916 ps |
| T607 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.734696975 |
|
|
Aug 05 06:19:33 PM PDT 24 |
Aug 05 06:20:30 PM PDT 24 |
1114001961 ps |
| T608 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2083389468 |
|
|
Aug 05 06:16:13 PM PDT 24 |
Aug 05 06:16:45 PM PDT 24 |
1957749515 ps |
| T609 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.3744851269 |
|
|
Aug 05 06:19:34 PM PDT 24 |
Aug 05 06:20:10 PM PDT 24 |
39685648151 ps |
| T610 |
/workspace/coverage/default/0.sram_ctrl_executable.2010424150 |
|
|
Aug 05 06:15:49 PM PDT 24 |
Aug 05 06:24:08 PM PDT 24 |
40315971574 ps |
| T611 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2781998184 |
|
|
Aug 05 06:17:14 PM PDT 24 |
Aug 05 06:19:38 PM PDT 24 |
3133854512 ps |
| T612 |
/workspace/coverage/default/40.sram_ctrl_bijection.1723820455 |
|
|
Aug 05 06:21:16 PM PDT 24 |
Aug 05 06:43:13 PM PDT 24 |
143761425536 ps |
| T613 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.2380428409 |
|
|
Aug 05 06:18:57 PM PDT 24 |
Aug 05 06:32:31 PM PDT 24 |
7712630670 ps |
| T614 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.2169591103 |
|
|
Aug 05 06:17:57 PM PDT 24 |
Aug 05 06:19:10 PM PDT 24 |
1410488484 ps |
| T615 |
/workspace/coverage/default/27.sram_ctrl_alert_test.3302382525 |
|
|
Aug 05 06:19:20 PM PDT 24 |
Aug 05 06:19:21 PM PDT 24 |
19845900 ps |
| T616 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1264625518 |
|
|
Aug 05 06:22:41 PM PDT 24 |
Aug 05 06:25:02 PM PDT 24 |
5784356790 ps |
| T617 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.1043346238 |
|
|
Aug 05 06:19:02 PM PDT 24 |
Aug 05 06:21:37 PM PDT 24 |
28810283365 ps |
| T618 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.1570221159 |
|
|
Aug 05 06:15:54 PM PDT 24 |
Aug 05 06:20:40 PM PDT 24 |
9532598377 ps |
| T619 |
/workspace/coverage/default/41.sram_ctrl_regwen.2466673931 |
|
|
Aug 05 06:21:38 PM PDT 24 |
Aug 05 06:41:21 PM PDT 24 |
80200661618 ps |
| T620 |
/workspace/coverage/default/20.sram_ctrl_regwen.2588871612 |
|
|
Aug 05 06:18:14 PM PDT 24 |
Aug 05 06:30:44 PM PDT 24 |
4221463112 ps |
| T621 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.2948444444 |
|
|
Aug 05 06:19:59 PM PDT 24 |
Aug 05 06:30:48 PM PDT 24 |
8300607013 ps |
| T622 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.781927934 |
|
|
Aug 05 06:20:35 PM PDT 24 |
Aug 05 06:22:30 PM PDT 24 |
787529227 ps |
| T623 |
/workspace/coverage/default/36.sram_ctrl_regwen.1211611211 |
|
|
Aug 05 06:20:34 PM PDT 24 |
Aug 05 06:32:07 PM PDT 24 |
6004603291 ps |
| T624 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1150054495 |
|
|
Aug 05 06:18:10 PM PDT 24 |
Aug 05 06:18:54 PM PDT 24 |
1792778014 ps |
| T625 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.3257489497 |
|
|
Aug 05 06:18:03 PM PDT 24 |
Aug 05 06:22:02 PM PDT 24 |
8184323649 ps |
| T626 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.504915505 |
|
|
Aug 05 06:20:00 PM PDT 24 |
Aug 05 06:22:42 PM PDT 24 |
4583214008 ps |
| T627 |
/workspace/coverage/default/42.sram_ctrl_partial_access.3141270568 |
|
|
Aug 05 06:21:44 PM PDT 24 |
Aug 05 06:22:07 PM PDT 24 |
2914890239 ps |
| T628 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.1101816159 |
|
|
Aug 05 06:20:40 PM PDT 24 |
Aug 05 06:28:36 PM PDT 24 |
20106780884 ps |
| T629 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.1101622580 |
|
|
Aug 05 06:22:13 PM PDT 24 |
Aug 05 06:25:26 PM PDT 24 |
41327435334 ps |
| T630 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.2926866063 |
|
|
Aug 05 06:17:37 PM PDT 24 |
Aug 05 06:28:30 PM PDT 24 |
11817946960 ps |
| T631 |
/workspace/coverage/default/46.sram_ctrl_executable.537195043 |
|
|
Aug 05 06:22:18 PM PDT 24 |
Aug 05 06:38:26 PM PDT 24 |
32950985504 ps |
| T632 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2434445567 |
|
|
Aug 05 06:16:18 PM PDT 24 |
Aug 05 06:19:45 PM PDT 24 |
3649654793 ps |
| T633 |
/workspace/coverage/default/47.sram_ctrl_executable.2772618596 |
|
|
Aug 05 06:22:30 PM PDT 24 |
Aug 05 06:27:02 PM PDT 24 |
3990185432 ps |
| T49 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2500090267 |
|
|
Aug 05 06:17:09 PM PDT 24 |
Aug 05 06:18:12 PM PDT 24 |
4238608707 ps |
| T634 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.2212984645 |
|
|
Aug 05 06:17:25 PM PDT 24 |
Aug 05 06:20:21 PM PDT 24 |
4888297335 ps |
| T635 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1205046044 |
|
|
Aug 05 06:22:33 PM PDT 24 |
Aug 05 06:25:08 PM PDT 24 |
4395643796 ps |
| T636 |
/workspace/coverage/default/33.sram_ctrl_regwen.2540059263 |
|
|
Aug 05 06:20:08 PM PDT 24 |
Aug 05 06:27:46 PM PDT 24 |
6688977354 ps |
| T637 |
/workspace/coverage/default/7.sram_ctrl_bijection.4055691214 |
|
|
Aug 05 06:16:19 PM PDT 24 |
Aug 05 06:46:08 PM PDT 24 |
103541851401 ps |
| T638 |
/workspace/coverage/default/14.sram_ctrl_regwen.2691316598 |
|
|
Aug 05 06:17:29 PM PDT 24 |
Aug 05 06:29:55 PM PDT 24 |
2408629322 ps |
| T639 |
/workspace/coverage/default/49.sram_ctrl_partial_access.3040990916 |
|
|
Aug 05 06:22:52 PM PDT 24 |
Aug 05 06:23:01 PM PDT 24 |
4085696443 ps |
| T640 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3647626127 |
|
|
Aug 05 06:16:29 PM PDT 24 |
Aug 05 06:16:48 PM PDT 24 |
3211706640 ps |
| T641 |
/workspace/coverage/default/37.sram_ctrl_regwen.2307612713 |
|
|
Aug 05 06:20:45 PM PDT 24 |
Aug 05 06:36:59 PM PDT 24 |
58039445582 ps |
| T642 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.3958417382 |
|
|
Aug 05 06:20:46 PM PDT 24 |
Aug 05 06:21:11 PM PDT 24 |
27525618150 ps |
| T643 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.2886637892 |
|
|
Aug 05 06:18:22 PM PDT 24 |
Aug 05 06:23:51 PM PDT 24 |
13183132139 ps |
| T644 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2411503595 |
|
|
Aug 05 06:16:12 PM PDT 24 |
Aug 05 06:18:52 PM PDT 24 |
10263883256 ps |
| T645 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2001208460 |
|
|
Aug 05 06:22:39 PM PDT 24 |
Aug 05 06:23:24 PM PDT 24 |
7380341620 ps |
| T646 |
/workspace/coverage/default/23.sram_ctrl_stress_all.1302083942 |
|
|
Aug 05 06:18:44 PM PDT 24 |
Aug 05 07:23:16 PM PDT 24 |
117588266832 ps |
| T647 |
/workspace/coverage/default/38.sram_ctrl_partial_access.2355269583 |
|
|
Aug 05 06:20:53 PM PDT 24 |
Aug 05 06:21:48 PM PDT 24 |
1074251599 ps |
| T648 |
/workspace/coverage/default/38.sram_ctrl_executable.938816933 |
|
|
Aug 05 06:20:58 PM PDT 24 |
Aug 05 06:34:49 PM PDT 24 |
5336917377 ps |
| T649 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.2505763743 |
|
|
Aug 05 06:18:38 PM PDT 24 |
Aug 05 06:27:33 PM PDT 24 |
99684136967 ps |
| T650 |
/workspace/coverage/default/39.sram_ctrl_alert_test.314642495 |
|
|
Aug 05 06:21:18 PM PDT 24 |
Aug 05 06:21:19 PM PDT 24 |
20674120 ps |
| T651 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.1269374863 |
|
|
Aug 05 06:21:02 PM PDT 24 |
Aug 05 06:21:23 PM PDT 24 |
5435574946 ps |
| T652 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.2478869712 |
|
|
Aug 05 06:17:26 PM PDT 24 |
Aug 05 06:18:09 PM PDT 24 |
16785287587 ps |
| T653 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.3484136733 |
|
|
Aug 05 06:18:18 PM PDT 24 |
Aug 05 06:21:21 PM PDT 24 |
3337409955 ps |
| T654 |
/workspace/coverage/default/6.sram_ctrl_stress_all.3296464761 |
|
|
Aug 05 06:16:19 PM PDT 24 |
Aug 05 08:05:47 PM PDT 24 |
232917240999 ps |
| T655 |
/workspace/coverage/default/47.sram_ctrl_bijection.3245326301 |
|
|
Aug 05 06:22:29 PM PDT 24 |
Aug 05 06:57:34 PM PDT 24 |
128079010180 ps |
| T656 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.2297860136 |
|
|
Aug 05 06:19:23 PM PDT 24 |
Aug 05 06:19:27 PM PDT 24 |
738093124 ps |
| T657 |
/workspace/coverage/default/1.sram_ctrl_regwen.1929266705 |
|
|
Aug 05 06:16:01 PM PDT 24 |
Aug 05 06:33:31 PM PDT 24 |
10730220808 ps |
| T658 |
/workspace/coverage/default/47.sram_ctrl_alert_test.725362575 |
|
|
Aug 05 06:22:34 PM PDT 24 |
Aug 05 06:22:35 PM PDT 24 |
36202486 ps |
| T659 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1967528889 |
|
|
Aug 05 06:21:16 PM PDT 24 |
Aug 05 06:26:31 PM PDT 24 |
36967461349 ps |
| T660 |
/workspace/coverage/default/11.sram_ctrl_alert_test.3454487653 |
|
|
Aug 05 06:16:57 PM PDT 24 |
Aug 05 06:16:58 PM PDT 24 |
14716541 ps |
| T661 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.522981385 |
|
|
Aug 05 06:22:14 PM PDT 24 |
Aug 05 06:25:14 PM PDT 24 |
20398927423 ps |
| T662 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.675396619 |
|
|
Aug 05 06:15:56 PM PDT 24 |
Aug 05 06:16:00 PM PDT 24 |
692487567 ps |
| T663 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2012031184 |
|
|
Aug 05 06:16:11 PM PDT 24 |
Aug 05 06:32:18 PM PDT 24 |
32461448316 ps |
| T664 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.2738213066 |
|
|
Aug 05 06:18:26 PM PDT 24 |
Aug 05 06:21:00 PM PDT 24 |
12738208321 ps |
| T665 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.1774656381 |
|
|
Aug 05 06:16:01 PM PDT 24 |
Aug 05 06:20:51 PM PDT 24 |
31848595805 ps |
| T666 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3172700931 |
|
|
Aug 05 06:18:03 PM PDT 24 |
Aug 05 06:20:16 PM PDT 24 |
11025908356 ps |
| T667 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.1100098664 |
|
|
Aug 05 06:21:34 PM PDT 24 |
Aug 05 06:41:00 PM PDT 24 |
34141641020 ps |
| T668 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.4114318227 |
|
|
Aug 05 06:15:47 PM PDT 24 |
Aug 05 06:25:46 PM PDT 24 |
12702682931 ps |
| T669 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2409788805 |
|
|
Aug 05 06:19:18 PM PDT 24 |
Aug 05 06:21:56 PM PDT 24 |
27894371655 ps |
| T670 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.18729562 |
|
|
Aug 05 06:20:41 PM PDT 24 |
Aug 05 06:37:17 PM PDT 24 |
13065989413 ps |
| T671 |
/workspace/coverage/default/44.sram_ctrl_alert_test.293533977 |
|
|
Aug 05 06:22:06 PM PDT 24 |
Aug 05 06:22:06 PM PDT 24 |
38080150 ps |
| T672 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.778753810 |
|
|
Aug 05 06:19:24 PM PDT 24 |
Aug 05 06:19:51 PM PDT 24 |
1834341520 ps |
| T673 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.1147638923 |
|
|
Aug 05 06:19:33 PM PDT 24 |
Aug 05 06:32:26 PM PDT 24 |
9009326042 ps |
| T674 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.3287839807 |
|
|
Aug 05 06:20:18 PM PDT 24 |
Aug 05 06:20:22 PM PDT 24 |
1410260947 ps |
| T675 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.1105728974 |
|
|
Aug 05 06:16:08 PM PDT 24 |
Aug 05 06:17:08 PM PDT 24 |
17715171712 ps |
| T676 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.1642086738 |
|
|
Aug 05 06:18:32 PM PDT 24 |
Aug 05 06:23:46 PM PDT 24 |
21674931711 ps |
| T677 |
/workspace/coverage/default/42.sram_ctrl_smoke.1228541753 |
|
|
Aug 05 06:21:38 PM PDT 24 |
Aug 05 06:21:52 PM PDT 24 |
3201021460 ps |
| T678 |
/workspace/coverage/default/40.sram_ctrl_partial_access.4072951199 |
|
|
Aug 05 06:21:16 PM PDT 24 |
Aug 05 06:21:41 PM PDT 24 |
1693191395 ps |
| T679 |
/workspace/coverage/default/37.sram_ctrl_smoke.1698340056 |
|
|
Aug 05 06:20:43 PM PDT 24 |
Aug 05 06:23:09 PM PDT 24 |
1860312686 ps |
| T680 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.574063022 |
|
|
Aug 05 06:15:47 PM PDT 24 |
Aug 05 06:36:14 PM PDT 24 |
11917450696 ps |
| T681 |
/workspace/coverage/default/42.sram_ctrl_executable.1821960660 |
|
|
Aug 05 06:21:39 PM PDT 24 |
Aug 05 06:28:56 PM PDT 24 |
7195403955 ps |
| T682 |
/workspace/coverage/default/18.sram_ctrl_alert_test.1610283028 |
|
|
Aug 05 06:18:12 PM PDT 24 |
Aug 05 06:18:13 PM PDT 24 |
79047601 ps |
| T683 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.2790147918 |
|
|
Aug 05 06:17:32 PM PDT 24 |
Aug 05 06:23:08 PM PDT 24 |
20696050590 ps |
| T684 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1296272323 |
|
|
Aug 05 06:15:49 PM PDT 24 |
Aug 05 06:15:52 PM PDT 24 |
1096215427 ps |
| T685 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2925703183 |
|
|
Aug 05 06:17:26 PM PDT 24 |
Aug 05 06:18:47 PM PDT 24 |
8749156728 ps |
| T686 |
/workspace/coverage/default/45.sram_ctrl_executable.1941641180 |
|
|
Aug 05 06:22:10 PM PDT 24 |
Aug 05 06:44:16 PM PDT 24 |
24870919329 ps |
| T687 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.1468395666 |
|
|
Aug 05 06:19:16 PM PDT 24 |
Aug 05 06:20:09 PM PDT 24 |
767053548 ps |
| T121 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.1247913430 |
|
|
Aug 05 06:18:38 PM PDT 24 |
Aug 05 06:18:55 PM PDT 24 |
1423228900 ps |
| T688 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.3040272805 |
|
|
Aug 05 06:18:53 PM PDT 24 |
Aug 05 06:24:53 PM PDT 24 |
14957795208 ps |
| T689 |
/workspace/coverage/default/10.sram_ctrl_stress_all.698453820 |
|
|
Aug 05 06:16:54 PM PDT 24 |
Aug 05 07:46:43 PM PDT 24 |
450894244318 ps |
| T690 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.614352021 |
|
|
Aug 05 06:19:50 PM PDT 24 |
Aug 05 06:27:05 PM PDT 24 |
21700392576 ps |
| T691 |
/workspace/coverage/default/33.sram_ctrl_executable.3547330013 |
|
|
Aug 05 06:20:07 PM PDT 24 |
Aug 05 06:27:49 PM PDT 24 |
12943316806 ps |
| T692 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.2278959287 |
|
|
Aug 05 06:16:43 PM PDT 24 |
Aug 05 06:22:23 PM PDT 24 |
82802535899 ps |
| T693 |
/workspace/coverage/default/30.sram_ctrl_partial_access.1029362220 |
|
|
Aug 05 06:19:43 PM PDT 24 |
Aug 05 06:20:04 PM PDT 24 |
629943758 ps |
| T694 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1612612609 |
|
|
Aug 05 06:16:11 PM PDT 24 |
Aug 05 06:16:15 PM PDT 24 |
376529212 ps |
| T695 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.3250521249 |
|
|
Aug 05 06:20:10 PM PDT 24 |
Aug 05 06:20:14 PM PDT 24 |
1572737796 ps |
| T696 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.849035791 |
|
|
Aug 05 06:17:45 PM PDT 24 |
Aug 05 06:17:52 PM PDT 24 |
2589561667 ps |
| T697 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.3908090098 |
|
|
Aug 05 06:19:24 PM PDT 24 |
Aug 05 06:25:22 PM PDT 24 |
65846157436 ps |
| T698 |
/workspace/coverage/default/2.sram_ctrl_stress_all.1610321541 |
|
|
Aug 05 06:15:59 PM PDT 24 |
Aug 05 07:13:47 PM PDT 24 |
41138243379 ps |
| T699 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.4066717445 |
|
|
Aug 05 06:15:44 PM PDT 24 |
Aug 05 06:16:10 PM PDT 24 |
2971620273 ps |
| T700 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.303376519 |
|
|
Aug 05 06:15:52 PM PDT 24 |
Aug 05 06:16:45 PM PDT 24 |
4436423944 ps |
| T701 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2968730839 |
|
|
Aug 05 06:22:09 PM PDT 24 |
Aug 05 06:22:53 PM PDT 24 |
12014224337 ps |
| T702 |
/workspace/coverage/default/36.sram_ctrl_partial_access.6115004 |
|
|
Aug 05 06:20:39 PM PDT 24 |
Aug 05 06:20:57 PM PDT 24 |
601859847 ps |
| T703 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.685777417 |
|
|
Aug 05 06:21:56 PM PDT 24 |
Aug 05 06:24:53 PM PDT 24 |
7664511750 ps |
| T704 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.1126335289 |
|
|
Aug 05 06:21:06 PM PDT 24 |
Aug 05 06:23:34 PM PDT 24 |
15305493363 ps |
| T705 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1509599239 |
|
|
Aug 05 06:22:28 PM PDT 24 |
Aug 05 06:24:55 PM PDT 24 |
799845338 ps |
| T706 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1983310301 |
|
|
Aug 05 06:22:34 PM PDT 24 |
Aug 05 06:22:38 PM PDT 24 |
344736945 ps |
| T102 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2462979366 |
|
|
Aug 05 06:15:48 PM PDT 24 |
Aug 05 06:17:06 PM PDT 24 |
10507913913 ps |
| T707 |
/workspace/coverage/default/22.sram_ctrl_smoke.1296250150 |
|
|
Aug 05 06:18:29 PM PDT 24 |
Aug 05 06:19:00 PM PDT 24 |
1665175850 ps |
| T20 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.506405076 |
|
|
Aug 05 06:16:05 PM PDT 24 |
Aug 05 06:16:07 PM PDT 24 |
140546970 ps |
| T708 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.3620169234 |
|
|
Aug 05 06:22:08 PM PDT 24 |
Aug 05 06:22:59 PM PDT 24 |
810259455 ps |
| T709 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2935201958 |
|
|
Aug 05 06:22:51 PM PDT 24 |
Aug 05 06:27:37 PM PDT 24 |
20774823177 ps |
| T710 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.4173084922 |
|
|
Aug 05 06:21:40 PM PDT 24 |
Aug 05 06:23:24 PM PDT 24 |
5494403546 ps |
| T711 |
/workspace/coverage/default/25.sram_ctrl_alert_test.3775741481 |
|
|
Aug 05 06:19:04 PM PDT 24 |
Aug 05 06:19:05 PM PDT 24 |
41471506 ps |
| T712 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1755265421 |
|
|
Aug 05 06:17:27 PM PDT 24 |
Aug 05 06:18:48 PM PDT 24 |
3133720041 ps |
| T713 |
/workspace/coverage/default/41.sram_ctrl_bijection.2715379167 |
|
|
Aug 05 06:21:30 PM PDT 24 |
Aug 05 06:52:28 PM PDT 24 |
25763547373 ps |
| T714 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.2121467156 |
|
|
Aug 05 06:15:53 PM PDT 24 |
Aug 05 06:16:23 PM PDT 24 |
761257583 ps |
| T715 |
/workspace/coverage/default/37.sram_ctrl_executable.3968879130 |
|
|
Aug 05 06:20:47 PM PDT 24 |
Aug 05 06:30:50 PM PDT 24 |
27680614968 ps |
| T716 |
/workspace/coverage/default/6.sram_ctrl_bijection.3305419966 |
|
|
Aug 05 06:16:14 PM PDT 24 |
Aug 05 06:47:34 PM PDT 24 |
25251494856 ps |
| T717 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1219877191 |
|
|
Aug 05 06:22:59 PM PDT 24 |
Aug 05 06:22:59 PM PDT 24 |
48763181 ps |
| T718 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1535624113 |
|
|
Aug 05 06:20:40 PM PDT 24 |
Aug 05 06:21:03 PM PDT 24 |
1703427208 ps |
| T719 |
/workspace/coverage/default/23.sram_ctrl_regwen.1966480738 |
|
|
Aug 05 06:18:42 PM PDT 24 |
Aug 05 06:40:30 PM PDT 24 |
16110392622 ps |
| T720 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.1652891296 |
|
|
Aug 05 06:18:39 PM PDT 24 |
Aug 05 06:19:23 PM PDT 24 |
1437529550 ps |
| T721 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.1534036626 |
|
|
Aug 05 06:21:35 PM PDT 24 |
Aug 05 06:21:39 PM PDT 24 |
346054138 ps |
| T722 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.846750220 |
|
|
Aug 05 06:17:32 PM PDT 24 |
Aug 05 06:20:00 PM PDT 24 |
10731943571 ps |
| T723 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.258079392 |
|
|
Aug 05 06:19:56 PM PDT 24 |
Aug 05 06:23:11 PM PDT 24 |
19074603959 ps |
| T724 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.2932198988 |
|
|
Aug 05 06:19:34 PM PDT 24 |
Aug 05 06:19:56 PM PDT 24 |
2705722589 ps |
| T725 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.2727132140 |
|
|
Aug 05 06:16:03 PM PDT 24 |
Aug 05 06:17:23 PM PDT 24 |
745274111 ps |
| T726 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.246457593 |
|
|
Aug 05 06:15:42 PM PDT 24 |
Aug 05 06:17:30 PM PDT 24 |
780359726 ps |
| T727 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.62309252 |
|
|
Aug 05 06:18:15 PM PDT 24 |
Aug 05 06:20:20 PM PDT 24 |
1609635710 ps |
| T728 |
/workspace/coverage/default/41.sram_ctrl_alert_test.2113258982 |
|
|
Aug 05 06:21:43 PM PDT 24 |
Aug 05 06:21:44 PM PDT 24 |
45763676 ps |
| T729 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.921506102 |
|
|
Aug 05 06:15:54 PM PDT 24 |
Aug 05 06:27:26 PM PDT 24 |
5417478897 ps |
| T730 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.2247720959 |
|
|
Aug 05 06:21:11 PM PDT 24 |
Aug 05 06:23:40 PM PDT 24 |
4672373591 ps |
| T731 |
/workspace/coverage/default/28.sram_ctrl_regwen.3203172254 |
|
|
Aug 05 06:19:24 PM PDT 24 |
Aug 05 06:20:00 PM PDT 24 |
2204426379 ps |
| T732 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.4184818477 |
|
|
Aug 05 06:21:16 PM PDT 24 |
Aug 05 06:22:44 PM PDT 24 |
3391814534 ps |
| T122 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.1117156852 |
|
|
Aug 05 06:17:42 PM PDT 24 |
Aug 05 06:17:49 PM PDT 24 |
507091132 ps |
| T733 |
/workspace/coverage/default/8.sram_ctrl_alert_test.2880752499 |
|
|
Aug 05 06:16:34 PM PDT 24 |
Aug 05 06:16:34 PM PDT 24 |
23088977 ps |
| T734 |
/workspace/coverage/default/11.sram_ctrl_partial_access.1368520415 |
|
|
Aug 05 06:16:52 PM PDT 24 |
Aug 05 06:17:04 PM PDT 24 |
1655899837 ps |
| T735 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.3674165862 |
|
|
Aug 05 06:17:29 PM PDT 24 |
Aug 05 06:17:39 PM PDT 24 |
2684896812 ps |
| T736 |
/workspace/coverage/default/42.sram_ctrl_regwen.3961454324 |
|
|
Aug 05 06:21:40 PM PDT 24 |
Aug 05 06:50:00 PM PDT 24 |
69975939579 ps |
| T737 |
/workspace/coverage/default/37.sram_ctrl_bijection.3484679128 |
|
|
Aug 05 06:20:42 PM PDT 24 |
Aug 05 06:39:07 PM PDT 24 |
61476569311 ps |
| T738 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.2209359111 |
|
|
Aug 05 06:19:22 PM PDT 24 |
Aug 05 06:35:37 PM PDT 24 |
21513894997 ps |
| T739 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.622745064 |
|
|
Aug 05 06:20:11 PM PDT 24 |
Aug 05 06:22:37 PM PDT 24 |
10184504541 ps |
| T740 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3407651353 |
|
|
Aug 05 06:22:01 PM PDT 24 |
Aug 05 06:35:51 PM PDT 24 |
7883996164 ps |
| T123 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3098457213 |
|
|
Aug 05 06:15:52 PM PDT 24 |
Aug 05 06:16:19 PM PDT 24 |
4075131801 ps |
| T741 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.526472908 |
|
|
Aug 05 06:15:53 PM PDT 24 |
Aug 05 06:21:32 PM PDT 24 |
66842018670 ps |
| T742 |
/workspace/coverage/default/14.sram_ctrl_executable.1174989938 |
|
|
Aug 05 06:17:28 PM PDT 24 |
Aug 05 06:34:08 PM PDT 24 |
194296003799 ps |
| T743 |
/workspace/coverage/default/11.sram_ctrl_stress_all.3145097553 |
|
|
Aug 05 06:16:57 PM PDT 24 |
Aug 05 07:28:44 PM PDT 24 |
16441288204 ps |
| T744 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.551307723 |
|
|
Aug 05 06:20:35 PM PDT 24 |
Aug 05 06:21:09 PM PDT 24 |
9027168514 ps |
| T745 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3417471131 |
|
|
Aug 05 06:16:19 PM PDT 24 |
Aug 05 06:16:22 PM PDT 24 |
1401252250 ps |
| T746 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.1397424142 |
|
|
Aug 05 06:20:03 PM PDT 24 |
Aug 05 06:22:08 PM PDT 24 |
2023095693 ps |
| T747 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1847104772 |
|
|
Aug 05 06:17:32 PM PDT 24 |
Aug 05 06:24:17 PM PDT 24 |
6392312110 ps |
| T748 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.3426085760 |
|
|
Aug 05 06:18:03 PM PDT 24 |
Aug 05 06:19:20 PM PDT 24 |
10320333361 ps |
| T749 |
/workspace/coverage/default/19.sram_ctrl_smoke.2778585673 |
|
|
Aug 05 06:18:04 PM PDT 24 |
Aug 05 06:18:10 PM PDT 24 |
692359714 ps |
| T750 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.403181973 |
|
|
Aug 05 06:18:05 PM PDT 24 |
Aug 05 06:21:17 PM PDT 24 |
3483326225 ps |
| T751 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.2312439226 |
|
|
Aug 05 06:20:26 PM PDT 24 |
Aug 05 06:21:46 PM PDT 24 |
2879729036 ps |
| T752 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1619278515 |
|
|
Aug 05 06:22:34 PM PDT 24 |
Aug 05 06:31:39 PM PDT 24 |
26804294770 ps |
| T753 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1422163343 |
|
|
Aug 05 06:16:54 PM PDT 24 |
Aug 05 06:16:57 PM PDT 24 |
356069733 ps |
| T754 |
/workspace/coverage/default/30.sram_ctrl_bijection.589085154 |
|
|
Aug 05 06:19:39 PM PDT 24 |
Aug 05 06:53:30 PM PDT 24 |
116110277414 ps |
| T755 |
/workspace/coverage/default/34.sram_ctrl_partial_access.1165642779 |
|
|
Aug 05 06:20:19 PM PDT 24 |
Aug 05 06:20:39 PM PDT 24 |
1514526179 ps |
| T756 |
/workspace/coverage/default/3.sram_ctrl_executable.695407225 |
|
|
Aug 05 06:16:06 PM PDT 24 |
Aug 05 06:38:04 PM PDT 24 |
26897773527 ps |
| T757 |
/workspace/coverage/default/23.sram_ctrl_executable.677324421 |
|
|
Aug 05 06:18:38 PM PDT 24 |
Aug 05 06:43:47 PM PDT 24 |
20507944603 ps |
| T758 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.3674644233 |
|
|
Aug 05 06:18:15 PM PDT 24 |
Aug 05 06:20:15 PM PDT 24 |
1559984615 ps |
| T759 |
/workspace/coverage/default/28.sram_ctrl_executable.1043853526 |
|
|
Aug 05 06:19:24 PM PDT 24 |
Aug 05 06:21:37 PM PDT 24 |
7384327883 ps |
| T760 |
/workspace/coverage/default/4.sram_ctrl_regwen.2513530601 |
|
|
Aug 05 06:16:10 PM PDT 24 |
Aug 05 06:18:13 PM PDT 24 |
1082190128 ps |
| T761 |
/workspace/coverage/default/29.sram_ctrl_stress_all.1521530282 |
|
|
Aug 05 06:19:34 PM PDT 24 |
Aug 05 08:31:18 PM PDT 24 |
1565961441429 ps |
| T103 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.2826592590 |
|
|
Aug 05 06:18:09 PM PDT 24 |
Aug 05 06:19:25 PM PDT 24 |
5372854763 ps |
| T762 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.1506920599 |
|
|
Aug 05 06:21:38 PM PDT 24 |
Aug 05 06:21:42 PM PDT 24 |
679536128 ps |
| T763 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.747362794 |
|
|
Aug 05 06:22:09 PM PDT 24 |
Aug 05 06:39:11 PM PDT 24 |
30059489649 ps |
| T764 |
/workspace/coverage/default/7.sram_ctrl_regwen.3709416210 |
|
|
Aug 05 06:16:19 PM PDT 24 |
Aug 05 06:34:36 PM PDT 24 |
12879692801 ps |
| T765 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2825646776 |
|
|
Aug 05 06:21:28 PM PDT 24 |
Aug 05 06:28:36 PM PDT 24 |
19632728164 ps |
| T766 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1885801229 |
|
|
Aug 05 06:22:02 PM PDT 24 |
Aug 05 06:24:34 PM PDT 24 |
4901884338 ps |
| T767 |
/workspace/coverage/default/49.sram_ctrl_smoke.4281770473 |
|
|
Aug 05 06:22:45 PM PDT 24 |
Aug 05 06:23:08 PM PDT 24 |
2532837382 ps |
| T768 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2722439596 |
|
|
Aug 05 06:16:45 PM PDT 24 |
Aug 05 06:37:18 PM PDT 24 |
68946991514 ps |
| T769 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2808239917 |
|
|
Aug 05 06:16:28 PM PDT 24 |
Aug 05 06:16:32 PM PDT 24 |
968172837 ps |
| T770 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.230201934 |
|
|
Aug 05 06:18:55 PM PDT 24 |
Aug 05 06:20:27 PM PDT 24 |
3116637306 ps |
| T771 |
/workspace/coverage/default/21.sram_ctrl_partial_access.3877925208 |
|
|
Aug 05 06:18:22 PM PDT 24 |
Aug 05 06:18:42 PM PDT 24 |
660582053 ps |
| T772 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.4211774752 |
|
|
Aug 05 06:20:41 PM PDT 24 |
Aug 05 06:23:27 PM PDT 24 |
27691777677 ps |
| T773 |
/workspace/coverage/default/21.sram_ctrl_smoke.4021954960 |
|
|
Aug 05 06:18:15 PM PDT 24 |
Aug 05 06:18:25 PM PDT 24 |
738747192 ps |
| T774 |
/workspace/coverage/default/27.sram_ctrl_smoke.1120679881 |
|
|
Aug 05 06:19:15 PM PDT 24 |
Aug 05 06:20:29 PM PDT 24 |
821119150 ps |
| T775 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.864631749 |
|
|
Aug 05 06:17:44 PM PDT 24 |
Aug 05 06:24:52 PM PDT 24 |
7188940634 ps |
| T776 |
/workspace/coverage/default/46.sram_ctrl_partial_access.2697859714 |
|
|
Aug 05 06:22:20 PM PDT 24 |
Aug 05 06:22:45 PM PDT 24 |
1410202478 ps |
| T777 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1394583947 |
|
|
Aug 05 06:16:34 PM PDT 24 |
Aug 05 06:21:04 PM PDT 24 |
13428049280 ps |
| T778 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1334355265 |
|
|
Aug 05 06:22:30 PM PDT 24 |
Aug 05 06:30:20 PM PDT 24 |
77767044706 ps |
| T779 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.1630983990 |
|
|
Aug 05 06:22:41 PM PDT 24 |
Aug 05 06:25:01 PM PDT 24 |
1156093895 ps |
| T780 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.3090287887 |
|
|
Aug 05 06:18:17 PM PDT 24 |
Aug 05 06:18:58 PM PDT 24 |
7232215218 ps |
| T781 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1851144785 |
|
|
Aug 05 06:16:45 PM PDT 24 |
Aug 05 06:22:19 PM PDT 24 |
4464746383 ps |
| T782 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2034212526 |
|
|
Aug 05 06:16:52 PM PDT 24 |
Aug 05 06:30:49 PM PDT 24 |
15273034515 ps |
| T783 |
/workspace/coverage/default/32.sram_ctrl_alert_test.3595210638 |
|
|
Aug 05 06:20:01 PM PDT 24 |
Aug 05 06:20:02 PM PDT 24 |
103621391 ps |
| T784 |
/workspace/coverage/default/5.sram_ctrl_regwen.2003065139 |
|
|
Aug 05 06:16:15 PM PDT 24 |
Aug 05 06:39:47 PM PDT 24 |
30437897287 ps |
| T785 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.2886966589 |
|
|
Aug 05 06:20:30 PM PDT 24 |
Aug 05 06:21:52 PM PDT 24 |
44406739930 ps |
| T124 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2360650678 |
|
|
Aug 05 06:22:25 PM PDT 24 |
Aug 05 06:22:31 PM PDT 24 |
357369422 ps |
| T786 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.380404108 |
|
|
Aug 05 06:17:39 PM PDT 24 |
Aug 05 06:18:39 PM PDT 24 |
36787229668 ps |
| T787 |
/workspace/coverage/default/11.sram_ctrl_smoke.3085026634 |
|
|
Aug 05 06:16:54 PM PDT 24 |
Aug 05 06:17:26 PM PDT 24 |
3735822049 ps |
| T788 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.4254237121 |
|
|
Aug 05 06:21:34 PM PDT 24 |
Aug 05 06:22:14 PM PDT 24 |
2775271662 ps |
| T789 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.3375686516 |
|
|
Aug 05 06:16:11 PM PDT 24 |
Aug 05 06:22:15 PM PDT 24 |
138236904641 ps |
| T790 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.1603549909 |
|
|
Aug 05 06:17:33 PM PDT 24 |
Aug 05 06:17:36 PM PDT 24 |
361644318 ps |
| T791 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.662546533 |
|
|
Aug 05 06:18:27 PM PDT 24 |
Aug 05 06:24:34 PM PDT 24 |
6294415152 ps |
| T792 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.3808533878 |
|
|
Aug 05 06:20:03 PM PDT 24 |
Aug 05 06:20:07 PM PDT 24 |
1408835181 ps |
| T793 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2617665013 |
|
|
Aug 05 06:16:32 PM PDT 24 |
Aug 05 06:24:35 PM PDT 24 |
16325684895 ps |
| T794 |
/workspace/coverage/default/19.sram_ctrl_alert_test.3088133765 |
|
|
Aug 05 06:18:09 PM PDT 24 |
Aug 05 06:18:09 PM PDT 24 |
19604120 ps |
| T795 |
/workspace/coverage/default/7.sram_ctrl_smoke.684458093 |
|
|
Aug 05 06:16:53 PM PDT 24 |
Aug 05 06:17:12 PM PDT 24 |
5677331394 ps |
| T796 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.2771703855 |
|
|
Aug 05 06:16:14 PM PDT 24 |
Aug 05 06:16:46 PM PDT 24 |
724223791 ps |
| T797 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.4088967194 |
|
|
Aug 05 06:19:23 PM PDT 24 |
Aug 05 06:20:58 PM PDT 24 |
58485773376 ps |
| T798 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2855567478 |
|
|
Aug 05 06:17:26 PM PDT 24 |
Aug 05 06:25:04 PM PDT 24 |
19259500625 ps |