Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total tests in report: 1036
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
74.35 74.35 93.05 93.05 76.90 76.90 86.71 86.71 33.33 33.33 85.55 85.55 93.57 93.57 51.37 51.37 /workspace/coverage/default/26.sram_ctrl_stress_all.506765545
86.48 12.12 98.04 4.99 80.57 3.67 86.78 0.07 100.00 66.67 93.36 7.82 95.03 1.46 51.55 0.18 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.4041264276
93.60 7.12 98.53 0.49 87.56 6.99 93.84 7.06 100.00 0.00 94.08 0.71 97.08 2.05 84.10 32.54 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3780671357
94.57 0.97 98.69 0.16 88.15 0.59 94.04 0.21 100.00 0.00 94.79 0.71 97.08 0.00 89.21 5.12 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3736810326
95.52 0.96 98.94 0.25 88.15 0.00 96.83 2.79 100.00 0.00 95.02 0.24 97.22 0.15 92.50 3.29 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3023647706
96.10 0.57 99.10 0.16 89.93 1.78 97.25 0.41 100.00 0.00 95.73 0.71 97.81 0.58 92.87 0.37 /workspace/coverage/default/1.sram_ctrl_sec_cm.4112634721
96.48 0.38 99.10 0.00 90.28 0.36 98.07 0.83 100.00 0.00 95.73 0.00 97.81 0.00 94.33 1.46 /workspace/coverage/default/12.sram_ctrl_stress_all.3199011926
96.70 0.23 99.10 0.00 90.52 0.24 98.07 0.00 100.00 0.00 95.73 0.00 98.98 1.17 94.52 0.18 /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1100824950
96.91 0.21 99.10 0.00 90.88 0.36 98.62 0.55 100.00 0.00 95.73 0.00 98.98 0.00 95.06 0.55 /workspace/coverage/default/5.sram_ctrl_alert_test.87869129
97.04 0.13 99.10 0.00 90.88 0.00 98.83 0.21 100.00 0.00 95.73 0.00 98.98 0.00 95.80 0.73 /workspace/coverage/default/42.sram_ctrl_stress_all.391313314
97.17 0.13 99.18 0.08 90.88 0.00 99.66 0.83 100.00 0.00 95.73 0.00 98.98 0.00 95.80 0.00 /workspace/coverage/default/0.sram_ctrl_ram_cfg.3930459489
97.26 0.08 99.18 0.00 91.00 0.12 99.66 0.00 100.00 0.00 96.21 0.47 98.98 0.00 95.80 0.00 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2562948429
97.34 0.08 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 98.98 0.00 96.34 0.55 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2972991820
97.39 0.05 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 98.98 0.00 96.71 0.37 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1627219673
97.44 0.05 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 98.98 0.00 97.07 0.37 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.3876006577
97.47 0.03 99.18 0.00 91.00 0.00 99.72 0.07 100.00 0.00 96.21 0.00 99.12 0.15 97.07 0.00 /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3221038128
97.50 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3073616042
97.52 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/default/11.sram_ctrl_lc_escalation.683013236

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1979975479
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.4135191735
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3349356583
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2063070813
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1502041515
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2364818959
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1710121972
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2694361785
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2725398699
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.342697039
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2381409340
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.4199064628
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3050114002
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2111380653
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2406418301
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.136341606
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2915934666
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.148495238
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3795983855
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2737101758
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.951505848
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3847589585
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.608131101
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1143756884
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.868381132
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.690998869
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1644321877
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2005743672
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1719124331
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.4107748225
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3216197525
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2594675114
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2532492546
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3131864166
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.4084401143
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2368096395
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1106331968
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1624602523
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1515511210
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.35215949
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3290314511
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3327537488
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1110854352
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.836998834
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.824051911
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.230764732
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1392248163
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3827044028
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1765078577
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.120042900
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3961840307
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1619558837
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2823115297
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3193432507
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3410502672
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1093248063
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.96623873
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1577763022
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2685626491
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3290700494
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1792041387
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3175437879
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.4154403822
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3489681862
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1343794907
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3494387013
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1967892930
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2281503600
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2248794230
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2784846755
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3206233121
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.861240199
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3031503043
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3028472136
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2292995093
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2656511376
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1922888853
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2210770398
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2939017180
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.171893675
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2030164652
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.592408448
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2081060849
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1123161835
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.9347522
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.799346122
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.87523655
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3533731699
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1556730300
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1826612177
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3854889757
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.231302138
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2434554788
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3115891054
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1367013315
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2412251326
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3735604025
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.282163629
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.112477366
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1077030672
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1856080383
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.266934793
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2065919904
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1857180079
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3409428094
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2680286576
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.523121553
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3269371808
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1280953227
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3660737102
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.854095598
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2175498155
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2298182635
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.4234967318
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2802133985
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3271900776
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1182456597
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.70556769
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1616397091
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1261090127
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2163722857
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1954809538
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1143105493
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3435785008
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2853843615
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.3191943626
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.423386411
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.4109170911
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.884667088
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3972541832
/workspace/coverage/default/0.sram_ctrl_alert_test.4147613774
/workspace/coverage/default/0.sram_ctrl_bijection.3722312424
/workspace/coverage/default/0.sram_ctrl_executable.1248445530
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3211924069
/workspace/coverage/default/0.sram_ctrl_max_throughput.2082712854
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3252302786
/workspace/coverage/default/0.sram_ctrl_mem_walk.6769036
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2162230944
/workspace/coverage/default/0.sram_ctrl_partial_access.734089211
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.333534243
/workspace/coverage/default/0.sram_ctrl_regwen.2017365855
/workspace/coverage/default/0.sram_ctrl_sec_cm.1829696200
/workspace/coverage/default/0.sram_ctrl_smoke.2905466064
/workspace/coverage/default/0.sram_ctrl_stress_all.262150896
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.399174809
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3748634852
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4098068275
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2844190072
/workspace/coverage/default/1.sram_ctrl_alert_test.3836531988
/workspace/coverage/default/1.sram_ctrl_bijection.917246862
/workspace/coverage/default/1.sram_ctrl_executable.3185162440
/workspace/coverage/default/1.sram_ctrl_lc_escalation.4212733464
/workspace/coverage/default/1.sram_ctrl_max_throughput.3912779873
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1621159047
/workspace/coverage/default/1.sram_ctrl_mem_walk.1636545608
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1415852123
/workspace/coverage/default/1.sram_ctrl_partial_access.3987785791
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.4156190218
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1327426276
/workspace/coverage/default/1.sram_ctrl_regwen.3398188060
/workspace/coverage/default/1.sram_ctrl_smoke.3235473096
/workspace/coverage/default/1.sram_ctrl_stress_all.606219935
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.4044378095
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.774789900
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3513344326
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1012069515
/workspace/coverage/default/10.sram_ctrl_alert_test.3107644990
/workspace/coverage/default/10.sram_ctrl_bijection.1933506951
/workspace/coverage/default/10.sram_ctrl_executable.2115646614
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1904831356
/workspace/coverage/default/10.sram_ctrl_max_throughput.2848562346
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2944521760
/workspace/coverage/default/10.sram_ctrl_mem_walk.726500558
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3991454544
/workspace/coverage/default/10.sram_ctrl_partial_access.501605684
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.262014459
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2972033913
/workspace/coverage/default/10.sram_ctrl_regwen.2311999923
/workspace/coverage/default/10.sram_ctrl_smoke.4048744561
/workspace/coverage/default/10.sram_ctrl_stress_all.232166659
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1677999026
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2671500838
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2498431254
/workspace/coverage/default/11.sram_ctrl_alert_test.249839390
/workspace/coverage/default/11.sram_ctrl_bijection.737734274
/workspace/coverage/default/11.sram_ctrl_executable.1680750399
/workspace/coverage/default/11.sram_ctrl_max_throughput.2113043624
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.843371246
/workspace/coverage/default/11.sram_ctrl_mem_walk.979022790
/workspace/coverage/default/11.sram_ctrl_multiple_keys.385847637
/workspace/coverage/default/11.sram_ctrl_partial_access.317873427
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1176342380
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1388734187
/workspace/coverage/default/11.sram_ctrl_regwen.1094168091
/workspace/coverage/default/11.sram_ctrl_smoke.774039457
/workspace/coverage/default/11.sram_ctrl_stress_all.559850884
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.1138019366
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.4142814992
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3370321803
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2369096
/workspace/coverage/default/12.sram_ctrl_alert_test.430878738
/workspace/coverage/default/12.sram_ctrl_bijection.1693281545
/workspace/coverage/default/12.sram_ctrl_executable.2825150407
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2877920466
/workspace/coverage/default/12.sram_ctrl_max_throughput.1557488595
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.444181026
/workspace/coverage/default/12.sram_ctrl_mem_walk.3499999415
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3433526554
/workspace/coverage/default/12.sram_ctrl_partial_access.3803599572
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/workspace/coverage/default/43.sram_ctrl_access_during_key_req.2186500781
/workspace/coverage/default/43.sram_ctrl_alert_test.4110078085
/workspace/coverage/default/43.sram_ctrl_bijection.1496775337
/workspace/coverage/default/43.sram_ctrl_executable.1118494140
/workspace/coverage/default/43.sram_ctrl_lc_escalation.579741241
/workspace/coverage/default/43.sram_ctrl_max_throughput.3279102065
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.4119443537
/workspace/coverage/default/43.sram_ctrl_mem_walk.957713265
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3149995480
/workspace/coverage/default/43.sram_ctrl_partial_access.103842078
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.324980248
/workspace/coverage/default/43.sram_ctrl_ram_cfg.954871138
/workspace/coverage/default/43.sram_ctrl_regwen.3694794175
/workspace/coverage/default/43.sram_ctrl_smoke.3743737286
/workspace/coverage/default/43.sram_ctrl_stress_all.977576569
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2447838476
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1767256463
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3376887915
/workspace/coverage/default/44.sram_ctrl_alert_test.359711135
/workspace/coverage/default/44.sram_ctrl_bijection.1762753303
/workspace/coverage/default/44.sram_ctrl_executable.1180280810
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3144603941
/workspace/coverage/default/44.sram_ctrl_max_throughput.1337719029
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2013616384
/workspace/coverage/default/44.sram_ctrl_mem_walk.3098160524
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2199954667
/workspace/coverage/default/44.sram_ctrl_partial_access.1919133904
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1657078993
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1193270705
/workspace/coverage/default/44.sram_ctrl_regwen.4010291784
/workspace/coverage/default/44.sram_ctrl_smoke.725718585
/workspace/coverage/default/44.sram_ctrl_stress_all.3966253375
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3509063927
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1036488341
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3880650953
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.927089069
/workspace/coverage/default/45.sram_ctrl_alert_test.1414021143
/workspace/coverage/default/45.sram_ctrl_bijection.904022548
/workspace/coverage/default/45.sram_ctrl_executable.3897329579
/workspace/coverage/default/45.sram_ctrl_lc_escalation.856676694
/workspace/coverage/default/45.sram_ctrl_max_throughput.1236794183
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3458128378
/workspace/coverage/default/45.sram_ctrl_mem_walk.1208254582
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1520757753
/workspace/coverage/default/45.sram_ctrl_partial_access.3696056089
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.356189927
/workspace/coverage/default/45.sram_ctrl_ram_cfg.4293140678
/workspace/coverage/default/45.sram_ctrl_regwen.2109956160
/workspace/coverage/default/45.sram_ctrl_smoke.3946017304
/workspace/coverage/default/45.sram_ctrl_stress_all.3777276221
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1954707459
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.4120741787
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3788109169
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1362555902
/workspace/coverage/default/46.sram_ctrl_alert_test.2023166173
/workspace/coverage/default/46.sram_ctrl_bijection.2206584356
/workspace/coverage/default/46.sram_ctrl_executable.4118089449
/workspace/coverage/default/46.sram_ctrl_lc_escalation.815205138
/workspace/coverage/default/46.sram_ctrl_max_throughput.154903701
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3160850732
/workspace/coverage/default/46.sram_ctrl_mem_walk.2232020138
/workspace/coverage/default/46.sram_ctrl_multiple_keys.887389389
/workspace/coverage/default/46.sram_ctrl_partial_access.783373878
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.367087547
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2414414020
/workspace/coverage/default/46.sram_ctrl_regwen.939209951
/workspace/coverage/default/46.sram_ctrl_smoke.1781411313
/workspace/coverage/default/46.sram_ctrl_stress_all.3188350822
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.474179243
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2218454784
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3869516725
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.4022325510
/workspace/coverage/default/47.sram_ctrl_alert_test.2927059464
/workspace/coverage/default/47.sram_ctrl_bijection.970277416
/workspace/coverage/default/47.sram_ctrl_executable.2340956297
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3305590491
/workspace/coverage/default/47.sram_ctrl_max_throughput.4080519643
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2525288002
/workspace/coverage/default/47.sram_ctrl_mem_walk.3461322975
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3899674169
/workspace/coverage/default/47.sram_ctrl_partial_access.3917456712
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2949907961
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1679993771
/workspace/coverage/default/47.sram_ctrl_regwen.3021730655
/workspace/coverage/default/47.sram_ctrl_smoke.4047020518
/workspace/coverage/default/47.sram_ctrl_stress_all.889293630
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2322362146
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.4281751933
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3621765996
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2639743354
/workspace/coverage/default/48.sram_ctrl_alert_test.3547298179
/workspace/coverage/default/48.sram_ctrl_bijection.3821220180
/workspace/coverage/default/48.sram_ctrl_executable.1080313330
/workspace/coverage/default/48.sram_ctrl_lc_escalation.140633191
/workspace/coverage/default/48.sram_ctrl_max_throughput.361365004
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3542008475
/workspace/coverage/default/48.sram_ctrl_mem_walk.3914918071
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1000705626
/workspace/coverage/default/48.sram_ctrl_partial_access.3799513837
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2284251363
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1472801692
/workspace/coverage/default/48.sram_ctrl_regwen.1342115016
/workspace/coverage/default/48.sram_ctrl_smoke.1100164951
/workspace/coverage/default/48.sram_ctrl_stress_all.2834107772
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2680274418
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1506589740
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2724294964
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.641509863
/workspace/coverage/default/49.sram_ctrl_alert_test.1026075760
/workspace/coverage/default/49.sram_ctrl_bijection.2893555013
/workspace/coverage/default/49.sram_ctrl_executable.1516467758
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1251895365
/workspace/coverage/default/49.sram_ctrl_max_throughput.4151299175
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2755054119
/workspace/coverage/default/49.sram_ctrl_mem_walk.3079150441
/workspace/coverage/default/49.sram_ctrl_multiple_keys.819099711
/workspace/coverage/default/49.sram_ctrl_partial_access.130201409
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2259864617
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2095592011
/workspace/coverage/default/49.sram_ctrl_regwen.3771889453
/workspace/coverage/default/49.sram_ctrl_smoke.905294958
/workspace/coverage/default/49.sram_ctrl_stress_all.694410166
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3724262271
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1456592727
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2717038532
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2038901396
/workspace/coverage/default/5.sram_ctrl_bijection.4081958079
/workspace/coverage/default/5.sram_ctrl_executable.165204067
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3439755411
/workspace/coverage/default/5.sram_ctrl_max_throughput.887147245
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3978629881
/workspace/coverage/default/5.sram_ctrl_mem_walk.1538926917
/workspace/coverage/default/5.sram_ctrl_multiple_keys.997580520
/workspace/coverage/default/5.sram_ctrl_partial_access.816872429
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1174921983
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3009221640
/workspace/coverage/default/5.sram_ctrl_regwen.1984368733
/workspace/coverage/default/5.sram_ctrl_smoke.450045682
/workspace/coverage/default/5.sram_ctrl_stress_all.2609679155
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1960447203
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2916349877
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2996053257
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1407889707
/workspace/coverage/default/6.sram_ctrl_alert_test.1493482739
/workspace/coverage/default/6.sram_ctrl_bijection.2677730616
/workspace/coverage/default/6.sram_ctrl_executable.1264555122
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2462538099
/workspace/coverage/default/6.sram_ctrl_max_throughput.802353858
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.370418981
/workspace/coverage/default/6.sram_ctrl_mem_walk.670169059
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3709676636
/workspace/coverage/default/6.sram_ctrl_partial_access.3858793895
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.133536758
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3237110886
/workspace/coverage/default/6.sram_ctrl_regwen.4081947677
/workspace/coverage/default/6.sram_ctrl_smoke.546943773
/workspace/coverage/default/6.sram_ctrl_stress_all.97549750
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3605633873
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.949362882
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1585944588
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1765110106
/workspace/coverage/default/7.sram_ctrl_alert_test.3658027746
/workspace/coverage/default/7.sram_ctrl_bijection.2948244100
/workspace/coverage/default/7.sram_ctrl_executable.4224558270
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2513239886
/workspace/coverage/default/7.sram_ctrl_max_throughput.1046606823
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1005984489
/workspace/coverage/default/7.sram_ctrl_mem_walk.749237015
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3667082759
/workspace/coverage/default/7.sram_ctrl_partial_access.4233966085
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.122970871
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2392738374
/workspace/coverage/default/7.sram_ctrl_regwen.945610086
/workspace/coverage/default/7.sram_ctrl_smoke.1020900338
/workspace/coverage/default/7.sram_ctrl_stress_all.3769625434
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2069147798
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2187880483
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4226626723
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.405067445
/workspace/coverage/default/8.sram_ctrl_alert_test.251999036
/workspace/coverage/default/8.sram_ctrl_bijection.2033087946
/workspace/coverage/default/8.sram_ctrl_executable.2383386296
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1539852917
/workspace/coverage/default/8.sram_ctrl_max_throughput.252929830
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1967156745
/workspace/coverage/default/8.sram_ctrl_mem_walk.3717709048
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2885499423
/workspace/coverage/default/8.sram_ctrl_partial_access.413493455
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3033604389
/workspace/coverage/default/8.sram_ctrl_regwen.1990634687
/workspace/coverage/default/8.sram_ctrl_smoke.3170476261
/workspace/coverage/default/8.sram_ctrl_stress_all.3704801348
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.289975876
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.716981812
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.875549523
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.107362447
/workspace/coverage/default/9.sram_ctrl_alert_test.3782488905
/workspace/coverage/default/9.sram_ctrl_bijection.3960573153
/workspace/coverage/default/9.sram_ctrl_executable.3129630288
/workspace/coverage/default/9.sram_ctrl_lc_escalation.557094948
/workspace/coverage/default/9.sram_ctrl_max_throughput.2630022116
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.149697509
/workspace/coverage/default/9.sram_ctrl_mem_walk.1694029306
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3182284916
/workspace/coverage/default/9.sram_ctrl_partial_access.1453076147
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3386084036
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2513801473
/workspace/coverage/default/9.sram_ctrl_regwen.3357595538
/workspace/coverage/default/9.sram_ctrl_smoke.259629135
/workspace/coverage/default/9.sram_ctrl_stress_all.3474620015
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1918257953
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1703172820
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3312533337



Total test records in report: 1036
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/14.sram_ctrl_max_throughput.3867544623 Aug 07 07:04:24 PM PDT 24 Aug 07 07:07:14 PM PDT 24 15249768391 ps
T2 /workspace/coverage/default/23.sram_ctrl_mem_walk.880277936 Aug 07 07:06:27 PM PDT 24 Aug 07 07:12:27 PM PDT 24 42203148384 ps
T3 /workspace/coverage/default/49.sram_ctrl_alert_test.1026075760 Aug 07 07:11:50 PM PDT 24 Aug 07 07:11:51 PM PDT 24 40263961 ps
T8 /workspace/coverage/default/44.sram_ctrl_alert_test.359711135 Aug 07 07:10:46 PM PDT 24 Aug 07 07:10:47 PM PDT 24 96565802 ps
T4 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.1474656699 Aug 07 07:09:25 PM PDT 24 Aug 07 07:12:03 PM PDT 24 4495456434 ps
T5 /workspace/coverage/default/47.sram_ctrl_stress_all.889293630 Aug 07 07:11:29 PM PDT 24 Aug 07 07:54:44 PM PDT 24 174127251648 ps
T9 /workspace/coverage/default/11.sram_ctrl_alert_test.249839390 Aug 07 07:04:03 PM PDT 24 Aug 07 07:04:04 PM PDT 24 18628053 ps
T6 /workspace/coverage/default/26.sram_ctrl_stress_all.506765545 Aug 07 07:07:17 PM PDT 24 Aug 07 07:59:22 PM PDT 24 183351822222 ps
T7 /workspace/coverage/default/40.sram_ctrl_lc_escalation.27551693 Aug 07 07:09:52 PM PDT 24 Aug 07 07:10:23 PM PDT 24 5655872426 ps
T10 /workspace/coverage/default/36.sram_ctrl_ram_cfg.3112524041 Aug 07 07:09:15 PM PDT 24 Aug 07 07:09:19 PM PDT 24 347553118 ps
T34 /workspace/coverage/default/11.sram_ctrl_mem_walk.979022790 Aug 07 07:03:54 PM PDT 24 Aug 07 07:06:58 PM PDT 24 10443569010 ps
T49 /workspace/coverage/default/19.sram_ctrl_alert_test.1774085182 Aug 07 07:05:39 PM PDT 24 Aug 07 07:05:40 PM PDT 24 38365985 ps
T14 /workspace/coverage/default/12.sram_ctrl_stress_all.3199011926 Aug 07 07:04:18 PM PDT 24 Aug 07 09:17:42 PM PDT 24 314961055704 ps
T35 /workspace/coverage/default/5.sram_ctrl_max_throughput.887147245 Aug 07 07:03:24 PM PDT 24 Aug 07 07:03:32 PM PDT 24 3375065922 ps
T36 /workspace/coverage/default/43.sram_ctrl_max_throughput.3279102065 Aug 07 07:10:35 PM PDT 24 Aug 07 07:11:27 PM PDT 24 1881981706 ps
T37 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.2590463586 Aug 07 07:05:59 PM PDT 24 Aug 07 07:08:18 PM PDT 24 2109090152 ps
T38 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.2038901396 Aug 07 07:03:23 PM PDT 24 Aug 07 07:09:45 PM PDT 24 38032047963 ps
T71 /workspace/coverage/default/40.sram_ctrl_alert_test.1185856385 Aug 07 07:09:55 PM PDT 24 Aug 07 07:09:56 PM PDT 24 29593939 ps
T39 /workspace/coverage/default/11.sram_ctrl_partial_access.317873427 Aug 07 07:03:47 PM PDT 24 Aug 07 07:04:23 PM PDT 24 13179911284 ps
T47 /workspace/coverage/default/34.sram_ctrl_partial_access.1870982324 Aug 07 07:08:43 PM PDT 24 Aug 07 07:09:17 PM PDT 24 3972549237 ps
T48 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3023647706 Aug 07 07:03:36 PM PDT 24 Aug 07 07:09:17 PM PDT 24 63722871579 ps
T92 /workspace/coverage/default/15.sram_ctrl_smoke.278411839 Aug 07 07:04:25 PM PDT 24 Aug 07 07:04:36 PM PDT 24 499288971 ps
T17 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3780671357 Aug 07 07:10:43 PM PDT 24 Aug 07 07:11:01 PM PDT 24 1017336527 ps
T20 /workspace/coverage/default/49.sram_ctrl_executable.1516467758 Aug 07 07:11:43 PM PDT 24 Aug 07 07:33:06 PM PDT 24 24527786890 ps
T81 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.596661546 Aug 07 07:09:09 PM PDT 24 Aug 07 07:15:26 PM PDT 24 42071374346 ps
T40 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.1012069515 Aug 07 07:03:43 PM PDT 24 Aug 07 07:18:31 PM PDT 24 7809778780 ps
T16 /workspace/coverage/default/20.sram_ctrl_lc_escalation.3476483414 Aug 07 07:05:46 PM PDT 24 Aug 07 07:07:00 PM PDT 24 39225026004 ps
T42 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.4041264276 Aug 07 07:07:05 PM PDT 24 Aug 07 07:08:35 PM PDT 24 36834980367 ps
T60 /workspace/coverage/default/6.sram_ctrl_multiple_keys.3709676636 Aug 07 07:03:23 PM PDT 24 Aug 07 07:22:41 PM PDT 24 13166707373 ps
T21 /workspace/coverage/default/15.sram_ctrl_ram_cfg.2194498940 Aug 07 07:04:37 PM PDT 24 Aug 07 07:04:40 PM PDT 24 354018539 ps
T61 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.1769472359 Aug 07 07:10:16 PM PDT 24 Aug 07 07:16:30 PM PDT 24 5184495119 ps
T62 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.3298879688 Aug 07 07:05:02 PM PDT 24 Aug 07 07:08:50 PM PDT 24 8159059284 ps
T15 /workspace/coverage/default/27.sram_ctrl_regwen.1584678406 Aug 07 07:07:25 PM PDT 24 Aug 07 07:10:11 PM PDT 24 1444964033 ps
T63 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.3965284117 Aug 07 07:08:36 PM PDT 24 Aug 07 07:12:06 PM PDT 24 6800459534 ps
T64 /workspace/coverage/default/18.sram_ctrl_multiple_keys.3442058606 Aug 07 07:05:13 PM PDT 24 Aug 07 07:26:32 PM PDT 24 133983494354 ps
T65 /workspace/coverage/default/12.sram_ctrl_smoke.1205746824 Aug 07 07:04:03 PM PDT 24 Aug 07 07:04:21 PM PDT 24 540438501 ps
T66 /workspace/coverage/default/29.sram_ctrl_alert_test.3877956298 Aug 07 07:07:54 PM PDT 24 Aug 07 07:07:55 PM PDT 24 12659450 ps
T50 /workspace/coverage/default/31.sram_ctrl_mem_walk.1799389518 Aug 07 07:08:16 PM PDT 24 Aug 07 07:10:48 PM PDT 24 2745505274 ps
T157 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.1674203145 Aug 07 07:05:31 PM PDT 24 Aug 07 07:07:04 PM PDT 24 784604531 ps
T158 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1585944588 Aug 07 07:03:23 PM PDT 24 Aug 07 07:03:33 PM PDT 24 3556016679 ps
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T82 /workspace/coverage/default/24.sram_ctrl_stress_all.37738792 Aug 07 07:06:51 PM PDT 24 Aug 07 09:05:00 PM PDT 24 309723769883 ps
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T83 /workspace/coverage/default/2.sram_ctrl_lc_escalation.1207243215 Aug 07 07:03:09 PM PDT 24 Aug 07 07:04:12 PM PDT 24 10433530133 ps
T141 /workspace/coverage/default/36.sram_ctrl_executable.1465032161 Aug 07 07:09:15 PM PDT 24 Aug 07 07:34:36 PM PDT 24 110597788548 ps
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T22 /workspace/coverage/default/0.sram_ctrl_ram_cfg.3930459489 Aug 07 07:03:08 PM PDT 24 Aug 07 07:03:12 PM PDT 24 713797075 ps
T45 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.370418981 Aug 07 07:03:24 PM PDT 24 Aug 07 07:05:53 PM PDT 24 10242040421 ps
T120 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.597156104 Aug 07 07:05:19 PM PDT 24 Aug 07 07:12:18 PM PDT 24 15451297956 ps
T19 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.474179243 Aug 07 07:11:15 PM PDT 24 Aug 07 07:11:32 PM PDT 24 496576432 ps
T165 /workspace/coverage/default/5.sram_ctrl_alert_test.87869129 Aug 07 07:03:29 PM PDT 24 Aug 07 07:03:30 PM PDT 24 20705522 ps
T99 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.173850508 Aug 07 07:10:22 PM PDT 24 Aug 07 07:12:42 PM PDT 24 4401611954 ps
T142 /workspace/coverage/default/41.sram_ctrl_regwen.1241456959 Aug 07 07:10:06 PM PDT 24 Aug 07 07:24:32 PM PDT 24 54604419309 ps
T166 /workspace/coverage/default/46.sram_ctrl_partial_access.783373878 Aug 07 07:11:05 PM PDT 24 Aug 07 07:11:25 PM PDT 24 2569917890 ps
T75 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.4044378095 Aug 07 07:03:08 PM PDT 24 Aug 07 07:04:04 PM PDT 24 1245332162 ps
T167 /workspace/coverage/default/34.sram_ctrl_alert_test.3525378120 Aug 07 07:08:51 PM PDT 24 Aug 07 07:08:52 PM PDT 24 13436892 ps
T100 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.1168679081 Aug 07 07:08:16 PM PDT 24 Aug 07 07:23:33 PM PDT 24 30408079884 ps
T145 /workspace/coverage/default/36.sram_ctrl_stress_all.128273796 Aug 07 07:09:15 PM PDT 24 Aug 07 09:33:19 PM PDT 24 259572380177 ps
T168 /workspace/coverage/default/6.sram_ctrl_max_throughput.802353858 Aug 07 07:03:23 PM PDT 24 Aug 07 07:03:31 PM PDT 24 1361569483 ps
T169 /workspace/coverage/default/10.sram_ctrl_partial_access.501605684 Aug 07 07:03:40 PM PDT 24 Aug 07 07:05:08 PM PDT 24 8187553147 ps
T170 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.3519927228 Aug 07 07:06:23 PM PDT 24 Aug 07 07:09:57 PM PDT 24 15098438762 ps
T171 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.3519452436 Aug 07 07:09:44 PM PDT 24 Aug 07 07:15:42 PM PDT 24 18706908280 ps
T172 /workspace/coverage/default/18.sram_ctrl_alert_test.3688641613 Aug 07 07:05:24 PM PDT 24 Aug 07 07:05:25 PM PDT 24 15052620 ps
T173 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.4156190218 Aug 07 07:03:06 PM PDT 24 Aug 07 07:06:36 PM PDT 24 12371025057 ps
T147 /workspace/coverage/default/42.sram_ctrl_stress_all.391313314 Aug 07 07:10:24 PM PDT 24 Aug 07 08:52:27 PM PDT 24 418250995620 ps
T174 /workspace/coverage/default/13.sram_ctrl_ram_cfg.165745752 Aug 07 07:04:25 PM PDT 24 Aug 07 07:04:28 PM PDT 24 414784806 ps
T175 /workspace/coverage/default/40.sram_ctrl_multiple_keys.1762835922 Aug 07 07:09:50 PM PDT 24 Aug 07 07:25:20 PM PDT 24 18862742838 ps
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T177 /workspace/coverage/default/16.sram_ctrl_regwen.490087075 Aug 07 07:04:56 PM PDT 24 Aug 07 07:05:19 PM PDT 24 3126148951 ps
T178 /workspace/coverage/default/28.sram_ctrl_alert_test.3620691902 Aug 07 07:07:48 PM PDT 24 Aug 07 07:07:49 PM PDT 24 15788315 ps
T52 /workspace/coverage/default/8.sram_ctrl_mem_walk.3717709048 Aug 07 07:03:32 PM PDT 24 Aug 07 07:06:42 PM PDT 24 99872134105 ps
T179 /workspace/coverage/default/7.sram_ctrl_ram_cfg.2392738374 Aug 07 07:03:32 PM PDT 24 Aug 07 07:03:36 PM PDT 24 1987946309 ps
T180 /workspace/coverage/default/36.sram_ctrl_partial_access.717577726 Aug 07 07:09:06 PM PDT 24 Aug 07 07:10:58 PM PDT 24 2239325400 ps
T181 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2844472542 Aug 07 07:05:45 PM PDT 24 Aug 07 07:10:45 PM PDT 24 5203894025 ps
T182 /workspace/coverage/default/46.sram_ctrl_regwen.939209951 Aug 07 07:11:07 PM PDT 24 Aug 07 07:23:05 PM PDT 24 23260087747 ps
T183 /workspace/coverage/default/35.sram_ctrl_max_throughput.629223416 Aug 07 07:08:51 PM PDT 24 Aug 07 07:11:07 PM PDT 24 5038877389 ps
T146 /workspace/coverage/default/46.sram_ctrl_stress_all.3188350822 Aug 07 07:11:16 PM PDT 24 Aug 07 07:46:54 PM PDT 24 120679660268 ps
T184 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1657078993 Aug 07 07:10:43 PM PDT 24 Aug 07 07:17:15 PM PDT 24 5594455695 ps
T185 /workspace/coverage/default/30.sram_ctrl_smoke.2776074386 Aug 07 07:08:14 PM PDT 24 Aug 07 07:08:31 PM PDT 24 4541256171 ps
T186 /workspace/coverage/default/42.sram_ctrl_lc_escalation.3741705896 Aug 07 07:10:15 PM PDT 24 Aug 07 07:10:37 PM PDT 24 4806853993 ps
T46 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.2013616384 Aug 07 07:10:44 PM PDT 24 Aug 07 07:12:13 PM PDT 24 11195790810 ps
T187 /workspace/coverage/default/2.sram_ctrl_ram_cfg.1454127120 Aug 07 07:03:07 PM PDT 24 Aug 07 07:03:11 PM PDT 24 692525358 ps
T188 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.530681436 Aug 07 07:07:05 PM PDT 24 Aug 07 07:07:11 PM PDT 24 2896642577 ps
T189 /workspace/coverage/default/1.sram_ctrl_bijection.917246862 Aug 07 07:03:07 PM PDT 24 Aug 07 07:38:39 PM PDT 24 30405818409 ps
T148 /workspace/coverage/default/7.sram_ctrl_executable.4224558270 Aug 07 07:03:24 PM PDT 24 Aug 07 07:15:18 PM PDT 24 41053170760 ps
T53 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.36573243 Aug 07 07:10:07 PM PDT 24 Aug 07 07:10:26 PM PDT 24 1414054854 ps
T190 /workspace/coverage/default/10.sram_ctrl_executable.2115646614 Aug 07 07:03:39 PM PDT 24 Aug 07 07:07:18 PM PDT 24 7606777432 ps
T191 /workspace/coverage/default/5.sram_ctrl_ram_cfg.3009221640 Aug 07 07:03:23 PM PDT 24 Aug 07 07:03:27 PM PDT 24 349059297 ps
T192 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.2472484482 Aug 07 07:03:16 PM PDT 24 Aug 07 07:05:46 PM PDT 24 2802744845 ps
T193 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.379739005 Aug 07 07:08:24 PM PDT 24 Aug 07 07:09:55 PM PDT 24 1553085236 ps
T194 /workspace/coverage/default/26.sram_ctrl_max_throughput.3644929113 Aug 07 07:07:10 PM PDT 24 Aug 07 07:09:26 PM PDT 24 1576568793 ps
T76 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.3502136324 Aug 07 07:04:55 PM PDT 24 Aug 07 07:05:07 PM PDT 24 388798447 ps
T77 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1376246816 Aug 07 07:08:36 PM PDT 24 Aug 07 07:08:53 PM PDT 24 1683133052 ps
T195 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1923604530 Aug 07 07:04:32 PM PDT 24 Aug 07 07:04:48 PM PDT 24 7722948131 ps
T196 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.4281751933 Aug 07 07:11:15 PM PDT 24 Aug 07 07:17:20 PM PDT 24 5028142613 ps
T197 /workspace/coverage/default/24.sram_ctrl_alert_test.1777498191 Aug 07 07:06:50 PM PDT 24 Aug 07 07:06:51 PM PDT 24 41743951 ps
T101 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.1875433723 Aug 07 07:08:36 PM PDT 24 Aug 07 07:29:03 PM PDT 24 26073548079 ps
T198 /workspace/coverage/default/17.sram_ctrl_regwen.774024539 Aug 07 07:05:07 PM PDT 24 Aug 07 07:35:33 PM PDT 24 17559256799 ps
T199 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4098068275 Aug 07 07:03:12 PM PDT 24 Aug 07 07:04:52 PM PDT 24 2645691971 ps
T111 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.1674212431 Aug 07 07:07:58 PM PDT 24 Aug 07 07:10:45 PM PDT 24 38327929782 ps
T200 /workspace/coverage/default/11.sram_ctrl_lc_escalation.683013236 Aug 07 07:03:57 PM PDT 24 Aug 07 07:04:15 PM PDT 24 2759524116 ps
T201 /workspace/coverage/default/31.sram_ctrl_multiple_keys.3295996029 Aug 07 07:08:09 PM PDT 24 Aug 07 07:11:29 PM PDT 24 41260543463 ps
T143 /workspace/coverage/default/45.sram_ctrl_regwen.2109956160 Aug 07 07:10:52 PM PDT 24 Aug 07 07:40:56 PM PDT 24 82981475115 ps
T149 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2923106768 Aug 07 07:08:08 PM PDT 24 Aug 07 07:11:12 PM PDT 24 7846059288 ps
T202 /workspace/coverage/default/9.sram_ctrl_max_throughput.2630022116 Aug 07 07:03:36 PM PDT 24 Aug 07 07:05:26 PM PDT 24 757243328 ps
T203 /workspace/coverage/default/1.sram_ctrl_executable.3185162440 Aug 07 07:03:06 PM PDT 24 Aug 07 07:19:54 PM PDT 24 156036162662 ps
T204 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1080832442 Aug 07 07:06:28 PM PDT 24 Aug 07 07:07:53 PM PDT 24 1081788059 ps
T205 /workspace/coverage/default/4.sram_ctrl_multiple_keys.2043450172 Aug 07 07:03:18 PM PDT 24 Aug 07 07:06:20 PM PDT 24 40660493835 ps
T206 /workspace/coverage/default/7.sram_ctrl_stress_all.3769625434 Aug 07 07:03:34 PM PDT 24 Aug 07 07:50:48 PM PDT 24 28613917328 ps
T207 /workspace/coverage/default/3.sram_ctrl_bijection.1513030175 Aug 07 07:03:16 PM PDT 24 Aug 07 07:43:17 PM PDT 24 121926652402 ps
T208 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.2369096 Aug 07 07:04:18 PM PDT 24 Aug 07 07:16:04 PM PDT 24 23573128128 ps
T209 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.570464600 Aug 07 07:03:07 PM PDT 24 Aug 07 07:11:53 PM PDT 24 21702681728 ps
T210 /workspace/coverage/default/29.sram_ctrl_partial_access.3974510379 Aug 07 07:07:49 PM PDT 24 Aug 07 07:08:06 PM PDT 24 2228921972 ps
T211 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1456592727 Aug 07 07:11:42 PM PDT 24 Aug 07 07:16:27 PM PDT 24 4670382275 ps
T212 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.2844190072 Aug 07 07:03:08 PM PDT 24 Aug 07 07:17:02 PM PDT 24 24786734048 ps
T213 /workspace/coverage/default/28.sram_ctrl_executable.74261225 Aug 07 07:07:41 PM PDT 24 Aug 07 07:19:43 PM PDT 24 9933302569 ps
T214 /workspace/coverage/default/23.sram_ctrl_partial_access.983382354 Aug 07 07:06:22 PM PDT 24 Aug 07 07:06:38 PM PDT 24 865359955 ps
T215 /workspace/coverage/default/25.sram_ctrl_multiple_keys.2611692801 Aug 07 07:06:51 PM PDT 24 Aug 07 07:15:51 PM PDT 24 47314593395 ps
T54 /workspace/coverage/default/43.sram_ctrl_mem_walk.957713265 Aug 07 07:10:46 PM PDT 24 Aug 07 07:13:19 PM PDT 24 2686668931 ps
T216 /workspace/coverage/default/16.sram_ctrl_mem_walk.3590266614 Aug 07 07:04:54 PM PDT 24 Aug 07 07:07:14 PM PDT 24 2800574473 ps
T217 /workspace/coverage/default/1.sram_ctrl_max_throughput.3912779873 Aug 07 07:03:06 PM PDT 24 Aug 07 07:04:26 PM PDT 24 12313840360 ps
T218 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.4120741787 Aug 07 07:10:52 PM PDT 24 Aug 07 07:16:25 PM PDT 24 5264192661 ps
T219 /workspace/coverage/default/45.sram_ctrl_mem_walk.1208254582 Aug 07 07:11:01 PM PDT 24 Aug 07 07:13:41 PM PDT 24 6924619747 ps
T220 /workspace/coverage/default/19.sram_ctrl_partial_access.1192948258 Aug 07 07:05:32 PM PDT 24 Aug 07 07:05:37 PM PDT 24 1440157002 ps
T78 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.1680549155 Aug 07 07:06:49 PM PDT 24 Aug 07 07:07:05 PM PDT 24 1971730021 ps
T221 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.26513693 Aug 07 07:03:16 PM PDT 24 Aug 07 07:05:53 PM PDT 24 12879377196 ps
T222 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.866810875 Aug 07 07:07:05 PM PDT 24 Aug 07 07:10:17 PM PDT 24 13943952583 ps
T223 /workspace/coverage/default/19.sram_ctrl_ram_cfg.3498133594 Aug 07 07:05:32 PM PDT 24 Aug 07 07:05:36 PM PDT 24 1354344542 ps
T224 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.3162607832 Aug 07 07:06:19 PM PDT 24 Aug 07 07:08:09 PM PDT 24 3835714112 ps
T225 /workspace/coverage/default/49.sram_ctrl_lc_escalation.1251895365 Aug 07 07:11:44 PM PDT 24 Aug 07 07:12:16 PM PDT 24 19465687311 ps
T226 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.3693247053 Aug 07 07:05:46 PM PDT 24 Aug 07 07:06:37 PM PDT 24 3211665256 ps
T227 /workspace/coverage/default/22.sram_ctrl_max_throughput.4079670495 Aug 07 07:06:15 PM PDT 24 Aug 07 07:07:00 PM PDT 24 4838564959 ps
T228 /workspace/coverage/default/31.sram_ctrl_max_throughput.2231667015 Aug 07 07:08:08 PM PDT 24 Aug 07 07:09:05 PM PDT 24 761527374 ps
T229 /workspace/coverage/default/43.sram_ctrl_lc_escalation.579741241 Aug 07 07:10:35 PM PDT 24 Aug 07 07:12:19 PM PDT 24 60751920081 ps
T230 /workspace/coverage/default/42.sram_ctrl_smoke.2032080171 Aug 07 07:10:14 PM PDT 24 Aug 07 07:10:21 PM PDT 24 1377233180 ps
T231 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.435703312 Aug 07 07:10:25 PM PDT 24 Aug 07 07:21:07 PM PDT 24 47953711080 ps
T232 /workspace/coverage/default/35.sram_ctrl_mem_walk.3214921852 Aug 07 07:08:58 PM PDT 24 Aug 07 07:14:40 PM PDT 24 17951143932 ps
T233 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.3254132350 Aug 07 07:07:28 PM PDT 24 Aug 07 07:27:46 PM PDT 24 294336851336 ps
T234 /workspace/coverage/default/1.sram_ctrl_multiple_keys.1415852123 Aug 07 07:03:09 PM PDT 24 Aug 07 07:09:46 PM PDT 24 6785076969 ps
T235 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2717038532 Aug 07 07:11:44 PM PDT 24 Aug 07 07:14:22 PM PDT 24 3413039064 ps
T236 /workspace/coverage/default/39.sram_ctrl_multiple_keys.3683607004 Aug 07 07:09:37 PM PDT 24 Aug 07 07:20:24 PM PDT 24 5253574379 ps
T237 /workspace/coverage/default/20.sram_ctrl_regwen.1023533855 Aug 07 07:05:49 PM PDT 24 Aug 07 07:17:40 PM PDT 24 4669247791 ps
T238 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.1062930816 Aug 07 07:03:15 PM PDT 24 Aug 07 07:04:25 PM PDT 24 3013175020 ps
T239 /workspace/coverage/default/23.sram_ctrl_multiple_keys.2660655621 Aug 07 07:06:22 PM PDT 24 Aug 07 07:21:15 PM PDT 24 59246884579 ps
T240 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2671500838 Aug 07 07:03:43 PM PDT 24 Aug 07 07:04:15 PM PDT 24 761580320 ps
T241 /workspace/coverage/default/2.sram_ctrl_smoke.4282969051 Aug 07 07:03:09 PM PDT 24 Aug 07 07:03:29 PM PDT 24 388596098 ps
T242 /workspace/coverage/default/47.sram_ctrl_ram_cfg.1679993771 Aug 07 07:11:27 PM PDT 24 Aug 07 07:11:31 PM PDT 24 462877669 ps
T243 /workspace/coverage/default/44.sram_ctrl_regwen.4010291784 Aug 07 07:10:46 PM PDT 24 Aug 07 07:14:07 PM PDT 24 19426733109 ps
T244 /workspace/coverage/default/33.sram_ctrl_partial_access.963038666 Aug 07 07:08:36 PM PDT 24 Aug 07 07:09:44 PM PDT 24 15701982191 ps
T245 /workspace/coverage/default/25.sram_ctrl_mem_walk.4005605170 Aug 07 07:07:04 PM PDT 24 Aug 07 07:09:56 PM PDT 24 9361279426 ps
T246 /workspace/coverage/default/21.sram_ctrl_stress_all.2991306608 Aug 07 07:06:14 PM PDT 24 Aug 07 08:45:33 PM PDT 24 151824815573 ps
T247 /workspace/coverage/default/39.sram_ctrl_smoke.2909569927 Aug 07 07:09:38 PM PDT 24 Aug 07 07:10:35 PM PDT 24 2297668192 ps
T248 /workspace/coverage/default/0.sram_ctrl_executable.1248445530 Aug 07 07:03:08 PM PDT 24 Aug 07 07:24:32 PM PDT 24 110663035755 ps
T249 /workspace/coverage/default/4.sram_ctrl_stress_all.274253579 Aug 07 07:03:15 PM PDT 24 Aug 07 07:45:31 PM PDT 24 21591447547 ps
T250 /workspace/coverage/default/37.sram_ctrl_multiple_keys.302167056 Aug 07 07:09:16 PM PDT 24 Aug 07 07:10:34 PM PDT 24 12740437348 ps
T251 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.427046479 Aug 07 07:04:29 PM PDT 24 Aug 07 07:12:45 PM PDT 24 32736094873 ps
T252 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.3618750676 Aug 07 07:09:15 PM PDT 24 Aug 07 07:14:18 PM PDT 24 18901961414 ps
T253 /workspace/coverage/default/15.sram_ctrl_bijection.1057212289 Aug 07 07:04:30 PM PDT 24 Aug 07 07:39:18 PM PDT 24 29547676510 ps
T254 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.3967844752 Aug 07 07:06:05 PM PDT 24 Aug 07 07:06:33 PM PDT 24 2846897969 ps
T152 /workspace/coverage/default/33.sram_ctrl_stress_all.1739424546 Aug 07 07:08:36 PM PDT 24 Aug 07 09:11:44 PM PDT 24 1354821203214 ps
T255 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.3582593770 Aug 07 07:06:04 PM PDT 24 Aug 07 07:15:05 PM PDT 24 4080462145 ps
T79 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3605633873 Aug 07 07:03:25 PM PDT 24 Aug 07 07:03:38 PM PDT 24 1196278895 ps
T256 /workspace/coverage/default/0.sram_ctrl_mem_walk.6769036 Aug 07 07:03:07 PM PDT 24 Aug 07 07:05:58 PM PDT 24 28853376456 ps
T257 /workspace/coverage/default/49.sram_ctrl_ram_cfg.2095592011 Aug 07 07:11:43 PM PDT 24 Aug 07 07:11:46 PM PDT 24 355337749 ps
T258 /workspace/coverage/default/24.sram_ctrl_ram_cfg.3149907887 Aug 07 07:06:50 PM PDT 24 Aug 07 07:06:54 PM PDT 24 729579926 ps
T259 /workspace/coverage/default/4.sram_ctrl_ram_cfg.76909828 Aug 07 07:03:15 PM PDT 24 Aug 07 07:03:19 PM PDT 24 1406198120 ps
T260 /workspace/coverage/default/14.sram_ctrl_regwen.1141350176 Aug 07 07:04:26 PM PDT 24 Aug 07 07:10:11 PM PDT 24 38527216373 ps
T261 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.2498431254 Aug 07 07:03:55 PM PDT 24 Aug 07 07:07:46 PM PDT 24 9348871091 ps
T262 /workspace/coverage/default/41.sram_ctrl_stress_all.1778189502 Aug 07 07:10:07 PM PDT 24 Aug 07 08:21:48 PM PDT 24 59914278619 ps
T263 /workspace/coverage/default/23.sram_ctrl_lc_escalation.4247751120 Aug 07 07:06:29 PM PDT 24 Aug 07 07:07:37 PM PDT 24 11234416168 ps
T264 /workspace/coverage/default/42.sram_ctrl_max_throughput.4230366950 Aug 07 07:10:15 PM PDT 24 Aug 07 07:10:47 PM PDT 24 726289381 ps
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T265 /workspace/coverage/default/24.sram_ctrl_lc_escalation.1672447666 Aug 07 07:06:44 PM PDT 24 Aug 07 07:07:49 PM PDT 24 34012094392 ps
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