Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.94 99.19 94.27 99.72 100.00 96.03 99.12 97.26


Total tests in report: 1037
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
72.89 72.89 92.80 92.80 73.46 73.46 85.54 85.54 33.33 33.33 84.36 84.36 93.57 93.57 47.17 47.17 /workspace/coverage/default/22.sram_ctrl_stress_all.795886681
86.75 13.86 97.79 4.99 79.38 5.92 94.97 9.44 100.00 66.67 92.18 7.82 95.03 1.46 47.90 0.73 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.1708632280
93.02 6.27 98.77 0.98 86.49 7.11 95.80 0.83 100.00 0.00 93.84 1.66 96.35 1.32 79.89 31.99 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1321378542
94.04 1.02 99.10 0.33 88.51 2.01 96.76 0.96 100.00 0.00 95.26 1.42 96.93 0.58 81.72 1.83 /workspace/coverage/default/0.sram_ctrl_sec_cm.375030607
94.86 0.82 99.10 0.00 89.10 0.59 96.76 0.00 100.00 0.00 95.26 0.00 96.93 0.00 86.84 5.12 /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2575345920
95.61 0.75 99.10 0.00 90.40 1.30 96.76 0.00 100.00 0.00 95.73 0.47 96.93 0.00 90.31 3.47 /workspace/coverage/default/0.sram_ctrl_stress_all.183509607
96.26 0.66 99.10 0.00 90.52 0.12 97.73 0.96 100.00 0.00 95.97 0.24 97.66 0.73 92.87 2.56 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.673556129
96.73 0.46 99.10 0.00 90.52 0.00 97.73 0.00 100.00 0.00 95.97 0.00 97.81 0.15 95.98 3.11 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.2761732214
96.93 0.20 99.10 0.00 90.52 0.00 97.80 0.07 100.00 0.00 95.97 0.00 99.12 1.32 95.98 0.00 /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3727533853
97.10 0.17 99.18 0.08 90.52 0.00 98.93 1.14 100.00 0.00 95.97 0.00 99.12 0.00 95.98 0.00 /workspace/coverage/default/20.sram_ctrl_ram_cfg.1222301394
97.22 0.12 99.18 0.00 90.64 0.12 99.66 0.72 100.00 0.00 95.97 0.00 99.12 0.00 95.98 0.00 /workspace/coverage/default/1.sram_ctrl_regwen.2358799260
97.33 0.10 99.18 0.00 90.64 0.00 99.66 0.00 100.00 0.00 95.97 0.00 99.12 0.00 96.71 0.73 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.130473340
97.39 0.06 99.18 0.00 91.00 0.36 99.72 0.07 100.00 0.00 95.97 0.00 99.12 0.00 96.71 0.00 /workspace/coverage/default/0.sram_ctrl_alert_test.460091068
97.44 0.05 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 95.97 0.00 99.12 0.00 97.07 0.37 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3310955420
97.47 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.24 99.12 0.00 97.07 0.00 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.911171851
97.50 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/default/11.sram_ctrl_stress_all.367693564

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3417241507
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1048540538
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3423549037
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.4206605092
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2756747316
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2698978512
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1412134625
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.763702557
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3240059926
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2259685224
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1465626362
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.336547924
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1233070769
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1859122245
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2832009205
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2015751243
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1021992184
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1886423652
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2353268609
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3223728141
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1009364566
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3433095663
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2542833701
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1544002376
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1532562427
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3491843668
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.4156348064
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2114742227
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2132657287
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.637461282
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2565809997
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.4052660422
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2486478173
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2355319503
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.4109871495
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.28771656
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2625565916
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3011209000
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.371860041
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3765413450
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3760796015
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2493859982
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1530096162
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2057445953
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.627158245
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1194514740
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1585633361
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.908656972
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.626308880
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1954562925
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3895416594
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2310849545
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1052168164
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1996429173
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1120053622
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3324873322
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2900826038
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.213002696
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.4117987537
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1634965080
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3695988403
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3147287384
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.353106525
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2983657837
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2395467581
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3802715576
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2287434550
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2672936992
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3018707991
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1240826063
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1535576739
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3320379802
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.4091997561
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3990297648
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3846320381
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.4021305169
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1928384390
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3645249464
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3420004454
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.174593650
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.833210982
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3427859424
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.546679645
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2780489757
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3974012006
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.4115639266
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.231530978
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2749854538
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1025435447
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3162848308
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.599897873
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.929362640
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2819438666
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3296162826
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.880628429
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2195181716
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2302536591
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1253737789
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.583836315
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2713520835
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3389291850
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2480367565
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3900709058
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1572382157
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2233589202
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1056749795
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.816636373
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2699505602
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1200668700
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2529144899
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.260645218
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.550798979
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2626620413
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2399594948
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.4043668721
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3129065365
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.91007672
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3966684554
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3515106361
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.166660089
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2854594624
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3767540284
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2005345086
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.4158483191
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3603779022
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1815547165
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2401637826
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1824665755
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.733378155
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2061306880
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1999086079
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3075714701
/workspace/coverage/default/0.sram_ctrl_bijection.3320513624
/workspace/coverage/default/0.sram_ctrl_executable.2579445631
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1432285138
/workspace/coverage/default/0.sram_ctrl_max_throughput.3085778669
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3066272392
/workspace/coverage/default/0.sram_ctrl_mem_walk.2389725415
/workspace/coverage/default/0.sram_ctrl_multiple_keys.956239734
/workspace/coverage/default/0.sram_ctrl_partial_access.3898709267
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.805940067
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3084663297
/workspace/coverage/default/0.sram_ctrl_regwen.3210625974
/workspace/coverage/default/0.sram_ctrl_smoke.3668192589
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3666015908
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.103769860
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.299109177
/workspace/coverage/default/1.sram_ctrl_alert_test.1602177820
/workspace/coverage/default/1.sram_ctrl_bijection.3525351520
/workspace/coverage/default/1.sram_ctrl_executable.1138790258
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2936735923
/workspace/coverage/default/1.sram_ctrl_max_throughput.1163978094
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1490268171
/workspace/coverage/default/1.sram_ctrl_mem_walk.3405083115
/workspace/coverage/default/1.sram_ctrl_multiple_keys.331541604
/workspace/coverage/default/1.sram_ctrl_partial_access.168687006
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2973051262
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2033132780
/workspace/coverage/default/1.sram_ctrl_sec_cm.429452045
/workspace/coverage/default/1.sram_ctrl_smoke.1079345784
/workspace/coverage/default/1.sram_ctrl_stress_all.1579281465
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2447941082
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.728522645
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.599525193
/workspace/coverage/default/10.sram_ctrl_alert_test.680680123
/workspace/coverage/default/10.sram_ctrl_bijection.3847367702
/workspace/coverage/default/10.sram_ctrl_executable.3292369611
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3353772693
/workspace/coverage/default/10.sram_ctrl_max_throughput.1019522609
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1833491496
/workspace/coverage/default/10.sram_ctrl_mem_walk.2851799710
/workspace/coverage/default/10.sram_ctrl_multiple_keys.437789619
/workspace/coverage/default/10.sram_ctrl_partial_access.1517827040
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2463113211
/workspace/coverage/default/10.sram_ctrl_ram_cfg.55187915
/workspace/coverage/default/10.sram_ctrl_regwen.3577233307
/workspace/coverage/default/10.sram_ctrl_smoke.1514794207
/workspace/coverage/default/10.sram_ctrl_stress_all.2881565377
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3231206559
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3704415964
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.203842023
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1232271368
/workspace/coverage/default/11.sram_ctrl_alert_test.4143042410
/workspace/coverage/default/11.sram_ctrl_bijection.3297572353
/workspace/coverage/default/11.sram_ctrl_executable.3565313069
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1764800207
/workspace/coverage/default/11.sram_ctrl_max_throughput.2132182136
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.277036061
/workspace/coverage/default/11.sram_ctrl_mem_walk.2360266493
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1362912249
/workspace/coverage/default/11.sram_ctrl_partial_access.767880615
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1910386385
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2277312577
/workspace/coverage/default/11.sram_ctrl_regwen.1462666334
/workspace/coverage/default/11.sram_ctrl_smoke.2388312198
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2008992207
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.926473751
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3806420653
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3786333521
/workspace/coverage/default/12.sram_ctrl_alert_test.3671342031
/workspace/coverage/default/12.sram_ctrl_bijection.3622540466
/workspace/coverage/default/12.sram_ctrl_executable.404212402
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1373526276
/workspace/coverage/default/12.sram_ctrl_max_throughput.1581681146
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3544848791
/workspace/coverage/default/12.sram_ctrl_mem_walk.2123720777
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1046476448
/workspace/coverage/default/12.sram_ctrl_partial_access.3856187538
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3822273387
/workspace/coverage/default/12.sram_ctrl_ram_cfg.1409316497
/workspace/coverage/default/12.sram_ctrl_regwen.1632575910
/workspace/coverage/default/12.sram_ctrl_smoke.1270445452
/workspace/coverage/default/12.sram_ctrl_stress_all.2115096875
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2640432767
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/workspace/coverage/default/43.sram_ctrl_lc_escalation.2270628833
/workspace/coverage/default/43.sram_ctrl_max_throughput.346136147
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3104911222
/workspace/coverage/default/43.sram_ctrl_mem_walk.3792374932
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3088667176
/workspace/coverage/default/43.sram_ctrl_partial_access.2106673500
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3589483475
/workspace/coverage/default/43.sram_ctrl_ram_cfg.346655436
/workspace/coverage/default/43.sram_ctrl_regwen.476475416
/workspace/coverage/default/43.sram_ctrl_smoke.2535965979
/workspace/coverage/default/43.sram_ctrl_stress_all.1130765625
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.941998977
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2025414685
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2070531111
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.4288848045
/workspace/coverage/default/44.sram_ctrl_alert_test.2632038645
/workspace/coverage/default/44.sram_ctrl_bijection.348051002
/workspace/coverage/default/44.sram_ctrl_executable.1681867281
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3535691875
/workspace/coverage/default/44.sram_ctrl_max_throughput.2674423325
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1598524524
/workspace/coverage/default/44.sram_ctrl_mem_walk.3173443122
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3426839669
/workspace/coverage/default/44.sram_ctrl_partial_access.3374486761
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.934393146
/workspace/coverage/default/44.sram_ctrl_ram_cfg.4088560254
/workspace/coverage/default/44.sram_ctrl_regwen.3255028569
/workspace/coverage/default/44.sram_ctrl_smoke.1907351455
/workspace/coverage/default/44.sram_ctrl_stress_all.1029551947
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3694570056
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.4290069676
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1789971803
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1964446598
/workspace/coverage/default/45.sram_ctrl_alert_test.1700016765
/workspace/coverage/default/45.sram_ctrl_bijection.3361375472
/workspace/coverage/default/45.sram_ctrl_executable.3113753080
/workspace/coverage/default/45.sram_ctrl_lc_escalation.199672800
/workspace/coverage/default/45.sram_ctrl_max_throughput.4124472238
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2562782357
/workspace/coverage/default/45.sram_ctrl_mem_walk.522067758
/workspace/coverage/default/45.sram_ctrl_multiple_keys.4140508360
/workspace/coverage/default/45.sram_ctrl_partial_access.1421333374
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.38445201
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3376717311
/workspace/coverage/default/45.sram_ctrl_regwen.235011392
/workspace/coverage/default/45.sram_ctrl_smoke.1764360706
/workspace/coverage/default/45.sram_ctrl_stress_all.3834655430
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1413703512
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2960505349
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.729239679
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3372279
/workspace/coverage/default/46.sram_ctrl_alert_test.1597390570
/workspace/coverage/default/46.sram_ctrl_bijection.3696895900
/workspace/coverage/default/46.sram_ctrl_executable.4087365560
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3724243453
/workspace/coverage/default/46.sram_ctrl_max_throughput.3432282936
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.928006730
/workspace/coverage/default/46.sram_ctrl_mem_walk.860334714
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2714226547
/workspace/coverage/default/46.sram_ctrl_partial_access.672273105
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.854217542
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1953901487
/workspace/coverage/default/46.sram_ctrl_regwen.2594791302
/workspace/coverage/default/46.sram_ctrl_smoke.193755177
/workspace/coverage/default/46.sram_ctrl_stress_all.2811595753
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2558434641
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.509768033
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.540897860
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3771966334
/workspace/coverage/default/47.sram_ctrl_alert_test.2144928926
/workspace/coverage/default/47.sram_ctrl_bijection.4206838421
/workspace/coverage/default/47.sram_ctrl_executable.765604526
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3991661179
/workspace/coverage/default/47.sram_ctrl_max_throughput.3464448583
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3320581498
/workspace/coverage/default/47.sram_ctrl_mem_walk.965235108
/workspace/coverage/default/47.sram_ctrl_multiple_keys.502803618
/workspace/coverage/default/47.sram_ctrl_partial_access.3331398579
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3886277013
/workspace/coverage/default/47.sram_ctrl_ram_cfg.231218759
/workspace/coverage/default/47.sram_ctrl_regwen.3670564565
/workspace/coverage/default/47.sram_ctrl_smoke.1976577075
/workspace/coverage/default/47.sram_ctrl_stress_all.1850225019
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.986000856
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3479109216
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.672525307
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.4258087714
/workspace/coverage/default/48.sram_ctrl_alert_test.4223845124
/workspace/coverage/default/48.sram_ctrl_bijection.2750403138
/workspace/coverage/default/48.sram_ctrl_executable.63735950
/workspace/coverage/default/48.sram_ctrl_lc_escalation.137705591
/workspace/coverage/default/48.sram_ctrl_max_throughput.1081918346
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2251718406
/workspace/coverage/default/48.sram_ctrl_mem_walk.3381450350
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1578133203
/workspace/coverage/default/48.sram_ctrl_partial_access.2836320495
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.337269814
/workspace/coverage/default/48.sram_ctrl_ram_cfg.4056056671
/workspace/coverage/default/48.sram_ctrl_regwen.3700349876
/workspace/coverage/default/48.sram_ctrl_smoke.3713574467
/workspace/coverage/default/48.sram_ctrl_stress_all.3143964695
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2875698016
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1069669093
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.462742329
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.4123520304
/workspace/coverage/default/49.sram_ctrl_alert_test.4234897843
/workspace/coverage/default/49.sram_ctrl_bijection.646181690
/workspace/coverage/default/49.sram_ctrl_executable.3534468078
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3958956736
/workspace/coverage/default/49.sram_ctrl_max_throughput.438256352
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.910868400
/workspace/coverage/default/49.sram_ctrl_mem_walk.1884413921
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1127359897
/workspace/coverage/default/49.sram_ctrl_partial_access.266575707
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2549759893
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1744667729
/workspace/coverage/default/49.sram_ctrl_regwen.3957095644
/workspace/coverage/default/49.sram_ctrl_smoke.422190785
/workspace/coverage/default/49.sram_ctrl_stress_all.3283038586
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.456987782
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3823036997
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2639880552
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1958748336
/workspace/coverage/default/5.sram_ctrl_alert_test.1800745362
/workspace/coverage/default/5.sram_ctrl_bijection.3885220786
/workspace/coverage/default/5.sram_ctrl_executable.4056999280
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3407443404
/workspace/coverage/default/5.sram_ctrl_max_throughput.2480029655
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1859080849
/workspace/coverage/default/5.sram_ctrl_mem_walk.2235872250
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1733231642
/workspace/coverage/default/5.sram_ctrl_partial_access.2543865044
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3425096286
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2410183461
/workspace/coverage/default/5.sram_ctrl_regwen.3391535251
/workspace/coverage/default/5.sram_ctrl_smoke.3523900203
/workspace/coverage/default/5.sram_ctrl_stress_all.250845175
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3193721411
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3931108375
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1792572402
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.634654922
/workspace/coverage/default/6.sram_ctrl_alert_test.324095712
/workspace/coverage/default/6.sram_ctrl_bijection.2684103678
/workspace/coverage/default/6.sram_ctrl_executable.3555658079
/workspace/coverage/default/6.sram_ctrl_lc_escalation.595742345
/workspace/coverage/default/6.sram_ctrl_max_throughput.1460635731
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3628181811
/workspace/coverage/default/6.sram_ctrl_mem_walk.653053738
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3101085464
/workspace/coverage/default/6.sram_ctrl_partial_access.1236947799
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2884486255
/workspace/coverage/default/6.sram_ctrl_ram_cfg.4156012298
/workspace/coverage/default/6.sram_ctrl_regwen.2355299860
/workspace/coverage/default/6.sram_ctrl_smoke.1841447344
/workspace/coverage/default/6.sram_ctrl_stress_all.2557593210
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1427147057
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1555334955
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.836513353
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2125699168
/workspace/coverage/default/7.sram_ctrl_alert_test.3224694692
/workspace/coverage/default/7.sram_ctrl_bijection.3628564451
/workspace/coverage/default/7.sram_ctrl_executable.65739559
/workspace/coverage/default/7.sram_ctrl_lc_escalation.4058164557
/workspace/coverage/default/7.sram_ctrl_max_throughput.3637545235
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3823343535
/workspace/coverage/default/7.sram_ctrl_mem_walk.4099294067
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2332371915
/workspace/coverage/default/7.sram_ctrl_partial_access.2581202723
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1476404329
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3571493613
/workspace/coverage/default/7.sram_ctrl_regwen.2348590933
/workspace/coverage/default/7.sram_ctrl_smoke.3100168544
/workspace/coverage/default/7.sram_ctrl_stress_all.1350311836
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1858378863
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3688397433
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2035945372
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2741943389
/workspace/coverage/default/8.sram_ctrl_alert_test.598818398
/workspace/coverage/default/8.sram_ctrl_bijection.2934849852
/workspace/coverage/default/8.sram_ctrl_executable.1361456627
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1546877741
/workspace/coverage/default/8.sram_ctrl_max_throughput.3183771022
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1997827307
/workspace/coverage/default/8.sram_ctrl_mem_walk.1947106666
/workspace/coverage/default/8.sram_ctrl_multiple_keys.660035081
/workspace/coverage/default/8.sram_ctrl_partial_access.2194139055
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.4083951510
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3640810888
/workspace/coverage/default/8.sram_ctrl_regwen.1564062857
/workspace/coverage/default/8.sram_ctrl_smoke.447442630
/workspace/coverage/default/8.sram_ctrl_stress_all.2468374572
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.959819199
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1119143570
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.223672036
/workspace/coverage/default/9.sram_ctrl_alert_test.789012046
/workspace/coverage/default/9.sram_ctrl_bijection.2170611492
/workspace/coverage/default/9.sram_ctrl_executable.314227479
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2559316018
/workspace/coverage/default/9.sram_ctrl_max_throughput.383727039
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2404799988
/workspace/coverage/default/9.sram_ctrl_mem_walk.1051007509
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1338946869
/workspace/coverage/default/9.sram_ctrl_partial_access.2021996835
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.644867532
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1154784897
/workspace/coverage/default/9.sram_ctrl_regwen.3621400733
/workspace/coverage/default/9.sram_ctrl_smoke.2892914844
/workspace/coverage/default/9.sram_ctrl_stress_all.2561168188
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.4107735283
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3838418539
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3200527175



Total test records in report: 1037
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/22.sram_ctrl_stress_all.795886681 Aug 10 05:31:31 PM PDT 24 Aug 10 06:03:59 PM PDT 24 69177030224 ps
T2 /workspace/coverage/default/40.sram_ctrl_bijection.1846695852 Aug 10 05:33:36 PM PDT 24 Aug 10 06:20:08 PM PDT 24 113914075804 ps
T3 /workspace/coverage/default/1.sram_ctrl_regwen.2358799260 Aug 10 05:30:12 PM PDT 24 Aug 10 05:50:36 PM PDT 24 10655205453 ps
T4 /workspace/coverage/default/6.sram_ctrl_lc_escalation.595742345 Aug 10 05:30:25 PM PDT 24 Aug 10 05:31:41 PM PDT 24 25206688344 ps
T6 /workspace/coverage/default/38.sram_ctrl_lc_escalation.3103141227 Aug 10 05:33:24 PM PDT 24 Aug 10 05:33:54 PM PDT 24 4560180224 ps
T7 /workspace/coverage/default/14.sram_ctrl_ram_cfg.151542323 Aug 10 05:30:44 PM PDT 24 Aug 10 05:30:48 PM PDT 24 3743391681 ps
T8 /workspace/coverage/default/21.sram_ctrl_stress_all.592418640 Aug 10 05:31:17 PM PDT 24 Aug 10 06:45:45 PM PDT 24 258780709753 ps
T9 /workspace/coverage/default/17.sram_ctrl_max_throughput.1363724315 Aug 10 05:30:55 PM PDT 24 Aug 10 05:31:51 PM PDT 24 1546456942 ps
T5 /workspace/coverage/default/37.sram_ctrl_mem_walk.804055152 Aug 10 05:33:11 PM PDT 24 Aug 10 05:35:26 PM PDT 24 2037408423 ps
T10 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.743645480 Aug 10 05:33:10 PM PDT 24 Aug 10 05:36:30 PM PDT 24 2889541730 ps
T34 /workspace/coverage/default/30.sram_ctrl_bijection.303458455 Aug 10 05:32:15 PM PDT 24 Aug 10 05:52:20 PM PDT 24 300560130990 ps
T18 /workspace/coverage/default/23.sram_ctrl_stress_all.1447199218 Aug 10 05:31:28 PM PDT 24 Aug 10 07:12:18 PM PDT 24 37867133932 ps
T37 /workspace/coverage/default/46.sram_ctrl_lc_escalation.3724243453 Aug 10 05:34:37 PM PDT 24 Aug 10 05:35:12 PM PDT 24 11066420937 ps
T38 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.203842023 Aug 10 05:30:33 PM PDT 24 Aug 10 05:31:48 PM PDT 24 754163592 ps
T35 /workspace/coverage/default/49.sram_ctrl_regwen.3957095644 Aug 10 05:35:08 PM PDT 24 Aug 10 05:57:15 PM PDT 24 50414579472 ps
T23 /workspace/coverage/default/0.sram_ctrl_ram_cfg.3084663297 Aug 10 05:30:16 PM PDT 24 Aug 10 05:30:19 PM PDT 24 357105447 ps
T65 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.1421092987 Aug 10 05:34:00 PM PDT 24 Aug 10 05:35:13 PM PDT 24 4154072297 ps
T36 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.1708632280 Aug 10 05:33:24 PM PDT 24 Aug 10 05:36:10 PM PDT 24 11070555575 ps
T50 /workspace/coverage/default/34.sram_ctrl_max_throughput.206208026 Aug 10 05:32:42 PM PDT 24 Aug 10 05:33:04 PM PDT 24 3042904448 ps
T51 /workspace/coverage/default/32.sram_ctrl_mem_walk.3477083468 Aug 10 05:32:33 PM PDT 24 Aug 10 05:36:40 PM PDT 24 3942493642 ps
T52 /workspace/coverage/default/39.sram_ctrl_multiple_keys.101325231 Aug 10 05:33:31 PM PDT 24 Aug 10 05:37:07 PM PDT 24 1323653092 ps
T17 /workspace/coverage/default/0.sram_ctrl_stress_all.183509607 Aug 10 05:30:12 PM PDT 24 Aug 10 06:50:52 PM PDT 24 191470430115 ps
T24 /workspace/coverage/default/20.sram_ctrl_ram_cfg.1222301394 Aug 10 05:31:15 PM PDT 24 Aug 10 05:31:18 PM PDT 24 1345451497 ps
T53 /workspace/coverage/default/1.sram_ctrl_max_throughput.1163978094 Aug 10 05:30:15 PM PDT 24 Aug 10 05:30:25 PM PDT 24 4857383829 ps
T54 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.1147525781 Aug 10 05:32:08 PM PDT 24 Aug 10 05:33:12 PM PDT 24 4665599020 ps
T55 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.2761732214 Aug 10 05:30:46 PM PDT 24 Aug 10 05:37:31 PM PDT 24 103767849087 ps
T56 /workspace/coverage/default/19.sram_ctrl_lc_escalation.4118389717 Aug 10 05:31:04 PM PDT 24 Aug 10 05:32:05 PM PDT 24 43781687844 ps
T144 /workspace/coverage/default/33.sram_ctrl_multiple_keys.1739144070 Aug 10 05:32:33 PM PDT 24 Aug 10 05:47:32 PM PDT 24 100138377533 ps
T90 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.3408642044 Aug 10 05:30:16 PM PDT 24 Aug 10 05:32:26 PM PDT 24 1664472937 ps
T140 /workspace/coverage/default/1.sram_ctrl_executable.1138790258 Aug 10 05:30:12 PM PDT 24 Aug 10 05:37:22 PM PDT 24 4236838088 ps
T11 /workspace/coverage/default/42.sram_ctrl_alert_test.2423502539 Aug 10 05:34:01 PM PDT 24 Aug 10 05:34:02 PM PDT 24 17859101 ps
T104 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.644867532 Aug 10 05:30:37 PM PDT 24 Aug 10 05:35:16 PM PDT 24 91136158620 ps
T141 /workspace/coverage/default/48.sram_ctrl_regwen.3700349876 Aug 10 05:35:04 PM PDT 24 Aug 10 05:39:10 PM PDT 24 35538745586 ps
T135 /workspace/coverage/default/25.sram_ctrl_executable.1600620644 Aug 10 05:31:45 PM PDT 24 Aug 10 05:53:22 PM PDT 24 37855545249 ps
T145 /workspace/coverage/default/47.sram_ctrl_max_throughput.3464448583 Aug 10 05:34:46 PM PDT 24 Aug 10 05:34:52 PM PDT 24 2652872463 ps
T41 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.1490268171 Aug 10 05:30:12 PM PDT 24 Aug 10 05:31:33 PM PDT 24 5568750543 ps
T39 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.1964446598 Aug 10 05:34:29 PM PDT 24 Aug 10 05:36:25 PM PDT 24 6042122872 ps
T151 /workspace/coverage/default/27.sram_ctrl_smoke.1576137017 Aug 10 05:31:50 PM PDT 24 Aug 10 05:32:08 PM PDT 24 8525938719 ps
T150 /workspace/coverage/default/48.sram_ctrl_max_throughput.1081918346 Aug 10 05:34:58 PM PDT 24 Aug 10 05:35:07 PM PDT 24 2803462493 ps
T146 /workspace/coverage/default/26.sram_ctrl_multiple_keys.744768675 Aug 10 05:31:42 PM PDT 24 Aug 10 05:35:58 PM PDT 24 8011307472 ps
T152 /workspace/coverage/default/3.sram_ctrl_mem_walk.2631628471 Aug 10 05:30:23 PM PDT 24 Aug 10 05:32:38 PM PDT 24 8236335393 ps
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T14 /workspace/coverage/default/4.sram_ctrl_sec_cm.1267282540 Aug 10 05:30:18 PM PDT 24 Aug 10 05:30:22 PM PDT 24 823230635 ps
T27 /workspace/coverage/default/19.sram_ctrl_stress_all.2725303850 Aug 10 05:31:10 PM PDT 24 Aug 10 06:26:20 PM PDT 24 99424782373 ps
T20 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1321378542 Aug 10 05:30:13 PM PDT 24 Aug 10 05:30:38 PM PDT 24 998965000 ps
T28 /workspace/coverage/default/40.sram_ctrl_multiple_keys.816807324 Aug 10 05:33:37 PM PDT 24 Aug 10 05:36:52 PM PDT 24 14142033111 ps
T29 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.1861320264 Aug 10 05:30:13 PM PDT 24 Aug 10 05:35:10 PM PDT 24 9510152740 ps
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T31 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.2850646534 Aug 10 05:32:34 PM PDT 24 Aug 10 05:36:40 PM PDT 24 5029500125 ps
T32 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.3320581498 Aug 10 05:34:44 PM PDT 24 Aug 10 05:36:14 PM PDT 24 3358937005 ps
T33 /workspace/coverage/default/38.sram_ctrl_stress_all.3342595132 Aug 10 05:33:25 PM PDT 24 Aug 10 06:09:44 PM PDT 24 42190936674 ps
T74 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3384215184 Aug 10 05:32:00 PM PDT 24 Aug 10 05:40:03 PM PDT 24 81482608648 ps
T75 /workspace/coverage/default/28.sram_ctrl_partial_access.1586829751 Aug 10 05:31:57 PM PDT 24 Aug 10 05:32:41 PM PDT 24 1154234827 ps
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T161 /workspace/coverage/default/4.sram_ctrl_partial_access.1562016234 Aug 10 05:30:18 PM PDT 24 Aug 10 05:31:21 PM PDT 24 802578266 ps
T162 /workspace/coverage/default/49.sram_ctrl_max_throughput.438256352 Aug 10 05:35:09 PM PDT 24 Aug 10 05:35:16 PM PDT 24 669564412 ps
T163 /workspace/coverage/default/20.sram_ctrl_multiple_keys.675278194 Aug 10 05:31:10 PM PDT 24 Aug 10 05:49:15 PM PDT 24 16585047199 ps
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T12 /workspace/coverage/default/22.sram_ctrl_alert_test.1058555408 Aug 10 05:31:28 PM PDT 24 Aug 10 05:31:29 PM PDT 24 47280278 ps
T19 /workspace/coverage/default/42.sram_ctrl_regwen.2570451888 Aug 10 05:33:59 PM PDT 24 Aug 10 05:42:08 PM PDT 24 8675846942 ps
T149 /workspace/coverage/default/39.sram_ctrl_regwen.3936792626 Aug 10 05:33:27 PM PDT 24 Aug 10 06:03:18 PM PDT 24 48176180891 ps
T22 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.2872407440 Aug 10 05:33:53 PM PDT 24 Aug 10 05:34:16 PM PDT 24 3326101897 ps
T164 /workspace/coverage/default/37.sram_ctrl_max_throughput.767855950 Aug 10 05:33:10 PM PDT 24 Aug 10 05:35:17 PM PDT 24 803532535 ps
T165 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.757582936 Aug 10 05:32:09 PM PDT 24 Aug 10 05:32:22 PM PDT 24 2778447870 ps
T13 /workspace/coverage/default/39.sram_ctrl_alert_test.3327837967 Aug 10 05:33:35 PM PDT 24 Aug 10 05:33:36 PM PDT 24 40351005 ps
T166 /workspace/coverage/default/33.sram_ctrl_alert_test.604050131 Aug 10 05:32:40 PM PDT 24 Aug 10 05:32:41 PM PDT 24 16899823 ps
T106 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.109529365 Aug 10 05:31:18 PM PDT 24 Aug 10 05:34:04 PM PDT 24 14421996881 ps
T47 /workspace/coverage/default/7.sram_ctrl_mem_walk.4099294067 Aug 10 05:30:26 PM PDT 24 Aug 10 05:32:59 PM PDT 24 27606023337 ps
T167 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.191431990 Aug 10 05:31:28 PM PDT 24 Aug 10 06:02:01 PM PDT 24 80329833755 ps
T107 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.3321413562 Aug 10 05:31:49 PM PDT 24 Aug 10 05:40:31 PM PDT 24 167982549504 ps
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T168 /workspace/coverage/default/19.sram_ctrl_bijection.3731042236 Aug 10 05:31:03 PM PDT 24 Aug 10 06:12:54 PM PDT 24 423216856021 ps
T169 /workspace/coverage/default/7.sram_ctrl_executable.65739559 Aug 10 05:30:27 PM PDT 24 Aug 10 05:45:33 PM PDT 24 20596240471 ps
T148 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.3503057525 Aug 10 05:31:34 PM PDT 24 Aug 10 05:38:52 PM PDT 24 24640745105 ps
T108 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.324938011 Aug 10 05:30:22 PM PDT 24 Aug 10 05:34:33 PM PDT 24 45438501635 ps
T170 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.1958897032 Aug 10 05:32:23 PM PDT 24 Aug 10 05:34:25 PM PDT 24 815137820 ps
T43 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.673556129 Aug 10 05:30:29 PM PDT 24 Aug 10 05:30:52 PM PDT 24 2800973768 ps
T117 /workspace/coverage/default/35.sram_ctrl_multiple_keys.3568782726 Aug 10 05:32:46 PM PDT 24 Aug 10 05:44:16 PM PDT 24 29233882946 ps
T118 /workspace/coverage/default/23.sram_ctrl_bijection.670213603 Aug 10 05:31:27 PM PDT 24 Aug 10 05:42:58 PM PDT 24 9647671079 ps
T119 /workspace/coverage/default/23.sram_ctrl_ram_cfg.3470269471 Aug 10 05:31:28 PM PDT 24 Aug 10 05:31:32 PM PDT 24 1362967808 ps
T120 /workspace/coverage/default/31.sram_ctrl_bijection.2428063721 Aug 10 05:32:25 PM PDT 24 Aug 10 05:52:36 PM PDT 24 64261394051 ps
T121 /workspace/coverage/default/38.sram_ctrl_regwen.1455283299 Aug 10 05:33:30 PM PDT 24 Aug 10 05:46:09 PM PDT 24 46760788389 ps
T122 /workspace/coverage/default/20.sram_ctrl_regwen.1322831406 Aug 10 05:31:12 PM PDT 24 Aug 10 05:32:45 PM PDT 24 16140015802 ps
T123 /workspace/coverage/default/5.sram_ctrl_partial_access.2543865044 Aug 10 05:30:21 PM PDT 24 Aug 10 05:31:39 PM PDT 24 834666813 ps
T124 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3589483475 Aug 10 05:33:59 PM PDT 24 Aug 10 05:41:03 PM PDT 24 90847505200 ps
T48 /workspace/coverage/default/20.sram_ctrl_mem_walk.4245399072 Aug 10 05:31:10 PM PDT 24 Aug 10 05:36:58 PM PDT 24 18327175309 ps
T171 /workspace/coverage/default/22.sram_ctrl_ram_cfg.1134207229 Aug 10 05:31:21 PM PDT 24 Aug 10 05:31:25 PM PDT 24 704422347 ps
T172 /workspace/coverage/default/4.sram_ctrl_smoke.3244248991 Aug 10 05:30:18 PM PDT 24 Aug 10 05:30:41 PM PDT 24 5307518104 ps
T173 /workspace/coverage/default/3.sram_ctrl_bijection.3487144671 Aug 10 05:30:18 PM PDT 24 Aug 10 05:40:10 PM PDT 24 177155224204 ps
T174 /workspace/coverage/default/31.sram_ctrl_partial_access.3405936924 Aug 10 05:32:23 PM PDT 24 Aug 10 05:32:46 PM PDT 24 1639030637 ps
T69 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3046109549 Aug 10 05:30:17 PM PDT 24 Aug 10 05:30:29 PM PDT 24 1419556830 ps
T175 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3390134183 Aug 10 05:30:20 PM PDT 24 Aug 10 05:39:11 PM PDT 24 122336975467 ps
T176 /workspace/coverage/default/48.sram_ctrl_lc_escalation.137705591 Aug 10 05:35:04 PM PDT 24 Aug 10 05:37:14 PM PDT 24 76385276729 ps
T177 /workspace/coverage/default/10.sram_ctrl_mem_walk.2851799710 Aug 10 05:30:45 PM PDT 24 Aug 10 05:34:58 PM PDT 24 24611857378 ps
T16 /workspace/coverage/default/1.sram_ctrl_sec_cm.429452045 Aug 10 05:30:12 PM PDT 24 Aug 10 05:30:17 PM PDT 24 874388578 ps
T178 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.4290069676 Aug 10 05:34:20 PM PDT 24 Aug 10 05:38:59 PM PDT 24 4334719420 ps
T179 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.4042265758 Aug 10 05:31:35 PM PDT 24 Aug 10 05:36:40 PM PDT 24 4679990535 ps
T180 /workspace/coverage/default/8.sram_ctrl_bijection.2934849852 Aug 10 05:30:30 PM PDT 24 Aug 10 05:56:53 PM PDT 24 22217412220 ps
T181 /workspace/coverage/default/10.sram_ctrl_lc_escalation.3353772693 Aug 10 05:30:38 PM PDT 24 Aug 10 05:32:06 PM PDT 24 70261496551 ps
T182 /workspace/coverage/default/22.sram_ctrl_executable.3687718844 Aug 10 05:31:19 PM PDT 24 Aug 10 05:42:57 PM PDT 24 54281822271 ps
T183 /workspace/coverage/default/26.sram_ctrl_lc_escalation.1332702550 Aug 10 05:31:49 PM PDT 24 Aug 10 05:32:45 PM PDT 24 9474232974 ps
T184 /workspace/coverage/default/24.sram_ctrl_multiple_keys.267011549 Aug 10 05:31:33 PM PDT 24 Aug 10 05:55:12 PM PDT 24 7041054016 ps
T185 /workspace/coverage/default/40.sram_ctrl_smoke.149812799 Aug 10 05:33:33 PM PDT 24 Aug 10 05:33:49 PM PDT 24 516854320 ps
T186 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.4030819470 Aug 10 05:30:51 PM PDT 24 Aug 10 05:36:49 PM PDT 24 25600773289 ps
T187 /workspace/coverage/default/33.sram_ctrl_partial_access.47786204 Aug 10 05:32:35 PM PDT 24 Aug 10 05:33:50 PM PDT 24 2002036739 ps
T188 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.3136279022 Aug 10 05:33:34 PM PDT 24 Aug 10 05:35:36 PM PDT 24 3188275234 ps
T189 /workspace/coverage/default/46.sram_ctrl_smoke.193755177 Aug 10 05:34:30 PM PDT 24 Aug 10 05:34:52 PM PDT 24 1520561183 ps
T190 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.699755648 Aug 10 05:30:13 PM PDT 24 Aug 10 05:36:40 PM PDT 24 3397969440 ps
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T192 /workspace/coverage/default/10.sram_ctrl_regwen.3577233307 Aug 10 05:30:38 PM PDT 24 Aug 10 05:35:21 PM PDT 24 18654529306 ps
T193 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.4258087714 Aug 10 05:34:58 PM PDT 24 Aug 10 05:44:08 PM PDT 24 39720881000 ps
T194 /workspace/coverage/default/21.sram_ctrl_bijection.1640507661 Aug 10 05:31:12 PM PDT 24 Aug 10 06:10:00 PM PDT 24 628308952639 ps
T195 /workspace/coverage/default/49.sram_ctrl_stress_all.3283038586 Aug 10 05:35:09 PM PDT 24 Aug 10 06:41:01 PM PDT 24 50069731441 ps
T196 /workspace/coverage/default/24.sram_ctrl_executable.4023051539 Aug 10 05:31:35 PM PDT 24 Aug 10 05:50:14 PM PDT 24 144851913526 ps
T138 /workspace/coverage/default/4.sram_ctrl_stress_all.959916246 Aug 10 05:30:22 PM PDT 24 Aug 10 07:13:55 PM PDT 24 703552656566 ps
T197 /workspace/coverage/default/48.sram_ctrl_stress_pipeline.1069669093 Aug 10 05:34:58 PM PDT 24 Aug 10 05:37:42 PM PDT 24 11174806335 ps
T198 /workspace/coverage/default/19.sram_ctrl_partial_access.3544735563 Aug 10 05:31:01 PM PDT 24 Aug 10 05:31:19 PM PDT 24 872530833 ps
T199 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2884486255 Aug 10 05:30:25 PM PDT 24 Aug 10 05:41:26 PM PDT 24 28976668554 ps
T200 /workspace/coverage/default/30.sram_ctrl_smoke.3330482323 Aug 10 05:32:05 PM PDT 24 Aug 10 05:32:42 PM PDT 24 421608831 ps
T201 /workspace/coverage/default/49.sram_ctrl_partial_access.266575707 Aug 10 05:35:07 PM PDT 24 Aug 10 05:35:32 PM PDT 24 2607350365 ps
T202 /workspace/coverage/default/43.sram_ctrl_alert_test.1059420494 Aug 10 05:34:13 PM PDT 24 Aug 10 05:34:13 PM PDT 24 28721724 ps
T203 /workspace/coverage/default/32.sram_ctrl_max_throughput.3626072294 Aug 10 05:32:35 PM PDT 24 Aug 10 05:32:53 PM PDT 24 716381787 ps
T204 /workspace/coverage/default/22.sram_ctrl_smoke.199859457 Aug 10 05:31:19 PM PDT 24 Aug 10 05:32:43 PM PDT 24 4717589375 ps
T205 /workspace/coverage/default/13.sram_ctrl_executable.1207515062 Aug 10 05:30:44 PM PDT 24 Aug 10 05:54:46 PM PDT 24 19649768362 ps
T206 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.1809850927 Aug 10 05:33:30 PM PDT 24 Aug 10 05:39:27 PM PDT 24 43037093271 ps
T207 /workspace/coverage/default/41.sram_ctrl_smoke.2512710519 Aug 10 05:33:44 PM PDT 24 Aug 10 05:33:48 PM PDT 24 686475176 ps
T208 /workspace/coverage/default/0.sram_ctrl_alert_test.460091068 Aug 10 05:30:12 PM PDT 24 Aug 10 05:30:13 PM PDT 24 19661878 ps
T209 /workspace/coverage/default/38.sram_ctrl_bijection.259517638 Aug 10 05:33:32 PM PDT 24 Aug 10 05:42:24 PM PDT 24 24294688856 ps
T210 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.3912998166 Aug 10 05:32:07 PM PDT 24 Aug 10 05:34:54 PM PDT 24 4512970876 ps
T211 /workspace/coverage/default/26.sram_ctrl_partial_access.2311507714 Aug 10 05:31:41 PM PDT 24 Aug 10 05:33:21 PM PDT 24 6444302030 ps
T139 /workspace/coverage/default/16.sram_ctrl_executable.3451331323 Aug 10 05:30:49 PM PDT 24 Aug 10 05:39:22 PM PDT 24 8963249118 ps
T212 /workspace/coverage/default/9.sram_ctrl_alert_test.789012046 Aug 10 05:30:38 PM PDT 24 Aug 10 05:30:39 PM PDT 24 15524635 ps
T213 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.3638112127 Aug 10 05:30:58 PM PDT 24 Aug 10 05:54:53 PM PDT 24 14842478747 ps
T214 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.223672036 Aug 10 05:30:43 PM PDT 24 Aug 10 05:43:47 PM PDT 24 18304736088 ps
T215 /workspace/coverage/default/2.sram_ctrl_alert_test.2387032355 Aug 10 05:30:20 PM PDT 24 Aug 10 05:30:21 PM PDT 24 53823642 ps
T216 /workspace/coverage/default/31.sram_ctrl_lc_escalation.3549178462 Aug 10 05:32:24 PM PDT 24 Aug 10 05:33:43 PM PDT 24 13531252268 ps
T217 /workspace/coverage/default/43.sram_ctrl_stress_all.1130765625 Aug 10 05:34:10 PM PDT 24 Aug 10 05:51:34 PM PDT 24 45822257136 ps
T218 /workspace/coverage/default/24.sram_ctrl_lc_escalation.2485477644 Aug 10 05:31:35 PM PDT 24 Aug 10 05:33:20 PM PDT 24 81440962776 ps
T219 /workspace/coverage/default/12.sram_ctrl_executable.404212402 Aug 10 05:30:50 PM PDT 24 Aug 10 05:38:36 PM PDT 24 18614785118 ps
T220 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2973051262 Aug 10 05:30:15 PM PDT 24 Aug 10 05:33:46 PM PDT 24 7596619526 ps
T221 /workspace/coverage/default/29.sram_ctrl_alert_test.4106893563 Aug 10 05:32:09 PM PDT 24 Aug 10 05:32:09 PM PDT 24 31161656 ps
T222 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.1922884814 Aug 10 05:31:16 PM PDT 24 Aug 10 05:31:50 PM PDT 24 1382854157 ps
T223 /workspace/coverage/default/23.sram_ctrl_smoke.2169728977 Aug 10 05:31:27 PM PDT 24 Aug 10 05:32:15 PM PDT 24 418327884 ps
T224 /workspace/coverage/default/28.sram_ctrl_alert_test.3561727166 Aug 10 05:32:06 PM PDT 24 Aug 10 05:32:07 PM PDT 24 20418854 ps
T225 /workspace/coverage/default/1.sram_ctrl_lc_escalation.2936735923 Aug 10 05:30:12 PM PDT 24 Aug 10 05:30:39 PM PDT 24 13665747542 ps
T49 /workspace/coverage/default/19.sram_ctrl_mem_walk.705676554 Aug 10 05:31:02 PM PDT 24 Aug 10 05:33:35 PM PDT 24 2634833630 ps
T226 /workspace/coverage/default/45.sram_ctrl_stress_all.3834655430 Aug 10 05:34:32 PM PDT 24 Aug 10 06:12:43 PM PDT 24 36433414152 ps
T227 /workspace/coverage/default/11.sram_ctrl_bijection.3297572353 Aug 10 05:30:35 PM PDT 24 Aug 10 05:45:54 PM PDT 24 217839686673 ps
T57 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.341102984 Aug 10 05:31:30 PM PDT 24 Aug 10 05:31:57 PM PDT 24 931975603 ps
T228 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.1875515427 Aug 10 05:31:20 PM PDT 24 Aug 10 05:42:43 PM PDT 24 21797465948 ps
T70 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.3600370049 Aug 10 05:31:17 PM PDT 24 Aug 10 05:31:29 PM PDT 24 225719136 ps
T229 /workspace/coverage/default/38.sram_ctrl_multiple_keys.1895808368 Aug 10 05:33:22 PM PDT 24 Aug 10 05:36:27 PM PDT 24 15213354663 ps
T230 /workspace/coverage/default/45.sram_ctrl_partial_access.1421333374 Aug 10 05:34:29 PM PDT 24 Aug 10 05:35:02 PM PDT 24 1716285194 ps
T136 /workspace/coverage/default/28.sram_ctrl_regwen.847267829 Aug 10 05:31:59 PM PDT 24 Aug 10 05:47:58 PM PDT 24 5865353988 ps
T231 /workspace/coverage/default/34.sram_ctrl_alert_test.344790064 Aug 10 05:32:42 PM PDT 24 Aug 10 05:32:42 PM PDT 24 45121454 ps
T137 /workspace/coverage/default/36.sram_ctrl_stress_all.1340549232 Aug 10 05:33:00 PM PDT 24 Aug 10 06:12:38 PM PDT 24 66782512301 ps
T232 /workspace/coverage/default/0.sram_ctrl_executable.2579445631 Aug 10 05:30:11 PM PDT 24 Aug 10 05:35:24 PM PDT 24 90323157420 ps
T233 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.983392479 Aug 10 05:30:50 PM PDT 24 Aug 10 05:37:30 PM PDT 24 5384734685 ps
T234 /workspace/coverage/default/14.sram_ctrl_smoke.1234212635 Aug 10 05:30:43 PM PDT 24 Aug 10 05:30:52 PM PDT 24 874770720 ps
T235 /workspace/coverage/default/45.sram_ctrl_executable.3113753080 Aug 10 05:34:29 PM PDT 24 Aug 10 05:58:33 PM PDT 24 15972224738 ps
T71 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1130405127 Aug 10 05:31:12 PM PDT 24 Aug 10 05:31:22 PM PDT 24 287154199 ps
T236 /workspace/coverage/default/26.sram_ctrl_stress_all.2852540745 Aug 10 05:31:51 PM PDT 24 Aug 10 07:03:17 PM PDT 24 157776688470 ps
T237 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.3148199084 Aug 10 05:30:19 PM PDT 24 Aug 10 05:30:51 PM PDT 24 4495164084 ps
T238 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.2355895843 Aug 10 05:32:31 PM PDT 24 Aug 10 05:34:48 PM PDT 24 803436115 ps
T239 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2540663596 Aug 10 05:32:32 PM PDT 24 Aug 10 05:32:56 PM PDT 24 732802916 ps
T240 /workspace/coverage/default/12.sram_ctrl_alert_test.3671342031 Aug 10 05:30:47 PM PDT 24 Aug 10 05:30:47 PM PDT 24 23087753 ps
T241 /workspace/coverage/default/34.sram_ctrl_ram_cfg.312397226 Aug 10 05:32:42 PM PDT 24 Aug 10 05:32:47 PM PDT 24 5561531477 ps
T242 /workspace/coverage/default/17.sram_ctrl_stress_all.591549242 Aug 10 05:31:01 PM PDT 24 Aug 10 06:16:00 PM PDT 24 200719411917 ps
T243 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2070531111 Aug 10 05:34:10 PM PDT 24 Aug 10 05:34:25 PM PDT 24 2903179008 ps
T244 /workspace/coverage/default/22.sram_ctrl_max_throughput.2232518490 Aug 10 05:31:20 PM PDT 24 Aug 10 05:31:55 PM PDT 24 738927303 ps
T245 /workspace/coverage/default/46.sram_ctrl_executable.4087365560 Aug 10 05:34:38 PM PDT 24 Aug 10 05:49:41 PM PDT 24 18684787202 ps
T246 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.1618125941 Aug 10 05:30:20 PM PDT 24 Aug 10 05:43:17 PM PDT 24 15667717975 ps
T247 /workspace/coverage/default/17.sram_ctrl_regwen.691557888 Aug 10 05:31:02 PM PDT 24 Aug 10 05:53:05 PM PDT 24 79980337885 ps
T248 /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.3002184419 Aug 10 05:31:28 PM PDT 24 Aug 10 05:35:38 PM PDT 24 41599024499 ps
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