Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total tests in report: 1037
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
71.55 71.55 92.23 92.23 70.73 70.73 86.02 86.02 33.33 33.33 82.94 82.94 93.57 93.57 42.05 42.05 /workspace/coverage/default/35.sram_ctrl_lc_escalation.2463568551
86.61 15.06 97.47 5.23 79.03 8.29 86.71 0.69 100.00 66.67 91.47 8.53 95.47 1.90 56.12 14.08 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1018838134
90.93 4.33 98.28 0.82 87.20 8.18 96.90 10.19 100.00 0.00 93.60 2.13 95.47 0.00 65.08 8.96 /workspace/coverage/default/38.sram_ctrl_regwen.3503744817
93.47 2.54 98.28 0.00 87.20 0.00 97.66 0.76 100.00 0.00 93.60 0.00 95.47 0.00 82.08 17.00 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3526775826
94.40 0.93 98.45 0.16 88.03 0.83 97.87 0.21 100.00 0.00 94.31 0.71 95.47 0.00 86.65 4.57 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2483796995
95.10 0.70 98.61 0.16 89.81 1.78 98.62 0.76 100.00 0.00 95.02 0.71 96.05 0.58 87.57 0.91 /workspace/coverage/default/1.sram_ctrl_sec_cm.3131417522
95.74 0.64 98.86 0.25 90.52 0.71 98.69 0.07 100.00 0.00 95.97 0.95 96.93 0.88 89.21 1.65 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.1710860662
96.30 0.56 99.10 0.25 90.64 0.12 98.69 0.00 100.00 0.00 96.21 0.24 96.93 0.00 92.50 3.29 /workspace/coverage/default/19.sram_ctrl_stress_all.1944258035
96.60 0.31 99.10 0.00 90.64 0.00 98.69 0.00 100.00 0.00 96.21 0.00 97.08 0.15 94.52 2.01 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.2072364566
96.79 0.18 99.10 0.00 90.64 0.00 98.69 0.00 100.00 0.00 96.21 0.00 97.08 0.00 95.80 1.28 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1536568981
96.96 0.18 99.10 0.00 90.64 0.00 98.76 0.07 100.00 0.00 96.21 0.00 98.25 1.17 95.80 0.00 /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1792201012
97.09 0.13 99.18 0.08 90.64 0.00 99.59 0.83 100.00 0.00 96.21 0.00 98.25 0.00 95.80 0.00 /workspace/coverage/default/1.sram_ctrl_ram_cfg.1557299092
97.20 0.10 99.18 0.00 90.64 0.00 99.59 0.00 100.00 0.00 96.21 0.00 98.98 0.73 95.80 0.00 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.252395656
97.29 0.09 99.18 0.00 91.00 0.36 99.66 0.07 100.00 0.00 96.21 0.00 98.98 0.00 95.98 0.18 /workspace/coverage/default/16.sram_ctrl_alert_test.1211466138
97.34 0.05 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 98.98 0.00 96.34 0.37 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.966179667
97.39 0.05 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 98.98 0.00 96.71 0.37 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1488415434
97.44 0.05 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 98.98 0.00 97.07 0.37 /workspace/coverage/default/23.sram_ctrl_stress_all.1776613608
97.47 0.03 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 98.98 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1724034807
97.49 0.03 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 98.98 0.00 97.44 0.18 /workspace/coverage/default/12.sram_ctrl_stress_all.3606841937
97.52 0.02 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.15 97.44 0.00 /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1609723947
97.52 0.01 99.18 0.00 91.00 0.00 99.72 0.07 100.00 0.00 96.21 0.00 99.12 0.00 97.44 0.00 /workspace/coverage/default/1.sram_ctrl_partial_access.2140328913

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.4292974408
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.4139868146
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3685459955
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2974825313
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2907958512
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1226561440
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3742850341
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.766126547
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1546577124
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2818198697
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2142622003
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2501921768
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1917223220
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3535943463
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1997153230
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3008392351
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.860086394
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.3288401740
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2273588561
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1154437351
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2048901488
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2271731855
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.4232042880
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2539184183
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2045994607
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.140009874
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.382882306
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.988318789
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2224002929
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1914156243
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3924880150
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.494525927
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1342124008
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1945976469
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1957993977
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1816623789
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1873896693
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2947258859
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3537396012
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.4267735661
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3808873091
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.4193721114
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2994759929
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2001721896
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1154503414
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3388595222
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1276530939
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.980648399
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2273511987
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3573331320
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.787765322
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.4286818022
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2042901043
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2042406957
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1812030654
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.242919071
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1333948780
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3957882428
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1144965776
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.4035096123
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2818640333
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.970845193
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1857922776
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1771362690
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3052073266
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1309210893
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1247911273
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3846063053
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3165167264
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1655950708
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.4136517600
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1930076251
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3008135213
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1316050436
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.4010497027
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.132686747
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3281622613
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1059014032
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1484100352
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3029523224
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3737247711
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.78209104
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2672248306
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1631744531
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.416323370
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3771942523
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.126275650
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1445609096
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2952419799
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3133643527
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3366722948
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2015948634
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.405020635
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.347135686
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2816138132
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2547004093
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.687133449
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.754642781
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3114525055
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3289056866
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.688431375
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2396091186
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2126481856
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1170400651
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1889440790
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3055712652
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.4087504243
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3973454100
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.650027725
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.820037395
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2067379769
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3191608485
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2526729022
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3078293183
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1886303711
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3919806069
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.776936155
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.428045403
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.180111210
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3593867115
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.4103204549
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.417739340
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.911144032
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2060554258
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.561688487
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2744134274
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3941463935
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3384217701
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3103822871
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.273051234
/workspace/coverage/default/0.sram_ctrl_alert_test.1654979942
/workspace/coverage/default/0.sram_ctrl_bijection.2381704837
/workspace/coverage/default/0.sram_ctrl_executable.1265353945
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2011818625
/workspace/coverage/default/0.sram_ctrl_max_throughput.2000921619
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3634543943
/workspace/coverage/default/0.sram_ctrl_mem_walk.3716402051
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2764961644
/workspace/coverage/default/0.sram_ctrl_partial_access.1825843002
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3824834019
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3228069710
/workspace/coverage/default/0.sram_ctrl_regwen.2270145255
/workspace/coverage/default/0.sram_ctrl_sec_cm.2815786881
/workspace/coverage/default/0.sram_ctrl_smoke.2936223629
/workspace/coverage/default/0.sram_ctrl_stress_all.2280077115
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2562370056
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.372634933
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.922429503
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1476354769
/workspace/coverage/default/1.sram_ctrl_alert_test.3733537909
/workspace/coverage/default/1.sram_ctrl_bijection.1726060439
/workspace/coverage/default/1.sram_ctrl_executable.449663524
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3065433267
/workspace/coverage/default/1.sram_ctrl_max_throughput.3307799130
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.4086158875
/workspace/coverage/default/1.sram_ctrl_mem_walk.1323902589
/workspace/coverage/default/1.sram_ctrl_multiple_keys.4013766907
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.4098434389
/workspace/coverage/default/1.sram_ctrl_regwen.2569269692
/workspace/coverage/default/1.sram_ctrl_smoke.765741949
/workspace/coverage/default/1.sram_ctrl_stress_all.1720043741
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.213129502
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.399743827
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2130015920
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2101043240
/workspace/coverage/default/10.sram_ctrl_alert_test.3159149815
/workspace/coverage/default/10.sram_ctrl_bijection.3903614751
/workspace/coverage/default/10.sram_ctrl_executable.2149110912
/workspace/coverage/default/10.sram_ctrl_lc_escalation.232575654
/workspace/coverage/default/10.sram_ctrl_max_throughput.412126830
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.4217701866
/workspace/coverage/default/10.sram_ctrl_mem_walk.4247923880
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2692319875
/workspace/coverage/default/10.sram_ctrl_partial_access.2442880099
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.4053386061
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1390012354
/workspace/coverage/default/10.sram_ctrl_regwen.666416704
/workspace/coverage/default/10.sram_ctrl_smoke.2144826950
/workspace/coverage/default/10.sram_ctrl_stress_all.125269010
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2738892260
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.403166387
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.32819672
/workspace/coverage/default/11.sram_ctrl_alert_test.3120405821
/workspace/coverage/default/11.sram_ctrl_bijection.4125324141
/workspace/coverage/default/11.sram_ctrl_executable.1103984824
/workspace/coverage/default/11.sram_ctrl_lc_escalation.4136849751
/workspace/coverage/default/11.sram_ctrl_max_throughput.214019584
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.329910587
/workspace/coverage/default/11.sram_ctrl_mem_walk.3799287387
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3433732309
/workspace/coverage/default/11.sram_ctrl_partial_access.3661436368
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1173421012
/workspace/coverage/default/11.sram_ctrl_regwen.399192090
/workspace/coverage/default/11.sram_ctrl_smoke.3271571653
/workspace/coverage/default/11.sram_ctrl_stress_all.4271619595
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.611653249
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.359087093
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3400557002
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3282008302
/workspace/coverage/default/12.sram_ctrl_alert_test.3751422403
/workspace/coverage/default/12.sram_ctrl_bijection.1841981719
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/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2632593420
/workspace/coverage/default/42.sram_ctrl_ram_cfg.3786113030
/workspace/coverage/default/42.sram_ctrl_regwen.1273836852
/workspace/coverage/default/42.sram_ctrl_smoke.2441913742
/workspace/coverage/default/42.sram_ctrl_stress_all.771108076
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1062922876
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.1889587590
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.198856055
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.1634320922
/workspace/coverage/default/43.sram_ctrl_alert_test.2655461708
/workspace/coverage/default/43.sram_ctrl_bijection.817665935
/workspace/coverage/default/43.sram_ctrl_executable.3458559046
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2645830776
/workspace/coverage/default/43.sram_ctrl_max_throughput.4039181584
/workspace/coverage/default/43.sram_ctrl_mem_walk.227728149
/workspace/coverage/default/43.sram_ctrl_multiple_keys.1530076451
/workspace/coverage/default/43.sram_ctrl_partial_access.3652616371
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1287780703
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2547325784
/workspace/coverage/default/43.sram_ctrl_regwen.3726045390
/workspace/coverage/default/43.sram_ctrl_smoke.1634320116
/workspace/coverage/default/43.sram_ctrl_stress_all.491286687
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3613550528
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.122524612
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.676021107
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.4196662502
/workspace/coverage/default/44.sram_ctrl_alert_test.1124910731
/workspace/coverage/default/44.sram_ctrl_bijection.3574856566
/workspace/coverage/default/44.sram_ctrl_executable.3372790091
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3056665887
/workspace/coverage/default/44.sram_ctrl_max_throughput.1676098379
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1840569167
/workspace/coverage/default/44.sram_ctrl_mem_walk.1767802272
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1151509245
/workspace/coverage/default/44.sram_ctrl_partial_access.3829707695
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1723809999
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3367457302
/workspace/coverage/default/44.sram_ctrl_regwen.2874994969
/workspace/coverage/default/44.sram_ctrl_smoke.4145826236
/workspace/coverage/default/44.sram_ctrl_stress_all.1453464299
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2702395514
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.4267158411
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2353136141
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3808534199
/workspace/coverage/default/45.sram_ctrl_alert_test.2585380779
/workspace/coverage/default/45.sram_ctrl_bijection.204485065
/workspace/coverage/default/45.sram_ctrl_executable.295239652
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3668093973
/workspace/coverage/default/45.sram_ctrl_max_throughput.1839773681
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2091196223
/workspace/coverage/default/45.sram_ctrl_mem_walk.2135313894
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3505464860
/workspace/coverage/default/45.sram_ctrl_partial_access.1584108235
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.61037605
/workspace/coverage/default/45.sram_ctrl_ram_cfg.909054012
/workspace/coverage/default/45.sram_ctrl_regwen.657687884
/workspace/coverage/default/45.sram_ctrl_smoke.356713977
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1026176057
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2046484387
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.503287072
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.265484242
/workspace/coverage/default/46.sram_ctrl_alert_test.4168955701
/workspace/coverage/default/46.sram_ctrl_bijection.904402631
/workspace/coverage/default/46.sram_ctrl_executable.355320849
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3897884640
/workspace/coverage/default/46.sram_ctrl_max_throughput.3344475527
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.473648845
/workspace/coverage/default/46.sram_ctrl_mem_walk.1668288917
/workspace/coverage/default/46.sram_ctrl_multiple_keys.326734565
/workspace/coverage/default/46.sram_ctrl_partial_access.678009729
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.4189469492
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1412401185
/workspace/coverage/default/46.sram_ctrl_regwen.3460828378
/workspace/coverage/default/46.sram_ctrl_smoke.1438244935
/workspace/coverage/default/46.sram_ctrl_stress_all.408195169
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.948714671
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2736385641
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3814216812
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3236601925
/workspace/coverage/default/47.sram_ctrl_alert_test.3526430246
/workspace/coverage/default/47.sram_ctrl_bijection.3131393312
/workspace/coverage/default/47.sram_ctrl_executable.2619028859
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2405648357
/workspace/coverage/default/47.sram_ctrl_max_throughput.358680717
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2601241456
/workspace/coverage/default/47.sram_ctrl_mem_walk.3851299780
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1072913708
/workspace/coverage/default/47.sram_ctrl_partial_access.274417145
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1367127260
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1463273314
/workspace/coverage/default/47.sram_ctrl_regwen.3883161904
/workspace/coverage/default/47.sram_ctrl_smoke.2796376463
/workspace/coverage/default/47.sram_ctrl_stress_all.1874283549
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3502016596
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2225134124
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4173258808
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1188044449
/workspace/coverage/default/48.sram_ctrl_alert_test.181783064
/workspace/coverage/default/48.sram_ctrl_bijection.2897452900
/workspace/coverage/default/48.sram_ctrl_executable.2676816485
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1433002030
/workspace/coverage/default/48.sram_ctrl_max_throughput.4014464854
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2809633160
/workspace/coverage/default/48.sram_ctrl_mem_walk.1298769758
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1752812812
/workspace/coverage/default/48.sram_ctrl_partial_access.2025151178
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3190491685
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2366092320
/workspace/coverage/default/48.sram_ctrl_regwen.210048416
/workspace/coverage/default/48.sram_ctrl_smoke.1091127945
/workspace/coverage/default/48.sram_ctrl_stress_all.2610821411
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.396709271
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1442316228
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1224123766
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.262603476
/workspace/coverage/default/49.sram_ctrl_alert_test.2469002856
/workspace/coverage/default/49.sram_ctrl_bijection.3236618448
/workspace/coverage/default/49.sram_ctrl_executable.3094449926
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1280901632
/workspace/coverage/default/49.sram_ctrl_max_throughput.3324294598
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.563768956
/workspace/coverage/default/49.sram_ctrl_mem_walk.620584851
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2756126260
/workspace/coverage/default/49.sram_ctrl_partial_access.1366061532
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1889083650
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2769952813
/workspace/coverage/default/49.sram_ctrl_regwen.4000563149
/workspace/coverage/default/49.sram_ctrl_smoke.941221960
/workspace/coverage/default/49.sram_ctrl_stress_all.1340743596
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1329034938
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3297362067
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.4044722288
/workspace/coverage/default/5.sram_ctrl_alert_test.2932057662
/workspace/coverage/default/5.sram_ctrl_bijection.2354443489
/workspace/coverage/default/5.sram_ctrl_executable.1856367806
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2516109636
/workspace/coverage/default/5.sram_ctrl_max_throughput.3205243319
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3447893274
/workspace/coverage/default/5.sram_ctrl_mem_walk.171561403
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2437536709
/workspace/coverage/default/5.sram_ctrl_partial_access.2505478129
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2218223448
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2319732684
/workspace/coverage/default/5.sram_ctrl_regwen.4021578372
/workspace/coverage/default/5.sram_ctrl_smoke.440023270
/workspace/coverage/default/5.sram_ctrl_stress_all.3203459629
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.735880442
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.195520912
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3107217968
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.4033673795
/workspace/coverage/default/6.sram_ctrl_alert_test.2068935272
/workspace/coverage/default/6.sram_ctrl_bijection.1844542043
/workspace/coverage/default/6.sram_ctrl_executable.3228985955
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2088571668
/workspace/coverage/default/6.sram_ctrl_max_throughput.2115462042
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1235088018
/workspace/coverage/default/6.sram_ctrl_mem_walk.823199265
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3419325508
/workspace/coverage/default/6.sram_ctrl_partial_access.2929005194
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2256532116
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3916888207
/workspace/coverage/default/6.sram_ctrl_regwen.1922232000
/workspace/coverage/default/6.sram_ctrl_smoke.1383767333
/workspace/coverage/default/6.sram_ctrl_stress_all.4148386049
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3693522710
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3873531249
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1484149351
/workspace/coverage/default/7.sram_ctrl_alert_test.1269404869
/workspace/coverage/default/7.sram_ctrl_bijection.1884095727
/workspace/coverage/default/7.sram_ctrl_executable.3857416590
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1457947601
/workspace/coverage/default/7.sram_ctrl_max_throughput.706299253
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2153050084
/workspace/coverage/default/7.sram_ctrl_mem_walk.1567193768
/workspace/coverage/default/7.sram_ctrl_multiple_keys.136364822
/workspace/coverage/default/7.sram_ctrl_partial_access.1237319392
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.746205855
/workspace/coverage/default/7.sram_ctrl_ram_cfg.858807768
/workspace/coverage/default/7.sram_ctrl_regwen.1513725393
/workspace/coverage/default/7.sram_ctrl_smoke.4117800465
/workspace/coverage/default/7.sram_ctrl_stress_all.2228047168
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3203067210
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3103743728
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1642076648
/workspace/coverage/default/8.sram_ctrl_alert_test.21303995
/workspace/coverage/default/8.sram_ctrl_bijection.2863211178
/workspace/coverage/default/8.sram_ctrl_executable.2846801119
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1283433741
/workspace/coverage/default/8.sram_ctrl_max_throughput.679164539
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1764996972
/workspace/coverage/default/8.sram_ctrl_mem_walk.3392871073
/workspace/coverage/default/8.sram_ctrl_multiple_keys.4137626752
/workspace/coverage/default/8.sram_ctrl_partial_access.175931188
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3794502290
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3604449117
/workspace/coverage/default/8.sram_ctrl_regwen.2178075592
/workspace/coverage/default/8.sram_ctrl_smoke.3663126718
/workspace/coverage/default/8.sram_ctrl_stress_all.4135552768
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2423008072
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1425089352
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.537132041
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.12249594
/workspace/coverage/default/9.sram_ctrl_alert_test.3413674997
/workspace/coverage/default/9.sram_ctrl_bijection.746357867
/workspace/coverage/default/9.sram_ctrl_executable.4127380315
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1588204305
/workspace/coverage/default/9.sram_ctrl_max_throughput.1462045687
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.4066298126
/workspace/coverage/default/9.sram_ctrl_mem_walk.2594160642
/workspace/coverage/default/9.sram_ctrl_multiple_keys.4261685391
/workspace/coverage/default/9.sram_ctrl_partial_access.2378930903
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2603915603
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2789781411
/workspace/coverage/default/9.sram_ctrl_regwen.1630861861
/workspace/coverage/default/9.sram_ctrl_smoke.3771727544
/workspace/coverage/default/9.sram_ctrl_stress_all.2142614835
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1936759443
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3807757572
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2325733887



Total test records in report: 1037
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/38.sram_ctrl_regwen.3503744817 Aug 17 04:59:12 PM PDT 24 Aug 17 05:16:02 PM PDT 24 4127542487 ps
T2 /workspace/coverage/default/29.sram_ctrl_ram_cfg.3653132992 Aug 17 04:58:14 PM PDT 24 Aug 17 04:58:18 PM PDT 24 1683261391 ps
T3 /workspace/coverage/default/4.sram_ctrl_alert_test.3261867364 Aug 17 04:56:21 PM PDT 24 Aug 17 04:56:22 PM PDT 24 12636066 ps
T4 /workspace/coverage/default/7.sram_ctrl_regwen.1513725393 Aug 17 04:56:40 PM PDT 24 Aug 17 05:09:44 PM PDT 24 10707196625 ps
T5 /workspace/coverage/default/28.sram_ctrl_smoke.3835232560 Aug 17 04:58:11 PM PDT 24 Aug 17 04:58:32 PM PDT 24 1112475810 ps
T11 /workspace/coverage/default/23.sram_ctrl_bijection.168028606 Aug 17 04:57:37 PM PDT 24 Aug 17 05:07:28 PM PDT 24 91095109650 ps
T8 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.4189469492 Aug 17 05:00:19 PM PDT 24 Aug 17 05:06:46 PM PDT 24 8652671057 ps
T12 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.12249594 Aug 17 04:56:58 PM PDT 24 Aug 17 05:19:27 PM PDT 24 22130323442 ps
T6 /workspace/coverage/default/35.sram_ctrl_lc_escalation.2463568551 Aug 17 04:58:48 PM PDT 24 Aug 17 05:00:13 PM PDT 24 15162610219 ps
T13 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3873531249 Aug 17 04:56:32 PM PDT 24 Aug 17 04:57:56 PM PDT 24 4500757955 ps
T38 /workspace/coverage/default/17.sram_ctrl_max_throughput.4023819696 Aug 17 04:57:21 PM PDT 24 Aug 17 04:59:18 PM PDT 24 785098675 ps
T7 /workspace/coverage/default/0.sram_ctrl_max_throughput.2000921619 Aug 17 04:56:05 PM PDT 24 Aug 17 04:57:02 PM PDT 24 749358802 ps
T74 /workspace/coverage/default/31.sram_ctrl_mem_walk.351826167 Aug 17 04:58:31 PM PDT 24 Aug 17 05:00:38 PM PDT 24 2060014567 ps
T9 /workspace/coverage/default/14.sram_ctrl_lc_escalation.421143974 Aug 17 04:57:13 PM PDT 24 Aug 17 04:58:05 PM PDT 24 27175311365 ps
T19 /workspace/coverage/default/2.sram_ctrl_regwen.638060198 Aug 17 04:56:10 PM PDT 24 Aug 17 05:09:32 PM PDT 24 10273476633 ps
T39 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.3437170324 Aug 17 04:59:26 PM PDT 24 Aug 17 05:06:21 PM PDT 24 123963614962 ps
T70 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.4271731854 Aug 17 04:57:13 PM PDT 24 Aug 17 04:59:22 PM PDT 24 2312529410 ps
T93 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.1710860662 Aug 17 04:59:56 PM PDT 24 Aug 17 05:01:21 PM PDT 24 11125619734 ps
T10 /workspace/coverage/default/47.sram_ctrl_stress_all.1874283549 Aug 17 05:00:30 PM PDT 24 Aug 17 06:24:12 PM PDT 24 434288084115 ps
T41 /workspace/coverage/default/27.sram_ctrl_stress_all.432511318 Aug 17 04:58:10 PM PDT 24 Aug 17 06:16:45 PM PDT 24 295650088676 ps
T77 /workspace/coverage/default/41.sram_ctrl_executable.3834375242 Aug 17 04:59:35 PM PDT 24 Aug 17 05:02:40 PM PDT 24 3741358336 ps
T122 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2603915603 Aug 17 04:57:01 PM PDT 24 Aug 17 05:01:43 PM PDT 24 5078367174 ps
T168 /workspace/coverage/default/43.sram_ctrl_smoke.1634320116 Aug 17 04:59:49 PM PDT 24 Aug 17 04:59:57 PM PDT 24 802770010 ps
T75 /workspace/coverage/default/8.sram_ctrl_bijection.2863211178 Aug 17 04:56:49 PM PDT 24 Aug 17 05:30:16 PM PDT 24 29031436210 ps
T165 /workspace/coverage/default/24.sram_ctrl_multiple_keys.1239164370 Aug 17 04:57:48 PM PDT 24 Aug 17 05:12:59 PM PDT 24 56658702805 ps
T14 /workspace/coverage/default/42.sram_ctrl_alert_test.3649117114 Aug 17 04:59:49 PM PDT 24 Aug 17 04:59:50 PM PDT 24 20517065 ps
T101 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.269877806 Aug 17 04:57:37 PM PDT 24 Aug 17 04:59:02 PM PDT 24 4889832784 ps
T40 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.3282008302 Aug 17 04:57:06 PM PDT 24 Aug 17 05:08:39 PM PDT 24 24557427559 ps
T25 /workspace/coverage/default/16.sram_ctrl_ram_cfg.3801310861 Aug 17 04:57:18 PM PDT 24 Aug 17 04:57:22 PM PDT 24 1399250333 ps
T15 /workspace/coverage/default/16.sram_ctrl_alert_test.1211466138 Aug 17 04:57:20 PM PDT 24 Aug 17 04:57:20 PM PDT 24 16064756 ps
T80 /workspace/coverage/default/7.sram_ctrl_lc_escalation.1457947601 Aug 17 04:56:50 PM PDT 24 Aug 17 04:57:49 PM PDT 24 8900615215 ps
T76 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.2693824207 Aug 17 04:58:40 PM PDT 24 Aug 17 05:02:10 PM PDT 24 10615573625 ps
T102 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.3236601925 Aug 17 05:00:26 PM PDT 24 Aug 17 05:21:42 PM PDT 24 12960600584 ps
T22 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.493357321 Aug 17 04:57:28 PM PDT 24 Aug 17 04:58:19 PM PDT 24 4228787214 ps
T51 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.2736385641 Aug 17 05:00:17 PM PDT 24 Aug 17 05:04:09 PM PDT 24 33878050105 ps
T52 /workspace/coverage/default/33.sram_ctrl_alert_test.2234324163 Aug 17 04:58:41 PM PDT 24 Aug 17 04:58:42 PM PDT 24 20403549 ps
T53 /workspace/coverage/default/49.sram_ctrl_alert_test.2469002856 Aug 17 05:00:55 PM PDT 24 Aug 17 05:00:56 PM PDT 24 16335029 ps
T54 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.676021107 Aug 17 04:59:48 PM PDT 24 Aug 17 05:00:15 PM PDT 24 3566897686 ps
T20 /workspace/coverage/default/19.sram_ctrl_stress_all.1944258035 Aug 17 04:57:32 PM PDT 24 Aug 17 06:47:57 PM PDT 24 61561615568 ps
T55 /workspace/coverage/default/27.sram_ctrl_lc_escalation.372939426 Aug 17 04:58:13 PM PDT 24 Aug 17 04:58:32 PM PDT 24 2894391752 ps
T56 /workspace/coverage/default/49.sram_ctrl_regwen.4000563149 Aug 17 05:00:49 PM PDT 24 Aug 17 05:15:23 PM PDT 24 4267152515 ps
T57 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.2072364566 Aug 17 04:57:15 PM PDT 24 Aug 17 05:02:24 PM PDT 24 23955493654 ps
T58 /workspace/coverage/default/26.sram_ctrl_alert_test.4032630606 Aug 17 04:57:58 PM PDT 24 Aug 17 04:57:59 PM PDT 24 38759895 ps
T171 /workspace/coverage/default/24.sram_ctrl_max_throughput.249549560 Aug 17 04:57:50 PM PDT 24 Aug 17 04:59:48 PM PDT 24 765028839 ps
T103 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.2076726437 Aug 17 04:56:13 PM PDT 24 Aug 17 05:06:31 PM PDT 24 33007782124 ps
T123 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.2920052654 Aug 17 04:58:31 PM PDT 24 Aug 17 05:02:36 PM PDT 24 21146863905 ps
T172 /workspace/coverage/default/11.sram_ctrl_partial_access.3661436368 Aug 17 04:57:07 PM PDT 24 Aug 17 04:57:23 PM PDT 24 839083238 ps
T173 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3431058807 Aug 17 04:57:14 PM PDT 24 Aug 17 04:57:56 PM PDT 24 1037000922 ps
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T124 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2632593420 Aug 17 04:59:42 PM PDT 24 Aug 17 05:04:36 PM PDT 24 27591059425 ps
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T174 /workspace/coverage/default/26.sram_ctrl_max_throughput.3811212500 Aug 17 04:57:59 PM PDT 24 Aug 17 04:58:05 PM PDT 24 2769642919 ps
T42 /workspace/coverage/default/15.sram_ctrl_mem_walk.1791002624 Aug 17 04:57:13 PM PDT 24 Aug 17 05:00:13 PM PDT 24 10340661776 ps
T159 /workspace/coverage/default/25.sram_ctrl_executable.2174997312 Aug 17 04:57:51 PM PDT 24 Aug 17 05:17:59 PM PDT 24 72257636664 ps
T175 /workspace/coverage/default/1.sram_ctrl_partial_access.2140328913 Aug 17 04:56:11 PM PDT 24 Aug 17 04:58:33 PM PDT 24 4909548560 ps
T176 /workspace/coverage/default/10.sram_ctrl_regwen.666416704 Aug 17 04:57:08 PM PDT 24 Aug 17 05:01:08 PM PDT 24 8123942383 ps
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T23 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3526775826 Aug 17 04:56:47 PM PDT 24 Aug 17 04:57:22 PM PDT 24 8212954892 ps
T177 /workspace/coverage/default/8.sram_ctrl_partial_access.175931188 Aug 17 04:56:49 PM PDT 24 Aug 17 04:57:11 PM PDT 24 2583525101 ps
T178 /workspace/coverage/default/35.sram_ctrl_smoke.3859464936 Aug 17 04:58:49 PM PDT 24 Aug 17 04:59:12 PM PDT 24 1891226712 ps
T179 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3814216812 Aug 17 05:00:16 PM PDT 24 Aug 17 05:01:58 PM PDT 24 5901313180 ps
T26 /workspace/coverage/default/32.sram_ctrl_ram_cfg.409237330 Aug 17 04:58:34 PM PDT 24 Aug 17 04:58:38 PM PDT 24 1398164548 ps
T125 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2458175363 Aug 17 04:59:03 PM PDT 24 Aug 17 05:03:06 PM PDT 24 10241140136 ps
T24 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1018838134 Aug 17 04:56:50 PM PDT 24 Aug 17 04:57:43 PM PDT 24 15542175340 ps
T63 /workspace/coverage/default/35.sram_ctrl_max_throughput.3654902436 Aug 17 04:58:50 PM PDT 24 Aug 17 04:59:58 PM PDT 24 5298924614 ps
T64 /workspace/coverage/default/47.sram_ctrl_executable.2619028859 Aug 17 05:00:27 PM PDT 24 Aug 17 05:01:08 PM PDT 24 6949906353 ps
T65 /workspace/coverage/default/29.sram_ctrl_bijection.3622373516 Aug 17 04:58:15 PM PDT 24 Aug 17 05:31:45 PM PDT 24 178762758072 ps
T66 /workspace/coverage/default/49.sram_ctrl_executable.3094449926 Aug 17 05:00:50 PM PDT 24 Aug 17 05:05:37 PM PDT 24 8036604593 ps
T43 /workspace/coverage/default/32.sram_ctrl_mem_walk.812421313 Aug 17 04:58:32 PM PDT 24 Aug 17 05:01:25 PM PDT 24 28817274642 ps
T67 /workspace/coverage/default/2.sram_ctrl_max_throughput.2083494304 Aug 17 04:56:10 PM PDT 24 Aug 17 04:56:18 PM PDT 24 1303771020 ps
T68 /workspace/coverage/default/7.sram_ctrl_stress_all.2228047168 Aug 17 04:56:49 PM PDT 24 Aug 17 05:48:55 PM PDT 24 33007182753 ps
T21 /workspace/coverage/default/15.sram_ctrl_lc_escalation.1476317743 Aug 17 04:57:13 PM PDT 24 Aug 17 04:58:25 PM PDT 24 13311044953 ps
T69 /workspace/coverage/default/35.sram_ctrl_alert_test.1889601800 Aug 17 04:58:57 PM PDT 24 Aug 17 04:58:58 PM PDT 24 32314484 ps
T163 /workspace/coverage/default/44.sram_ctrl_regwen.2874994969 Aug 17 05:00:04 PM PDT 24 Aug 17 05:11:07 PM PDT 24 25244891846 ps
T126 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3794502290 Aug 17 04:56:51 PM PDT 24 Aug 17 05:02:15 PM PDT 24 42977813213 ps
T166 /workspace/coverage/default/46.sram_ctrl_bijection.904402631 Aug 17 05:00:20 PM PDT 24 Aug 17 05:38:16 PM PDT 24 273086183608 ps
T164 /workspace/coverage/default/30.sram_ctrl_regwen.3535501471 Aug 17 04:58:23 PM PDT 24 Aug 17 05:11:56 PM PDT 24 69031244864 ps
T180 /workspace/coverage/default/30.sram_ctrl_executable.817570624 Aug 17 04:58:23 PM PDT 24 Aug 17 05:04:37 PM PDT 24 40127741744 ps
T181 /workspace/coverage/default/12.sram_ctrl_multiple_keys.1690624113 Aug 17 04:57:08 PM PDT 24 Aug 17 05:17:57 PM PDT 24 79291242956 ps
T170 /workspace/coverage/default/39.sram_ctrl_executable.2007566268 Aug 17 04:59:20 PM PDT 24 Aug 17 05:05:27 PM PDT 24 13736850339 ps
T45 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.473648845 Aug 17 05:00:27 PM PDT 24 Aug 17 05:03:04 PM PDT 24 2577112162 ps
T182 /workspace/coverage/default/17.sram_ctrl_lc_escalation.1776767860 Aug 17 04:57:24 PM PDT 24 Aug 17 04:57:59 PM PDT 24 34247302207 ps
T183 /workspace/coverage/default/30.sram_ctrl_partial_access.1969702307 Aug 17 04:58:23 PM PDT 24 Aug 17 04:58:42 PM PDT 24 2387284409 ps
T157 /workspace/coverage/default/23.sram_ctrl_stress_all.1776613608 Aug 17 04:57:45 PM PDT 24 Aug 17 06:09:26 PM PDT 24 71838537819 ps
T49 /workspace/coverage/default/25.sram_ctrl_mem_walk.4170844485 Aug 17 04:57:51 PM PDT 24 Aug 17 05:03:53 PM PDT 24 82737231593 ps
T184 /workspace/coverage/default/7.sram_ctrl_max_throughput.706299253 Aug 17 04:56:40 PM PDT 24 Aug 17 04:56:47 PM PDT 24 671387297 ps
T185 /workspace/coverage/default/11.sram_ctrl_ram_cfg.1173421012 Aug 17 04:57:06 PM PDT 24 Aug 17 04:57:09 PM PDT 24 1405860644 ps
T186 /workspace/coverage/default/36.sram_ctrl_executable.200559251 Aug 17 04:58:55 PM PDT 24 Aug 17 05:30:06 PM PDT 24 31173736932 ps
T187 /workspace/coverage/default/20.sram_ctrl_alert_test.4202423894 Aug 17 04:57:39 PM PDT 24 Aug 17 04:57:39 PM PDT 24 46780086 ps
T188 /workspace/coverage/default/9.sram_ctrl_partial_access.2378930903 Aug 17 04:56:59 PM PDT 24 Aug 17 04:57:21 PM PDT 24 2570277124 ps
T104 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.517153853 Aug 17 04:57:32 PM PDT 24 Aug 17 04:58:37 PM PDT 24 1930145415 ps
T189 /workspace/coverage/default/27.sram_ctrl_mem_walk.3766437149 Aug 17 04:58:12 PM PDT 24 Aug 17 05:02:40 PM PDT 24 6161925349 ps
T190 /workspace/coverage/default/48.sram_ctrl_smoke.1091127945 Aug 17 05:00:32 PM PDT 24 Aug 17 05:03:02 PM PDT 24 1346608613 ps
T191 /workspace/coverage/default/26.sram_ctrl_ram_cfg.3142943301 Aug 17 04:58:00 PM PDT 24 Aug 17 04:58:03 PM PDT 24 1343324816 ps
T192 /workspace/coverage/default/30.sram_ctrl_bijection.2247542649 Aug 17 04:58:25 PM PDT 24 Aug 17 05:09:08 PM PDT 24 9721302395 ps
T193 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2099678272 Aug 17 04:58:49 PM PDT 24 Aug 17 05:01:07 PM PDT 24 5219765668 ps
T194 /workspace/coverage/default/19.sram_ctrl_smoke.3173346176 Aug 17 04:57:29 PM PDT 24 Aug 17 04:57:51 PM PDT 24 10103293060 ps
T195 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2325733887 Aug 17 04:57:01 PM PDT 24 Aug 17 04:58:41 PM PDT 24 772378693 ps
T196 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1224123766 Aug 17 05:00:34 PM PDT 24 Aug 17 05:01:00 PM PDT 24 1485316842 ps
T197 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1723809999 Aug 17 04:59:58 PM PDT 24 Aug 17 05:04:31 PM PDT 24 38744654283 ps
T161 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1081354761 Aug 17 04:57:13 PM PDT 24 Aug 17 05:03:24 PM PDT 24 32398392305 ps
T50 /workspace/coverage/default/23.sram_ctrl_mem_walk.1206792324 Aug 17 04:57:47 PM PDT 24 Aug 17 05:02:38 PM PDT 24 5534321180 ps
T46 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.717338406 Aug 17 04:57:22 PM PDT 24 Aug 17 04:59:49 PM PDT 24 2583049059 ps
T116 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.1535102412 Aug 17 04:57:30 PM PDT 24 Aug 17 04:59:22 PM PDT 24 1680189048 ps
T198 /workspace/coverage/default/46.sram_ctrl_lc_escalation.3897884640 Aug 17 05:00:17 PM PDT 24 Aug 17 05:01:29 PM PDT 24 31210258167 ps
T199 /workspace/coverage/default/13.sram_ctrl_alert_test.2824642140 Aug 17 04:57:11 PM PDT 24 Aug 17 04:57:12 PM PDT 24 54435261 ps
T200 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.822059879 Aug 17 04:57:07 PM PDT 24 Aug 17 04:59:34 PM PDT 24 9834707756 ps
T201 /workspace/coverage/default/36.sram_ctrl_lc_escalation.1443010798 Aug 17 04:58:56 PM PDT 24 Aug 17 04:59:06 PM PDT 24 3553627452 ps
T202 /workspace/coverage/default/1.sram_ctrl_ram_cfg.1557299092 Aug 17 04:56:09 PM PDT 24 Aug 17 04:56:13 PM PDT 24 1488467973 ps
T203 /workspace/coverage/default/5.sram_ctrl_regwen.4021578372 Aug 17 04:56:25 PM PDT 24 Aug 17 05:20:44 PM PDT 24 18158462492 ps
T204 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.717129967 Aug 17 04:57:23 PM PDT 24 Aug 17 05:00:04 PM PDT 24 10393237260 ps
T205 /workspace/coverage/default/0.sram_ctrl_multiple_keys.2764961644 Aug 17 04:56:06 PM PDT 24 Aug 17 05:17:15 PM PDT 24 11857731595 ps
T167 /workspace/coverage/default/34.sram_ctrl_stress_all.3876228452 Aug 17 04:58:50 PM PDT 24 Aug 17 07:15:35 PM PDT 24 1583431133088 ps
T206 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1246706536 Aug 17 04:57:24 PM PDT 24 Aug 17 04:59:36 PM PDT 24 6576579104 ps
T207 /workspace/coverage/default/43.sram_ctrl_multiple_keys.1530076451 Aug 17 04:59:49 PM PDT 24 Aug 17 05:21:44 PM PDT 24 19531997618 ps
T208 /workspace/coverage/default/2.sram_ctrl_ram_cfg.3305968267 Aug 17 04:56:04 PM PDT 24 Aug 17 04:56:08 PM PDT 24 1537429288 ps
T44 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3613550528 Aug 17 04:59:54 PM PDT 24 Aug 17 05:00:50 PM PDT 24 40249585646 ps
T209 /workspace/coverage/default/20.sram_ctrl_smoke.2994741447 Aug 17 04:57:31 PM PDT 24 Aug 17 04:57:44 PM PDT 24 2282876364 ps
T210 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.3255917410 Aug 17 04:57:14 PM PDT 24 Aug 17 05:01:45 PM PDT 24 31252763632 ps
T162 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.3211416747 Aug 17 04:58:55 PM PDT 24 Aug 17 05:02:01 PM PDT 24 10019555004 ps
T211 /workspace/coverage/default/29.sram_ctrl_multiple_keys.2775075569 Aug 17 04:58:17 PM PDT 24 Aug 17 05:08:57 PM PDT 24 23012740646 ps
T212 /workspace/coverage/default/45.sram_ctrl_bijection.204485065 Aug 17 05:00:03 PM PDT 24 Aug 17 05:32:05 PM PDT 24 113932817889 ps
T213 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.926734992 Aug 17 04:57:31 PM PDT 24 Aug 17 05:02:11 PM PDT 24 21676989945 ps
T214 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.2241934833 Aug 17 04:59:10 PM PDT 24 Aug 17 05:01:52 PM PDT 24 3396248342 ps
T215 /workspace/coverage/default/28.sram_ctrl_bijection.2020718875 Aug 17 04:58:12 PM PDT 24 Aug 17 05:22:08 PM PDT 24 79989643691 ps
T216 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.2108195936 Aug 17 04:58:11 PM PDT 24 Aug 17 05:06:22 PM PDT 24 12765705533 ps
T217 /workspace/coverage/default/43.sram_ctrl_max_throughput.4039181584 Aug 17 04:59:48 PM PDT 24 Aug 17 05:00:04 PM PDT 24 2477590134 ps
T218 /workspace/coverage/default/37.sram_ctrl_max_throughput.3666612217 Aug 17 04:59:02 PM PDT 24 Aug 17 05:00:08 PM PDT 24 770867076 ps
T81 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.1777278885 Aug 17 04:57:54 PM PDT 24 Aug 17 04:58:11 PM PDT 24 635628819 ps
T137 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2759563868 Aug 17 04:58:52 PM PDT 24 Aug 17 05:04:06 PM PDT 24 13809691567 ps
T138 /workspace/coverage/default/31.sram_ctrl_lc_escalation.3952041145 Aug 17 04:58:24 PM PDT 24 Aug 17 04:59:37 PM PDT 24 42327873011 ps
T139 /workspace/coverage/default/31.sram_ctrl_ram_cfg.257385753 Aug 17 04:58:34 PM PDT 24 Aug 17 04:58:37 PM PDT 24 694683725 ps
T140 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.2033423827 Aug 17 04:58:18 PM PDT 24 Aug 17 05:02:11 PM PDT 24 14630872096 ps
T141 /workspace/coverage/default/31.sram_ctrl_regwen.2751497878 Aug 17 04:58:31 PM PDT 24 Aug 17 05:12:17 PM PDT 24 9052937442 ps
T142 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.262603476 Aug 17 05:00:49 PM PDT 24 Aug 17 05:12:07 PM PDT 24 206426694267 ps
T143 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.2576399491 Aug 17 04:57:33 PM PDT 24 Aug 17 05:00:14 PM PDT 24 20771672758 ps
T144 /workspace/coverage/default/41.sram_ctrl_partial_access.2835432761 Aug 17 04:59:33 PM PDT 24 Aug 17 04:59:56 PM PDT 24 5458954940 ps
T145 /workspace/coverage/default/48.sram_ctrl_stress_all.2610821411 Aug 17 05:00:39 PM PDT 24 Aug 17 06:59:11 PM PDT 24 2309507231147 ps
T219 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1081782191 Aug 17 04:57:14 PM PDT 24 Aug 17 05:04:54 PM PDT 24 19428472986 ps
T220 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.2290386465 Aug 17 04:58:12 PM PDT 24 Aug 17 05:07:06 PM PDT 24 5492524187 ps
T221 /workspace/coverage/default/21.sram_ctrl_mem_walk.3435784957 Aug 17 04:57:37 PM PDT 24 Aug 17 05:00:22 PM PDT 24 14427756425 ps
T222 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.2120072302 Aug 17 04:57:15 PM PDT 24 Aug 17 04:59:48 PM PDT 24 43769750362 ps
T223 /workspace/coverage/default/47.sram_ctrl_multiple_keys.1072913708 Aug 17 05:00:27 PM PDT 24 Aug 17 05:18:21 PM PDT 24 19495370206 ps
T224 /workspace/coverage/default/30.sram_ctrl_max_throughput.4278702940 Aug 17 04:58:22 PM PDT 24 Aug 17 04:58:47 PM PDT 24 4459361045 ps
T225 /workspace/coverage/default/8.sram_ctrl_ram_cfg.3604449117 Aug 17 04:56:59 PM PDT 24 Aug 17 04:57:02 PM PDT 24 1347015763 ps
T59 /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.611653249 Aug 17 04:57:04 PM PDT 24 Aug 17 04:58:51 PM PDT 24 1409007218 ps
T226 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.2738892260 Aug 17 04:57:06 PM PDT 24 Aug 17 05:00:10 PM PDT 24 5560003195 ps
T227 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.2226253079 Aug 17 04:59:18 PM PDT 24 Aug 17 05:00:36 PM PDT 24 780878884 ps
T82 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.1611678359 Aug 17 04:58:22 PM PDT 24 Aug 17 04:58:55 PM PDT 24 932109131 ps
T228 /workspace/coverage/default/6.sram_ctrl_smoke.1383767333 Aug 17 04:56:34 PM PDT 24 Aug 17 04:56:49 PM PDT 24 2156627805 ps
T229 /workspace/coverage/default/11.sram_ctrl_max_throughput.214019584 Aug 17 04:57:06 PM PDT 24 Aug 17 04:57:18 PM PDT 24 1450342718 ps
T230 /workspace/coverage/default/12.sram_ctrl_max_throughput.172319228 Aug 17 04:57:08 PM PDT 24 Aug 17 04:57:52 PM PDT 24 1457837868 ps
T231 /workspace/coverage/default/35.sram_ctrl_ram_cfg.3886304350 Aug 17 04:58:58 PM PDT 24 Aug 17 04:59:01 PM PDT 24 676649273 ps
T48 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.1239538627 Aug 17 04:56:07 PM PDT 24 Aug 17 04:57:31 PM PDT 24 11651473239 ps
T232 /workspace/coverage/default/28.sram_ctrl_regwen.4258425530 Aug 17 04:58:09 PM PDT 24 Aug 17 05:07:38 PM PDT 24 36723703044 ps
T233 /workspace/coverage/default/43.sram_ctrl_partial_access.3652616371 Aug 17 04:59:48 PM PDT 24 Aug 17 05:01:10 PM PDT 24 11493319770 ps
T234 /workspace/coverage/default/40.sram_ctrl_partial_access.3726351479 Aug 17 04:59:27 PM PDT 24 Aug 17 04:59:45 PM PDT 24 18453462314 ps
T235 /workspace/coverage/default/11.sram_ctrl_bijection.4125324141 Aug 17 04:57:04 PM PDT 24 Aug 17 05:16:44 PM PDT 24 122475844930 ps
T236 /workspace/coverage/default/31.sram_ctrl_executable.4158493702 Aug 17 04:58:32 PM PDT 24 Aug 17 05:07:40 PM PDT 24 9206117647 ps
T237 /workspace/coverage/default/37.sram_ctrl_smoke.429279328 Aug 17 04:59:08 PM PDT 24 Aug 17 05:00:40 PM PDT 24 1726789231 ps
T238 /workspace/coverage/default/45.sram_ctrl_ram_cfg.909054012 Aug 17 05:00:09 PM PDT 24 Aug 17 05:00:12 PM PDT 24 679246528 ps
T239 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.2948450050 Aug 17 04:57:35 PM PDT 24 Aug 17 05:19:52 PM PDT 24 18797804148 ps
T240 /workspace/coverage/default/35.sram_ctrl_executable.4232805484 Aug 17 04:58:48 PM PDT 24 Aug 17 05:02:03 PM PDT 24 2420816419 ps
T241 /workspace/coverage/default/48.sram_ctrl_stress_pipeline.1442316228 Aug 17 05:00:29 PM PDT 24 Aug 17 05:06:38 PM PDT 24 19886470459 ps
T60 /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.2316226779 Aug 17 04:56:10 PM PDT 24 Aug 17 04:57:07 PM PDT 24 8136929768 ps
T242 /workspace/coverage/default/22.sram_ctrl_bijection.3617651366 Aug 17 04:57:38 PM PDT 24 Aug 17 05:21:31 PM PDT 24 99984751536 ps
T243 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2218223448 Aug 17 04:56:23 PM PDT 24 Aug 17 05:03:48 PM PDT 24 121605041343 ps
T244 /workspace/coverage/default/18.sram_ctrl_smoke.388057188 Aug 17 04:57:29 PM PDT 24 Aug 17 04:57:38 PM PDT 24 442450353 ps
T245 /workspace/coverage/default/20.sram_ctrl_lc_escalation.3221297230 Aug 17 04:57:30 PM PDT 24 Aug 17 04:57:45 PM PDT 24 3638427626 ps
T246 /workspace/coverage/default/12.sram_ctrl_stress_all.3606841937 Aug 17 04:57:10 PM PDT 24 Aug 17 06:23:46 PM PDT 24 182681868790 ps
T16 /workspace/coverage/default/1.sram_ctrl_sec_cm.3131417522 Aug 17 04:56:10 PM PDT 24 Aug 17 04:56:13 PM PDT 24 839425315 ps
T29 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.2225134124 Aug 17 05:00:27 PM PDT 24 Aug 17 05:06:39 PM PDT 24 5569526230 ps
T30 /workspace/coverage/default/10.sram_ctrl_alert_test.3159149815 Aug 17 04:57:10 PM PDT 24 Aug 17 04:57:11 PM PDT 24 21822704 ps
T31 /workspace/coverage/default/3.sram_ctrl_max_throughput.3108856077 Aug 17 04:56:15 PM PDT 24 Aug 17 04:56:30 PM PDT 24 737791646 ps
T32 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.282299076 Aug 17 04:57:17 PM PDT 24 Aug 17 05:29:40 PM PDT 24 18820015009 ps
T33 /workspace/coverage/default/38.sram_ctrl_bijection.1810168224 Aug 17 04:59:11 PM PDT 24 Aug 17 05:23:49 PM PDT 24 460705215783 ps
T34 /workspace/coverage/default/1.sram_ctrl_mem_walk.1323902589 Aug 17 04:56:15 PM PDT 24 Aug 17 05:01:48 PM PDT 24 28805048839 ps
T35 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.3203067210 Aug 17 04:56:38 PM PDT 24 Aug 17 05:00:53 PM PDT 24 5329530452 ps
T36 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.295364518 Aug 17 04:58:50 PM PDT 24 Aug 17 05:20:10 PM PDT 24 24196212397 ps
T37 /workspace/coverage/default/41.sram_ctrl_stress_all.2842141503 Aug 17 04:59:43 PM PDT 24 Aug 17 06:04:59 PM PDT 24 350845916247 ps
T247 /workspace/coverage/default/5.sram_ctrl_smoke.440023270 Aug 17 04:56:14 PM PDT 24 Aug 17 04:56:29 PM PDT 24 7208003531 ps
T248 /workspace/coverage/default/31.sram_ctrl_multiple_keys.1813907838 Aug 17 04:58:26 PM PDT 24 Aug 17 05:10:48 PM PDT 24 18179114052 ps
T249 /workspace/coverage/default/20.sram_ctrl_bijection.502242783 Aug 17 04:57:28 PM PDT 24 Aug 17 05:41:45 PM PDT 24 114984098991 ps
T250 /workspace/coverage/default/21.sram_ctrl_bijection.392708283 Aug 17 04:57:33 PM PDT 24 Aug 17 05:24:20 PM PDT 24 22625047121 ps
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T296 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.4053386061 Aug 17 04:57:06 PM PDT 24 Aug 17 05:01:34 PM PDT 24 10153586935 ps
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T304 /workspace/coverage/default/6.sram_ctrl_lc_escalation.2088571668 Aug 17 04:56:34 PM PDT 24 Aug 17 04:56:58 PM PDT 24 8414247832 ps
T305 /workspace/coverage/default/39.sram_ctrl_bijection.4250534872 Aug 17 04:59:18 PM PDT 24 Aug 17 05:17:44 PM PDT 24 141268827152 ps
T306 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4173258808 Aug 17 05:00:27 PM PDT 24 Aug 17 05:00:46 PM PDT 24 2941721796 ps
T307 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1532684020 Aug 17 04:56:19 PM PDT 24 Aug 17 04:57:04 PM PDT 24 1072906024 ps
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T310 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.999044732 Aug 17 04:57:44 PM PDT 24 Aug 17 05:01:37 PM PDT 24 11414730928 ps
T311 /workspace/coverage/default/37.sram_ctrl_bijection.4092562559 Aug 17 04:59:03 PM PDT 24 Aug 17 05:17:57 PM PDT 24 66956392709 ps
T312 /workspace/coverage/default/4.sram_ctrl_mem_walk.793548298 Aug 17 04:56:13 PM PDT 24 Aug 17 04:59:22 PM PDT 24 44984517218 ps
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