| T308 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_smoke.68484707 |
|
|
Aug 21 11:07:11 AM UTC 24 |
Aug 21 11:07:33 AM UTC 24 |
3219235618 ps |
| T49 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3593759447 |
|
|
Aug 21 11:07:05 AM UTC 24 |
Aug 21 11:07:38 AM UTC 24 |
1683531093 ps |
| T309 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_partial_access.3427265 |
|
|
Aug 21 11:07:34 AM UTC 24 |
Aug 21 11:08:06 AM UTC 24 |
1944273402 ps |
| T310 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_max_throughput.4259273025 |
|
|
Aug 21 11:08:07 AM UTC 24 |
Aug 21 11:08:37 AM UTC 24 |
3036235301 ps |
| T311 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/14.sram_ctrl_multiple_keys.2574194618 |
|
|
Aug 21 11:02:06 AM UTC 24 |
Aug 21 11:08:48 AM UTC 24 |
40228736070 ps |
| T312 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_throughput_w_partial_write.1889493374 |
|
|
Aug 21 11:08:38 AM UTC 24 |
Aug 21 11:09:34 AM UTC 24 |
766970847 ps |
| T313 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/10.sram_ctrl_executable.3828504135 |
|
|
Aug 21 10:53:44 AM UTC 24 |
Aug 21 11:09:47 AM UTC 24 |
8206798664 ps |
| T314 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/14.sram_ctrl_partial_access_b2b.398830706 |
|
|
Aug 21 11:02:44 AM UTC 24 |
Aug 21 11:09:53 AM UTC 24 |
6776177744 ps |
| T315 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/11.sram_ctrl_executable.3415141200 |
|
|
Aug 21 10:56:09 AM UTC 24 |
Aug 21 11:10:11 AM UTC 24 |
39482962510 ps |
| T316 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/12.sram_ctrl_executable.2632904005 |
|
|
Aug 21 10:59:22 AM UTC 24 |
Aug 21 11:10:16 AM UTC 24 |
14661477407 ps |
| T317 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/15.sram_ctrl_mem_partial_access.2250314430 |
|
|
Aug 21 11:06:57 AM UTC 24 |
Aug 21 11:10:17 AM UTC 24 |
5399461562 ps |
| T318 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_ram_cfg.670510223 |
|
|
Aug 21 11:10:12 AM UTC 24 |
Aug 21 11:10:21 AM UTC 24 |
698030436 ps |
| T319 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/8.sram_ctrl_bijection.3651066237 |
|
|
Aug 21 10:43:29 AM UTC 24 |
Aug 21 11:10:21 AM UTC 24 |
62590958511 ps |
| T320 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_lc_escalation.427348632 |
|
|
Aug 21 11:08:49 AM UTC 24 |
Aug 21 11:10:28 AM UTC 24 |
19915752919 ps |
| T321 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_alert_test.2963881315 |
|
|
Aug 21 11:10:29 AM UTC 24 |
Aug 21 11:10:32 AM UTC 24 |
36183977 ps |
| T322 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/3.sram_ctrl_bijection.3855958987 |
|
|
Aug 21 10:28:36 AM UTC 24 |
Aug 21 11:10:46 AM UTC 24 |
405063326248 ps |
| T323 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_smoke.2185359916 |
|
|
Aug 21 11:10:33 AM UTC 24 |
Aug 21 11:10:59 AM UTC 24 |
16091719201 ps |
| T324 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/15.sram_ctrl_mem_walk.2459178550 |
|
|
Aug 21 11:06:57 AM UTC 24 |
Aug 21 11:11:50 AM UTC 24 |
40742221854 ps |
| T325 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/15.sram_ctrl_stress_pipeline.2344670915 |
|
|
Aug 21 11:05:45 AM UTC 24 |
Aug 21 11:12:13 AM UTC 24 |
20470203074 ps |
| T326 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_partial_access_b2b.2081026619 |
|
|
Aug 21 11:07:39 AM UTC 24 |
Aug 21 11:12:20 AM UTC 24 |
14777266063 ps |
| T327 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/12.sram_ctrl_multiple_keys.4185980606 |
|
|
Aug 21 10:57:45 AM UTC 24 |
Aug 21 11:12:27 AM UTC 24 |
161976692174 ps |
| T328 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_partial_access.1815427848 |
|
|
Aug 21 11:12:13 AM UTC 24 |
Aug 21 11:12:27 AM UTC 24 |
874398784 ps |
| T329 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_max_throughput.147080866 |
|
|
Aug 21 11:12:28 AM UTC 24 |
Aug 21 11:12:45 AM UTC 24 |
729660478 ps |
| T330 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/7.sram_ctrl_bijection.3685287024 |
|
|
Aug 21 10:40:26 AM UTC 24 |
Aug 21 11:12:55 AM UTC 24 |
244406009641 ps |
| T331 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/14.sram_ctrl_access_during_key_req.4254100483 |
|
|
Aug 21 11:03:37 AM UTC 24 |
Aug 21 11:12:59 AM UTC 24 |
10270005666 ps |
| T332 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/15.sram_ctrl_partial_access_b2b.3646793991 |
|
|
Aug 21 11:05:58 AM UTC 24 |
Aug 21 11:13:04 AM UTC 24 |
13649604930 ps |
| T333 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_throughput_w_partial_write.2895360777 |
|
|
Aug 21 11:12:29 AM UTC 24 |
Aug 21 11:13:12 AM UTC 24 |
3202428849 ps |
| T334 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_stress_pipeline.4030306002 |
|
|
Aug 21 11:07:33 AM UTC 24 |
Aug 21 11:13:16 AM UTC 24 |
17453809649 ps |
| T335 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_ram_cfg.181983352 |
|
|
Aug 21 11:13:12 AM UTC 24 |
Aug 21 11:13:20 AM UTC 24 |
1257445707 ps |
| T336 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.67012891 |
|
|
Aug 21 11:10:21 AM UTC 24 |
Aug 21 11:13:26 AM UTC 24 |
2288034143 ps |
| T337 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_mem_partial_access.1882068841 |
|
|
Aug 21 11:10:18 AM UTC 24 |
Aug 21 11:13:28 AM UTC 24 |
20469316014 ps |
| T338 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/15.sram_ctrl_regwen.271553358 |
|
|
Aug 21 11:06:49 AM UTC 24 |
Aug 21 11:13:39 AM UTC 24 |
32669151161 ps |
| T339 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_alert_test.976338350 |
|
|
Aug 21 11:13:40 AM UTC 24 |
Aug 21 11:13:42 AM UTC 24 |
42844775 ps |
| T340 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_multiple_keys.436542612 |
|
|
Aug 21 11:07:13 AM UTC 24 |
Aug 21 11:13:46 AM UTC 24 |
3314238385 ps |
| T341 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_smoke.2028087807 |
|
|
Aug 21 11:13:43 AM UTC 24 |
Aug 21 11:13:51 AM UTC 24 |
1455113659 ps |
| T121 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1516455855 |
|
|
Aug 21 11:13:26 AM UTC 24 |
Aug 21 11:13:56 AM UTC 24 |
4608271665 ps |
| T342 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/15.sram_ctrl_access_during_key_req.2944264626 |
|
|
Aug 21 11:06:47 AM UTC 24 |
Aug 21 11:14:13 AM UTC 24 |
22637246701 ps |
| T343 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_lc_escalation.1392196044 |
|
|
Aug 21 11:12:46 AM UTC 24 |
Aug 21 11:14:17 AM UTC 24 |
21531086913 ps |
| T344 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_partial_access.545758107 |
|
|
Aug 21 11:14:13 AM UTC 24 |
Aug 21 11:14:38 AM UTC 24 |
1109592228 ps |
| T345 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/12.sram_ctrl_regwen.1495999386 |
|
|
Aug 21 10:59:26 AM UTC 24 |
Aug 21 11:15:04 AM UTC 24 |
4047954635 ps |
| T346 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_mem_walk.3252416263 |
|
|
Aug 21 11:10:17 AM UTC 24 |
Aug 21 11:15:21 AM UTC 24 |
3985540332 ps |
| T347 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/13.sram_ctrl_multiple_keys.405293930 |
|
|
Aug 21 11:00:07 AM UTC 24 |
Aug 21 11:15:38 AM UTC 24 |
80967803367 ps |
| T348 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_max_throughput.2623112528 |
|
|
Aug 21 11:14:38 AM UTC 24 |
Aug 21 11:16:03 AM UTC 24 |
3111094674 ps |
| T349 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_mem_partial_access.113038687 |
|
|
Aug 21 11:13:20 AM UTC 24 |
Aug 21 11:16:04 AM UTC 24 |
3151876967 ps |
| T350 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/13.sram_ctrl_access_during_key_req.2601002365 |
|
|
Aug 21 11:01:05 AM UTC 24 |
Aug 21 11:16:13 AM UTC 24 |
52956363746 ps |
| T351 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_throughput_w_partial_write.691591894 |
|
|
Aug 21 11:15:04 AM UTC 24 |
Aug 21 11:16:14 AM UTC 24 |
3015503140 ps |
| T352 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_lc_escalation.931395965 |
|
|
Aug 21 11:15:22 AM UTC 24 |
Aug 21 11:16:22 AM UTC 24 |
58677844349 ps |
| T353 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_multiple_keys.1819069368 |
|
|
Aug 21 11:13:48 AM UTC 24 |
Aug 21 11:16:25 AM UTC 24 |
16774479627 ps |
| T354 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_ram_cfg.935761296 |
|
|
Aug 21 11:16:14 AM UTC 24 |
Aug 21 11:16:26 AM UTC 24 |
1130090349 ps |
| T355 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/9.sram_ctrl_bijection.858888324 |
|
|
Aug 21 10:46:55 AM UTC 24 |
Aug 21 11:16:49 AM UTC 24 |
26358010040 ps |
| T356 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_regwen.2628574278 |
|
|
Aug 21 11:16:04 AM UTC 24 |
Aug 21 11:16:50 AM UTC 24 |
6803606503 ps |
| T357 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_alert_test.2010748554 |
|
|
Aug 21 11:16:51 AM UTC 24 |
Aug 21 11:16:53 AM UTC 24 |
39424484 ps |
| T358 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_mem_walk.1535776478 |
|
|
Aug 21 11:13:16 AM UTC 24 |
Aug 21 11:17:01 AM UTC 24 |
60896317061 ps |
| T359 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_smoke.2495374613 |
|
|
Aug 21 11:16:51 AM UTC 24 |
Aug 21 11:17:30 AM UTC 24 |
5619308766 ps |
| T360 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_stress_pipeline.1284146616 |
|
|
Aug 21 11:11:51 AM UTC 24 |
Aug 21 11:17:31 AM UTC 24 |
18985018613 ps |
| T361 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/14.sram_ctrl_regwen.65894712 |
|
|
Aug 21 11:04:00 AM UTC 24 |
Aug 21 11:18:41 AM UTC 24 |
58962930844 ps |
| T362 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/15.sram_ctrl_multiple_keys.4284420934 |
|
|
Aug 21 11:05:34 AM UTC 24 |
Aug 21 11:17:48 AM UTC 24 |
29692693601 ps |
| T363 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_stress_pipeline.768905315 |
|
|
Aug 21 11:13:57 AM UTC 24 |
Aug 21 11:18:08 AM UTC 24 |
13025682819 ps |
| T364 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_partial_access.279661934 |
|
|
Aug 21 11:17:32 AM UTC 24 |
Aug 21 11:18:28 AM UTC 24 |
3526890989 ps |
| T365 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.1929557511 |
|
|
Aug 21 11:16:26 AM UTC 24 |
Aug 21 11:18:29 AM UTC 24 |
2002635795 ps |
| T366 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_executable.854724815 |
|
|
Aug 21 11:13:00 AM UTC 24 |
Aug 21 11:19:11 AM UTC 24 |
50556682600 ps |
| T367 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_partial_access_b2b.3887888554 |
|
|
Aug 21 11:12:20 AM UTC 24 |
Aug 21 11:19:25 AM UTC 24 |
17707518284 ps |
| T368 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_regwen.2007972071 |
|
|
Aug 21 11:13:05 AM UTC 24 |
Aug 21 11:19:30 AM UTC 24 |
6197673610 ps |
| T369 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_max_throughput.3180485881 |
|
|
Aug 21 11:18:09 AM UTC 24 |
Aug 21 11:19:38 AM UTC 24 |
3161677431 ps |
| T370 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_ram_cfg.2879176729 |
|
|
Aug 21 11:19:31 AM UTC 24 |
Aug 21 11:19:39 AM UTC 24 |
806661289 ps |
| T371 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_mem_partial_access.3353031391 |
|
|
Aug 21 11:16:22 AM UTC 24 |
Aug 21 11:20:13 AM UTC 24 |
27985743052 ps |
| T372 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_lc_escalation.1653404488 |
|
|
Aug 21 11:18:29 AM UTC 24 |
Aug 21 11:20:13 AM UTC 24 |
41409066320 ps |
| T373 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_throughput_w_partial_write.1234524199 |
|
|
Aug 21 11:18:28 AM UTC 24 |
Aug 21 11:20:19 AM UTC 24 |
2918655630 ps |
| T374 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_alert_test.1341053430 |
|
|
Aug 21 11:20:20 AM UTC 24 |
Aug 21 11:20:22 AM UTC 24 |
27984118 ps |
| T375 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_executable.2355555855 |
|
|
Aug 21 11:16:04 AM UTC 24 |
Aug 21 11:20:49 AM UTC 24 |
8255454497 ps |
| T376 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_smoke.3274450561 |
|
|
Aug 21 11:20:24 AM UTC 24 |
Aug 21 11:20:54 AM UTC 24 |
3246426664 ps |
| T377 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_mem_partial_access.2160462475 |
|
|
Aug 21 11:19:40 AM UTC 24 |
Aug 21 11:21:08 AM UTC 24 |
987015841 ps |
| T378 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/0.sram_ctrl_stress_all.3984954477 |
|
|
Aug 21 10:22:21 AM UTC 24 |
Aug 21 11:21:12 AM UTC 24 |
112125438900 ps |
| T379 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_partial_access.2968635889 |
|
|
Aug 21 11:21:09 AM UTC 24 |
Aug 21 11:21:19 AM UTC 24 |
410800028 ps |
| T380 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_multiple_keys.2127106582 |
|
|
Aug 21 11:10:47 AM UTC 24 |
Aug 21 11:21:30 AM UTC 24 |
15114797287 ps |
| T381 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_stress_pipeline.2223429629 |
|
|
Aug 21 11:17:31 AM UTC 24 |
Aug 21 11:21:35 AM UTC 24 |
11207791247 ps |
| T382 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.3163072839 |
|
|
Aug 21 11:20:14 AM UTC 24 |
Aug 21 11:21:40 AM UTC 24 |
5047521233 ps |
| T383 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_max_throughput.2164099300 |
|
|
Aug 21 11:21:20 AM UTC 24 |
Aug 21 11:21:47 AM UTC 24 |
2897879959 ps |
| T384 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_mem_walk.1011664387 |
|
|
Aug 21 11:19:39 AM UTC 24 |
Aug 21 11:22:18 AM UTC 24 |
10391810182 ps |
| T385 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_throughput_w_partial_write.2340759571 |
|
|
Aug 21 11:21:31 AM UTC 24 |
Aug 21 11:23:00 AM UTC 24 |
8450874279 ps |
| T386 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_ram_cfg.2856043013 |
|
|
Aug 21 11:23:02 AM UTC 24 |
Aug 21 11:23:09 AM UTC 24 |
360777978 ps |
| T387 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_bijection.4165144121 |
|
|
Aug 21 11:13:52 AM UTC 24 |
Aug 21 11:23:20 AM UTC 24 |
96908991708 ps |
| T388 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_mem_walk.1413157419 |
|
|
Aug 21 11:16:15 AM UTC 24 |
Aug 21 11:23:21 AM UTC 24 |
21558568044 ps |
| T122 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.390495369 |
|
|
Aug 21 11:23:22 AM UTC 24 |
Aug 21 11:23:40 AM UTC 24 |
463740940 ps |
| T389 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_lc_escalation.2558430859 |
|
|
Aug 21 11:21:36 AM UTC 24 |
Aug 21 11:23:40 AM UTC 24 |
52522249775 ps |
| T390 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_alert_test.3209984023 |
|
|
Aug 21 11:23:41 AM UTC 24 |
Aug 21 11:23:43 AM UTC 24 |
17686791 ps |
| T391 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_regwen.972772961 |
|
|
Aug 21 11:09:54 AM UTC 24 |
Aug 21 11:23:49 AM UTC 24 |
79586105104 ps |
| T392 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_smoke.3723449943 |
|
|
Aug 21 11:23:44 AM UTC 24 |
Aug 21 11:24:09 AM UTC 24 |
712746975 ps |
| T393 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_partial_access_b2b.2444824543 |
|
|
Aug 21 11:17:49 AM UTC 24 |
Aug 21 11:24:20 AM UTC 24 |
10793878369 ps |
| T394 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_stress_pipeline.3716361335 |
|
|
Aug 21 11:20:55 AM UTC 24 |
Aug 21 11:24:25 AM UTC 24 |
2321604782 ps |
| T395 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_partial_access.2351689369 |
|
|
Aug 21 11:24:26 AM UTC 24 |
Aug 21 11:24:37 AM UTC 24 |
393667271 ps |
| T396 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_multiple_keys.4155586871 |
|
|
Aug 21 11:16:54 AM UTC 24 |
Aug 21 11:24:42 AM UTC 24 |
9963774329 ps |
| T397 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_max_throughput.3866559933 |
|
|
Aug 21 11:24:43 AM UTC 24 |
Aug 21 11:25:12 AM UTC 24 |
711866630 ps |
| T398 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_partial_access_b2b.3679570163 |
|
|
Aug 21 11:14:18 AM UTC 24 |
Aug 21 11:25:16 AM UTC 24 |
90519036268 ps |
| T399 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/11.sram_ctrl_bijection.3471774106 |
|
|
Aug 21 10:55:25 AM UTC 24 |
Aug 21 11:25:34 AM UTC 24 |
24186423145 ps |
| T400 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_throughput_w_partial_write.2673684436 |
|
|
Aug 21 11:25:13 AM UTC 24 |
Aug 21 11:26:01 AM UTC 24 |
774057870 ps |
| T401 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_lc_escalation.4258805422 |
|
|
Aug 21 11:25:17 AM UTC 24 |
Aug 21 11:26:09 AM UTC 24 |
17690576669 ps |
| T402 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_mem_partial_access.1022623291 |
|
|
Aug 21 11:23:21 AM UTC 24 |
Aug 21 11:26:29 AM UTC 24 |
3155334591 ps |
| T403 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_ram_cfg.3761333888 |
|
|
Aug 21 11:26:30 AM UTC 24 |
Aug 21 11:26:38 AM UTC 24 |
363601389 ps |
| T404 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/10.sram_ctrl_bijection.171048945 |
|
|
Aug 21 10:51:04 AM UTC 24 |
Aug 21 11:26:45 AM UTC 24 |
86449770777 ps |
| T405 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_stress_pipeline.2281699669 |
|
|
Aug 21 11:24:22 AM UTC 24 |
Aug 21 11:27:07 AM UTC 24 |
2825778171 ps |
| T406 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_mem_walk.1300122724 |
|
|
Aug 21 11:23:10 AM UTC 24 |
Aug 21 11:27:17 AM UTC 24 |
8975918331 ps |
| T123 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2141220126 |
|
|
Aug 21 11:27:08 AM UTC 24 |
Aug 21 11:27:23 AM UTC 24 |
945860237 ps |
| T407 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_alert_test.3473356805 |
|
|
Aug 21 11:27:24 AM UTC 24 |
Aug 21 11:27:27 AM UTC 24 |
24737651 ps |
| T408 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/7.sram_ctrl_stress_all.3699271217 |
|
|
Aug 21 10:42:20 AM UTC 24 |
Aug 21 11:27:40 AM UTC 24 |
174278030121 ps |
| T409 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_smoke.1830976084 |
|
|
Aug 21 11:27:28 AM UTC 24 |
Aug 21 11:27:45 AM UTC 24 |
519967037 ps |
| T410 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_partial_access_b2b.171892106 |
|
|
Aug 21 11:21:12 AM UTC 24 |
Aug 21 11:27:54 AM UTC 24 |
13466415698 ps |
| T411 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_partial_access_b2b.3756062606 |
|
|
Aug 21 11:24:38 AM UTC 24 |
Aug 21 11:27:58 AM UTC 24 |
6403804278 ps |
| T412 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_mem_partial_access.2382518069 |
|
|
Aug 21 11:26:46 AM UTC 24 |
Aug 21 11:28:09 AM UTC 24 |
10213238112 ps |
| T413 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_partial_access.4191801402 |
|
|
Aug 21 11:27:59 AM UTC 24 |
Aug 21 11:28:22 AM UTC 24 |
4137524536 ps |
| T414 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_access_during_key_req.2038415864 |
|
|
Aug 21 11:12:56 AM UTC 24 |
Aug 21 11:29:00 AM UTC 24 |
66213353913 ps |
| T415 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_access_during_key_req.1732026531 |
|
|
Aug 21 11:15:39 AM UTC 24 |
Aug 21 11:29:04 AM UTC 24 |
53946370444 ps |
| T416 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_max_throughput.4192056119 |
|
|
Aug 21 11:28:22 AM UTC 24 |
Aug 21 11:29:42 AM UTC 24 |
805683468 ps |
| T417 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_mem_walk.2817882257 |
|
|
Aug 21 11:26:39 AM UTC 24 |
Aug 21 11:30:06 AM UTC 24 |
11012751642 ps |
| T418 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_throughput_w_partial_write.3516436550 |
|
|
Aug 21 11:29:01 AM UTC 24 |
Aug 21 11:30:51 AM UTC 24 |
4328065746 ps |
| T419 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_access_during_key_req.2259361133 |
|
|
Aug 21 11:09:35 AM UTC 24 |
Aug 21 11:30:52 AM UTC 24 |
26218581603 ps |
| T420 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_lc_escalation.750160460 |
|
|
Aug 21 11:29:05 AM UTC 24 |
Aug 21 11:30:57 AM UTC 24 |
169967002875 ps |
| T421 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_access_during_key_req.2374510565 |
|
|
Aug 21 11:21:41 AM UTC 24 |
Aug 21 11:30:59 AM UTC 24 |
10934120175 ps |
| T422 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_ram_cfg.1660171975 |
|
|
Aug 21 11:30:54 AM UTC 24 |
Aug 21 11:31:01 AM UTC 24 |
1413177156 ps |
| T423 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_executable.2474461552 |
|
|
Aug 21 11:09:48 AM UTC 24 |
Aug 21 11:31:10 AM UTC 24 |
23694748722 ps |
| T424 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/12.sram_ctrl_bijection.2656672787 |
|
|
Aug 21 10:57:53 AM UTC 24 |
Aug 21 11:31:12 AM UTC 24 |
386572348186 ps |
| T425 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_alert_test.1945745800 |
|
|
Aug 21 11:31:12 AM UTC 24 |
Aug 21 11:31:15 AM UTC 24 |
15002293 ps |
| T426 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/15.sram_ctrl_executable.316138909 |
|
|
Aug 21 11:06:47 AM UTC 24 |
Aug 21 11:31:24 AM UTC 24 |
89327746261 ps |
| T427 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_stress_pipeline.1944296984 |
|
|
Aug 21 11:27:55 AM UTC 24 |
Aug 21 11:31:37 AM UTC 24 |
4067351528 ps |
| T428 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_smoke.1182870974 |
|
|
Aug 21 11:31:15 AM UTC 24 |
Aug 21 11:31:39 AM UTC 24 |
1585090354 ps |
| T429 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/15.sram_ctrl_stress_all.3795015056 |
|
|
Aug 21 11:07:05 AM UTC 24 |
Aug 21 11:32:15 AM UTC 24 |
26316156953 ps |
| T430 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_regwen.1852721262 |
|
|
Aug 21 11:22:19 AM UTC 24 |
Aug 21 11:32:37 AM UTC 24 |
2757254731 ps |
| T50 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3535033050 |
|
|
Aug 21 11:31:02 AM UTC 24 |
Aug 21 11:32:43 AM UTC 24 |
17593977351 ps |
| T431 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_partial_access.804078849 |
|
|
Aug 21 11:32:16 AM UTC 24 |
Aug 21 11:32:43 AM UTC 24 |
3476474072 ps |
| T432 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_regwen.4251477798 |
|
|
Aug 21 11:19:25 AM UTC 24 |
Aug 21 11:33:10 AM UTC 24 |
92116142815 ps |
| T433 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_smoke.908030625 |
|
|
Aug 21 11:49:55 AM UTC 24 |
Aug 21 11:50:28 AM UTC 24 |
1699471293 ps |
| T434 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_throughput_w_partial_write.3366563466 |
|
|
Aug 21 11:32:44 AM UTC 24 |
Aug 21 11:33:44 AM UTC 24 |
1620243004 ps |
| T435 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_multiple_keys.924100491 |
|
|
Aug 21 11:20:34 AM UTC 24 |
Aug 21 11:33:48 AM UTC 24 |
16554697153 ps |
| T436 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_executable.3204659395 |
|
|
Aug 21 11:26:02 AM UTC 24 |
Aug 21 11:33:55 AM UTC 24 |
22237864571 ps |
| T437 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_mem_partial_access.2090639544 |
|
|
Aug 21 11:30:59 AM UTC 24 |
Aug 21 11:34:10 AM UTC 24 |
12149517845 ps |
| T438 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_lc_escalation.675672764 |
|
|
Aug 21 11:33:11 AM UTC 24 |
Aug 21 11:34:16 AM UTC 24 |
23425742097 ps |
| T439 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_ram_cfg.1079711540 |
|
|
Aug 21 11:34:11 AM UTC 24 |
Aug 21 11:34:19 AM UTC 24 |
677393617 ps |
| T440 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_max_throughput.693238450 |
|
|
Aug 21 11:32:43 AM UTC 24 |
Aug 21 11:34:31 AM UTC 24 |
806864785 ps |
| T441 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.122650152 |
|
|
Aug 21 11:34:33 AM UTC 24 |
Aug 21 11:34:44 AM UTC 24 |
381437867 ps |
| T442 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_mem_walk.571279304 |
|
|
Aug 21 11:30:58 AM UTC 24 |
Aug 21 11:35:32 AM UTC 24 |
15759389727 ps |
| T443 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_alert_test.732205941 |
|
|
Aug 21 11:35:33 AM UTC 24 |
Aug 21 11:35:35 AM UTC 24 |
39183212 ps |
| T444 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_partial_access_b2b.624578654 |
|
|
Aug 21 11:28:09 AM UTC 24 |
Aug 21 11:35:49 AM UTC 24 |
104257009191 ps |
| T445 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_multiple_keys.2761821505 |
|
|
Aug 21 11:31:25 AM UTC 24 |
Aug 21 11:35:49 AM UTC 24 |
11372592507 ps |
| T446 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_smoke.1059946412 |
|
|
Aug 21 11:35:36 AM UTC 24 |
Aug 21 11:35:52 AM UTC 24 |
476136555 ps |
| T447 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_multiple_keys.1843619973 |
|
|
Aug 21 11:23:50 AM UTC 24 |
Aug 21 11:36:04 AM UTC 24 |
12871047866 ps |
| T448 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_mem_partial_access.3286309602 |
|
|
Aug 21 11:34:19 AM UTC 24 |
Aug 21 11:36:05 AM UTC 24 |
8175949417 ps |
| T449 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_executable.3554345466 |
|
|
Aug 21 11:21:48 AM UTC 24 |
Aug 21 11:36:15 AM UTC 24 |
14692850056 ps |
| T450 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_stress_pipeline.3131851005 |
|
|
Aug 21 11:31:40 AM UTC 24 |
Aug 21 11:36:25 AM UTC 24 |
14330487211 ps |
| T451 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_partial_access.3045474568 |
|
|
Aug 21 11:35:58 AM UTC 24 |
Aug 21 11:36:25 AM UTC 24 |
489272692 ps |
| T452 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/2.sram_ctrl_stress_all.4219083627 |
|
|
Aug 21 10:28:09 AM UTC 24 |
Aug 21 11:36:28 AM UTC 24 |
628591479295 ps |
| T453 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_max_throughput.1798039018 |
|
|
Aug 21 11:36:06 AM UTC 24 |
Aug 21 11:36:31 AM UTC 24 |
1341354116 ps |
| T454 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/12.sram_ctrl_stress_all.277735583 |
|
|
Aug 21 10:59:48 AM UTC 24 |
Aug 21 11:36:33 AM UTC 24 |
39658611319 ps |
| T455 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_bijection.1381461733 |
|
|
Aug 21 11:20:50 AM UTC 24 |
Aug 21 11:36:38 AM UTC 24 |
48543041264 ps |
| T456 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_ram_cfg.972937936 |
|
|
Aug 21 11:36:34 AM UTC 24 |
Aug 21 11:36:41 AM UTC 24 |
2098292859 ps |
| T457 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_throughput_w_partial_write.518913196 |
|
|
Aug 21 11:36:16 AM UTC 24 |
Aug 21 11:37:04 AM UTC 24 |
1785125026 ps |
| T458 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_partial_access_b2b.746770605 |
|
|
Aug 21 11:32:37 AM UTC 24 |
Aug 21 11:37:11 AM UTC 24 |
26926375133 ps |
| T459 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_lc_escalation.1287655004 |
|
|
Aug 21 11:36:25 AM UTC 24 |
Aug 21 11:37:23 AM UTC 24 |
4503519668 ps |
| T460 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_alert_test.3391685578 |
|
|
Aug 21 11:37:24 AM UTC 24 |
Aug 21 11:37:26 AM UTC 24 |
14217315 ps |
| T461 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/3.sram_ctrl_stress_all.3561459229 |
|
|
Aug 21 10:30:15 AM UTC 24 |
Aug 21 11:37:37 AM UTC 24 |
217860979815 ps |
| T462 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_regwen.2008022146 |
|
|
Aug 21 11:33:56 AM UTC 24 |
Aug 21 11:37:39 AM UTC 24 |
19477064022 ps |
| T463 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_access_during_key_req.1074891330 |
|
|
Aug 21 11:36:27 AM UTC 24 |
Aug 21 11:37:39 AM UTC 24 |
2302744408 ps |
| T464 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_executable.1713514761 |
|
|
Aug 21 11:19:12 AM UTC 24 |
Aug 21 11:37:52 AM UTC 24 |
169088048000 ps |
| T465 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_smoke.3145549454 |
|
|
Aug 21 11:37:27 AM UTC 24 |
Aug 21 11:37:58 AM UTC 24 |
1430014533 ps |
| T466 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_access_during_key_req.3680621320 |
|
|
Aug 21 11:25:35 AM UTC 24 |
Aug 21 11:38:10 AM UTC 24 |
40058067988 ps |
| T467 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3716940564 |
|
|
Aug 21 11:37:05 AM UTC 24 |
Aug 21 11:38:10 AM UTC 24 |
7964532024 ps |
| T468 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_partial_access.2413100516 |
|
|
Aug 21 11:37:53 AM UTC 24 |
Aug 21 11:38:18 AM UTC 24 |
2384274028 ps |
| T469 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_throughput_w_partial_write.1423751028 |
|
|
Aug 21 11:38:11 AM UTC 24 |
Aug 21 11:38:21 AM UTC 24 |
1362935834 ps |
| T470 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_lc_escalation.2113071390 |
|
|
Aug 21 11:38:19 AM UTC 24 |
Aug 21 11:38:34 AM UTC 24 |
2792304133 ps |
| T471 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_max_throughput.3986112323 |
|
|
Aug 21 11:38:11 AM UTC 24 |
Aug 21 11:39:06 AM UTC 24 |
770504559 ps |
| T472 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_mem_partial_access.3566090069 |
|
|
Aug 21 11:36:42 AM UTC 24 |
Aug 21 11:39:24 AM UTC 24 |
5124268104 ps |
| T473 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_multiple_keys.3649572689 |
|
|
Aug 21 11:27:41 AM UTC 24 |
Aug 21 11:39:24 AM UTC 24 |
61317091694 ps |
| T474 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_ram_cfg.3937737453 |
|
|
Aug 21 11:39:25 AM UTC 24 |
Aug 21 11:39:32 AM UTC 24 |
358128718 ps |
| T475 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_bijection.2695828131 |
|
|
Aug 21 11:07:26 AM UTC 24 |
Aug 21 11:39:41 AM UTC 24 |
374345444976 ps |
| T476 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_mem_walk.3440455065 |
|
|
Aug 21 11:34:17 AM UTC 24 |
Aug 21 11:40:06 AM UTC 24 |
28243861066 ps |
| T477 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/15.sram_ctrl_bijection.2553112082 |
|
|
Aug 21 11:05:42 AM UTC 24 |
Aug 21 11:40:10 AM UTC 24 |
295097790494 ps |
| T478 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_alert_test.1391211877 |
|
|
Aug 21 11:40:11 AM UTC 24 |
Aug 21 11:40:13 AM UTC 24 |
102319414 ps |
| T479 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_stress_pipeline.1456657210 |
|
|
Aug 21 11:35:53 AM UTC 24 |
Aug 21 11:40:20 AM UTC 24 |
2973521315 ps |
| T480 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3623320717 |
|
|
Aug 21 11:39:42 AM UTC 24 |
Aug 21 11:40:35 AM UTC 24 |
6249910745 ps |
| T481 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_access_during_key_req.690729126 |
|
|
Aug 21 11:33:45 AM UTC 24 |
Aug 21 11:40:53 AM UTC 24 |
36770780555 ps |
| T482 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_mem_partial_access.2802415251 |
|
|
Aug 21 11:39:33 AM UTC 24 |
Aug 21 11:41:20 AM UTC 24 |
9705036915 ps |
| T483 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_mem_walk.1219438541 |
|
|
Aug 21 11:36:39 AM UTC 24 |
Aug 21 11:41:31 AM UTC 24 |
16418544514 ps |
| T484 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_smoke.4163903781 |
|
|
Aug 21 11:40:14 AM UTC 24 |
Aug 21 11:41:34 AM UTC 24 |
1051517862 ps |
| T485 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_partial_access.3845210087 |
|
|
Aug 21 11:41:21 AM UTC 24 |
Aug 21 11:41:35 AM UTC 24 |
722870403 ps |
| T486 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_regwen.1544014043 |
|
|
Aug 21 11:30:53 AM UTC 24 |
Aug 21 11:41:36 AM UTC 24 |
18984992394 ps |
| T487 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_executable.2572242954 |
|
|
Aug 21 11:36:29 AM UTC 24 |
Aug 21 11:41:55 AM UTC 24 |
10326993454 ps |
| T488 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_multiple_keys.1553603981 |
|
|
Aug 21 11:37:38 AM UTC 24 |
Aug 21 11:42:16 AM UTC 24 |
31325944992 ps |
| T489 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_max_throughput.662273376 |
|
|
Aug 21 11:41:35 AM UTC 24 |
Aug 21 11:42:22 AM UTC 24 |
2993971929 ps |
| T490 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_stress_pipeline.296015917 |
|
|
Aug 21 11:37:40 AM UTC 24 |
Aug 21 11:42:36 AM UTC 24 |
5098992699 ps |
| T491 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_ram_cfg.3917247411 |
|
|
Aug 21 11:42:37 AM UTC 24 |
Aug 21 11:42:43 AM UTC 24 |
471092309 ps |
| T492 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_lc_escalation.1842576468 |
|
|
Aug 21 11:41:37 AM UTC 24 |
Aug 21 11:42:44 AM UTC 24 |
34772104664 ps |
| T493 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_regwen.4011297684 |
|
|
Aug 21 11:36:32 AM UTC 24 |
Aug 21 11:42:54 AM UTC 24 |
8267317615 ps |
| T494 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_throughput_w_partial_write.887276588 |
|
|
Aug 21 11:41:36 AM UTC 24 |
Aug 21 11:43:02 AM UTC 24 |
3233673066 ps |
| T495 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_partial_access_b2b.4190166797 |
|
|
Aug 21 11:37:59 AM UTC 24 |
Aug 21 11:43:12 AM UTC 24 |
3602052665 ps |
| T496 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_alert_test.459764874 |
|
|
Aug 21 11:43:13 AM UTC 24 |
Aug 21 11:43:16 AM UTC 24 |
19651396 ps |
| T497 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_partial_access_b2b.1399566844 |
|
|
Aug 21 11:36:05 AM UTC 24 |
Aug 21 11:43:19 AM UTC 24 |
14904056179 ps |
| T498 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_bijection.2838319464 |
|
|
Aug 21 11:27:46 AM UTC 24 |
Aug 21 11:43:37 AM UTC 24 |
105871135806 ps |
| T499 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_mem_partial_access.664567476 |
|
|
Aug 21 11:42:45 AM UTC 24 |
Aug 21 11:43:59 AM UTC 24 |
29223701717 ps |
| T500 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2405948074 |
|
|
Aug 21 11:42:56 AM UTC 24 |
Aug 21 11:44:08 AM UTC 24 |
4637871249 ps |
| T501 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_smoke.2297370633 |
|
|
Aug 21 11:43:17 AM UTC 24 |
Aug 21 11:44:12 AM UTC 24 |
3050894933 ps |
| T502 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_stress_pipeline.2833865357 |
|
|
Aug 21 11:40:54 AM UTC 24 |
Aug 21 11:44:23 AM UTC 24 |
12428381736 ps |
| T503 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_partial_access.2391382620 |
|
|
Aug 21 11:44:09 AM UTC 24 |
Aug 21 11:44:48 AM UTC 24 |
14518380890 ps |
| T504 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_bijection.2661935848 |
|
|
Aug 21 11:24:10 AM UTC 24 |
Aug 21 11:44:49 AM UTC 24 |
177809424733 ps |
| T505 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_throughput_w_partial_write.2859519607 |
|
|
Aug 21 11:44:49 AM UTC 24 |
Aug 21 11:45:16 AM UTC 24 |
2972264183 ps |
| T506 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_lc_escalation.4192899587 |
|
|
Aug 21 11:44:50 AM UTC 24 |
Aug 21 11:45:27 AM UTC 24 |
13185636580 ps |
| T507 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_mem_walk.139777311 |
|
|
Aug 21 11:39:25 AM UTC 24 |
Aug 21 11:45:38 AM UTC 24 |
21104262109 ps |
| T508 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_max_throughput.328401937 |
|
|
Aug 21 11:44:25 AM UTC 24 |
Aug 21 11:45:40 AM UTC 24 |
765599497 ps |
| T509 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_ram_cfg.2894353283 |
|
|
Aug 21 11:45:41 AM UTC 24 |
Aug 21 11:45:47 AM UTC 24 |
712928108 ps |
| T510 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_access_during_key_req.2545909584 |
|
|
Aug 21 11:29:43 AM UTC 24 |
Aug 21 11:45:55 AM UTC 24 |
14317047822 ps |
| T511 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_mem_walk.692650926 |
|
|
Aug 21 11:42:45 AM UTC 24 |
Aug 21 11:46:00 AM UTC 24 |
14104262541 ps |
| T512 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_stress_all.2798585339 |
|
|
Aug 21 11:13:29 AM UTC 24 |
Aug 21 11:46:19 AM UTC 24 |
102889022031 ps |
| T513 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/14.sram_ctrl_bijection.2509964989 |
|
|
Aug 21 11:02:27 AM UTC 24 |
Aug 21 11:46:35 AM UTC 24 |
114999554623 ps |
| T514 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_stress_pipeline.2847616467 |
|
|
Aug 21 11:44:00 AM UTC 24 |
Aug 21 11:46:38 AM UTC 24 |
1913103123 ps |
| T515 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_alert_test.3412112655 |
|
|
Aug 21 11:46:36 AM UTC 24 |
Aug 21 11:46:38 AM UTC 24 |
37160496 ps |
| T516 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.999685744 |
|
|
Aug 21 11:46:01 AM UTC 24 |
Aug 21 11:47:08 AM UTC 24 |
1033679171 ps |
| T517 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_smoke.3851181899 |
|
|
Aug 21 11:46:39 AM UTC 24 |
Aug 21 11:47:14 AM UTC 24 |
3525072623 ps |
| T518 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_executable.902778857 |
|
|
Aug 21 11:33:49 AM UTC 24 |
Aug 21 11:47:22 AM UTC 24 |
58611934543 ps |
| T519 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_partial_access.1629254388 |
|
|
Aug 21 11:47:24 AM UTC 24 |
Aug 21 11:47:35 AM UTC 24 |
800463928 ps |
| T520 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_executable.2297921720 |
|
|
Aug 21 11:38:35 AM UTC 24 |
Aug 21 11:48:24 AM UTC 24 |
14431662939 ps |
| T521 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/13.sram_ctrl_bijection.3400213673 |
|
|
Aug 21 11:00:11 AM UTC 24 |
Aug 21 11:48:27 AM UTC 24 |
426132205770 ps |
| T522 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/17.sram_ctrl_bijection.1961729791 |
|
|
Aug 21 11:11:01 AM UTC 24 |
Aug 21 11:48:32 AM UTC 24 |
496945483533 ps |
| T523 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_partial_access_b2b.1234795786 |
|
|
Aug 21 11:41:32 AM UTC 24 |
Aug 21 11:48:33 AM UTC 24 |
13715185403 ps |
| T524 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_partial_access_b2b.3604590928 |
|
|
Aug 21 11:44:13 AM UTC 24 |
Aug 21 11:49:05 AM UTC 24 |
9870990923 ps |
| T525 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_access_during_key_req.691926737 |
|
|
Aug 21 11:41:56 AM UTC 24 |
Aug 21 11:49:06 AM UTC 24 |
30671231743 ps |
| T526 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_mem_partial_access.3477120445 |
|
|
Aug 21 11:45:56 AM UTC 24 |
Aug 21 11:49:12 AM UTC 24 |
4952670356 ps |
| T527 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_max_throughput.1372915164 |
|
|
Aug 21 11:48:25 AM UTC 24 |
Aug 21 11:49:17 AM UTC 24 |
1490091130 ps |
| T528 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_ram_cfg.543423425 |
|
|
Aug 21 11:49:13 AM UTC 24 |
Aug 21 11:49:19 AM UTC 24 |
371795118 ps |
| T529 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_multiple_keys.455871840 |
|
|
Aug 21 11:35:49 AM UTC 24 |
Aug 21 11:49:45 AM UTC 24 |
13455674621 ps |
| T530 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_mem_walk.3273198128 |
|
|
Aug 21 11:45:48 AM UTC 24 |
Aug 21 11:49:50 AM UTC 24 |
27636684081 ps |
| T531 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_throughput_w_partial_write.1491954422 |
|
|
Aug 21 11:48:28 AM UTC 24 |
Aug 21 11:49:51 AM UTC 24 |
790885460 ps |
| T532 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_alert_test.859862368 |
|
|
Aug 21 11:49:52 AM UTC 24 |
Aug 21 11:49:54 AM UTC 24 |
36169100 ps |
| T533 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_lc_escalation.597416563 |
|
|
Aug 21 11:48:32 AM UTC 24 |
Aug 21 11:50:02 AM UTC 24 |
10334621839 ps |
| T534 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/10.sram_ctrl_stress_all.715925700 |
|
|
Aug 21 10:54:18 AM UTC 24 |
Aug 21 11:50:32 AM UTC 24 |
70973377457 ps |
| T535 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3596737858 |
|
|
Aug 21 11:49:47 AM UTC 24 |
Aug 21 11:50:38 AM UTC 24 |
9670385490 ps |
| T536 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_access_during_key_req.3465911502 |
|
|
Aug 21 11:18:43 AM UTC 24 |
Aug 21 11:50:39 AM UTC 24 |
132074756165 ps |
| T537 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_mem_partial_access.4135158486 |
|
|
Aug 21 11:49:20 AM UTC 24 |
Aug 21 11:50:40 AM UTC 24 |
1419653863 ps |
| T538 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_regwen.3056993600 |
|
|
Aug 21 11:39:08 AM UTC 24 |
Aug 21 11:50:53 AM UTC 24 |
54503988094 ps |
| T539 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_ram_cfg.1175044406 |
|
|
Aug 21 11:50:54 AM UTC 24 |
Aug 21 11:51:01 AM UTC 24 |
828267271 ps |
| T540 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_stress_pipeline.2248512762 |
|
|
Aug 21 11:47:14 AM UTC 24 |
Aug 21 11:51:01 AM UTC 24 |
26481860642 ps |
| T541 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_partial_access.1705490304 |
|
|
Aug 21 11:50:31 AM UTC 24 |
Aug 21 11:51:02 AM UTC 24 |
2775725683 ps |
| T542 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_throughput_w_partial_write.1195634009 |
|
|
Aug 21 11:50:40 AM UTC 24 |
Aug 21 11:51:13 AM UTC 24 |
2910225981 ps |
| T543 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_alert_test.3243816131 |
|
|
Aug 21 11:51:11 AM UTC 24 |
Aug 21 11:51:14 AM UTC 24 |
12950910 ps |
| T544 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_executable.638419447 |
|
|
Aug 21 11:30:07 AM UTC 24 |
Aug 21 11:51:24 AM UTC 24 |
91240676862 ps |
| T545 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.3839343915 |
|
|
Aug 21 11:51:02 AM UTC 24 |
Aug 21 11:51:25 AM UTC 24 |
772468321 ps |
| T546 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_max_throughput.2220654562 |
|
|
Aug 21 11:50:39 AM UTC 24 |
Aug 21 11:51:31 AM UTC 24 |
759724372 ps |
| T547 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_max_throughput.990064 |
|
|
Aug 21 11:51:26 AM UTC 24 |
Aug 21 11:51:48 AM UTC 24 |
3254429109 ps |
| T548 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_lc_escalation.2529744942 |
|
|
Aug 21 11:50:40 AM UTC 24 |
Aug 21 11:51:52 AM UTC 24 |
41106994813 ps |
| T549 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_throughput_w_partial_write.380436774 |
|
|
Aug 21 11:51:29 AM UTC 24 |
Aug 21 11:51:53 AM UTC 24 |
2788607580 ps |
| T550 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_partial_access_b2b.767687269 |
|
|
Aug 21 11:47:36 AM UTC 24 |
Aug 21 11:51:59 AM UTC 24 |
18056780265 ps |
| T551 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_ram_cfg.808882204 |
|
|
Aug 21 11:51:54 AM UTC 24 |
Aug 21 11:52:02 AM UTC 24 |
1410528866 ps |
| T552 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_alert_test.674341643 |
|
|
Aug 21 11:52:11 AM UTC 24 |
Aug 21 11:52:15 AM UTC 24 |
61006868 ps |