| T803 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_multiple_keys.3863448882 |
|
|
Aug 21 12:10:41 PM UTC 24 |
Aug 21 12:27:20 PM UTC 24 |
18372660287 ps |
| T804 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_partial_access_b2b.4091918607 |
|
|
Aug 21 12:19:23 PM UTC 24 |
Aug 21 12:27:33 PM UTC 24 |
31901929664 ps |
| T805 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3348490668 |
|
|
Aug 21 12:27:14 PM UTC 24 |
Aug 21 12:27:33 PM UTC 24 |
1240515305 ps |
| T806 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_smoke.3097109581 |
|
|
Aug 21 12:27:20 PM UTC 24 |
Aug 21 12:27:34 PM UTC 24 |
1587438768 ps |
| T807 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_partial_access.2846731181 |
|
|
Aug 21 12:27:36 PM UTC 24 |
Aug 21 12:27:43 PM UTC 24 |
668789835 ps |
| T808 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_lc_escalation.3666274220 |
|
|
Aug 21 12:26:28 PM UTC 24 |
Aug 21 12:27:58 PM UTC 24 |
28559056768 ps |
| T809 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_stress_pipeline.1533701542 |
|
|
Aug 21 12:22:44 PM UTC 24 |
Aug 21 12:28:00 PM UTC 24 |
19717465421 ps |
| T810 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_stress_all.2757987078 |
|
|
Aug 21 11:34:45 AM UTC 24 |
Aug 21 12:28:13 PM UTC 24 |
107245404335 ps |
| T811 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_max_throughput.2146889114 |
|
|
Aug 21 12:27:59 PM UTC 24 |
Aug 21 12:28:13 PM UTC 24 |
803945756 ps |
| T812 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_partial_access_b2b.1666212143 |
|
|
Aug 21 12:23:10 PM UTC 24 |
Aug 21 12:28:20 PM UTC 24 |
125035559309 ps |
| T813 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_bijection.3912554695 |
|
|
Aug 21 12:13:40 PM UTC 24 |
Aug 21 12:28:33 PM UTC 24 |
12646014811 ps |
| T814 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_throughput_w_partial_write.2918415290 |
|
|
Aug 21 12:28:02 PM UTC 24 |
Aug 21 12:28:35 PM UTC 24 |
751333717 ps |
| T815 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_ram_cfg.2377423962 |
|
|
Aug 21 12:28:37 PM UTC 24 |
Aug 21 12:28:45 PM UTC 24 |
715688143 ps |
| T816 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_regwen.4170925343 |
|
|
Aug 21 12:12:12 PM UTC 24 |
Aug 21 12:28:48 PM UTC 24 |
60038626688 ps |
| T817 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_executable.4052694971 |
|
|
Aug 21 12:28:21 PM UTC 24 |
Aug 21 12:28:50 PM UTC 24 |
2668764538 ps |
| T818 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_lc_escalation.965495953 |
|
|
Aug 21 12:28:13 PM UTC 24 |
Aug 21 12:28:53 PM UTC 24 |
25457024071 ps |
| T819 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_multiple_keys.156089816 |
|
|
Aug 21 12:19:04 PM UTC 24 |
Aug 21 12:28:59 PM UTC 24 |
38483992694 ps |
| T820 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_alert_test.2423582821 |
|
|
Aug 21 12:29:00 PM UTC 24 |
Aug 21 12:29:03 PM UTC 24 |
54555196 ps |
| T821 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_access_during_key_req.2658280337 |
|
|
Aug 21 12:19:44 PM UTC 24 |
Aug 21 12:29:09 PM UTC 24 |
42426212645 ps |
| T822 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.4138936108 |
|
|
Aug 21 12:28:50 PM UTC 24 |
Aug 21 12:29:19 PM UTC 24 |
954598818 ps |
| T823 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_smoke.2984509619 |
|
|
Aug 21 12:29:04 PM UTC 24 |
Aug 21 12:29:29 PM UTC 24 |
883398401 ps |
| T824 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_access_during_key_req.461912597 |
|
|
Aug 21 12:17:31 PM UTC 24 |
Aug 21 12:29:39 PM UTC 24 |
44011488397 ps |
| T825 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_mem_walk.589560814 |
|
|
Aug 21 12:27:05 PM UTC 24 |
Aug 21 12:29:52 PM UTC 24 |
5259330134 ps |
| T826 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_mem_partial_access.3187368805 |
|
|
Aug 21 12:27:12 PM UTC 24 |
Aug 21 12:29:52 PM UTC 24 |
17533392907 ps |
| T827 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_partial_access.3531428778 |
|
|
Aug 21 12:29:40 PM UTC 24 |
Aug 21 12:30:03 PM UTC 24 |
2176980213 ps |
| T828 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_partial_access_b2b.87125590 |
|
|
Aug 21 12:25:48 PM UTC 24 |
Aug 21 12:30:07 PM UTC 24 |
19124131337 ps |
| T829 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_max_throughput.4268720252 |
|
|
Aug 21 12:29:53 PM UTC 24 |
Aug 21 12:30:17 PM UTC 24 |
2713851830 ps |
| T830 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_bijection.3354794580 |
|
|
Aug 21 12:00:35 PM UTC 24 |
Aug 21 12:30:36 PM UTC 24 |
320630143108 ps |
| T831 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_throughput_w_partial_write.2755132733 |
|
|
Aug 21 12:30:04 PM UTC 24 |
Aug 21 12:30:47 PM UTC 24 |
2959464608 ps |
| T832 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_partial_access_b2b.119136723 |
|
|
Aug 21 12:27:44 PM UTC 24 |
Aug 21 12:30:59 PM UTC 24 |
8840370323 ps |
| T833 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_multiple_keys.184289816 |
|
|
Aug 21 12:13:40 PM UTC 24 |
Aug 21 12:31:03 PM UTC 24 |
9286507305 ps |
| T834 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_ram_cfg.1976887486 |
|
|
Aug 21 12:30:59 PM UTC 24 |
Aug 21 12:31:07 PM UTC 24 |
352797868 ps |
| T835 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_regwen.1174983744 |
|
|
Aug 21 12:30:48 PM UTC 24 |
Aug 21 12:31:11 PM UTC 24 |
559645393 ps |
| T836 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_stress_pipeline.490362315 |
|
|
Aug 21 12:25:41 PM UTC 24 |
Aug 21 12:31:17 PM UTC 24 |
10298732228 ps |
| T837 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_access_during_key_req.2961306827 |
|
|
Aug 21 12:07:13 PM UTC 24 |
Aug 21 12:31:22 PM UTC 24 |
16041777750 ps |
| T838 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_alert_test.2557715686 |
|
|
Aug 21 12:31:24 PM UTC 24 |
Aug 21 12:31:27 PM UTC 24 |
13182780 ps |
| T839 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_multiple_keys.1131795585 |
|
|
Aug 21 12:20:34 PM UTC 24 |
Aug 21 12:31:33 PM UTC 24 |
159652080142 ps |
| T840 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1885823964 |
|
|
Aug 21 12:31:12 PM UTC 24 |
Aug 21 12:31:38 PM UTC 24 |
630520429 ps |
| T841 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_lc_escalation.290426988 |
|
|
Aug 21 12:30:08 PM UTC 24 |
Aug 21 12:31:45 PM UTC 24 |
47442563263 ps |
| T842 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_access_during_key_req.3062868076 |
|
|
Aug 21 12:30:17 PM UTC 24 |
Aug 21 12:31:48 PM UTC 24 |
3721094579 ps |
| T843 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_mem_partial_access.718046584 |
|
|
Aug 21 12:28:49 PM UTC 24 |
Aug 21 12:32:00 PM UTC 24 |
15651254454 ps |
| T844 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_regwen.3024349318 |
|
|
Aug 21 12:17:42 PM UTC 24 |
Aug 21 12:32:16 PM UTC 24 |
53170921832 ps |
| T845 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_smoke.1531857549 |
|
|
Aug 21 12:31:28 PM UTC 24 |
Aug 21 12:32:24 PM UTC 24 |
1097355600 ps |
| T846 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_bijection.2391349288 |
|
|
Aug 21 12:16:33 PM UTC 24 |
Aug 21 12:32:46 PM UTC 24 |
38421364517 ps |
| T847 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_multiple_keys.3012625690 |
|
|
Aug 21 12:25:23 PM UTC 24 |
Aug 21 12:32:46 PM UTC 24 |
45692704365 ps |
| T848 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_max_throughput.4137893428 |
|
|
Aug 21 12:32:17 PM UTC 24 |
Aug 21 12:32:56 PM UTC 24 |
7191910919 ps |
| T849 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_mem_partial_access.1735124599 |
|
|
Aug 21 12:31:09 PM UTC 24 |
Aug 21 12:33:07 PM UTC 24 |
2699707331 ps |
| T850 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_partial_access.1373456453 |
|
|
Aug 21 12:31:49 PM UTC 24 |
Aug 21 12:33:09 PM UTC 24 |
1275959032 ps |
| T851 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_stress_all.580583716 |
|
|
Aug 21 12:05:55 PM UTC 24 |
Aug 21 12:33:12 PM UTC 24 |
612078005982 ps |
| T852 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_ram_cfg.134454931 |
|
|
Aug 21 12:33:10 PM UTC 24 |
Aug 21 12:33:16 PM UTC 24 |
713130057 ps |
| T853 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_throughput_w_partial_write.2504383025 |
|
|
Aug 21 12:32:25 PM UTC 24 |
Aug 21 12:33:27 PM UTC 24 |
888404850 ps |
| T854 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_mem_walk.3347230590 |
|
|
Aug 21 12:31:04 PM UTC 24 |
Aug 21 12:33:32 PM UTC 24 |
4036755659 ps |
| T855 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_stress_pipeline.3769006152 |
|
|
Aug 21 12:27:34 PM UTC 24 |
Aug 21 12:33:55 PM UTC 24 |
8646508786 ps |
| T856 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_regwen.1455499633 |
|
|
Aug 21 12:15:11 PM UTC 24 |
Aug 21 12:33:56 PM UTC 24 |
3650908668 ps |
| T857 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_executable.4118006201 |
|
|
Aug 21 12:23:32 PM UTC 24 |
Aug 21 12:33:58 PM UTC 24 |
66654016808 ps |
| T858 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_alert_test.3941444501 |
|
|
Aug 21 12:33:57 PM UTC 24 |
Aug 21 12:33:59 PM UTC 24 |
15393360 ps |
| T859 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1283709314 |
|
|
Aug 21 12:33:28 PM UTC 24 |
Aug 21 12:34:12 PM UTC 24 |
6600061453 ps |
| T860 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_stress_pipeline.4081353770 |
|
|
Aug 21 12:29:29 PM UTC 24 |
Aug 21 12:34:22 PM UTC 24 |
12586973923 ps |
| T861 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_regwen.1536994400 |
|
|
Aug 21 12:26:53 PM UTC 24 |
Aug 21 12:34:35 PM UTC 24 |
8178746700 ps |
| T862 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_lc_escalation.930229117 |
|
|
Aug 21 12:32:47 PM UTC 24 |
Aug 21 12:34:40 PM UTC 24 |
42708242983 ps |
| T863 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_multiple_keys.97233368 |
|
|
Aug 21 12:31:34 PM UTC 24 |
Aug 21 12:34:45 PM UTC 24 |
5538173230 ps |
| T864 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_partial_access.1866289602 |
|
|
Aug 21 12:34:23 PM UTC 24 |
Aug 21 12:34:46 PM UTC 24 |
880342443 ps |
| T865 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_max_throughput.2254107269 |
|
|
Aug 21 12:34:41 PM UTC 24 |
Aug 21 12:34:55 PM UTC 24 |
711803104 ps |
| T866 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_mem_walk.3915312426 |
|
|
Aug 21 12:28:46 PM UTC 24 |
Aug 21 12:34:57 PM UTC 24 |
18915950179 ps |
| T867 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_smoke.2534529216 |
|
|
Aug 21 12:33:57 PM UTC 24 |
Aug 21 12:34:57 PM UTC 24 |
745342110 ps |
| T868 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_partial_access_b2b.3009883215 |
|
|
Aug 21 12:29:53 PM UTC 24 |
Aug 21 12:35:00 PM UTC 24 |
5458548984 ps |
| T869 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_executable.2688311974 |
|
|
Aug 21 12:19:44 PM UTC 24 |
Aug 21 12:35:02 PM UTC 24 |
20738774423 ps |
| T870 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_ram_cfg.232343834 |
|
|
Aug 21 12:35:01 PM UTC 24 |
Aug 21 12:35:09 PM UTC 24 |
1407993945 ps |
| T871 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_throughput_w_partial_write.1595216729 |
|
|
Aug 21 12:34:46 PM UTC 24 |
Aug 21 12:35:17 PM UTC 24 |
721005425 ps |
| T872 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_executable.3458649227 |
|
|
Aug 21 12:17:38 PM UTC 24 |
Aug 21 12:35:27 PM UTC 24 |
54399279219 ps |
| T873 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_bijection.3734040834 |
|
|
Aug 21 12:20:49 PM UTC 24 |
Aug 21 12:35:28 PM UTC 24 |
603770734123 ps |
| T874 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_stress_pipeline.4161019872 |
|
|
Aug 21 12:31:46 PM UTC 24 |
Aug 21 12:35:30 PM UTC 24 |
2815130748 ps |
| T875 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_alert_test.2116782127 |
|
|
Aug 21 12:35:28 PM UTC 24 |
Aug 21 12:35:30 PM UTC 24 |
13150663 ps |
| T876 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_regwen.2390239303 |
|
|
Aug 21 12:23:53 PM UTC 24 |
Aug 21 12:35:36 PM UTC 24 |
7640833073 ps |
| T877 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_lc_escalation.4098251375 |
|
|
Aug 21 12:34:47 PM UTC 24 |
Aug 21 12:35:43 PM UTC 24 |
41884571431 ps |
| T878 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_smoke.4075643092 |
|
|
Aug 21 12:35:29 PM UTC 24 |
Aug 21 12:35:52 PM UTC 24 |
1014409875 ps |
| T879 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_partial_access.3763469999 |
|
|
Aug 21 12:35:44 PM UTC 24 |
Aug 21 12:35:55 PM UTC 24 |
848196651 ps |
| T880 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1669288725 |
|
|
Aug 21 12:35:09 PM UTC 24 |
Aug 21 12:36:25 PM UTC 24 |
1628416638 ps |
| T881 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_max_throughput.2161371877 |
|
|
Aug 21 12:35:56 PM UTC 24 |
Aug 21 12:36:32 PM UTC 24 |
1659551553 ps |
| T882 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_stress_all.3868593155 |
|
|
Aug 21 11:37:12 AM UTC 24 |
Aug 21 12:36:41 PM UTC 24 |
65912854734 ps |
| T883 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_mem_walk.29922319 |
|
|
Aug 21 12:35:03 PM UTC 24 |
Aug 21 12:37:02 PM UTC 24 |
2505295888 ps |
| T884 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_mem_partial_access.1417412099 |
|
|
Aug 21 12:33:17 PM UTC 24 |
Aug 21 12:37:12 PM UTC 24 |
37808723168 ps |
| T885 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_throughput_w_partial_write.2644292997 |
|
|
Aug 21 12:36:26 PM UTC 24 |
Aug 21 12:37:15 PM UTC 24 |
9362413992 ps |
| T886 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_mem_partial_access.2801804168 |
|
|
Aug 21 12:35:08 PM UTC 24 |
Aug 21 12:37:18 PM UTC 24 |
10599100153 ps |
| T887 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_ram_cfg.235615353 |
|
|
Aug 21 12:37:16 PM UTC 24 |
Aug 21 12:37:23 PM UTC 24 |
1344533946 ps |
| T888 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_stress_all.164936520 |
|
|
Aug 21 11:46:20 AM UTC 24 |
Aug 21 12:37:33 PM UTC 24 |
139768595106 ps |
| T889 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_lc_escalation.3358557109 |
|
|
Aug 21 12:36:33 PM UTC 24 |
Aug 21 12:37:33 PM UTC 24 |
6784101036 ps |
| T890 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_executable.4246793430 |
|
|
Aug 21 12:26:46 PM UTC 24 |
Aug 21 12:38:01 PM UTC 24 |
177708284937 ps |
| T891 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_alert_test.1648238642 |
|
|
Aug 21 12:38:02 PM UTC 24 |
Aug 21 12:38:05 PM UTC 24 |
14236601 ps |
| T892 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_mem_walk.3705025583 |
|
|
Aug 21 12:33:12 PM UTC 24 |
Aug 21 12:38:10 PM UTC 24 |
5364965223 ps |
| T893 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3246503618 |
|
|
Aug 21 12:37:34 PM UTC 24 |
Aug 21 12:38:10 PM UTC 24 |
2393655418 ps |
| T894 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_stress_pipeline.4021706313 |
|
|
Aug 21 12:34:13 PM UTC 24 |
Aug 21 12:38:19 PM UTC 24 |
13649478023 ps |
| T895 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_mem_partial_access.736385899 |
|
|
Aug 21 12:37:24 PM UTC 24 |
Aug 21 12:38:45 PM UTC 24 |
2488754629 ps |
| T896 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_access_during_key_req.2728668338 |
|
|
Aug 21 12:26:31 PM UTC 24 |
Aug 21 12:38:57 PM UTC 24 |
50638449180 ps |
| T897 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_executable.2429554092 |
|
|
Aug 21 12:34:57 PM UTC 24 |
Aug 21 12:38:57 PM UTC 24 |
9027375972 ps |
| T898 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_partial_access_b2b.1879279980 |
|
|
Aug 21 12:32:01 PM UTC 24 |
Aug 21 12:40:09 PM UTC 24 |
62249506828 ps |
| T899 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_regwen.476843239 |
|
|
Aug 21 12:34:59 PM UTC 24 |
Aug 21 12:40:17 PM UTC 24 |
8299791016 ps |
| T900 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_executable.1992040560 |
|
|
Aug 21 12:21:45 PM UTC 24 |
Aug 21 12:40:30 PM UTC 24 |
114263112491 ps |
| T901 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_executable.3676530616 |
|
|
Aug 21 12:30:37 PM UTC 24 |
Aug 21 12:40:35 PM UTC 24 |
6649978596 ps |
| T902 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_partial_access_b2b.1935718031 |
|
|
Aug 21 12:34:36 PM UTC 24 |
Aug 21 12:40:47 PM UTC 24 |
35176624021 ps |
| T903 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_stress_pipeline.426901248 |
|
|
Aug 21 12:35:37 PM UTC 24 |
Aug 21 12:40:58 PM UTC 24 |
5132585633 ps |
| T904 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_access_during_key_req.1610147980 |
|
|
Aug 21 12:32:48 PM UTC 24 |
Aug 21 12:41:56 PM UTC 24 |
35848011652 ps |
| T905 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_access_during_key_req.1893059227 |
|
|
Aug 21 12:36:42 PM UTC 24 |
Aug 21 12:42:15 PM UTC 24 |
5642251876 ps |
| T906 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_multiple_keys.2326446703 |
|
|
Aug 21 12:29:10 PM UTC 24 |
Aug 21 12:42:46 PM UTC 24 |
32718318259 ps |
| T907 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/11.sram_ctrl_stress_all.3381683496 |
|
|
Aug 21 10:56:48 AM UTC 24 |
Aug 21 12:43:02 PM UTC 24 |
563907863642 ps |
| T908 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_bijection.3946510732 |
|
|
Aug 21 12:02:58 PM UTC 24 |
Aug 21 12:43:15 PM UTC 24 |
244087732806 ps |
| T909 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_executable.1349262474 |
|
|
Aug 21 12:37:02 PM UTC 24 |
Aug 21 12:43:21 PM UTC 24 |
42019739849 ps |
| T910 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_partial_access_b2b.199588324 |
|
|
Aug 21 12:35:53 PM UTC 24 |
Aug 21 12:44:05 PM UTC 24 |
7444449778 ps |
| T911 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_mem_walk.3612224592 |
|
|
Aug 21 12:37:19 PM UTC 24 |
Aug 21 12:44:36 PM UTC 24 |
82828628383 ps |
| T912 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_stress_all.3249877434 |
|
|
Aug 21 12:20:03 PM UTC 24 |
Aug 21 12:44:53 PM UTC 24 |
314319695362 ps |
| T913 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_regwen.4275730859 |
|
|
Aug 21 12:21:53 PM UTC 24 |
Aug 21 12:45:03 PM UTC 24 |
21464210288 ps |
| T914 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_multiple_keys.1718307844 |
|
|
Aug 21 12:35:30 PM UTC 24 |
Aug 21 12:46:07 PM UTC 24 |
4328051838 ps |
| T915 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_bijection.4107947817 |
|
|
Aug 21 12:10:50 PM UTC 24 |
Aug 21 12:46:19 PM UTC 24 |
184130134027 ps |
| T916 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_bijection.1099628754 |
|
|
Aug 21 12:29:20 PM UTC 24 |
Aug 21 12:46:35 PM UTC 24 |
14097559109 ps |
| T917 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_access_during_key_req.523595102 |
|
|
Aug 21 12:34:56 PM UTC 24 |
Aug 21 12:47:29 PM UTC 24 |
11711489274 ps |
| T918 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_bijection.2024543974 |
|
|
Aug 21 12:31:39 PM UTC 24 |
Aug 21 12:48:10 PM UTC 24 |
180353428469 ps |
| T919 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_executable.3503513562 |
|
|
Aug 21 12:32:57 PM UTC 24 |
Aug 21 12:49:03 PM UTC 24 |
87379758077 ps |
| T920 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_stress_all.2206491671 |
|
|
Aug 21 12:08:18 PM UTC 24 |
Aug 21 12:49:06 PM UTC 24 |
64857440202 ps |
| T921 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_multiple_keys.3292522331 |
|
|
Aug 21 12:27:21 PM UTC 24 |
Aug 21 12:50:00 PM UTC 24 |
110695931207 ps |
| T922 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_regwen.2989245816 |
|
|
Aug 21 12:28:34 PM UTC 24 |
Aug 21 12:50:52 PM UTC 24 |
5007717425 ps |
| T923 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_stress_all.2136560692 |
|
|
Aug 21 12:10:23 PM UTC 24 |
Aug 21 12:52:24 PM UTC 24 |
370821547227 ps |
| T924 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_regwen.1122485091 |
|
|
Aug 21 12:37:12 PM UTC 24 |
Aug 21 12:52:31 PM UTC 24 |
21686645293 ps |
| T925 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_regwen.3373971206 |
|
|
Aug 21 12:33:08 PM UTC 24 |
Aug 21 12:52:35 PM UTC 24 |
14353002322 ps |
| T926 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_bijection.2987947738 |
|
|
Aug 21 12:19:06 PM UTC 24 |
Aug 21 12:54:04 PM UTC 24 |
110523208828 ps |
| T927 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_access_during_key_req.3087615124 |
|
|
Aug 21 12:28:15 PM UTC 24 |
Aug 21 12:54:45 PM UTC 24 |
71866757466 ps |
| T928 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_access_during_key_req.879323505 |
|
|
Aug 21 12:23:24 PM UTC 24 |
Aug 21 12:56:19 PM UTC 24 |
48064036923 ps |
| T929 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_bijection.3384801314 |
|
|
Aug 21 12:35:32 PM UTC 24 |
Aug 21 01:00:02 PM UTC 24 |
158467222789 ps |
| T930 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_bijection.3061712703 |
|
|
Aug 21 12:34:00 PM UTC 24 |
Aug 21 01:00:57 PM UTC 24 |
94907155766 ps |
| T931 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_stress_all.3239890801 |
|
|
Aug 21 11:43:03 AM UTC 24 |
Aug 21 01:01:31 PM UTC 24 |
165598296789 ps |
| T932 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_stress_all.3173395341 |
|
|
Aug 21 11:56:44 AM UTC 24 |
Aug 21 01:02:31 PM UTC 24 |
154318911348 ps |
| T933 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_stress_all.547283816 |
|
|
Aug 21 11:52:07 AM UTC 24 |
Aug 21 01:02:39 PM UTC 24 |
196934049859 ps |
| T934 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_bijection.3148102640 |
|
|
Aug 21 12:27:34 PM UTC 24 |
Aug 21 01:03:39 PM UTC 24 |
27747714769 ps |
| T935 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_bijection.3221100201 |
|
|
Aug 21 12:25:24 PM UTC 24 |
Aug 21 01:04:44 PM UTC 24 |
122292553208 ps |
| T936 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/8.sram_ctrl_stress_all.3723558081 |
|
|
Aug 21 10:46:33 AM UTC 24 |
Aug 21 01:06:18 PM UTC 24 |
723178296356 ps |
| T937 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_stress_all.792636106 |
|
|
Aug 21 11:49:51 AM UTC 24 |
Aug 21 01:09:42 PM UTC 24 |
269151789754 ps |
| T938 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/16.sram_ctrl_stress_all.2861480766 |
|
|
Aug 21 11:10:21 AM UTC 24 |
Aug 21 01:10:20 PM UTC 24 |
656388031510 ps |
| T939 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_bijection.770279931 |
|
|
Aug 21 12:22:40 PM UTC 24 |
Aug 21 01:10:30 PM UTC 24 |
550074258349 ps |
| T940 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_stress_all.3399271636 |
|
|
Aug 21 12:22:25 PM UTC 24 |
Aug 21 01:10:53 PM UTC 24 |
2004173188704 ps |
| T941 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/14.sram_ctrl_stress_all.3109925568 |
|
|
Aug 21 11:05:27 AM UTC 24 |
Aug 21 01:11:37 PM UTC 24 |
1151207533622 ps |
| T942 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_stress_all.3297349550 |
|
|
Aug 21 11:59:28 AM UTC 24 |
Aug 21 01:16:19 PM UTC 24 |
586745191939 ps |
| T943 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_stress_all.3447123126 |
|
|
Aug 21 11:40:07 AM UTC 24 |
Aug 21 01:19:54 PM UTC 24 |
1716540893303 ps |
| T944 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/49.sram_ctrl_stress_all.3170647404 |
|
|
Aug 21 12:37:34 PM UTC 24 |
Aug 21 01:22:35 PM UTC 24 |
168104737306 ps |
| T945 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_stress_all.1894600646 |
|
|
Aug 21 12:02:27 PM UTC 24 |
Aug 21 01:23:10 PM UTC 24 |
197978496611 ps |
| T946 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_stress_all.4050071224 |
|
|
Aug 21 12:16:22 PM UTC 24 |
Aug 21 01:29:20 PM UTC 24 |
169402596561 ps |
| T947 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_stress_all.3184420948 |
|
|
Aug 21 12:18:49 PM UTC 24 |
Aug 21 01:35:34 PM UTC 24 |
157775544085 ps |
| T948 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_stress_all.4156897030 |
|
|
Aug 21 12:27:14 PM UTC 24 |
Aug 21 01:46:58 PM UTC 24 |
236281271229 ps |
| T949 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_stress_all.2152271502 |
|
|
Aug 21 12:13:35 PM UTC 24 |
Aug 21 01:52:24 PM UTC 24 |
530594877188 ps |
| T950 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_stress_all.1049880621 |
|
|
Aug 21 12:25:03 PM UTC 24 |
Aug 21 01:55:20 PM UTC 24 |
1080494022763 ps |
| T951 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/47.sram_ctrl_stress_all.971049641 |
|
|
Aug 21 12:33:32 PM UTC 24 |
Aug 21 01:56:06 PM UTC 24 |
214955151137 ps |
| T952 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/45.sram_ctrl_stress_all.3027757566 |
|
|
Aug 21 12:28:54 PM UTC 24 |
Aug 21 01:57:21 PM UTC 24 |
474491623791 ps |
| T953 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/48.sram_ctrl_stress_all.3917670319 |
|
|
Aug 21 12:35:19 PM UTC 24 |
Aug 21 02:31:45 PM UTC 24 |
91451363473 ps |
| T954 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/46.sram_ctrl_stress_all.2860340739 |
|
|
Aug 21 12:31:18 PM UTC 24 |
Aug 21 02:34:20 PM UTC 24 |
377760149295 ps |
| T67 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1703520494 |
|
|
Aug 21 07:48:51 AM UTC 24 |
Aug 21 07:48:56 AM UTC 24 |
14685981 ps |
| T955 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.732162435 |
|
|
Aug 21 07:48:51 AM UTC 24 |
Aug 21 07:48:56 AM UTC 24 |
23166615 ps |
| T68 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.4101804463 |
|
|
Aug 21 07:48:51 AM UTC 24 |
Aug 21 07:48:56 AM UTC 24 |
41469967 ps |
| T69 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2886692765 |
|
|
Aug 21 07:48:51 AM UTC 24 |
Aug 21 07:48:56 AM UTC 24 |
78541897 ps |
| T115 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.987125864 |
|
|
Aug 21 07:48:51 AM UTC 24 |
Aug 21 07:48:57 AM UTC 24 |
252516138 ps |
| T74 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3993887304 |
|
|
Aug 21 07:48:55 AM UTC 24 |
Aug 21 07:48:57 AM UTC 24 |
11677168 ps |
| T116 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3587430678 |
|
|
Aug 21 07:48:55 AM UTC 24 |
Aug 21 07:48:57 AM UTC 24 |
25236142 ps |
| T64 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1717394529 |
|
|
Aug 21 07:48:51 AM UTC 24 |
Aug 21 07:48:57 AM UTC 24 |
440907802 ps |
| T117 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1275838005 |
|
|
Aug 21 07:48:55 AM UTC 24 |
Aug 21 07:48:57 AM UTC 24 |
46013157 ps |
| T103 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3035502065 |
|
|
Aug 21 07:48:55 AM UTC 24 |
Aug 21 07:48:57 AM UTC 24 |
120678574 ps |
| T65 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1002747025 |
|
|
Aug 21 07:48:55 AM UTC 24 |
Aug 21 07:48:58 AM UTC 24 |
102056088 ps |
| T75 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2426235819 |
|
|
Aug 21 07:48:55 AM UTC 24 |
Aug 21 07:48:58 AM UTC 24 |
86072479 ps |
| T956 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2668991462 |
|
|
Aug 21 07:48:53 AM UTC 24 |
Aug 21 07:48:58 AM UTC 24 |
1578393767 ps |
| T957 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2154841466 |
|
|
Aug 21 07:48:51 AM UTC 24 |
Aug 21 07:48:59 AM UTC 24 |
353073365 ps |
| T958 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2343844230 |
|
|
Aug 21 07:48:55 AM UTC 24 |
Aug 21 07:49:00 AM UTC 24 |
694052527 ps |
| T959 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2867168013 |
|
|
Aug 21 07:49:08 AM UTC 24 |
Aug 21 07:49:12 AM UTC 24 |
27132248 ps |
| T118 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1056298699 |
|
|
Aug 21 07:48:57 AM UTC 24 |
Aug 21 07:49:00 AM UTC 24 |
67133103 ps |
| T76 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3353582138 |
|
|
Aug 21 07:48:57 AM UTC 24 |
Aug 21 07:49:00 AM UTC 24 |
26347706 ps |
| T77 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2638197276 |
|
|
Aug 21 07:48:57 AM UTC 24 |
Aug 21 07:49:00 AM UTC 24 |
17943461 ps |
| T960 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.4072111058 |
|
|
Aug 21 07:48:57 AM UTC 24 |
Aug 21 07:49:00 AM UTC 24 |
17798971 ps |
| T961 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_csr_rw.981277895 |
|
|
Aug 21 07:48:57 AM UTC 24 |
Aug 21 07:49:00 AM UTC 24 |
41280225 ps |
| T962 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2954118337 |
|
|
Aug 21 07:48:55 AM UTC 24 |
Aug 21 07:49:00 AM UTC 24 |
121368762 ps |
| T963 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2152686223 |
|
|
Aug 21 07:48:57 AM UTC 24 |
Aug 21 07:49:00 AM UTC 24 |
36617103 ps |
| T78 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.4074948857 |
|
|
Aug 21 07:48:58 AM UTC 24 |
Aug 21 07:49:01 AM UTC 24 |
16223542 ps |
| T79 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.291261880 |
|
|
Aug 21 07:48:58 AM UTC 24 |
Aug 21 07:49:01 AM UTC 24 |
15039337 ps |
| T66 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2572046214 |
|
|
Aug 21 07:48:57 AM UTC 24 |
Aug 21 07:49:01 AM UTC 24 |
178550683 ps |
| T964 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_tl_errors.310481377 |
|
|
Aug 21 07:48:57 AM UTC 24 |
Aug 21 07:49:01 AM UTC 24 |
48220517 ps |
| T965 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2738308076 |
|
|
Aug 21 07:48:57 AM UTC 24 |
Aug 21 07:49:01 AM UTC 24 |
41510548 ps |
| T129 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3323621292 |
|
|
Aug 21 07:48:58 AM UTC 24 |
Aug 21 07:49:01 AM UTC 24 |
322776167 ps |
| T966 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.4075659793 |
|
|
Aug 21 07:48:58 AM UTC 24 |
Aug 21 07:49:02 AM UTC 24 |
1118793987 ps |
| T130 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.922580775 |
|
|
Aug 21 07:48:57 AM UTC 24 |
Aug 21 07:49:02 AM UTC 24 |
261532207 ps |
| T967 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1709149560 |
|
|
Aug 21 07:48:57 AM UTC 24 |
Aug 21 07:49:03 AM UTC 24 |
106990226 ps |
| T968 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1991954588 |
|
|
Aug 21 07:48:58 AM UTC 24 |
Aug 21 07:49:04 AM UTC 24 |
164172854 ps |
| T969 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3993880706 |
|
|
Aug 21 07:48:57 AM UTC 24 |
Aug 21 07:49:04 AM UTC 24 |
3462499575 ps |
| T970 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3354254357 |
|
|
Aug 21 07:48:58 AM UTC 24 |
Aug 21 07:49:04 AM UTC 24 |
6920457777 ps |
| T80 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1690063331 |
|
|
Aug 21 07:49:00 AM UTC 24 |
Aug 21 07:49:05 AM UTC 24 |
24450221 ps |
| T81 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3537447756 |
|
|
Aug 21 07:49:01 AM UTC 24 |
Aug 21 07:49:05 AM UTC 24 |
27566304 ps |
| T104 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3877152740 |
|
|
Aug 21 07:49:01 AM UTC 24 |
Aug 21 07:49:06 AM UTC 24 |
39347882 ps |
| T82 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/9.sram_ctrl_csr_rw.981705687 |
|
|
Aug 21 07:49:04 AM UTC 24 |
Aug 21 07:49:06 AM UTC 24 |
20568184 ps |
| T105 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.552916105 |
|
|
Aug 21 07:49:04 AM UTC 24 |
Aug 21 07:49:06 AM UTC 24 |
21300495 ps |
| T106 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.4173255305 |
|
|
Aug 21 07:49:02 AM UTC 24 |
Aug 21 07:49:07 AM UTC 24 |
26860428 ps |
| T971 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2395541544 |
|
|
Aug 21 07:49:00 AM UTC 24 |
Aug 21 07:49:07 AM UTC 24 |
40799792 ps |
| T131 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1922917632 |
|
|
Aug 21 07:49:00 AM UTC 24 |
Aug 21 07:49:07 AM UTC 24 |
577027743 ps |
| T132 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3786112335 |
|
|
Aug 21 07:49:04 AM UTC 24 |
Aug 21 07:49:07 AM UTC 24 |
337643686 ps |
| T972 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1287166764 |
|
|
Aug 21 07:49:01 AM UTC 24 |
Aug 21 07:49:07 AM UTC 24 |
75851326 ps |
| T973 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2287290077 |
|
|
Aug 21 07:49:03 AM UTC 24 |
Aug 21 07:49:07 AM UTC 24 |
123743925 ps |
| T138 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1572676351 |
|
|
Aug 21 07:49:01 AM UTC 24 |
Aug 21 07:49:07 AM UTC 24 |
280145714 ps |
| T974 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2684706535 |
|
|
Aug 21 07:49:02 AM UTC 24 |
Aug 21 07:49:08 AM UTC 24 |
365034997 ps |
| T975 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3930189930 |
|
|
Aug 21 07:49:01 AM UTC 24 |
Aug 21 07:49:08 AM UTC 24 |
362780975 ps |
| T976 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/8.sram_ctrl_tl_errors.4064953798 |
|
|
Aug 21 07:49:02 AM UTC 24 |
Aug 21 07:49:08 AM UTC 24 |
254839029 ps |
| T133 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2731794992 |
|
|
Aug 21 07:49:02 AM UTC 24 |
Aug 21 07:49:08 AM UTC 24 |
340207861 ps |
| T977 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3231782275 |
|
|
Aug 21 07:49:04 AM UTC 24 |
Aug 21 07:49:09 AM UTC 24 |
372022190 ps |
| T978 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2889210394 |
|
|
Aug 21 07:49:02 AM UTC 24 |
Aug 21 07:49:10 AM UTC 24 |
28882939 ps |
| T107 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3467968355 |
|
|
Aug 21 07:49:02 AM UTC 24 |
Aug 21 07:49:10 AM UTC 24 |
16053775 ps |
| T979 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2569415278 |
|
|
Aug 21 07:49:02 AM UTC 24 |
Aug 21 07:49:10 AM UTC 24 |
2134313539 ps |
| T980 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.39771833 |
|
|
Aug 21 07:48:58 AM UTC 24 |
Aug 21 07:49:10 AM UTC 24 |
41472649 ps |
| T84 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3536806589 |
|
|
Aug 21 07:49:08 AM UTC 24 |
Aug 21 07:49:11 AM UTC 24 |
27758992 ps |
| T108 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.417962482 |
|
|
Aug 21 07:49:08 AM UTC 24 |
Aug 21 07:49:11 AM UTC 24 |
43432877 ps |
| T981 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2061956753 |
|
|
Aug 21 07:49:09 AM UTC 24 |
Aug 21 07:49:11 AM UTC 24 |
32290602 ps |
| T982 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_csr_rw.892884335 |
|
|
Aug 21 07:49:09 AM UTC 24 |
Aug 21 07:49:11 AM UTC 24 |
12765383 ps |
| T85 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2833345239 |
|
|
Aug 21 07:48:59 AM UTC 24 |
Aug 21 07:49:11 AM UTC 24 |
19357541 ps |
| T983 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3727719550 |
|
|
Aug 21 07:48:59 AM UTC 24 |
Aug 21 07:49:11 AM UTC 24 |
19444932 ps |
| T139 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.558484986 |
|
|
Aug 21 07:49:08 AM UTC 24 |
Aug 21 07:49:11 AM UTC 24 |
73031856 ps |
| T984 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.861465886 |
|
|
Aug 21 07:48:59 AM UTC 24 |
Aug 21 07:49:11 AM UTC 24 |
55787702 ps |
| T135 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3926374651 |
|
|
Aug 21 07:49:06 AM UTC 24 |
Aug 21 07:49:12 AM UTC 24 |
309198059 ps |
| T136 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2904119872 |
|
|
Aug 21 07:49:08 AM UTC 24 |
Aug 21 07:49:12 AM UTC 24 |
540048236 ps |
| T91 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1330516394 |
|
|
Aug 21 07:48:59 AM UTC 24 |
Aug 21 07:49:12 AM UTC 24 |
96922877 ps |
| T985 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2009599082 |
|
|
Aug 21 07:49:09 AM UTC 24 |
Aug 21 07:49:12 AM UTC 24 |
31906857 ps |
| T986 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_tl_errors.438132510 |
|
|
Aug 21 07:49:08 AM UTC 24 |
Aug 21 07:49:14 AM UTC 24 |
119440534 ps |
| T987 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1656106296 |
|
|
Aug 21 07:49:06 AM UTC 24 |
Aug 21 07:49:14 AM UTC 24 |
158257093 ps |
| T988 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3224513362 |
|
|
Aug 21 07:49:09 AM UTC 24 |
Aug 21 07:49:14 AM UTC 24 |
401841450 ps |
| T989 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3643106009 |
|
|
Aug 21 07:49:08 AM UTC 24 |
Aug 21 07:49:15 AM UTC 24 |
1279757648 ps |
| T990 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1831188637 |
|
|
Aug 21 07:49:10 AM UTC 24 |
Aug 21 07:49:15 AM UTC 24 |
25507706 ps |
| T991 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1660490149 |
|
|
Aug 21 07:49:10 AM UTC 24 |
Aug 21 07:49:15 AM UTC 24 |
71458667 ps |
| T86 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/15.sram_ctrl_csr_rw.745873484 |
|
|
Aug 21 07:49:13 AM UTC 24 |
Aug 21 07:49:15 AM UTC 24 |
25115763 ps |
| T992 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2854503805 |
|
|
Aug 21 07:49:13 AM UTC 24 |
Aug 21 07:49:15 AM UTC 24 |
16936646 ps |
| T993 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1253236333 |
|
|
Aug 21 07:49:07 AM UTC 24 |
Aug 21 07:49:16 AM UTC 24 |
21243662 ps |
| T994 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3535258917 |
|
|
Aug 21 07:49:07 AM UTC 24 |
Aug 21 07:49:16 AM UTC 24 |
14581661 ps |
| T995 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.4051918014 |
|
|
Aug 21 07:49:10 AM UTC 24 |
Aug 21 07:49:16 AM UTC 24 |
254442600 ps |
| T996 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3388631608 |
|
|
Aug 21 07:49:13 AM UTC 24 |
Aug 21 07:49:17 AM UTC 24 |
847156356 ps |
| T997 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.712286679 |
|
|
Aug 21 07:48:59 AM UTC 24 |
Aug 21 07:49:17 AM UTC 24 |
707400990 ps |
| T998 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1197857321 |
|
|
Aug 21 07:49:13 AM UTC 24 |
Aug 21 07:49:17 AM UTC 24 |
479816588 ps |
| T999 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3068574253 |
|
|
Aug 21 07:49:10 AM UTC 24 |
Aug 21 07:49:18 AM UTC 24 |
1308454149 ps |
| T1000 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1985004628 |
|
|
Aug 21 07:49:13 AM UTC 24 |
Aug 21 07:49:18 AM UTC 24 |
354309945 ps |
| T1001 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.960928316 |
|
|
Aug 21 07:49:07 AM UTC 24 |
Aug 21 07:49:19 AM UTC 24 |
1823096906 ps |
| T1002 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_csr_rw.277237044 |
|
|
Aug 21 07:49:15 AM UTC 24 |
Aug 21 07:49:20 AM UTC 24 |
16021616 ps |
| T1003 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3591521814 |
|
|
Aug 21 07:49:15 AM UTC 24 |
Aug 21 07:49:20 AM UTC 24 |
61441513 ps |
| T1004 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/18.sram_ctrl_csr_rw.378458386 |
|
|
Aug 21 07:49:18 AM UTC 24 |
Aug 21 07:49:20 AM UTC 24 |
47452431 ps |
| T1005 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.702538831 |
|
|
Aug 21 07:49:19 AM UTC 24 |
Aug 21 07:49:20 AM UTC 24 |
59840898 ps |
| T1006 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3009510735 |
|
|
Aug 21 07:49:17 AM UTC 24 |
Aug 21 07:49:21 AM UTC 24 |
121683288 ps |
| T1007 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.4060382612 |
|
|
Aug 21 07:49:15 AM UTC 24 |
Aug 21 07:49:21 AM UTC 24 |
410846749 ps |
| T1008 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2013502206 |
|
|
Aug 21 07:49:11 AM UTC 24 |
Aug 21 07:49:22 AM UTC 24 |
69714747 ps |
| T134 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2438854269 |
|
|
Aug 21 07:49:11 AM UTC 24 |
Aug 21 07:49:22 AM UTC 24 |
190562234 ps |
| T1009 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2944005001 |
|
|
Aug 21 07:49:17 AM UTC 24 |
Aug 21 07:49:23 AM UTC 24 |
397426986 ps |
| T1010 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3807092861 |
|
|
Aug 21 07:49:15 AM UTC 24 |
Aug 21 07:49:23 AM UTC 24 |
1635714547 ps |
| T1011 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3999458803 |
|
|
Aug 21 07:49:19 AM UTC 24 |
Aug 21 07:49:24 AM UTC 24 |
1228551033 ps |
| T1012 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1050555725 |
|
|
Aug 21 07:49:16 AM UTC 24 |
Aug 21 07:49:25 AM UTC 24 |
86026346 ps |
| T1013 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2585824201 |
|
|
Aug 21 07:49:16 AM UTC 24 |
Aug 21 07:49:25 AM UTC 24 |
24793675 ps |