| T553 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_smoke.4292313315 |
|
|
Aug 21 11:51:14 AM UTC 24 |
Aug 21 11:52:19 AM UTC 24 |
5114415595 ps |
| T554 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_mem_partial_access.444323301 |
|
|
Aug 21 11:51:02 AM UTC 24 |
Aug 21 11:52:21 AM UTC 24 |
1000655382 ps |
| T555 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.2752940341 |
|
|
Aug 21 11:52:03 AM UTC 24 |
Aug 21 11:52:21 AM UTC 24 |
3320453763 ps |
| T556 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/20.sram_ctrl_stress_all.1592805261 |
|
|
Aug 21 11:23:41 AM UTC 24 |
Aug 21 11:52:31 AM UTC 24 |
213960305881 ps |
| T557 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_partial_access.266675539 |
|
|
Aug 21 11:52:31 AM UTC 24 |
Aug 21 11:52:40 AM UTC 24 |
746162134 ps |
| T558 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_smoke.1438862693 |
|
|
Aug 21 11:52:16 AM UTC 24 |
Aug 21 11:52:50 AM UTC 24 |
883099925 ps |
| T559 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_lc_escalation.2632020017 |
|
|
Aug 21 11:51:32 AM UTC 24 |
Aug 21 11:52:51 AM UTC 24 |
35117737797 ps |
| T560 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_partial_access.2248605842 |
|
|
Aug 21 11:51:23 AM UTC 24 |
Aug 21 11:52:58 AM UTC 24 |
1291603530 ps |
| T561 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_access_during_key_req.4200987078 |
|
|
Aug 21 11:38:22 AM UTC 24 |
Aug 21 11:53:09 AM UTC 24 |
33586913075 ps |
| T562 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_max_throughput.3006740423 |
|
|
Aug 21 11:52:41 AM UTC 24 |
Aug 21 11:53:25 AM UTC 24 |
3113008724 ps |
| T563 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_regwen.3152538238 |
|
|
Aug 21 11:42:23 AM UTC 24 |
Aug 21 11:53:26 AM UTC 24 |
17291360749 ps |
| T564 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_ram_cfg.806639042 |
|
|
Aug 21 11:53:27 AM UTC 24 |
Aug 21 11:53:34 AM UTC 24 |
348101702 ps |
| T565 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_bijection.4280335840 |
|
|
Aug 21 11:17:02 AM UTC 24 |
Aug 21 11:53:36 AM UTC 24 |
31445078839 ps |
| T566 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_mem_walk.2269060934 |
|
|
Aug 21 11:50:58 AM UTC 24 |
Aug 21 11:53:36 AM UTC 24 |
6906614834 ps |
| T567 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_mem_walk.4082051710 |
|
|
Aug 21 11:49:17 AM UTC 24 |
Aug 21 11:53:50 AM UTC 24 |
7885538795 ps |
| T568 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.438644110 |
|
|
Aug 21 11:53:37 AM UTC 24 |
Aug 21 11:53:52 AM UTC 24 |
908437736 ps |
| T569 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_alert_test.266871030 |
|
|
Aug 21 11:53:54 AM UTC 24 |
Aug 21 11:53:56 AM UTC 24 |
26571002 ps |
| T570 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_executable.1374826861 |
|
|
Aug 21 11:45:27 AM UTC 24 |
Aug 21 11:54:31 AM UTC 24 |
28213513035 ps |
| T571 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_throughput_w_partial_write.373052611 |
|
|
Aug 21 11:52:51 AM UTC 24 |
Aug 21 11:54:36 AM UTC 24 |
5232334384 ps |
| T572 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_lc_escalation.3579454874 |
|
|
Aug 21 11:52:52 AM UTC 24 |
Aug 21 11:54:54 AM UTC 24 |
53771320830 ps |
| T573 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_smoke.3011364964 |
|
|
Aug 21 11:53:57 AM UTC 24 |
Aug 21 11:55:02 AM UTC 24 |
1569760432 ps |
| T574 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_multiple_keys.2416460386 |
|
|
Aug 21 11:43:20 AM UTC 24 |
Aug 21 11:55:10 AM UTC 24 |
13054157431 ps |
| T575 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_mem_partial_access.163745153 |
|
|
Aug 21 11:52:00 AM UTC 24 |
Aug 21 11:55:18 AM UTC 24 |
9987255521 ps |
| T576 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_stress_pipeline.1381886185 |
|
|
Aug 21 11:50:29 AM UTC 24 |
Aug 21 11:55:20 AM UTC 24 |
16699300481 ps |
| T577 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_max_throughput.2229254627 |
|
|
Aug 21 11:55:19 AM UTC 24 |
Aug 21 11:55:31 AM UTC 24 |
676471976 ps |
| T578 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_partial_access.2892065879 |
|
|
Aug 21 11:55:03 AM UTC 24 |
Aug 21 11:55:36 AM UTC 24 |
771283578 ps |
| T579 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_throughput_w_partial_write.2440966982 |
|
|
Aug 21 11:55:21 AM UTC 24 |
Aug 21 11:55:36 AM UTC 24 |
2429788085 ps |
| T580 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_mem_partial_access.1396588360 |
|
|
Aug 21 11:53:36 AM UTC 24 |
Aug 21 11:56:06 AM UTC 24 |
25778081790 ps |
| T581 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_multiple_keys.194662756 |
|
|
Aug 21 11:50:02 AM UTC 24 |
Aug 21 11:56:07 AM UTC 24 |
10569086806 ps |
| T582 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_ram_cfg.1961902182 |
|
|
Aug 21 11:56:08 AM UTC 24 |
Aug 21 11:56:15 AM UTC 24 |
1880330058 ps |
| T583 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_partial_access_b2b.2560265466 |
|
|
Aug 21 11:50:33 AM UTC 24 |
Aug 21 11:56:27 AM UTC 24 |
190637595158 ps |
| T584 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_lc_escalation.1065004612 |
|
|
Aug 21 11:55:31 AM UTC 24 |
Aug 21 11:56:32 AM UTC 24 |
11110299088 ps |
| T585 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_mem_walk.253413133 |
|
|
Aug 21 11:53:35 AM UTC 24 |
Aug 21 11:56:43 AM UTC 24 |
5482951854 ps |
| T586 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/6.sram_ctrl_stress_all.954574625 |
|
|
Aug 21 10:39:16 AM UTC 24 |
Aug 21 11:57:28 AM UTC 24 |
161305561791 ps |
| T587 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_alert_test.3790459673 |
|
|
Aug 21 11:57:29 AM UTC 24 |
Aug 21 11:57:31 AM UTC 24 |
12519293 ps |
| T588 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_stress_pipeline.1917002004 |
|
|
Aug 21 11:54:55 AM UTC 24 |
Aug 21 11:57:40 AM UTC 24 |
2852293734 ps |
| T589 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_access_during_key_req.3795374675 |
|
|
Aug 21 11:52:58 AM UTC 24 |
Aug 21 11:57:50 AM UTC 24 |
5948714394 ps |
| T590 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_mem_partial_access.3956009682 |
|
|
Aug 21 11:56:28 AM UTC 24 |
Aug 21 11:58:09 AM UTC 24 |
10286583007 ps |
| T591 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_mem_walk.2098259779 |
|
|
Aug 21 11:51:54 AM UTC 24 |
Aug 21 11:58:10 AM UTC 24 |
14128888086 ps |
| T592 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_stress_pipeline.2099999265 |
|
|
Aug 21 11:52:22 AM UTC 24 |
Aug 21 11:58:10 AM UTC 24 |
14051090148 ps |
| T593 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_multiple_keys.2414645976 |
|
|
Aug 21 11:40:21 AM UTC 24 |
Aug 21 11:58:11 AM UTC 24 |
8821086883 ps |
| T594 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/25.sram_ctrl_bijection.3522957848 |
|
|
Aug 21 11:37:40 AM UTC 24 |
Aug 21 11:58:14 AM UTC 24 |
76579514928 ps |
| T595 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_partial_access.3648986494 |
|
|
Aug 21 11:58:11 AM UTC 24 |
Aug 21 11:58:41 AM UTC 24 |
1488929484 ps |
| T596 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_mem_walk.1496914019 |
|
|
Aug 21 11:56:16 AM UTC 24 |
Aug 21 11:58:46 AM UTC 24 |
12336306919 ps |
| T597 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_multiple_keys.1155256627 |
|
|
Aug 21 11:46:39 AM UTC 24 |
Aug 21 11:58:50 AM UTC 24 |
26914771931 ps |
| T598 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_stress_pipeline.1408958934 |
|
|
Aug 21 11:51:18 AM UTC 24 |
Aug 21 11:59:14 AM UTC 24 |
5448444311 ps |
| T599 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_lc_escalation.3382143902 |
|
|
Aug 21 11:58:42 AM UTC 24 |
Aug 21 11:59:16 AM UTC 24 |
2713630192 ps |
| T600 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_smoke.1636355704 |
|
|
Aug 21 11:57:32 AM UTC 24 |
Aug 21 11:59:16 AM UTC 24 |
2228972359 ps |
| T601 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.609082903 |
|
|
Aug 21 11:56:33 AM UTC 24 |
Aug 21 11:59:19 AM UTC 24 |
10877286224 ps |
| T602 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_ram_cfg.1426300449 |
|
|
Aug 21 11:59:17 AM UTC 24 |
Aug 21 11:59:26 AM UTC 24 |
365358795 ps |
| T603 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_max_throughput.3688868986 |
|
|
Aug 21 11:58:12 AM UTC 24 |
Aug 21 11:59:26 AM UTC 24 |
3084115449 ps |
| T604 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_access_during_key_req.507174188 |
|
|
Aug 21 11:45:17 AM UTC 24 |
Aug 21 11:59:36 AM UTC 24 |
12108438712 ps |
| T605 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_alert_test.984207276 |
|
|
Aug 21 11:59:37 AM UTC 24 |
Aug 21 11:59:40 AM UTC 24 |
12978014 ps |
| T606 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_regwen.944979277 |
|
|
Aug 21 11:49:07 AM UTC 24 |
Aug 21 11:59:52 AM UTC 24 |
8828490554 ps |
| T607 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_throughput_w_partial_write.317502134 |
|
|
Aug 21 11:58:15 AM UTC 24 |
Aug 21 12:00:34 PM UTC 24 |
3259630027 ps |
| T608 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1366630609 |
|
|
Aug 21 11:59:27 AM UTC 24 |
Aug 21 12:00:43 PM UTC 24 |
4118228117 ps |
| T609 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_access_during_key_req.3544711039 |
|
|
Aug 21 11:48:34 AM UTC 24 |
Aug 21 12:00:52 PM UTC 24 |
28891211891 ps |
| T610 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_partial_access_b2b.1348619293 |
|
|
Aug 21 11:55:12 AM UTC 24 |
Aug 21 12:00:53 PM UTC 24 |
9334796599 ps |
| T611 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_smoke.2782087712 |
|
|
Aug 21 11:59:40 AM UTC 24 |
Aug 21 12:00:58 PM UTC 24 |
809372280 ps |
| T612 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_multiple_keys.4249273961 |
|
|
Aug 21 11:51:15 AM UTC 24 |
Aug 21 12:00:58 PM UTC 24 |
21595465476 ps |
| T613 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_partial_access.2066034817 |
|
|
Aug 21 12:00:54 PM UTC 24 |
Aug 21 12:01:19 PM UTC 24 |
1673628453 ps |
| T614 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_throughput_w_partial_write.2217330207 |
|
|
Aug 21 12:01:00 PM UTC 24 |
Aug 21 12:01:49 PM UTC 24 |
3045973262 ps |
| T615 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_max_throughput.1084776249 |
|
|
Aug 21 12:00:59 PM UTC 24 |
Aug 21 12:01:50 PM UTC 24 |
6191155497 ps |
| T616 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_executable.1327021702 |
|
|
Aug 21 11:49:07 AM UTC 24 |
Aug 21 12:01:58 PM UTC 24 |
8713158211 ps |
| T617 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/13.sram_ctrl_stress_all.1820567510 |
|
|
Aug 21 11:01:54 AM UTC 24 |
Aug 21 12:02:00 PM UTC 24 |
863835569723 ps |
| T618 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_mem_partial_access.1244365194 |
|
|
Aug 21 11:59:21 AM UTC 24 |
Aug 21 12:02:08 PM UTC 24 |
1648821386 ps |
| T619 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_ram_cfg.3712554360 |
|
|
Aug 21 12:02:02 PM UTC 24 |
Aug 21 12:02:09 PM UTC 24 |
692999319 ps |
| T620 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_executable.1372880344 |
|
|
Aug 21 11:42:17 AM UTC 24 |
Aug 21 12:02:17 PM UTC 24 |
12006846872 ps |
| T621 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_stress_pipeline.1908405171 |
|
|
Aug 21 11:58:11 AM UTC 24 |
Aug 21 12:02:26 PM UTC 24 |
3229147956 ps |
| T622 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_lc_escalation.2021442187 |
|
|
Aug 21 12:01:19 PM UTC 24 |
Aug 21 12:02:34 PM UTC 24 |
23726382258 ps |
| T623 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2124438528 |
|
|
Aug 21 12:02:19 PM UTC 24 |
Aug 21 12:02:37 PM UTC 24 |
1417213575 ps |
| T624 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_alert_test.2739527681 |
|
|
Aug 21 12:02:35 PM UTC 24 |
Aug 21 12:02:38 PM UTC 24 |
16627156 ps |
| T625 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_partial_access_b2b.2485937145 |
|
|
Aug 21 11:52:32 AM UTC 24 |
Aug 21 12:02:57 PM UTC 24 |
75141305667 ps |
| T626 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_mem_partial_access.406017904 |
|
|
Aug 21 12:02:09 PM UTC 24 |
Aug 21 12:03:42 PM UTC 24 |
1010407241 ps |
| T627 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_access_during_key_req.1732442097 |
|
|
Aug 21 11:50:41 AM UTC 24 |
Aug 21 12:04:15 PM UTC 24 |
46869479520 ps |
| T628 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_partial_access.2102204960 |
|
|
Aug 21 12:04:16 PM UTC 24 |
Aug 21 12:04:23 PM UTC 24 |
1386302438 ps |
| T629 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_partial_access_b2b.2899013301 |
|
|
Aug 21 11:51:25 AM UTC 24 |
Aug 21 12:04:32 PM UTC 24 |
99396680370 ps |
| T630 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_mem_walk.1169743479 |
|
|
Aug 21 11:59:18 AM UTC 24 |
Aug 21 12:04:52 PM UTC 24 |
37435159306 ps |
| T631 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_smoke.28786202 |
|
|
Aug 21 12:02:39 PM UTC 24 |
Aug 21 12:04:54 PM UTC 24 |
465320311 ps |
| T632 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_bijection.2507414044 |
|
|
Aug 21 11:50:26 AM UTC 24 |
Aug 21 12:05:16 PM UTC 24 |
37062192271 ps |
| T633 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_mem_walk.1151082712 |
|
|
Aug 21 12:02:09 PM UTC 24 |
Aug 21 12:05:16 PM UTC 24 |
2039584239 ps |
| T634 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_stress_pipeline.1181042493 |
|
|
Aug 21 12:00:44 PM UTC 24 |
Aug 21 12:05:38 PM UTC 24 |
14132517422 ps |
| T635 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_max_throughput.4042878687 |
|
|
Aug 21 12:04:33 PM UTC 24 |
Aug 21 12:05:39 PM UTC 24 |
1609894474 ps |
| T636 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/26.sram_ctrl_bijection.2554352596 |
|
|
Aug 21 11:40:35 AM UTC 24 |
Aug 21 12:05:45 PM UTC 24 |
152086811932 ps |
| T637 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_ram_cfg.2231915462 |
|
|
Aug 21 12:05:40 PM UTC 24 |
Aug 21 12:05:47 PM UTC 24 |
343697124 ps |
| T638 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_throughput_w_partial_write.645522956 |
|
|
Aug 21 12:04:53 PM UTC 24 |
Aug 21 12:05:53 PM UTC 24 |
782829457 ps |
| T639 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_multiple_keys.3087840595 |
|
|
Aug 21 11:52:20 AM UTC 24 |
Aug 21 12:05:55 PM UTC 24 |
6631293689 ps |
| T640 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_partial_access_b2b.1298290900 |
|
|
Aug 21 12:00:54 PM UTC 24 |
Aug 21 12:06:02 PM UTC 24 |
50376400880 ps |
| T641 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_alert_test.1745841720 |
|
|
Aug 21 12:06:03 PM UTC 24 |
Aug 21 12:06:05 PM UTC 24 |
14785335 ps |
| T642 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_lc_escalation.1230542890 |
|
|
Aug 21 12:04:56 PM UTC 24 |
Aug 21 12:06:12 PM UTC 24 |
27415349138 ps |
| T643 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_smoke.3929737420 |
|
|
Aug 21 12:06:06 PM UTC 24 |
Aug 21 12:06:20 PM UTC 24 |
2818621915 ps |
| T644 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_partial_access_b2b.890307497 |
|
|
Aug 21 11:58:11 AM UTC 24 |
Aug 21 12:06:20 PM UTC 24 |
16763429992 ps |
| T645 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_executable.3184869493 |
|
|
Aug 21 11:53:10 AM UTC 24 |
Aug 21 12:06:22 PM UTC 24 |
24027977134 ps |
| T646 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_partial_access.3376050245 |
|
|
Aug 21 12:06:23 PM UTC 24 |
Aug 21 12:06:36 PM UTC 24 |
710387608 ps |
| T647 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_regwen.547467396 |
|
|
Aug 21 11:51:48 AM UTC 24 |
Aug 21 12:06:47 PM UTC 24 |
56760700895 ps |
| T648 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.2943594240 |
|
|
Aug 21 12:05:54 PM UTC 24 |
Aug 21 12:07:00 PM UTC 24 |
5108255214 ps |
| T649 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_multiple_keys.157537324 |
|
|
Aug 21 12:02:39 PM UTC 24 |
Aug 21 12:07:03 PM UTC 24 |
1284193164 ps |
| T650 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/18.sram_ctrl_stress_all.475248203 |
|
|
Aug 21 11:16:27 AM UTC 24 |
Aug 21 12:07:11 PM UTC 24 |
141564579367 ps |
| T651 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_executable.706569383 |
|
|
Aug 21 11:51:47 AM UTC 24 |
Aug 21 12:07:19 PM UTC 24 |
115254708813 ps |
| T652 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_bijection.2297143080 |
|
|
Aug 21 11:51:15 AM UTC 24 |
Aug 21 12:07:25 PM UTC 24 |
51044231636 ps |
| T653 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_throughput_w_partial_write.3138373123 |
|
|
Aug 21 12:07:01 PM UTC 24 |
Aug 21 12:08:00 PM UTC 24 |
1222974867 ps |
| T654 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_regwen.2789837462 |
|
|
Aug 21 11:45:40 AM UTC 24 |
Aug 21 12:08:06 PM UTC 24 |
47306537228 ps |
| T655 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_ram_cfg.4059273974 |
|
|
Aug 21 12:08:01 PM UTC 24 |
Aug 21 12:08:08 PM UTC 24 |
1403047525 ps |
| T656 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_mem_partial_access.1305558245 |
|
|
Aug 21 12:05:48 PM UTC 24 |
Aug 21 12:08:12 PM UTC 24 |
4554070260 ps |
| T657 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_regwen.955865455 |
|
|
Aug 21 12:07:26 PM UTC 24 |
Aug 21 12:08:17 PM UTC 24 |
9856241748 ps |
| T658 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_max_throughput.3552577631 |
|
|
Aug 21 12:06:49 PM UTC 24 |
Aug 21 12:08:21 PM UTC 24 |
12457077492 ps |
| T659 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/30.sram_ctrl_access_during_key_req.3460973008 |
|
|
Aug 21 11:51:41 AM UTC 24 |
Aug 21 12:08:24 PM UTC 24 |
172847389536 ps |
| T660 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_alert_test.1637239692 |
|
|
Aug 21 12:08:22 PM UTC 24 |
Aug 21 12:08:24 PM UTC 24 |
147845484 ps |
| T661 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_executable.4030118856 |
|
|
Aug 21 11:55:38 AM UTC 24 |
Aug 21 12:08:31 PM UTC 24 |
12857705449 ps |
| T662 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_partial_access_b2b.734064473 |
|
|
Aug 21 12:04:24 PM UTC 24 |
Aug 21 12:08:33 PM UTC 24 |
4654664707 ps |
| T663 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.252776148 |
|
|
Aug 21 12:08:13 PM UTC 24 |
Aug 21 12:08:40 PM UTC 24 |
631225729 ps |
| T664 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_smoke.223006296 |
|
|
Aug 21 12:08:25 PM UTC 24 |
Aug 21 12:09:02 PM UTC 24 |
1755235482 ps |
| T665 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_regwen.982437406 |
|
|
Aug 21 11:56:07 AM UTC 24 |
Aug 21 12:09:13 PM UTC 24 |
2857753133 ps |
| T666 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_partial_access.3350706263 |
|
|
Aug 21 12:08:41 PM UTC 24 |
Aug 21 12:09:13 PM UTC 24 |
642543323 ps |
| T667 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_access_during_key_req.220227571 |
|
|
Aug 21 12:01:49 PM UTC 24 |
Aug 21 12:09:20 PM UTC 24 |
86365824150 ps |
| T668 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/21.sram_ctrl_stress_all.1757911080 |
|
|
Aug 21 11:27:17 AM UTC 24 |
Aug 21 12:09:20 PM UTC 24 |
47825554266 ps |
| T669 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_lc_escalation.1878272136 |
|
|
Aug 21 12:07:03 PM UTC 24 |
Aug 21 12:09:32 PM UTC 24 |
15920249387 ps |
| T670 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_mem_partial_access.3712156073 |
|
|
Aug 21 12:08:09 PM UTC 24 |
Aug 21 12:09:40 PM UTC 24 |
2372171392 ps |
| T671 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_regwen.4212177973 |
|
|
Aug 21 11:59:16 AM UTC 24 |
Aug 21 12:09:48 PM UTC 24 |
59825020709 ps |
| T672 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_ram_cfg.1965898525 |
|
|
Aug 21 12:09:48 PM UTC 24 |
Aug 21 12:09:55 PM UTC 24 |
354945216 ps |
| T673 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_max_throughput.2719766349 |
|
|
Aug 21 12:09:13 PM UTC 24 |
Aug 21 12:10:04 PM UTC 24 |
754309922 ps |
| T674 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_stress_pipeline.2578998876 |
|
|
Aug 21 12:06:21 PM UTC 24 |
Aug 21 12:10:17 PM UTC 24 |
15093871123 ps |
| T675 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_stress_pipeline.776531516 |
|
|
Aug 21 12:03:43 PM UTC 24 |
Aug 21 12:10:22 PM UTC 24 |
5169581382 ps |
| T676 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.1921163678 |
|
|
Aug 21 12:10:18 PM UTC 24 |
Aug 21 12:10:36 PM UTC 24 |
402406183 ps |
| T677 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_lc_escalation.3414892368 |
|
|
Aug 21 12:09:21 PM UTC 24 |
Aug 21 12:10:39 PM UTC 24 |
22306000284 ps |
| T678 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_alert_test.3756504324 |
|
|
Aug 21 12:10:36 PM UTC 24 |
Aug 21 12:10:39 PM UTC 24 |
38405802 ps |
| T679 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/23.sram_ctrl_bijection.4251312142 |
|
|
Aug 21 11:31:38 AM UTC 24 |
Aug 21 12:10:49 PM UTC 24 |
169385572755 ps |
| T680 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/24.sram_ctrl_bijection.2793645850 |
|
|
Aug 21 11:35:51 AM UTC 24 |
Aug 21 12:11:01 PM UTC 24 |
116700579892 ps |
| T681 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_throughput_w_partial_write.4046825059 |
|
|
Aug 21 12:09:14 PM UTC 24 |
Aug 21 12:11:03 PM UTC 24 |
814139854 ps |
| T682 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_mem_walk.1112049524 |
|
|
Aug 21 12:08:07 PM UTC 24 |
Aug 21 12:11:26 PM UTC 24 |
8973687310 ps |
| T683 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_partial_access.1583817487 |
|
|
Aug 21 12:11:04 PM UTC 24 |
Aug 21 12:11:34 PM UTC 24 |
7492360676 ps |
| T684 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_stress_all.2057789874 |
|
|
Aug 21 11:51:03 AM UTC 24 |
Aug 21 12:11:42 PM UTC 24 |
49988891934 ps |
| T685 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_executable.4286009150 |
|
|
Aug 21 11:50:49 AM UTC 24 |
Aug 21 12:11:46 PM UTC 24 |
168607590502 ps |
| T686 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_smoke.199768045 |
|
|
Aug 21 12:10:40 PM UTC 24 |
Aug 21 12:11:48 PM UTC 24 |
892014067 ps |
| T687 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_throughput_w_partial_write.2804542766 |
|
|
Aug 21 12:11:43 PM UTC 24 |
Aug 21 12:12:00 PM UTC 24 |
1450647316 ps |
| T688 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_max_throughput.4256548029 |
|
|
Aug 21 12:11:36 PM UTC 24 |
Aug 21 12:12:11 PM UTC 24 |
730558575 ps |
| T689 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_mem_walk.2486464569 |
|
|
Aug 21 12:05:46 PM UTC 24 |
Aug 21 12:12:15 PM UTC 24 |
106374985818 ps |
| T690 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_ram_cfg.2844703341 |
|
|
Aug 21 12:12:16 PM UTC 24 |
Aug 21 12:12:24 PM UTC 24 |
667058465 ps |
| T691 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_mem_partial_access.3480089533 |
|
|
Aug 21 12:10:05 PM UTC 24 |
Aug 21 12:12:27 PM UTC 24 |
31395349501 ps |
| T692 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_lc_escalation.1311293519 |
|
|
Aug 21 12:11:47 PM UTC 24 |
Aug 21 12:13:31 PM UTC 24 |
107551560040 ps |
| T693 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/27.sram_ctrl_bijection.1644200017 |
|
|
Aug 21 11:43:38 AM UTC 24 |
Aug 21 12:13:34 PM UTC 24 |
390216038021 ps |
| T694 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/28.sram_ctrl_bijection.3273283573 |
|
|
Aug 21 11:47:09 AM UTC 24 |
Aug 21 12:13:34 PM UTC 24 |
43521681230 ps |
| T695 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_mem_walk.1401832095 |
|
|
Aug 21 12:09:55 PM UTC 24 |
Aug 21 12:13:38 PM UTC 24 |
7528324987 ps |
| T696 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/9.sram_ctrl_stress_all.2878256000 |
|
|
Aug 21 10:50:14 AM UTC 24 |
Aug 21 12:13:39 PM UTC 24 |
1895848097620 ps |
| T697 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_alert_test.1560055995 |
|
|
Aug 21 12:13:35 PM UTC 24 |
Aug 21 12:13:39 PM UTC 24 |
13818685 ps |
| T698 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_partial_access_b2b.132371185 |
|
|
Aug 21 12:06:37 PM UTC 24 |
Aug 21 12:13:42 PM UTC 24 |
14576371923 ps |
| T699 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.3104061380 |
|
|
Aug 21 12:13:32 PM UTC 24 |
Aug 21 12:13:47 PM UTC 24 |
410137840 ps |
| T700 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_smoke.4217101456 |
|
|
Aug 21 12:13:39 PM UTC 24 |
Aug 21 12:14:10 PM UTC 24 |
1138248685 ps |
| T701 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_executable.2524572615 |
|
|
Aug 21 12:07:21 PM UTC 24 |
Aug 21 12:14:20 PM UTC 24 |
140952957106 ps |
| T702 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_partial_access.170403907 |
|
|
Aug 21 12:13:48 PM UTC 24 |
Aug 21 12:14:21 PM UTC 24 |
1531287879 ps |
| T703 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_stress_pipeline.2611359888 |
|
|
Aug 21 12:11:02 PM UTC 24 |
Aug 21 12:14:24 PM UTC 24 |
3445569630 ps |
| T704 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_mem_partial_access.107510536 |
|
|
Aug 21 12:12:27 PM UTC 24 |
Aug 21 12:14:33 PM UTC 24 |
11179768104 ps |
| T705 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_max_throughput.2197525229 |
|
|
Aug 21 12:14:20 PM UTC 24 |
Aug 21 12:14:45 PM UTC 24 |
1462088488 ps |
| T706 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_throughput_w_partial_write.3260005089 |
|
|
Aug 21 12:14:22 PM UTC 24 |
Aug 21 12:15:11 PM UTC 24 |
2997607944 ps |
| T707 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_access_during_key_req.690613077 |
|
|
Aug 21 12:05:17 PM UTC 24 |
Aug 21 12:15:11 PM UTC 24 |
17663690264 ps |
| T708 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_multiple_keys.2738698632 |
|
|
Aug 21 11:59:53 AM UTC 24 |
Aug 21 12:15:16 PM UTC 24 |
10752454553 ps |
| T709 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_ram_cfg.2891427069 |
|
|
Aug 21 12:15:12 PM UTC 24 |
Aug 21 12:15:21 PM UTC 24 |
6698242382 ps |
| T710 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_partial_access_b2b.601123979 |
|
|
Aug 21 12:09:03 PM UTC 24 |
Aug 21 12:15:59 PM UTC 24 |
13503980586 ps |
| T711 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2148231059 |
|
|
Aug 21 12:16:00 PM UTC 24 |
Aug 21 12:16:21 PM UTC 24 |
3877221878 ps |
| T712 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_lc_escalation.2570810639 |
|
|
Aug 21 12:14:25 PM UTC 24 |
Aug 21 12:16:29 PM UTC 24 |
58004409631 ps |
| T713 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_stress_pipeline.4290546094 |
|
|
Aug 21 12:08:33 PM UTC 24 |
Aug 21 12:16:32 PM UTC 24 |
6246895878 ps |
| T714 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_alert_test.3639230433 |
|
|
Aug 21 12:16:30 PM UTC 24 |
Aug 21 12:16:32 PM UTC 24 |
67837259 ps |
| T715 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/22.sram_ctrl_stress_all.698184719 |
|
|
Aug 21 11:31:11 AM UTC 24 |
Aug 21 12:16:37 PM UTC 24 |
81395267782 ps |
| T716 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_bijection.2320216231 |
|
|
Aug 21 11:57:51 AM UTC 24 |
Aug 21 12:16:46 PM UTC 24 |
16085358325 ps |
| T717 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_multiple_keys.3068094812 |
|
|
Aug 21 11:54:32 AM UTC 24 |
Aug 21 12:17:00 PM UTC 24 |
119713628527 ps |
| T718 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_smoke.884070895 |
|
|
Aug 21 12:16:33 PM UTC 24 |
Aug 21 12:17:05 PM UTC 24 |
1054943643 ps |
| T719 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_multiple_keys.2339991457 |
|
|
Aug 21 12:08:25 PM UTC 24 |
Aug 21 12:17:18 PM UTC 24 |
44262901534 ps |
| T720 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_partial_access.11382661 |
|
|
Aug 21 12:16:48 PM UTC 24 |
Aug 21 12:17:19 PM UTC 24 |
1380098684 ps |
| T721 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_multiple_keys.1647937625 |
|
|
Aug 21 11:57:40 AM UTC 24 |
Aug 21 12:17:30 PM UTC 24 |
36411529786 ps |
| T722 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_regwen.2656125745 |
|
|
Aug 21 12:02:00 PM UTC 24 |
Aug 21 12:17:37 PM UTC 24 |
18092317216 ps |
| T723 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_stress_pipeline.1536840822 |
|
|
Aug 21 12:13:43 PM UTC 24 |
Aug 21 12:17:41 PM UTC 24 |
3462878999 ps |
| T724 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/34.sram_ctrl_executable.3937303977 |
|
|
Aug 21 12:01:51 PM UTC 24 |
Aug 21 12:18:10 PM UTC 24 |
90441448512 ps |
| T725 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_ram_cfg.3721925607 |
|
|
Aug 21 12:18:10 PM UTC 24 |
Aug 21 12:18:17 PM UTC 24 |
353339462 ps |
| T726 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_executable.3732187932 |
|
|
Aug 21 12:12:01 PM UTC 24 |
Aug 21 12:18:30 PM UTC 24 |
5584534435 ps |
| T727 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_lc_escalation.3479358990 |
|
|
Aug 21 12:17:20 PM UTC 24 |
Aug 21 12:18:46 PM UTC 24 |
9879892590 ps |
| T728 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_bijection.271268587 |
|
|
Aug 21 11:52:22 AM UTC 24 |
Aug 21 12:18:48 PM UTC 24 |
21754604771 ps |
| T729 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_partial_access_b2b.3474793379 |
|
|
Aug 21 12:11:28 PM UTC 24 |
Aug 21 12:19:00 PM UTC 24 |
16850565270 ps |
| T730 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_regwen.2407930120 |
|
|
Aug 21 12:09:41 PM UTC 24 |
Aug 21 12:19:02 PM UTC 24 |
3975619088 ps |
| T731 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_max_throughput.2099235770 |
|
|
Aug 21 12:17:07 PM UTC 24 |
Aug 21 12:19:02 PM UTC 24 |
3319992463 ps |
| T732 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_alert_test.3431301083 |
|
|
Aug 21 12:19:01 PM UTC 24 |
Aug 21 12:19:04 PM UTC 24 |
46224683 ps |
| T733 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_mem_partial_access.1304057299 |
|
|
Aug 21 12:15:22 PM UTC 24 |
Aug 21 12:19:09 PM UTC 24 |
7774628305 ps |
| T734 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_multiple_keys.2931117056 |
|
|
Aug 21 12:06:13 PM UTC 24 |
Aug 21 12:19:22 PM UTC 24 |
18516938659 ps |
| T735 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_mem_walk.3242830349 |
|
|
Aug 21 12:12:25 PM UTC 24 |
Aug 21 12:19:22 PM UTC 24 |
20692603716 ps |
| T736 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_smoke.66602422 |
|
|
Aug 21 12:19:02 PM UTC 24 |
Aug 21 12:19:31 PM UTC 24 |
567803052 ps |
| T737 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/19.sram_ctrl_stress_all.1184224479 |
|
|
Aug 21 11:20:14 AM UTC 24 |
Aug 21 12:19:33 PM UTC 24 |
195249679352 ps |
| T738 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3308712316 |
|
|
Aug 21 12:18:47 PM UTC 24 |
Aug 21 12:19:38 PM UTC 24 |
7113415951 ps |
| T739 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_partial_access.1046207329 |
|
|
Aug 21 12:19:23 PM UTC 24 |
Aug 21 12:19:43 PM UTC 24 |
1478744389 ps |
| T740 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_max_throughput.2367450804 |
|
|
Aug 21 12:19:31 PM UTC 24 |
Aug 21 12:19:43 PM UTC 24 |
709706897 ps |
| T741 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_access_during_key_req.1320200067 |
|
|
Aug 21 12:14:34 PM UTC 24 |
Aug 21 12:19:45 PM UTC 24 |
40714975198 ps |
| T742 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/35.sram_ctrl_regwen.2627215151 |
|
|
Aug 21 12:05:39 PM UTC 24 |
Aug 21 12:19:54 PM UTC 24 |
6945453954 ps |
| T743 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_access_during_key_req.804486921 |
|
|
Aug 21 12:09:21 PM UTC 24 |
Aug 21 12:19:59 PM UTC 24 |
11754566013 ps |
| T744 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_mem_walk.108578616 |
|
|
Aug 21 12:15:17 PM UTC 24 |
Aug 21 12:20:00 PM UTC 24 |
19697965879 ps |
| T745 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_ram_cfg.1055353006 |
|
|
Aug 21 12:19:55 PM UTC 24 |
Aug 21 12:20:02 PM UTC 24 |
358933624 ps |
| T746 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_throughput_w_partial_write.1564410168 |
|
|
Aug 21 12:17:20 PM UTC 24 |
Aug 21 12:20:02 PM UTC 24 |
1568427541 ps |
| T747 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_throughput_w_partial_write.1857986689 |
|
|
Aug 21 12:19:34 PM UTC 24 |
Aug 21 12:20:17 PM UTC 24 |
3434212363 ps |
| T748 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_alert_test.3170439343 |
|
|
Aug 21 12:20:18 PM UTC 24 |
Aug 21 12:20:20 PM UTC 24 |
12748178 ps |
| T749 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/29.sram_ctrl_regwen.1494583769 |
|
|
Aug 21 11:50:51 AM UTC 24 |
Aug 21 12:20:33 PM UTC 24 |
14741674127 ps |
| T750 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_access_during_key_req.7871074 |
|
|
Aug 21 11:55:38 AM UTC 24 |
Aug 21 12:20:48 PM UTC 24 |
22011723630 ps |
| T751 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_executable.3917157921 |
|
|
Aug 21 12:09:34 PM UTC 24 |
Aug 21 12:20:52 PM UTC 24 |
18559787096 ps |
| T752 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_partial_access_b2b.3182707588 |
|
|
Aug 21 12:14:11 PM UTC 24 |
Aug 21 12:21:06 PM UTC 24 |
33636284306 ps |
| T753 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_mem_walk.691914616 |
|
|
Aug 21 12:18:18 PM UTC 24 |
Aug 21 12:21:07 PM UTC 24 |
10961402482 ps |
| T754 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_regwen.280619322 |
|
|
Aug 21 11:53:26 AM UTC 24 |
Aug 21 12:21:15 PM UTC 24 |
13282787982 ps |
| T755 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_partial_access.44042351 |
|
|
Aug 21 12:21:07 PM UTC 24 |
Aug 21 12:21:16 PM UTC 24 |
1003724740 ps |
| T756 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_smoke.3050864440 |
|
|
Aug 21 12:20:21 PM UTC 24 |
Aug 21 12:21:20 PM UTC 24 |
10784048984 ps |
| T757 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_lc_escalation.629830980 |
|
|
Aug 21 12:19:39 PM UTC 24 |
Aug 21 12:21:40 PM UTC 24 |
13645244514 ps |
| T758 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/31.sram_ctrl_stress_all.561125379 |
|
|
Aug 21 11:53:50 AM UTC 24 |
Aug 21 12:21:44 PM UTC 24 |
832121560541 ps |
| T759 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_mem_partial_access.2274025942 |
|
|
Aug 21 12:20:02 PM UTC 24 |
Aug 21 12:21:52 PM UTC 24 |
1405913560 ps |
| T760 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_mem_partial_access.1906161922 |
|
|
Aug 21 12:18:32 PM UTC 24 |
Aug 21 12:22:05 PM UTC 24 |
22204108569 ps |
| T761 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_max_throughput.1157689347 |
|
|
Aug 21 12:21:16 PM UTC 24 |
Aug 21 12:22:06 PM UTC 24 |
734014380 ps |
| T762 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_ram_cfg.2299446815 |
|
|
Aug 21 12:22:06 PM UTC 24 |
Aug 21 12:22:14 PM UTC 24 |
350004900 ps |
| T763 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/37.sram_ctrl_bijection.751062782 |
|
|
Aug 21 12:08:32 PM UTC 24 |
Aug 21 12:22:16 PM UTC 24 |
219217253800 ps |
| T764 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_throughput_w_partial_write.3994785493 |
|
|
Aug 21 12:21:18 PM UTC 24 |
Aug 21 12:22:24 PM UTC 24 |
3159241305 ps |
| T765 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1993075921 |
|
|
Aug 21 12:20:02 PM UTC 24 |
Aug 21 12:22:34 PM UTC 24 |
6603747726 ps |
| T766 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_lc_escalation.1594044703 |
|
|
Aug 21 12:21:21 PM UTC 24 |
Aug 21 12:22:35 PM UTC 24 |
8402859216 ps |
| T767 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_alert_test.3376685111 |
|
|
Aug 21 12:22:35 PM UTC 24 |
Aug 21 12:22:38 PM UTC 24 |
42822794 ps |
| T768 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3681709056 |
|
|
Aug 21 12:22:16 PM UTC 24 |
Aug 21 12:22:40 PM UTC 24 |
623966535 ps |
| T769 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_mem_walk.3391037201 |
|
|
Aug 21 12:20:00 PM UTC 24 |
Aug 21 12:22:43 PM UTC 24 |
10969082485 ps |
| T770 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_smoke.3114030522 |
|
|
Aug 21 12:22:36 PM UTC 24 |
Aug 21 12:22:45 PM UTC 24 |
689870772 ps |
| T771 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_partial_access_b2b.3541217392 |
|
|
Aug 21 12:17:01 PM UTC 24 |
Aug 21 12:23:09 PM UTC 24 |
13054843540 ps |
| T772 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_partial_access.2858219050 |
|
|
Aug 21 12:22:46 PM UTC 24 |
Aug 21 12:23:11 PM UTC 24 |
3619966128 ps |
| T773 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_stress_pipeline.3424445385 |
|
|
Aug 21 12:20:52 PM UTC 24 |
Aug 21 12:23:14 PM UTC 24 |
7088996433 ps |
| T774 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_stress_pipeline.1369561 |
|
|
Aug 21 12:16:38 PM UTC 24 |
Aug 21 12:23:17 PM UTC 24 |
4909722852 ps |
| T775 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_max_throughput.2616478467 |
|
|
Aug 21 12:23:12 PM UTC 24 |
Aug 21 12:23:23 PM UTC 24 |
3695784954 ps |
| T776 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_throughput_w_partial_write.3494791198 |
|
|
Aug 21 12:23:15 PM UTC 24 |
Aug 21 12:23:32 PM UTC 24 |
1287958623 ps |
| T777 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_lc_escalation.1105690805 |
|
|
Aug 21 12:23:19 PM UTC 24 |
Aug 21 12:23:52 PM UTC 24 |
11713198063 ps |
| T778 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_stress_pipeline.3676601815 |
|
|
Aug 21 12:19:10 PM UTC 24 |
Aug 21 12:24:06 PM UTC 24 |
4075570392 ps |
| T779 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_ram_cfg.3136388443 |
|
|
Aug 21 12:24:07 PM UTC 24 |
Aug 21 12:24:14 PM UTC 24 |
3047266003 ps |
| T780 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_mem_partial_access.1269087388 |
|
|
Aug 21 12:22:15 PM UTC 24 |
Aug 21 12:24:18 PM UTC 24 |
10589338046 ps |
| T781 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_executable.4163026372 |
|
|
Aug 21 11:58:51 AM UTC 24 |
Aug 21 12:24:27 PM UTC 24 |
26259619923 ps |
| T782 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.4273351882 |
|
|
Aug 21 12:24:27 PM UTC 24 |
Aug 21 12:25:02 PM UTC 24 |
3815828309 ps |
| T783 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/33.sram_ctrl_access_during_key_req.2494694821 |
|
|
Aug 21 11:58:47 AM UTC 24 |
Aug 21 12:25:09 PM UTC 24 |
30553069447 ps |
| T784 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_alert_test.3859654458 |
|
|
Aug 21 12:25:10 PM UTC 24 |
Aug 21 12:25:12 PM UTC 24 |
24481651 ps |
| T785 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_smoke.739885331 |
|
|
Aug 21 12:25:13 PM UTC 24 |
Aug 21 12:25:22 PM UTC 24 |
768035977 ps |
| T786 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_mem_walk.3565638102 |
|
|
Aug 21 12:22:07 PM UTC 24 |
Aug 21 12:25:24 PM UTC 24 |
40853794523 ps |
| T787 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_partial_access_b2b.4197236820 |
|
|
Aug 21 12:21:08 PM UTC 24 |
Aug 21 12:25:41 PM UTC 24 |
20522279905 ps |
| T788 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/39.sram_ctrl_executable.1091562122 |
|
|
Aug 21 12:14:46 PM UTC 24 |
Aug 21 12:25:45 PM UTC 24 |
8475656680 ps |
| T789 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/36.sram_ctrl_bijection.2680652991 |
|
|
Aug 21 12:06:21 PM UTC 24 |
Aug 21 12:25:47 PM UTC 24 |
91708725372 ps |
| T790 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_multiple_keys.1706445518 |
|
|
Aug 21 12:22:39 PM UTC 24 |
Aug 21 12:26:04 PM UTC 24 |
1931785626 ps |
| T791 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/42.sram_ctrl_access_during_key_req.2987518382 |
|
|
Aug 21 12:21:40 PM UTC 24 |
Aug 21 12:26:17 PM UTC 24 |
13694616412 ps |
| T792 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/40.sram_ctrl_multiple_keys.3107283656 |
|
|
Aug 21 12:16:33 PM UTC 24 |
Aug 21 12:26:26 PM UTC 24 |
29671265708 ps |
| T793 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_max_throughput.2703104601 |
|
|
Aug 21 12:26:05 PM UTC 24 |
Aug 21 12:26:29 PM UTC 24 |
1431805982 ps |
| T794 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/41.sram_ctrl_regwen.3822399576 |
|
|
Aug 21 12:19:45 PM UTC 24 |
Aug 21 12:26:45 PM UTC 24 |
10354238255 ps |
| T795 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_mem_walk.3193804574 |
|
|
Aug 21 12:24:16 PM UTC 24 |
Aug 21 12:26:52 PM UTC 24 |
8234120652 ps |
| T796 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/32.sram_ctrl_bijection.3773925290 |
|
|
Aug 21 11:54:37 AM UTC 24 |
Aug 21 12:26:53 PM UTC 24 |
116252660501 ps |
| T797 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_ram_cfg.4195389866 |
|
|
Aug 21 12:26:55 PM UTC 24 |
Aug 21 12:27:04 PM UTC 24 |
1406472172 ps |
| T798 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_throughput_w_partial_write.2682464403 |
|
|
Aug 21 12:26:17 PM UTC 24 |
Aug 21 12:27:11 PM UTC 24 |
780625047 ps |
| T799 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/38.sram_ctrl_access_during_key_req.3319005402 |
|
|
Aug 21 12:11:49 PM UTC 24 |
Aug 21 12:27:13 PM UTC 24 |
43222960961 ps |
| T800 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/43.sram_ctrl_mem_partial_access.1956476729 |
|
|
Aug 21 12:24:19 PM UTC 24 |
Aug 21 12:27:13 PM UTC 24 |
3215583855 ps |
| T801 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_partial_access.1873289605 |
|
|
Aug 21 12:25:47 PM UTC 24 |
Aug 21 12:27:16 PM UTC 24 |
2879352527 ps |
| T802 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_main-sim-vcs/coverage/default/44.sram_ctrl_alert_test.4075069917 |
|
|
Aug 21 12:27:16 PM UTC 24 |
Aug 21 12:27:19 PM UTC 24 |
33110532 ps |