| T262 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3678663328 |
|
|
Dec 20 12:58:05 PM PST 23 |
Dec 20 12:58:24 PM PST 23 |
250044470 ps |
| T132 |
/workspace/coverage/default/39.sram_ctrl_stress_all.1686314961 |
|
|
Dec 20 01:01:31 PM PST 23 |
Dec 20 01:32:46 PM PST 23 |
29733053655 ps |
| T263 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.3200599347 |
|
|
Dec 20 01:00:07 PM PST 23 |
Dec 20 01:00:24 PM PST 23 |
602898731 ps |
| T264 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3008066397 |
|
|
Dec 20 12:58:07 PM PST 23 |
Dec 20 12:58:31 PM PST 23 |
244373687 ps |
| T133 |
/workspace/coverage/default/22.sram_ctrl_executable.4120421866 |
|
|
Dec 20 12:59:23 PM PST 23 |
Dec 20 01:07:47 PM PST 23 |
45913097521 ps |
| T265 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.2166442649 |
|
|
Dec 20 12:58:38 PM PST 23 |
Dec 20 01:01:20 PM PST 23 |
597475736 ps |
| T266 |
/workspace/coverage/default/23.sram_ctrl_smoke.437704558 |
|
|
Dec 20 12:59:27 PM PST 23 |
Dec 20 01:01:02 PM PST 23 |
594595012 ps |
| T267 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.2260088711 |
|
|
Dec 20 01:00:39 PM PST 23 |
Dec 20 01:01:27 PM PST 23 |
102036608 ps |
| T268 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.2797764751 |
|
|
Dec 20 12:58:12 PM PST 23 |
Dec 20 01:07:06 PM PST 23 |
13022175853 ps |
| T269 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2138722559 |
|
|
Dec 20 12:58:09 PM PST 23 |
Dec 20 01:03:08 PM PST 23 |
65463724133 ps |
| T270 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2788212478 |
|
|
Dec 20 01:02:28 PM PST 23 |
Dec 20 01:02:55 PM PST 23 |
83605144 ps |
| T271 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2269023721 |
|
|
Dec 20 12:58:06 PM PST 23 |
Dec 20 12:58:43 PM PST 23 |
94379554 ps |
| T126 |
/workspace/coverage/default/3.sram_ctrl_executable.4024671426 |
|
|
Dec 20 12:58:03 PM PST 23 |
Dec 20 01:13:30 PM PST 23 |
22007525176 ps |
| T272 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3898632440 |
|
|
Dec 20 12:58:42 PM PST 23 |
Dec 20 01:07:10 PM PST 23 |
19815332491 ps |
| T273 |
/workspace/coverage/default/31.sram_ctrl_bijection.2408194941 |
|
|
Dec 20 01:00:27 PM PST 23 |
Dec 20 01:01:49 PM PST 23 |
1069723526 ps |
| T274 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.4267437405 |
|
|
Dec 20 12:58:58 PM PST 23 |
Dec 20 12:59:35 PM PST 23 |
113371946 ps |
| T275 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3272763255 |
|
|
Dec 20 01:02:24 PM PST 23 |
Dec 20 01:02:52 PM PST 23 |
432197235 ps |
| T276 |
/workspace/coverage/default/3.sram_ctrl_alert_test.3435057062 |
|
|
Dec 20 12:58:18 PM PST 23 |
Dec 20 12:58:40 PM PST 23 |
16804081 ps |
| T277 |
/workspace/coverage/default/42.sram_ctrl_alert_test.3739485462 |
|
|
Dec 20 01:01:37 PM PST 23 |
Dec 20 01:02:19 PM PST 23 |
43806828 ps |
| T278 |
/workspace/coverage/default/35.sram_ctrl_bijection.2433422841 |
|
|
Dec 20 01:00:37 PM PST 23 |
Dec 20 01:02:01 PM PST 23 |
18045265065 ps |
| T279 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.2374237554 |
|
|
Dec 20 12:59:04 PM PST 23 |
Dec 20 12:59:21 PM PST 23 |
66026311 ps |
| T280 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1536235314 |
|
|
Dec 20 12:58:00 PM PST 23 |
Dec 20 01:01:40 PM PST 23 |
4441242384 ps |
| T281 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.1815367421 |
|
|
Dec 20 12:59:26 PM PST 23 |
Dec 20 01:08:12 PM PST 23 |
3617448473 ps |
| T282 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.2080703016 |
|
|
Dec 20 01:00:30 PM PST 23 |
Dec 20 01:06:15 PM PST 23 |
13731112914 ps |
| T283 |
/workspace/coverage/default/17.sram_ctrl_smoke.545824877 |
|
|
Dec 20 12:58:58 PM PST 23 |
Dec 20 12:59:27 PM PST 23 |
1225384436 ps |
| T284 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1407546719 |
|
|
Dec 20 12:58:29 PM PST 23 |
Dec 20 01:12:44 PM PST 23 |
7256357927 ps |
| T127 |
/workspace/coverage/default/34.sram_ctrl_executable.283285512 |
|
|
Dec 20 01:00:47 PM PST 23 |
Dec 20 01:22:51 PM PST 23 |
3882852270 ps |
| T285 |
/workspace/coverage/default/28.sram_ctrl_bijection.2028983285 |
|
|
Dec 20 01:00:09 PM PST 23 |
Dec 20 01:01:11 PM PST 23 |
1485844178 ps |
| T286 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.2459202922 |
|
|
Dec 20 12:59:24 PM PST 23 |
Dec 20 01:01:39 PM PST 23 |
594730580 ps |
| T287 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.712420735 |
|
|
Dec 20 12:58:57 PM PST 23 |
Dec 20 01:04:30 PM PST 23 |
1122120839 ps |
| T288 |
/workspace/coverage/default/40.sram_ctrl_stress_all.1899578043 |
|
|
Dec 20 01:01:43 PM PST 23 |
Dec 20 01:44:37 PM PST 23 |
33855432493 ps |
| T289 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.62821230 |
|
|
Dec 20 01:00:18 PM PST 23 |
Dec 20 01:03:27 PM PST 23 |
7259082032 ps |
| T290 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1401547856 |
|
|
Dec 20 12:58:05 PM PST 23 |
Dec 20 12:58:24 PM PST 23 |
1360505267 ps |
| T291 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2347470478 |
|
|
Dec 20 12:58:10 PM PST 23 |
Dec 20 12:58:38 PM PST 23 |
2839785167 ps |
| T292 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.3205896454 |
|
|
Dec 20 12:59:08 PM PST 23 |
Dec 20 01:18:54 PM PST 23 |
64375387436 ps |
| T293 |
/workspace/coverage/default/8.sram_ctrl_executable.2729882955 |
|
|
Dec 20 12:58:16 PM PST 23 |
Dec 20 01:09:29 PM PST 23 |
17332854405 ps |
| T294 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.1612886436 |
|
|
Dec 20 01:01:43 PM PST 23 |
Dec 20 01:02:28 PM PST 23 |
48553026 ps |
| T295 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.377986918 |
|
|
Dec 20 12:58:43 PM PST 23 |
Dec 20 01:03:55 PM PST 23 |
17969929124 ps |
| T296 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.4285404984 |
|
|
Dec 20 12:58:25 PM PST 23 |
Dec 20 12:58:51 PM PST 23 |
598527801 ps |
| T297 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.669693016 |
|
|
Dec 20 12:59:50 PM PST 23 |
Dec 20 01:00:30 PM PST 23 |
380911648 ps |
| T298 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.548503047 |
|
|
Dec 20 12:58:42 PM PST 23 |
Dec 20 12:59:02 PM PST 23 |
154639156 ps |
| T299 |
/workspace/coverage/default/40.sram_ctrl_bijection.785879702 |
|
|
Dec 20 01:01:34 PM PST 23 |
Dec 20 01:02:50 PM PST 23 |
7246347411 ps |
| T123 |
/workspace/coverage/default/14.sram_ctrl_stress_all.3541140425 |
|
|
Dec 20 12:58:48 PM PST 23 |
Dec 20 01:27:05 PM PST 23 |
39099888250 ps |
| T300 |
/workspace/coverage/default/16.sram_ctrl_stress_all.2824368589 |
|
|
Dec 20 12:58:52 PM PST 23 |
Dec 20 01:26:39 PM PST 23 |
37621864900 ps |
| T301 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.2334876434 |
|
|
Dec 20 01:00:19 PM PST 23 |
Dec 20 01:02:42 PM PST 23 |
2530386416 ps |
| T302 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1540885904 |
|
|
Dec 20 01:02:34 PM PST 23 |
Dec 20 01:07:40 PM PST 23 |
7383933089 ps |
| T303 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.709966890 |
|
|
Dec 20 12:58:17 PM PST 23 |
Dec 20 01:01:27 PM PST 23 |
4085748164 ps |
| T304 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.1950982460 |
|
|
Dec 20 01:00:49 PM PST 23 |
Dec 20 01:03:00 PM PST 23 |
541057285 ps |
| T305 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.2174714956 |
|
|
Dec 20 01:00:34 PM PST 23 |
Dec 20 01:00:51 PM PST 23 |
283317471 ps |
| T306 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.2871670043 |
|
|
Dec 20 12:59:27 PM PST 23 |
Dec 20 01:03:43 PM PST 23 |
4269289962 ps |
| T307 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2040671881 |
|
|
Dec 20 01:02:34 PM PST 23 |
Dec 20 01:06:07 PM PST 23 |
2628716291 ps |
| T308 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.2963894930 |
|
|
Dec 20 01:01:31 PM PST 23 |
Dec 20 01:02:14 PM PST 23 |
603527788 ps |
| T309 |
/workspace/coverage/default/47.sram_ctrl_partial_access.947559690 |
|
|
Dec 20 01:02:30 PM PST 23 |
Dec 20 01:02:57 PM PST 23 |
117864823 ps |
| T310 |
/workspace/coverage/default/39.sram_ctrl_partial_access.2829383735 |
|
|
Dec 20 01:02:03 PM PST 23 |
Dec 20 01:02:49 PM PST 23 |
1711539721 ps |
| T311 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.74067229 |
|
|
Dec 20 12:58:17 PM PST 23 |
Dec 20 12:59:33 PM PST 23 |
127556038 ps |
| T312 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.1055591175 |
|
|
Dec 20 01:02:33 PM PST 23 |
Dec 20 01:03:01 PM PST 23 |
174868609 ps |
| T313 |
/workspace/coverage/default/15.sram_ctrl_smoke.2977711936 |
|
|
Dec 20 12:58:57 PM PST 23 |
Dec 20 12:59:25 PM PST 23 |
914049080 ps |
| T314 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.547812459 |
|
|
Dec 20 01:01:43 PM PST 23 |
Dec 20 01:03:32 PM PST 23 |
243052799 ps |
| T315 |
/workspace/coverage/default/2.sram_ctrl_bijection.3572814057 |
|
|
Dec 20 12:58:07 PM PST 23 |
Dec 20 12:59:23 PM PST 23 |
940057729 ps |
| T316 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1297344726 |
|
|
Dec 20 01:02:31 PM PST 23 |
Dec 20 01:03:26 PM PST 23 |
382233769 ps |
| T317 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.3539942090 |
|
|
Dec 20 01:01:34 PM PST 23 |
Dec 20 01:02:21 PM PST 23 |
1722311148 ps |
| T318 |
/workspace/coverage/default/24.sram_ctrl_smoke.1282320464 |
|
|
Dec 20 12:59:48 PM PST 23 |
Dec 20 01:00:20 PM PST 23 |
1152158577 ps |
| T319 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.54477488 |
|
|
Dec 20 01:01:29 PM PST 23 |
Dec 20 01:02:06 PM PST 23 |
29579819 ps |
| T320 |
/workspace/coverage/default/13.sram_ctrl_executable.1066364500 |
|
|
Dec 20 12:58:39 PM PST 23 |
Dec 20 01:27:31 PM PST 23 |
95649454941 ps |
| T321 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.2356584856 |
|
|
Dec 20 01:00:08 PM PST 23 |
Dec 20 01:04:36 PM PST 23 |
7665808680 ps |
| T322 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.2845950171 |
|
|
Dec 20 01:00:28 PM PST 23 |
Dec 20 01:00:42 PM PST 23 |
37068377 ps |
| T323 |
/workspace/coverage/default/22.sram_ctrl_smoke.3785343110 |
|
|
Dec 20 12:59:30 PM PST 23 |
Dec 20 12:59:59 PM PST 23 |
3219993632 ps |
| T324 |
/workspace/coverage/default/38.sram_ctrl_alert_test.95023926 |
|
|
Dec 20 01:01:14 PM PST 23 |
Dec 20 01:01:59 PM PST 23 |
73393201 ps |
| T325 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3251935764 |
|
|
Dec 20 01:01:48 PM PST 23 |
Dec 20 01:02:33 PM PST 23 |
95188019 ps |
| T326 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.640679000 |
|
|
Dec 20 01:01:05 PM PST 23 |
Dec 20 01:32:04 PM PST 23 |
242039158 ps |
| T327 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.3506846904 |
|
|
Dec 20 12:59:46 PM PST 23 |
Dec 20 01:00:02 PM PST 23 |
545344950 ps |
| T328 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.3621157859 |
|
|
Dec 20 01:00:07 PM PST 23 |
Dec 20 01:00:36 PM PST 23 |
290898013 ps |
| T329 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.3555660966 |
|
|
Dec 20 12:59:48 PM PST 23 |
Dec 20 01:00:03 PM PST 23 |
28840820 ps |
| T330 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3314878471 |
|
|
Dec 20 01:02:25 PM PST 23 |
Dec 20 01:02:51 PM PST 23 |
83308187 ps |
| T331 |
/workspace/coverage/default/11.sram_ctrl_stress_all.3288261338 |
|
|
Dec 20 12:58:20 PM PST 23 |
Dec 20 01:32:33 PM PST 23 |
32791160471 ps |
| T332 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.3217155648 |
|
|
Dec 20 12:58:41 PM PST 23 |
Dec 20 01:00:00 PM PST 23 |
389818472 ps |
| T333 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2980702512 |
|
|
Dec 20 12:58:06 PM PST 23 |
Dec 20 12:58:29 PM PST 23 |
885217979 ps |
| T334 |
/workspace/coverage/default/44.sram_ctrl_partial_access.3422922337 |
|
|
Dec 20 01:01:49 PM PST 23 |
Dec 20 01:04:50 PM PST 23 |
773394433 ps |
| T335 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.1883792997 |
|
|
Dec 20 01:00:57 PM PST 23 |
Dec 20 01:15:17 PM PST 23 |
3609810264 ps |
| T336 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.114470798 |
|
|
Dec 20 12:58:11 PM PST 23 |
Dec 20 01:41:52 PM PST 23 |
327925128 ps |
| T337 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.3510857118 |
|
|
Dec 20 12:59:07 PM PST 23 |
Dec 20 01:06:09 PM PST 23 |
18545437295 ps |
| T338 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.4147516918 |
|
|
Dec 20 01:00:19 PM PST 23 |
Dec 20 01:00:36 PM PST 23 |
49501198 ps |
| T339 |
/workspace/coverage/default/41.sram_ctrl_stress_all.3083651753 |
|
|
Dec 20 01:01:40 PM PST 23 |
Dec 20 01:49:46 PM PST 23 |
50365150393 ps |
| T340 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.1046586914 |
|
|
Dec 20 01:01:10 PM PST 23 |
Dec 20 01:01:58 PM PST 23 |
526621316 ps |
| T341 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.3179771798 |
|
|
Dec 20 01:01:52 PM PST 23 |
Dec 20 01:03:52 PM PST 23 |
273352380 ps |
| T342 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.4288516409 |
|
|
Dec 20 01:00:58 PM PST 23 |
Dec 20 01:01:45 PM PST 23 |
4991509862 ps |
| T343 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3338688575 |
|
|
Dec 20 12:58:12 PM PST 23 |
Dec 20 12:58:35 PM PST 23 |
1080044293 ps |
| T344 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.832502047 |
|
|
Dec 20 01:02:53 PM PST 23 |
Dec 20 01:33:25 PM PST 23 |
1999163388 ps |
| T345 |
/workspace/coverage/default/22.sram_ctrl_partial_access.1409080315 |
|
|
Dec 20 12:59:29 PM PST 23 |
Dec 20 01:01:14 PM PST 23 |
600301336 ps |
| T346 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3809644524 |
|
|
Dec 20 01:03:00 PM PST 23 |
Dec 20 01:34:57 PM PST 23 |
6543160562 ps |
| T347 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.66055369 |
|
|
Dec 20 01:00:42 PM PST 23 |
Dec 20 01:01:01 PM PST 23 |
67233710 ps |
| T348 |
/workspace/coverage/default/30.sram_ctrl_bijection.3801611623 |
|
|
Dec 20 01:00:55 PM PST 23 |
Dec 20 01:01:58 PM PST 23 |
1748880214 ps |
| T349 |
/workspace/coverage/default/31.sram_ctrl_alert_test.1384536113 |
|
|
Dec 20 01:01:07 PM PST 23 |
Dec 20 01:01:48 PM PST 23 |
13393146 ps |
| T350 |
/workspace/coverage/default/5.sram_ctrl_alert_test.395643188 |
|
|
Dec 20 12:58:04 PM PST 23 |
Dec 20 12:58:19 PM PST 23 |
16570344 ps |
| T351 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1961649801 |
|
|
Dec 20 12:59:43 PM PST 23 |
Dec 20 01:00:55 PM PST 23 |
513701727 ps |
| T352 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3769707538 |
|
|
Dec 20 12:58:00 PM PST 23 |
Dec 20 01:01:29 PM PST 23 |
2035785654 ps |
| T353 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.2379949140 |
|
|
Dec 20 12:59:02 PM PST 23 |
Dec 20 12:59:47 PM PST 23 |
976047078 ps |
| T354 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.2776909071 |
|
|
Dec 20 12:59:22 PM PST 23 |
Dec 20 12:59:36 PM PST 23 |
119854450 ps |
| T355 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3919314939 |
|
|
Dec 20 01:02:27 PM PST 23 |
Dec 20 01:03:07 PM PST 23 |
2168058855 ps |
| T356 |
/workspace/coverage/default/21.sram_ctrl_smoke.127784641 |
|
|
Dec 20 12:59:22 PM PST 23 |
Dec 20 12:59:42 PM PST 23 |
386221422 ps |
| T357 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.3818715888 |
|
|
Dec 20 12:59:26 PM PST 23 |
Dec 20 12:59:44 PM PST 23 |
172268072 ps |
| T358 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2823279589 |
|
|
Dec 20 12:57:59 PM PST 23 |
Dec 20 01:01:53 PM PST 23 |
12812746150 ps |
| T359 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.875697872 |
|
|
Dec 20 01:02:27 PM PST 23 |
Dec 20 01:03:24 PM PST 23 |
102755242 ps |
| T360 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.657536454 |
|
|
Dec 20 12:58:31 PM PST 23 |
Dec 20 01:02:44 PM PST 23 |
26179845637 ps |
| T361 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.24132593 |
|
|
Dec 20 01:01:30 PM PST 23 |
Dec 20 01:02:33 PM PST 23 |
445592022 ps |
| T362 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.3265774225 |
|
|
Dec 20 01:00:56 PM PST 23 |
Dec 20 01:08:36 PM PST 23 |
77191967484 ps |
| T363 |
/workspace/coverage/default/46.sram_ctrl_regwen.547378202 |
|
|
Dec 20 01:02:34 PM PST 23 |
Dec 20 01:25:36 PM PST 23 |
53759777205 ps |
| T364 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.3348358178 |
|
|
Dec 20 01:00:07 PM PST 23 |
Dec 20 01:08:32 PM PST 23 |
19605530271 ps |
| T365 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.474704534 |
|
|
Dec 20 01:01:02 PM PST 23 |
Dec 20 01:42:41 PM PST 23 |
15618978181 ps |
| T366 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1091456905 |
|
|
Dec 20 12:58:24 PM PST 23 |
Dec 20 01:04:17 PM PST 23 |
3729457922 ps |
| T367 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.4024214156 |
|
|
Dec 20 12:58:08 PM PST 23 |
Dec 20 01:26:27 PM PST 23 |
2047696517 ps |
| T368 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.1827128564 |
|
|
Dec 20 01:01:34 PM PST 23 |
Dec 20 01:25:53 PM PST 23 |
26314906077 ps |
| T369 |
/workspace/coverage/default/25.sram_ctrl_smoke.1706280620 |
|
|
Dec 20 01:00:08 PM PST 23 |
Dec 20 01:00:40 PM PST 23 |
1207151228 ps |
| T370 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3084535217 |
|
|
Dec 20 12:58:05 PM PST 23 |
Dec 20 01:02:06 PM PST 23 |
33589336750 ps |
| T371 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.1120060019 |
|
|
Dec 20 12:59:27 PM PST 23 |
Dec 20 01:16:20 PM PST 23 |
22043081859 ps |
| T372 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.316699756 |
|
|
Dec 20 12:58:50 PM PST 23 |
Dec 20 01:02:47 PM PST 23 |
2237373039 ps |
| T373 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3536179490 |
|
|
Dec 20 12:58:24 PM PST 23 |
Dec 20 12:59:57 PM PST 23 |
209468903 ps |
| T374 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3737574470 |
|
|
Dec 20 12:58:18 PM PST 23 |
Dec 20 12:58:39 PM PST 23 |
370400785 ps |
| T375 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.91397330 |
|
|
Dec 20 01:01:28 PM PST 23 |
Dec 20 01:16:50 PM PST 23 |
26932547457 ps |
| T124 |
/workspace/coverage/default/16.sram_ctrl_regwen.2553978810 |
|
|
Dec 20 12:59:05 PM PST 23 |
Dec 20 01:12:19 PM PST 23 |
9052524730 ps |
| T125 |
/workspace/coverage/default/9.sram_ctrl_executable.2689237159 |
|
|
Dec 20 12:58:15 PM PST 23 |
Dec 20 01:15:34 PM PST 23 |
6404457034 ps |
| T376 |
/workspace/coverage/default/6.sram_ctrl_smoke.1259828786 |
|
|
Dec 20 12:58:19 PM PST 23 |
Dec 20 12:58:44 PM PST 23 |
1359730660 ps |
| T377 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.1019792574 |
|
|
Dec 20 01:01:00 PM PST 23 |
Dec 20 01:02:10 PM PST 23 |
360688194 ps |
| T378 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.1307977011 |
|
|
Dec 20 01:01:00 PM PST 23 |
Dec 20 01:04:53 PM PST 23 |
8624518942 ps |
| T379 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.852427697 |
|
|
Dec 20 12:58:25 PM PST 23 |
Dec 20 02:16:54 PM PST 23 |
2871051425 ps |
| T380 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1359263295 |
|
|
Dec 20 01:02:41 PM PST 23 |
Dec 20 01:54:37 PM PST 23 |
1904083503 ps |
| T381 |
/workspace/coverage/default/0.sram_ctrl_bijection.3532353867 |
|
|
Dec 20 12:58:41 PM PST 23 |
Dec 20 12:59:56 PM PST 23 |
1948249082 ps |
| T382 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.521899580 |
|
|
Dec 20 12:58:38 PM PST 23 |
Dec 20 12:59:48 PM PST 23 |
113609586 ps |
| T383 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3430506291 |
|
|
Dec 20 12:58:14 PM PST 23 |
Dec 20 01:16:59 PM PST 23 |
3285304964 ps |
| T384 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.3510957785 |
|
|
Dec 20 01:00:40 PM PST 23 |
Dec 20 01:01:04 PM PST 23 |
683263691 ps |
| T385 |
/workspace/coverage/default/12.sram_ctrl_smoke.824699400 |
|
|
Dec 20 12:58:25 PM PST 23 |
Dec 20 12:58:58 PM PST 23 |
2045087213 ps |
| T386 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1515342460 |
|
|
Dec 20 12:58:44 PM PST 23 |
Dec 20 01:14:57 PM PST 23 |
3470831160 ps |
| T387 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.1343927826 |
|
|
Dec 20 01:01:11 PM PST 23 |
Dec 20 01:13:02 PM PST 23 |
8361933639 ps |
| T388 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1213853671 |
|
|
Dec 20 01:02:37 PM PST 23 |
Dec 20 01:08:16 PM PST 23 |
11316406602 ps |
| T389 |
/workspace/coverage/default/23.sram_ctrl_stress_all.4203015391 |
|
|
Dec 20 12:59:42 PM PST 23 |
Dec 20 01:35:32 PM PST 23 |
204584764501 ps |
| T390 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.2182847079 |
|
|
Dec 20 01:00:51 PM PST 23 |
Dec 20 01:01:26 PM PST 23 |
263109793 ps |
| T391 |
/workspace/coverage/default/43.sram_ctrl_executable.2249499617 |
|
|
Dec 20 01:01:45 PM PST 23 |
Dec 20 01:02:41 PM PST 23 |
3174617902 ps |
| T392 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.1633610322 |
|
|
Dec 20 12:58:13 PM PST 23 |
Dec 20 01:13:53 PM PST 23 |
15271154526 ps |
| T393 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.145237340 |
|
|
Dec 20 01:01:49 PM PST 23 |
Dec 20 01:15:08 PM PST 23 |
10798432253 ps |
| T394 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.1395556321 |
|
|
Dec 20 12:58:34 PM PST 23 |
Dec 20 12:58:59 PM PST 23 |
3713279660 ps |
| T395 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.18968298 |
|
|
Dec 20 12:58:33 PM PST 23 |
Dec 20 01:50:58 PM PST 23 |
481235084 ps |
| T396 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.490916077 |
|
|
Dec 20 12:58:25 PM PST 23 |
Dec 20 01:11:09 PM PST 23 |
2726289398 ps |
| T397 |
/workspace/coverage/default/1.sram_ctrl_stress_all.2488640130 |
|
|
Dec 20 12:58:15 PM PST 23 |
Dec 20 01:45:08 PM PST 23 |
97586489116 ps |
| T398 |
/workspace/coverage/default/35.sram_ctrl_partial_access.2837544665 |
|
|
Dec 20 01:00:59 PM PST 23 |
Dec 20 01:01:55 PM PST 23 |
4024549695 ps |
| T399 |
/workspace/coverage/default/42.sram_ctrl_partial_access.1669764028 |
|
|
Dec 20 01:01:28 PM PST 23 |
Dec 20 01:02:10 PM PST 23 |
1022093639 ps |
| T400 |
/workspace/coverage/default/25.sram_ctrl_regwen.490648309 |
|
|
Dec 20 12:59:48 PM PST 23 |
Dec 20 01:13:37 PM PST 23 |
3210239187 ps |
| T401 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.940077626 |
|
|
Dec 20 12:58:39 PM PST 23 |
Dec 20 01:01:08 PM PST 23 |
2056170744 ps |
| T402 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.425279548 |
|
|
Dec 20 12:58:24 PM PST 23 |
Dec 20 12:58:45 PM PST 23 |
118207689 ps |
| T403 |
/workspace/coverage/default/28.sram_ctrl_executable.2798689870 |
|
|
Dec 20 01:00:29 PM PST 23 |
Dec 20 01:07:33 PM PST 23 |
4653243450 ps |
| T404 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.2358085053 |
|
|
Dec 20 12:59:46 PM PST 23 |
Dec 20 01:03:39 PM PST 23 |
25065938575 ps |
| T405 |
/workspace/coverage/default/19.sram_ctrl_regwen.986309590 |
|
|
Dec 20 12:59:14 PM PST 23 |
Dec 20 01:10:14 PM PST 23 |
1293984341 ps |
| T406 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.3844810740 |
|
|
Dec 20 12:59:28 PM PST 23 |
Dec 20 01:01:10 PM PST 23 |
669320848 ps |
| T407 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.926059498 |
|
|
Dec 20 12:58:23 PM PST 23 |
Dec 20 12:58:47 PM PST 23 |
164208106 ps |
| T408 |
/workspace/coverage/default/37.sram_ctrl_partial_access.785595822 |
|
|
Dec 20 01:01:03 PM PST 23 |
Dec 20 01:02:10 PM PST 23 |
401837108 ps |
| T409 |
/workspace/coverage/default/35.sram_ctrl_regwen.1657497173 |
|
|
Dec 20 01:01:03 PM PST 23 |
Dec 20 01:22:33 PM PST 23 |
71477933122 ps |
| T410 |
/workspace/coverage/default/45.sram_ctrl_bijection.1989833732 |
|
|
Dec 20 01:01:49 PM PST 23 |
Dec 20 01:03:26 PM PST 23 |
1673098219 ps |
| T411 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.2474643477 |
|
|
Dec 20 01:01:32 PM PST 23 |
Dec 20 01:02:19 PM PST 23 |
176730746 ps |
| T412 |
/workspace/coverage/default/38.sram_ctrl_stress_all.2186877715 |
|
|
Dec 20 01:01:15 PM PST 23 |
Dec 20 02:10:45 PM PST 23 |
171394225378 ps |
| T413 |
/workspace/coverage/default/16.sram_ctrl_partial_access.1300344426 |
|
|
Dec 20 12:58:52 PM PST 23 |
Dec 20 12:59:13 PM PST 23 |
2029663192 ps |
| T414 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.534771205 |
|
|
Dec 20 12:58:43 PM PST 23 |
Dec 20 12:59:01 PM PST 23 |
62535459 ps |
| T415 |
/workspace/coverage/default/17.sram_ctrl_alert_test.854325888 |
|
|
Dec 20 12:59:01 PM PST 23 |
Dec 20 12:59:14 PM PST 23 |
15680003 ps |
| T416 |
/workspace/coverage/default/29.sram_ctrl_smoke.2776592457 |
|
|
Dec 20 01:01:04 PM PST 23 |
Dec 20 01:02:38 PM PST 23 |
595044855 ps |
| T417 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3251846272 |
|
|
Dec 20 01:00:45 PM PST 23 |
Dec 20 01:01:10 PM PST 23 |
90646265 ps |
| T418 |
/workspace/coverage/default/11.sram_ctrl_regwen.683187905 |
|
|
Dec 20 12:58:25 PM PST 23 |
Dec 20 01:15:12 PM PST 23 |
72424640149 ps |
| T419 |
/workspace/coverage/default/33.sram_ctrl_partial_access.3611319620 |
|
|
Dec 20 01:00:54 PM PST 23 |
Dec 20 01:01:47 PM PST 23 |
928973380 ps |
| T420 |
/workspace/coverage/default/21.sram_ctrl_executable.2106648585 |
|
|
Dec 20 12:59:27 PM PST 23 |
Dec 20 01:06:17 PM PST 23 |
3735054695 ps |
| T421 |
/workspace/coverage/default/4.sram_ctrl_stress_all.2273056867 |
|
|
Dec 20 12:58:00 PM PST 23 |
Dec 20 01:58:09 PM PST 23 |
67792495435 ps |
| T422 |
/workspace/coverage/default/32.sram_ctrl_smoke.1673154322 |
|
|
Dec 20 01:00:59 PM PST 23 |
Dec 20 01:01:49 PM PST 23 |
2393910337 ps |
| T423 |
/workspace/coverage/default/14.sram_ctrl_executable.2451762509 |
|
|
Dec 20 12:58:23 PM PST 23 |
Dec 20 01:17:04 PM PST 23 |
22400250192 ps |
| T424 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.1181434018 |
|
|
Dec 20 12:59:49 PM PST 23 |
Dec 20 01:00:12 PM PST 23 |
1313153521 ps |
| T425 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1812867119 |
|
|
Dec 20 01:00:59 PM PST 23 |
Dec 20 01:01:45 PM PST 23 |
131150270 ps |
| T426 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.175464134 |
|
|
Dec 20 12:58:09 PM PST 23 |
Dec 20 12:58:31 PM PST 23 |
220405560 ps |
| T427 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.2673204340 |
|
|
Dec 20 12:58:10 PM PST 23 |
Dec 20 12:58:46 PM PST 23 |
147551126 ps |
| T428 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2823054004 |
|
|
Dec 20 01:02:23 PM PST 23 |
Dec 20 01:47:51 PM PST 23 |
6062828317 ps |
| T429 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.837576766 |
|
|
Dec 20 12:57:59 PM PST 23 |
Dec 20 01:05:37 PM PST 23 |
1577462111 ps |
| T430 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1781550064 |
|
|
Dec 20 12:58:57 PM PST 23 |
Dec 20 01:02:53 PM PST 23 |
18731893805 ps |
| T431 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3684882797 |
|
|
Dec 20 01:00:10 PM PST 23 |
Dec 20 01:01:10 PM PST 23 |
237179087 ps |
| T432 |
/workspace/coverage/default/23.sram_ctrl_bijection.834167231 |
|
|
Dec 20 12:59:26 PM PST 23 |
Dec 20 01:00:09 PM PST 23 |
9408458569 ps |
| T433 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.848659192 |
|
|
Dec 20 12:59:45 PM PST 23 |
Dec 20 12:59:59 PM PST 23 |
2551091003 ps |
| T434 |
/workspace/coverage/default/23.sram_ctrl_partial_access.1392987359 |
|
|
Dec 20 12:59:28 PM PST 23 |
Dec 20 12:59:55 PM PST 23 |
234731445 ps |
| T435 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.789143726 |
|
|
Dec 20 01:01:31 PM PST 23 |
Dec 20 01:02:15 PM PST 23 |
255566231 ps |
| T436 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2549919657 |
|
|
Dec 20 01:03:01 PM PST 23 |
Dec 20 01:17:20 PM PST 23 |
85382419079 ps |
| T437 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.659906275 |
|
|
Dec 20 12:58:31 PM PST 23 |
Dec 20 01:04:57 PM PST 23 |
20766119835 ps |
| T438 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.101719589 |
|
|
Dec 20 01:01:39 PM PST 23 |
Dec 20 01:41:33 PM PST 23 |
1234990579 ps |
| T439 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2973464511 |
|
|
Dec 20 12:58:19 PM PST 23 |
Dec 20 12:58:53 PM PST 23 |
84016180 ps |
| T440 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3079484368 |
|
|
Dec 20 01:00:52 PM PST 23 |
Dec 20 01:08:58 PM PST 23 |
38295121658 ps |
| T441 |
/workspace/coverage/default/9.sram_ctrl_regwen.3684247898 |
|
|
Dec 20 12:58:04 PM PST 23 |
Dec 20 01:24:18 PM PST 23 |
13910148031 ps |
| T442 |
/workspace/coverage/default/1.sram_ctrl_partial_access.2299586998 |
|
|
Dec 20 12:58:51 PM PST 23 |
Dec 20 12:59:24 PM PST 23 |
915764303 ps |
| T443 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.4053295937 |
|
|
Dec 20 12:58:40 PM PST 23 |
Dec 20 01:05:16 PM PST 23 |
7704265156 ps |
| T444 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1622825847 |
|
|
Dec 20 01:01:46 PM PST 23 |
Dec 20 01:03:01 PM PST 23 |
408177680 ps |
| T445 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.4285896345 |
|
|
Dec 20 01:00:08 PM PST 23 |
Dec 20 01:05:03 PM PST 23 |
11657253947 ps |
| T446 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2815575120 |
|
|
Dec 20 12:59:20 PM PST 23 |
Dec 20 01:07:38 PM PST 23 |
45080129288 ps |
| T447 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.3823810480 |
|
|
Dec 20 12:59:04 PM PST 23 |
Dec 20 12:59:25 PM PST 23 |
2715447584 ps |
| T448 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.89851348 |
|
|
Dec 20 01:02:09 PM PST 23 |
Dec 20 01:02:47 PM PST 23 |
1238669709 ps |
| T449 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.4123148245 |
|
|
Dec 20 12:58:09 PM PST 23 |
Dec 20 12:58:41 PM PST 23 |
309089974 ps |
| T450 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.2232527997 |
|
|
Dec 20 01:01:34 PM PST 23 |
Dec 20 01:02:15 PM PST 23 |
70410789 ps |
| T451 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.749351334 |
|
|
Dec 20 12:59:15 PM PST 23 |
Dec 20 01:01:15 PM PST 23 |
295240593 ps |
| T452 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2902502351 |
|
|
Dec 20 12:58:02 PM PST 23 |
Dec 20 12:58:20 PM PST 23 |
71991608 ps |
| T453 |
/workspace/coverage/default/20.sram_ctrl_smoke.2857147371 |
|
|
Dec 20 12:59:06 PM PST 23 |
Dec 20 12:59:21 PM PST 23 |
143688503 ps |
| T454 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2399491260 |
|
|
Dec 20 12:58:08 PM PST 23 |
Dec 20 01:08:02 PM PST 23 |
359902505954 ps |
| T455 |
/workspace/coverage/default/35.sram_ctrl_executable.4130314279 |
|
|
Dec 20 01:01:05 PM PST 23 |
Dec 20 01:06:05 PM PST 23 |
8316313068 ps |
| T456 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.4203822070 |
|
|
Dec 20 01:01:01 PM PST 23 |
Dec 20 01:01:49 PM PST 23 |
101733498 ps |
| T457 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.502457310 |
|
|
Dec 20 12:58:09 PM PST 23 |
Dec 20 12:58:38 PM PST 23 |
878818168 ps |
| T458 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.3789457729 |
|
|
Dec 20 12:59:22 PM PST 23 |
Dec 20 12:59:42 PM PST 23 |
272175821 ps |
| T459 |
/workspace/coverage/default/18.sram_ctrl_regwen.1076595978 |
|
|
Dec 20 12:59:09 PM PST 23 |
Dec 20 01:18:33 PM PST 23 |
107672048900 ps |
| T460 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.3210454555 |
|
|
Dec 20 12:58:32 PM PST 23 |
Dec 20 12:58:57 PM PST 23 |
5484156851 ps |
| T461 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.578001262 |
|
|
Dec 20 12:58:25 PM PST 23 |
Dec 20 12:59:31 PM PST 23 |
551560000 ps |
| T462 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.910628645 |
|
|
Dec 20 12:58:22 PM PST 23 |
Dec 20 12:58:44 PM PST 23 |
296019255 ps |
| T463 |
/workspace/coverage/default/46.sram_ctrl_stress_all.2236473665 |
|
|
Dec 20 01:03:00 PM PST 23 |
Dec 20 01:42:51 PM PST 23 |
41615726865 ps |
| T464 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.2922645804 |
|
|
Dec 20 01:01:11 PM PST 23 |
Dec 20 02:16:49 PM PST 23 |
3020551022 ps |
| T465 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.563759054 |
|
|
Dec 20 12:58:26 PM PST 23 |
Dec 20 01:02:22 PM PST 23 |
4528052017 ps |
| T466 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.1591373621 |
|
|
Dec 20 12:59:06 PM PST 23 |
Dec 20 01:23:01 PM PST 23 |
4845041893 ps |
| T467 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.1872017164 |
|
|
Dec 20 12:58:15 PM PST 23 |
Dec 20 12:59:24 PM PST 23 |
212556638 ps |
| T468 |
/workspace/coverage/default/32.sram_ctrl_stress_all.279284890 |
|
|
Dec 20 01:00:53 PM PST 23 |
Dec 20 01:47:26 PM PST 23 |
10780872154 ps |
| T469 |
/workspace/coverage/default/0.sram_ctrl_regwen.1094905697 |
|
|
Dec 20 12:58:32 PM PST 23 |
Dec 20 01:16:03 PM PST 23 |
23983625996 ps |
| T470 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.1668415916 |
|
|
Dec 20 01:01:03 PM PST 23 |
Dec 20 01:04:04 PM PST 23 |
5988677298 ps |
| T471 |
/workspace/coverage/default/9.sram_ctrl_alert_test.3102120225 |
|
|
Dec 20 12:58:09 PM PST 23 |
Dec 20 12:58:28 PM PST 23 |
16815312 ps |
| T472 |
/workspace/coverage/default/48.sram_ctrl_regwen.477664737 |
|
|
Dec 20 01:02:29 PM PST 23 |
Dec 20 01:18:47 PM PST 23 |
3077229825 ps |
| T473 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.3877979622 |
|
|
Dec 20 12:59:11 PM PST 23 |
Dec 20 01:33:13 PM PST 23 |
1458375070 ps |
| T474 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.656025059 |
|
|
Dec 20 01:01:14 PM PST 23 |
Dec 20 01:02:17 PM PST 23 |
138177101 ps |
| T475 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.2291933011 |
|
|
Dec 20 01:00:39 PM PST 23 |
Dec 20 01:01:03 PM PST 23 |
192838665 ps |
| T476 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.150898350 |
|
|
Dec 20 01:02:25 PM PST 23 |
Dec 20 01:07:28 PM PST 23 |
22448113687 ps |
| T477 |
/workspace/coverage/default/2.sram_ctrl_regwen.4227155278 |
|
|
Dec 20 12:58:01 PM PST 23 |
Dec 20 01:13:27 PM PST 23 |
2637541210 ps |
| T478 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.352462408 |
|
|
Dec 20 01:02:25 PM PST 23 |
Dec 20 01:02:59 PM PST 23 |
657937112 ps |
| T479 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.1636799991 |
|
|
Dec 20 12:58:34 PM PST 23 |
Dec 20 01:00:55 PM PST 23 |
564457561 ps |
| T480 |
/workspace/coverage/default/36.sram_ctrl_partial_access.2218388885 |
|
|
Dec 20 01:00:51 PM PST 23 |
Dec 20 01:01:23 PM PST 23 |
78162290 ps |
| T481 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.585074343 |
|
|
Dec 20 01:01:47 PM PST 23 |
Dec 20 01:07:56 PM PST 23 |
9018233786 ps |
| T482 |
/workspace/coverage/default/32.sram_ctrl_partial_access.2908120819 |
|
|
Dec 20 01:00:29 PM PST 23 |
Dec 20 01:00:41 PM PST 23 |
57393241 ps |
| T483 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.3620243112 |
|
|
Dec 20 01:01:01 PM PST 23 |
Dec 20 01:01:49 PM PST 23 |
838056363 ps |
| T484 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.663845101 |
|
|
Dec 20 12:58:28 PM PST 23 |
Dec 20 12:59:30 PM PST 23 |
372541103 ps |
| T485 |
/workspace/coverage/default/31.sram_ctrl_regwen.604589695 |
|
|
Dec 20 01:00:49 PM PST 23 |
Dec 20 01:06:46 PM PST 23 |
2661430368 ps |
| T486 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3623983417 |
|
|
Dec 20 12:57:59 PM PST 23 |
Dec 20 12:58:14 PM PST 23 |
26666137 ps |
| T487 |
/workspace/coverage/default/18.sram_ctrl_stress_all.4028822115 |
|
|
Dec 20 12:59:03 PM PST 23 |
Dec 20 01:24:00 PM PST 23 |
26219807535 ps |
| T488 |
/workspace/coverage/default/27.sram_ctrl_partial_access.3816965662 |
|
|
Dec 20 01:00:25 PM PST 23 |
Dec 20 01:01:09 PM PST 23 |
375611144 ps |
| T489 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3132892459 |
|
|
Dec 20 12:59:43 PM PST 23 |
Dec 20 01:31:58 PM PST 23 |
1217776459 ps |
| T490 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2051521570 |
|
|
Dec 20 12:58:36 PM PST 23 |
Dec 20 12:58:54 PM PST 23 |
40530514 ps |
| T491 |
/workspace/coverage/default/43.sram_ctrl_alert_test.3074717876 |
|
|
Dec 20 01:01:50 PM PST 23 |
Dec 20 01:02:34 PM PST 23 |
12237382 ps |
| T492 |
/workspace/coverage/default/4.sram_ctrl_alert_test.1343692525 |
|
|
Dec 20 12:58:12 PM PST 23 |
Dec 20 12:58:31 PM PST 23 |
11761214 ps |
| T493 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.3158089348 |
|
|
Dec 20 12:59:13 PM PST 23 |
Dec 20 12:59:33 PM PST 23 |
427225285 ps |
| T494 |
/workspace/coverage/default/10.sram_ctrl_alert_test.4013844196 |
|
|
Dec 20 12:58:24 PM PST 23 |
Dec 20 12:58:43 PM PST 23 |
74376230 ps |
| T495 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.1179476952 |
|
|
Dec 20 12:58:01 PM PST 23 |
Dec 20 12:58:24 PM PST 23 |
1826608046 ps |
| T496 |
/workspace/coverage/default/2.sram_ctrl_stress_all.3117542288 |
|
|
Dec 20 12:58:08 PM PST 23 |
Dec 20 01:15:42 PM PST 23 |
4681710144 ps |
| T497 |
/workspace/coverage/default/4.sram_ctrl_regwen.1939156804 |
|
|
Dec 20 12:58:00 PM PST 23 |
Dec 20 01:00:32 PM PST 23 |
1797134509 ps |
| T498 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.1978486440 |
|
|
Dec 20 01:00:18 PM PST 23 |
Dec 20 01:14:05 PM PST 23 |
3196849644 ps |
| T499 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.991112840 |
|
|
Dec 20 12:59:24 PM PST 23 |
Dec 20 01:42:48 PM PST 23 |
5452813038 ps |
| T500 |
/workspace/coverage/default/19.sram_ctrl_partial_access.2359803227 |
|
|
Dec 20 12:59:08 PM PST 23 |
Dec 20 01:01:38 PM PST 23 |
777766464 ps |
| T501 |
/workspace/coverage/default/28.sram_ctrl_regwen.456716842 |
|
|
Dec 20 01:00:28 PM PST 23 |
Dec 20 01:10:14 PM PST 23 |
4884409396 ps |
| T502 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.4188469446 |
|
|
Dec 20 12:59:07 PM PST 23 |
Dec 20 01:24:14 PM PST 23 |
20340526066 ps |
| T503 |
/workspace/coverage/default/26.sram_ctrl_alert_test.294703673 |
|
|
Dec 20 01:00:05 PM PST 23 |
Dec 20 01:00:17 PM PST 23 |
18409498 ps |
| T504 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.2788458718 |
|
|
Dec 20 01:01:30 PM PST 23 |
Dec 20 01:02:54 PM PST 23 |
218407798 ps |