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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.65 100.00 98.13 100.00 100.00 99.71 99.70 100.00


Total test records in report: 1028
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T753 /workspace/coverage/default/48.sram_ctrl_alert_test.3245971210 Dec 20 01:02:31 PM PST 23 Dec 20 01:02:55 PM PST 23 39355380 ps
T754 /workspace/coverage/default/6.sram_ctrl_stress_all.2842724146 Dec 20 12:58:15 PM PST 23 Dec 20 01:39:22 PM PST 23 125821722349 ps
T755 /workspace/coverage/default/32.sram_ctrl_regwen.779009211 Dec 20 01:00:54 PM PST 23 Dec 20 01:09:00 PM PST 23 11725153780 ps
T756 /workspace/coverage/default/3.sram_ctrl_regwen.2822650420 Dec 20 12:58:01 PM PST 23 Dec 20 01:01:22 PM PST 23 1142113648 ps
T757 /workspace/coverage/default/32.sram_ctrl_max_throughput.1452921758 Dec 20 01:00:34 PM PST 23 Dec 20 01:01:20 PM PST 23 173938700 ps
T758 /workspace/coverage/default/10.sram_ctrl_ram_cfg.1373420903 Dec 20 12:58:14 PM PST 23 Dec 20 12:58:33 PM PST 23 30370650 ps
T759 /workspace/coverage/default/40.sram_ctrl_ram_cfg.1651910059 Dec 20 01:01:35 PM PST 23 Dec 20 01:02:12 PM PST 23 70331975 ps
T760 /workspace/coverage/default/1.sram_ctrl_ram_cfg.821759606 Dec 20 12:58:50 PM PST 23 Dec 20 12:59:07 PM PST 23 97132547 ps
T761 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.2928435627 Dec 20 12:59:11 PM PST 23 Dec 20 12:59:31 PM PST 23 184705103 ps
T762 /workspace/coverage/default/20.sram_ctrl_stress_all.4086234449 Dec 20 12:59:25 PM PST 23 Dec 20 01:57:37 PM PST 23 67212224604 ps
T763 /workspace/coverage/default/7.sram_ctrl_multiple_keys.759958087 Dec 20 12:58:23 PM PST 23 Dec 20 01:09:09 PM PST 23 7996497970 ps
T764 /workspace/coverage/default/19.sram_ctrl_ram_cfg.3368313747 Dec 20 12:59:17 PM PST 23 Dec 20 12:59:31 PM PST 23 88744593 ps
T765 /workspace/coverage/default/3.sram_ctrl_bijection.1869692543 Dec 20 12:58:02 PM PST 23 Dec 20 12:59:29 PM PST 23 15284117594 ps
T766 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1430964701 Dec 20 01:01:04 PM PST 23 Dec 20 01:09:29 PM PST 23 70884422681 ps
T767 /workspace/coverage/default/49.sram_ctrl_alert_test.123049001 Dec 20 01:02:33 PM PST 23 Dec 20 01:02:57 PM PST 23 22675381 ps
T768 /workspace/coverage/default/20.sram_ctrl_bijection.901932499 Dec 20 12:59:08 PM PST 23 Dec 20 01:00:33 PM PST 23 2079772595 ps
T769 /workspace/coverage/default/45.sram_ctrl_smoke.903235494 Dec 20 01:01:46 PM PST 23 Dec 20 01:02:38 PM PST 23 181368464 ps
T770 /workspace/coverage/default/21.sram_ctrl_stress_all.1905439345 Dec 20 12:59:24 PM PST 23 Dec 20 01:22:00 PM PST 23 6807029325 ps
T771 /workspace/coverage/default/32.sram_ctrl_lc_escalation.937535348 Dec 20 01:00:39 PM PST 23 Dec 20 01:00:57 PM PST 23 449960591 ps
T772 /workspace/coverage/default/10.sram_ctrl_executable.726765930 Dec 20 12:58:29 PM PST 23 Dec 20 01:03:32 PM PST 23 9067001246 ps
T773 /workspace/coverage/default/23.sram_ctrl_lc_escalation.3251970949 Dec 20 12:59:47 PM PST 23 Dec 20 01:00:04 PM PST 23 1253478412 ps
T774 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1137334475 Dec 20 01:02:42 PM PST 23 Dec 20 01:08:05 PM PST 23 21805871067 ps
T775 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.9111975 Dec 20 12:58:16 PM PST 23 Dec 20 12:58:39 PM PST 23 240712964 ps
T776 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.1686915957 Dec 20 12:57:59 PM PST 23 Dec 20 12:58:18 PM PST 23 577269745 ps
T777 /workspace/coverage/default/24.sram_ctrl_executable.300151689 Dec 20 12:59:47 PM PST 23 Dec 20 01:11:17 PM PST 23 13716804149 ps
T778 /workspace/coverage/default/42.sram_ctrl_bijection.993093175 Dec 20 01:01:40 PM PST 23 Dec 20 01:03:37 PM PST 23 16832571185 ps
T779 /workspace/coverage/default/42.sram_ctrl_smoke.1426228837 Dec 20 01:01:39 PM PST 23 Dec 20 01:02:33 PM PST 23 192888281 ps
T780 /workspace/coverage/default/40.sram_ctrl_executable.852836608 Dec 20 01:01:34 PM PST 23 Dec 20 01:07:16 PM PST 23 4217770769 ps
T781 /workspace/coverage/default/0.sram_ctrl_partial_access.4132164418 Dec 20 12:58:18 PM PST 23 Dec 20 12:58:42 PM PST 23 456619242 ps
T782 /workspace/coverage/default/28.sram_ctrl_smoke.2417171128 Dec 20 01:00:40 PM PST 23 Dec 20 01:01:10 PM PST 23 901577731 ps
T783 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.1386988514 Dec 20 01:01:44 PM PST 23 Dec 20 01:20:08 PM PST 23 30345969491 ps
T784 /workspace/coverage/default/22.sram_ctrl_stress_all.1991000611 Dec 20 12:59:29 PM PST 23 Dec 20 01:26:17 PM PST 23 78259516166 ps
T785 /workspace/coverage/default/34.sram_ctrl_mem_walk.1811330364 Dec 20 01:00:42 PM PST 23 Dec 20 01:01:04 PM PST 23 2073291112 ps
T786 /workspace/coverage/default/9.sram_ctrl_stress_all.1502956654 Dec 20 12:58:18 PM PST 23 Dec 20 12:59:54 PM PST 23 3882972622 ps
T787 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.2149849097 Dec 20 12:58:55 PM PST 23 Dec 20 12:59:14 PM PST 23 256630480 ps
T788 /workspace/coverage/default/14.sram_ctrl_smoke.1618527861 Dec 20 12:58:37 PM PST 23 Dec 20 12:59:03 PM PST 23 437079002 ps
T789 /workspace/coverage/default/48.sram_ctrl_mem_walk.2806463876 Dec 20 01:02:29 PM PST 23 Dec 20 01:03:02 PM PST 23 1086982046 ps
T790 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.3855815774 Dec 20 12:58:05 PM PST 23 Dec 20 12:59:16 PM PST 23 147253962 ps
T791 /workspace/coverage/default/19.sram_ctrl_stress_all.1566249155 Dec 20 12:59:07 PM PST 23 Dec 20 01:21:15 PM PST 23 42512645081 ps
T792 /workspace/coverage/default/1.sram_ctrl_smoke.3782643253 Dec 20 12:58:41 PM PST 23 Dec 20 12:59:49 PM PST 23 1487701717 ps
T793 /workspace/coverage/default/46.sram_ctrl_multiple_keys.2745351255 Dec 20 01:02:23 PM PST 23 Dec 20 01:10:43 PM PST 23 2489197524 ps
T794 /workspace/coverage/default/5.sram_ctrl_multiple_keys.2809503408 Dec 20 12:58:31 PM PST 23 Dec 20 01:11:10 PM PST 23 7263121844 ps
T795 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.3378775185 Dec 20 12:58:43 PM PST 23 Dec 20 01:05:56 PM PST 23 17622704095 ps
T796 /workspace/coverage/default/48.sram_ctrl_ram_cfg.1638060789 Dec 20 01:02:37 PM PST 23 Dec 20 01:03:01 PM PST 23 88924367 ps
T797 /workspace/coverage/default/40.sram_ctrl_multiple_keys.692779251 Dec 20 01:01:29 PM PST 23 Dec 20 01:14:37 PM PST 23 45476345419 ps
T798 /workspace/coverage/default/30.sram_ctrl_partial_access.3563664486 Dec 20 01:00:43 PM PST 23 Dec 20 01:01:54 PM PST 23 1245488195 ps
T799 /workspace/coverage/default/49.sram_ctrl_regwen.700894003 Dec 20 01:02:38 PM PST 23 Dec 20 01:15:36 PM PST 23 78551882188 ps
T800 /workspace/coverage/default/10.sram_ctrl_multiple_keys.61838222 Dec 20 12:58:24 PM PST 23 Dec 20 01:18:46 PM PST 23 35724893505 ps
T801 /workspace/coverage/default/24.sram_ctrl_partial_access.3902190745 Dec 20 12:59:47 PM PST 23 Dec 20 01:00:03 PM PST 23 82166358 ps
T802 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2676738517 Dec 20 01:00:34 PM PST 23 Dec 20 01:55:52 PM PST 23 3656672851 ps
T803 /workspace/coverage/default/47.sram_ctrl_stress_all.4079939626 Dec 20 01:03:05 PM PST 23 Dec 20 01:22:02 PM PST 23 8527369101 ps
T804 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.1415924340 Dec 20 12:59:06 PM PST 23 Dec 20 12:59:22 PM PST 23 162605731 ps
T805 /workspace/coverage/default/27.sram_ctrl_regwen.2573875719 Dec 20 01:00:33 PM PST 23 Dec 20 01:27:19 PM PST 23 14995745009 ps
T806 /workspace/coverage/default/26.sram_ctrl_regwen.1966306408 Dec 20 01:00:13 PM PST 23 Dec 20 01:10:19 PM PST 23 9559772792 ps
T807 /workspace/coverage/default/40.sram_ctrl_partial_access.3323563887 Dec 20 01:01:33 PM PST 23 Dec 20 01:02:16 PM PST 23 453602796 ps
T808 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.3153989329 Dec 20 12:59:50 PM PST 23 Dec 20 01:00:09 PM PST 23 64109358 ps
T809 /workspace/coverage/default/4.sram_ctrl_ram_cfg.2692976998 Dec 20 12:58:10 PM PST 23 Dec 20 12:58:30 PM PST 23 42922137 ps
T810 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2851853448 Dec 20 01:02:09 PM PST 23 Dec 20 01:09:37 PM PST 23 5671393351 ps
T811 /workspace/coverage/default/28.sram_ctrl_stress_all.1989000751 Dec 20 01:00:49 PM PST 23 Dec 20 01:32:04 PM PST 23 29207979211 ps
T812 /workspace/coverage/default/35.sram_ctrl_max_throughput.2762622786 Dec 20 01:01:02 PM PST 23 Dec 20 01:02:23 PM PST 23 372503193 ps
T813 /workspace/coverage/default/37.sram_ctrl_smoke.1565127785 Dec 20 01:00:50 PM PST 23 Dec 20 01:01:20 PM PST 23 98533422 ps
T814 /workspace/coverage/default/46.sram_ctrl_mem_walk.3681667872 Dec 20 01:02:51 PM PST 23 Dec 20 01:03:24 PM PST 23 744850475 ps
T815 /workspace/coverage/default/24.sram_ctrl_multiple_keys.2620295543 Dec 20 12:59:54 PM PST 23 Dec 20 01:13:02 PM PST 23 53414641750 ps
T816 /workspace/coverage/default/31.sram_ctrl_mem_walk.2680415147 Dec 20 01:00:43 PM PST 23 Dec 20 01:01:04 PM PST 23 81840305 ps
T817 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.448405336 Dec 20 01:01:33 PM PST 23 Dec 20 01:10:16 PM PST 23 1575406886 ps
T818 /workspace/coverage/default/15.sram_ctrl_regwen.3052237210 Dec 20 12:58:53 PM PST 23 Dec 20 01:13:25 PM PST 23 11893684007 ps
T819 /workspace/coverage/default/48.sram_ctrl_stress_all.3161638276 Dec 20 01:02:34 PM PST 23 Dec 20 01:25:30 PM PST 23 41286630453 ps
T820 /workspace/coverage/default/32.sram_ctrl_executable.4195709331 Dec 20 01:00:58 PM PST 23 Dec 20 01:08:14 PM PST 23 4085279247 ps
T821 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.3001639987 Dec 20 12:58:13 PM PST 23 Dec 20 12:58:36 PM PST 23 245072426 ps
T822 /workspace/coverage/default/16.sram_ctrl_multiple_keys.1374959267 Dec 20 12:58:32 PM PST 23 Dec 20 01:05:15 PM PST 23 16080430747 ps
T823 /workspace/coverage/default/49.sram_ctrl_multiple_keys.4133315440 Dec 20 01:02:30 PM PST 23 Dec 20 01:17:44 PM PST 23 14597623273 ps
T824 /workspace/coverage/default/16.sram_ctrl_bijection.1666361283 Dec 20 12:58:49 PM PST 23 Dec 20 12:59:51 PM PST 23 1015242858 ps
T825 /workspace/coverage/default/31.sram_ctrl_lc_escalation.2648981620 Dec 20 01:00:31 PM PST 23 Dec 20 01:00:49 PM PST 23 685142724 ps
T826 /workspace/coverage/default/9.sram_ctrl_mem_walk.1122736892 Dec 20 12:58:20 PM PST 23 Dec 20 12:58:41 PM PST 23 136361796 ps
T827 /workspace/coverage/default/33.sram_ctrl_alert_test.3151635047 Dec 20 01:00:56 PM PST 23 Dec 20 01:01:34 PM PST 23 23738535 ps
T828 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.3454495745 Dec 20 12:58:00 PM PST 23 Dec 20 01:00:38 PM PST 23 1583325805 ps
T829 /workspace/coverage/default/38.sram_ctrl_lc_escalation.167633642 Dec 20 01:01:14 PM PST 23 Dec 20 01:02:08 PM PST 23 1348691202 ps
T830 /workspace/coverage/default/23.sram_ctrl_mem_walk.2755104335 Dec 20 12:59:48 PM PST 23 Dec 20 01:00:10 PM PST 23 269614846 ps
T831 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1728630092 Dec 20 12:58:06 PM PST 23 Dec 20 01:54:04 PM PST 23 1263561920 ps
T832 /workspace/coverage/default/18.sram_ctrl_smoke.3126875945 Dec 20 12:59:06 PM PST 23 Dec 20 12:59:23 PM PST 23 492963624 ps
T833 /workspace/coverage/default/7.sram_ctrl_lc_escalation.3445300524 Dec 20 12:58:19 PM PST 23 Dec 20 12:58:51 PM PST 23 1919326292 ps
T834 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.2251062007 Dec 20 12:59:13 PM PST 23 Dec 20 12:59:31 PM PST 23 657345184 ps
T835 /workspace/coverage/default/8.sram_ctrl_max_throughput.1617675638 Dec 20 12:58:12 PM PST 23 Dec 20 12:58:40 PM PST 23 1127430685 ps
T836 /workspace/coverage/default/45.sram_ctrl_stress_all.1225443033 Dec 20 01:02:28 PM PST 23 Dec 20 01:57:16 PM PST 23 11497179952 ps
T837 /workspace/coverage/default/23.sram_ctrl_regwen.3385310634 Dec 20 12:59:42 PM PST 23 Dec 20 01:23:29 PM PST 23 113441048559 ps
T838 /workspace/coverage/default/5.sram_ctrl_regwen.741247225 Dec 20 12:58:07 PM PST 23 Dec 20 01:13:16 PM PST 23 44016328976 ps
T839 /workspace/coverage/default/0.sram_ctrl_ram_cfg.2026912734 Dec 20 12:58:17 PM PST 23 Dec 20 12:58:36 PM PST 23 31192637 ps
T840 /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.135038481 Dec 20 12:58:07 PM PST 23 Dec 20 01:41:17 PM PST 23 9246410578 ps
T841 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.709029296 Dec 20 01:00:09 PM PST 23 Dec 20 01:00:24 PM PST 23 60565878 ps
T842 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.817991525 Dec 20 12:59:01 PM PST 23 Dec 20 01:02:23 PM PST 23 31674686623 ps
T843 /workspace/coverage/default/24.sram_ctrl_stress_all.4105492015 Dec 20 01:00:07 PM PST 23 Dec 20 01:29:28 PM PST 23 26526852252 ps
T844 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.3384506094 Dec 20 01:01:12 PM PST 23 Dec 20 01:06:31 PM PST 23 5506464591 ps
T845 /workspace/coverage/default/36.sram_ctrl_multiple_keys.819102685 Dec 20 01:00:58 PM PST 23 Dec 20 01:20:18 PM PST 23 14271955105 ps
T846 /workspace/coverage/default/49.sram_ctrl_smoke.3435151327 Dec 20 01:02:51 PM PST 23 Dec 20 01:03:27 PM PST 23 2530263822 ps
T847 /workspace/coverage/default/31.sram_ctrl_partial_access.943565169 Dec 20 01:00:17 PM PST 23 Dec 20 01:00:54 PM PST 23 382991737 ps
T848 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3487002061 Dec 20 12:58:17 PM PST 23 Dec 20 01:52:20 PM PST 23 7821593189 ps
T849 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.1549494586 Dec 20 01:00:41 PM PST 23 Dec 20 01:00:58 PM PST 23 282456388 ps
T850 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.3878805722 Dec 20 01:00:18 PM PST 23 Dec 20 01:07:28 PM PST 23 19748364384 ps
T851 /workspace/coverage/default/38.sram_ctrl_ram_cfg.3179356521 Dec 20 01:01:12 PM PST 23 Dec 20 01:01:58 PM PST 23 51552894 ps
T852 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.1141850351 Dec 20 01:01:29 PM PST 23 Dec 20 01:06:37 PM PST 23 1384707547 ps
T853 /workspace/coverage/default/26.sram_ctrl_lc_escalation.2995991274 Dec 20 01:00:11 PM PST 23 Dec 20 01:00:26 PM PST 23 160181062 ps
T854 /workspace/coverage/default/23.sram_ctrl_alert_test.1576773624 Dec 20 12:59:53 PM PST 23 Dec 20 01:00:08 PM PST 23 71821860 ps
T855 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1241823939 Dec 20 01:01:39 PM PST 23 Dec 20 01:02:43 PM PST 23 88638757 ps
T856 /workspace/coverage/default/11.sram_ctrl_alert_test.3270309638 Dec 20 12:58:25 PM PST 23 Dec 20 12:58:44 PM PST 23 145454257 ps
T857 /workspace/coverage/default/30.sram_ctrl_multiple_keys.1962702163 Dec 20 01:00:52 PM PST 23 Dec 20 01:09:03 PM PST 23 30539239304 ps
T858 /workspace/coverage/default/2.sram_ctrl_alert_test.674056466 Dec 20 12:58:22 PM PST 23 Dec 20 12:58:39 PM PST 23 15264239 ps
T859 /workspace/coverage/default/34.sram_ctrl_alert_test.3172872151 Dec 20 01:00:48 PM PST 23 Dec 20 01:01:11 PM PST 23 13466656 ps
T860 /workspace/coverage/default/44.sram_ctrl_smoke.3039529093 Dec 20 01:01:50 PM PST 23 Dec 20 01:02:44 PM PST 23 2124602228 ps
T861 /workspace/coverage/default/44.sram_ctrl_mem_walk.2420490418 Dec 20 01:01:44 PM PST 23 Dec 20 01:02:31 PM PST 23 73000993 ps
T862 /workspace/coverage/default/26.sram_ctrl_bijection.602123864 Dec 20 01:00:15 PM PST 23 Dec 20 01:01:48 PM PST 23 19913023732 ps
T863 /workspace/coverage/default/27.sram_ctrl_bijection.3802982072 Dec 20 01:00:07 PM PST 23 Dec 20 01:01:36 PM PST 23 9361073234 ps
T864 /workspace/coverage/default/8.sram_ctrl_regwen.4103132547 Dec 20 12:58:14 PM PST 23 Dec 20 01:10:08 PM PST 23 39504562667 ps
T865 /workspace/coverage/default/6.sram_ctrl_bijection.3702158353 Dec 20 12:58:17 PM PST 23 Dec 20 12:59:22 PM PST 23 18915949809 ps
T866 /workspace/coverage/default/24.sram_ctrl_bijection.2497740844 Dec 20 12:59:47 PM PST 23 Dec 20 01:01:07 PM PST 23 1060737621 ps
T867 /workspace/coverage/default/28.sram_ctrl_partial_access.4242681777 Dec 20 01:00:09 PM PST 23 Dec 20 01:00:30 PM PST 23 1446020676 ps
T868 /workspace/coverage/default/31.sram_ctrl_smoke.253357735 Dec 20 01:00:21 PM PST 23 Dec 20 01:00:41 PM PST 23 554164618 ps
T869 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4102293989 Dec 20 12:58:28 PM PST 23 Dec 20 01:04:59 PM PST 23 11002352576 ps
T870 /workspace/coverage/default/24.sram_ctrl_regwen.286181198 Dec 20 12:59:47 PM PST 23 Dec 20 01:17:21 PM PST 23 28830995063 ps
T871 /workspace/coverage/default/22.sram_ctrl_max_throughput.459139993 Dec 20 12:59:27 PM PST 23 Dec 20 12:59:52 PM PST 23 499815454 ps
T872 /workspace/coverage/default/15.sram_ctrl_multiple_keys.981973605 Dec 20 12:58:51 PM PST 23 Dec 20 01:19:13 PM PST 23 3309702608 ps
T873 /workspace/coverage/default/33.sram_ctrl_stress_all.3874983377 Dec 20 01:00:52 PM PST 23 Dec 20 01:25:52 PM PST 23 26609615456 ps
T874 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.972862450 Dec 20 12:57:59 PM PST 23 Dec 20 12:58:19 PM PST 23 123461653 ps
T875 /workspace/coverage/default/5.sram_ctrl_executable.1007024165 Dec 20 12:58:31 PM PST 23 Dec 20 01:21:18 PM PST 23 16431198507 ps
T876 /workspace/coverage/default/16.sram_ctrl_executable.2523106906 Dec 20 12:59:08 PM PST 23 Dec 20 01:17:09 PM PST 23 12004573325 ps
T877 /workspace/coverage/default/10.sram_ctrl_mem_walk.90602682 Dec 20 12:58:18 PM PST 23 Dec 20 12:58:44 PM PST 23 2168688219 ps
T878 /workspace/coverage/default/35.sram_ctrl_lc_escalation.2445051852 Dec 20 01:01:03 PM PST 23 Dec 20 01:01:55 PM PST 23 2908419349 ps
T879 /workspace/coverage/default/14.sram_ctrl_alert_test.332287408 Dec 20 12:58:28 PM PST 23 Dec 20 12:58:47 PM PST 23 17855866 ps
T880 /workspace/coverage/default/49.sram_ctrl_partial_access.1910837292 Dec 20 01:02:31 PM PST 23 Dec 20 01:03:01 PM PST 23 728163995 ps
T881 /workspace/coverage/default/33.sram_ctrl_multiple_keys.3480619164 Dec 20 01:00:35 PM PST 23 Dec 20 01:24:17 PM PST 23 117875070237 ps
T882 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3150400031 Dec 20 01:00:30 PM PST 23 Dec 20 01:21:49 PM PST 23 477935439 ps
T883 /workspace/coverage/default/29.sram_ctrl_lc_escalation.1791185751 Dec 20 01:00:21 PM PST 23 Dec 20 01:00:40 PM PST 23 3737524042 ps
T884 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.3876118648 Dec 20 01:02:31 PM PST 23 Dec 20 01:12:09 PM PST 23 25863830506 ps
T885 /workspace/coverage/default/36.sram_ctrl_max_throughput.70000565 Dec 20 01:00:58 PM PST 23 Dec 20 01:02:25 PM PST 23 128205830 ps
T886 /workspace/coverage/default/8.sram_ctrl_alert_test.2158875914 Dec 20 12:58:19 PM PST 23 Dec 20 12:58:36 PM PST 23 42073902 ps
T887 /workspace/coverage/default/19.sram_ctrl_smoke.3330340768 Dec 20 12:59:01 PM PST 23 Dec 20 01:00:35 PM PST 23 412627926 ps
T888 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.603545918 Dec 20 01:02:41 PM PST 23 Dec 20 01:19:47 PM PST 23 11822967808 ps
T889 /workspace/coverage/default/35.sram_ctrl_ram_cfg.926224456 Dec 20 01:00:52 PM PST 23 Dec 20 01:01:27 PM PST 23 75167263 ps
T890 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.1327896736 Dec 20 12:59:47 PM PST 23 Dec 20 01:15:10 PM PST 23 23109256554 ps
T891 /workspace/coverage/default/43.sram_ctrl_multiple_keys.1120222697 Dec 20 01:01:38 PM PST 23 Dec 20 01:30:32 PM PST 23 20074560346 ps
T892 /workspace/coverage/default/26.sram_ctrl_ram_cfg.885093193 Dec 20 01:00:12 PM PST 23 Dec 20 01:00:26 PM PST 23 31741876 ps
T34 /workspace/coverage/default/1.sram_ctrl_sec_cm.4124540220 Dec 20 12:58:04 PM PST 23 Dec 20 12:58:22 PM PST 23 1053472154 ps
T893 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.317094130 Dec 20 01:00:31 PM PST 23 Dec 20 01:06:24 PM PST 23 59218109075 ps
T894 /workspace/coverage/default/26.sram_ctrl_executable.2645606926 Dec 20 01:00:06 PM PST 23 Dec 20 01:04:06 PM PST 23 4360862406 ps
T895 /workspace/coverage/default/12.sram_ctrl_mem_walk.2729973971 Dec 20 12:58:31 PM PST 23 Dec 20 12:58:53 PM PST 23 106632267 ps
T896 /workspace/coverage/default/27.sram_ctrl_stress_all.2947035841 Dec 20 01:00:59 PM PST 23 Dec 20 01:40:44 PM PST 23 10896805237 ps
T897 /workspace/coverage/default/41.sram_ctrl_lc_escalation.1762270812 Dec 20 01:01:38 PM PST 23 Dec 20 01:02:31 PM PST 23 621800324 ps
T898 /workspace/coverage/default/7.sram_ctrl_regwen.1801651427 Dec 20 12:58:00 PM PST 23 Dec 20 01:07:09 PM PST 23 14397772119 ps
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T903 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.4236353481 Dec 20 01:00:57 PM PST 23 Dec 20 01:06:18 PM PST 23 25548845872 ps
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T905 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.559370318 Dec 20 01:00:21 PM PST 23 Dec 20 01:19:09 PM PST 23 57919171225 ps
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T911 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.3628323742 Dec 20 12:58:09 PM PST 23 Dec 20 01:16:27 PM PST 23 9749876552 ps
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T916 /workspace/coverage/default/40.sram_ctrl_regwen.1367705044 Dec 20 01:01:32 PM PST 23 Dec 20 01:19:34 PM PST 23 144762305310 ps
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T918 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.1198044392 Dec 20 01:00:48 PM PST 23 Dec 20 01:01:14 PM PST 23 131026742 ps
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T921 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.4083837114 Dec 20 01:00:37 PM PST 23 Dec 20 01:02:57 PM PST 23 1860349503 ps
T922 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3795275852 Dec 20 12:58:14 PM PST 23 Dec 20 02:08:52 PM PST 23 2132490084 ps
T923 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.1026339196 Dec 20 01:01:02 PM PST 23 Dec 20 01:05:10 PM PST 23 8971274088 ps
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T926 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2215580778 Dec 20 01:00:24 PM PST 23 Dec 20 01:00:39 PM PST 23 56279372 ps
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T928 /workspace/coverage/default/7.sram_ctrl_ram_cfg.2140631967 Dec 20 12:58:15 PM PST 23 Dec 20 12:58:34 PM PST 23 80008730 ps
T929 /workspace/coverage/default/2.sram_ctrl_lc_escalation.4036481215 Dec 20 12:58:12 PM PST 23 Dec 20 12:58:34 PM PST 23 284150899 ps
T930 /workspace/coverage/default/13.sram_ctrl_lc_escalation.3718979142 Dec 20 12:58:20 PM PST 23 Dec 20 12:58:46 PM PST 23 2196611486 ps
T931 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.4195890701 Dec 20 12:58:10 PM PST 23 Dec 20 01:08:16 PM PST 23 89578048981 ps
T932 /workspace/coverage/default/41.sram_ctrl_max_throughput.3766368723 Dec 20 01:01:33 PM PST 23 Dec 20 01:02:49 PM PST 23 97280031 ps
T933 /workspace/coverage/default/12.sram_ctrl_stress_all.1011366571 Dec 20 12:58:19 PM PST 23 Dec 20 01:25:38 PM PST 23 19629579892 ps
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T935 /workspace/coverage/default/45.sram_ctrl_lc_escalation.513927503 Dec 20 01:02:06 PM PST 23 Dec 20 01:02:53 PM PST 23 1585938824 ps
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T942 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.3054917302 Dec 20 12:59:25 PM PST 23 Dec 20 01:27:12 PM PST 23 1518610749 ps
T943 /workspace/coverage/default/27.sram_ctrl_ram_cfg.1798823838 Dec 20 01:00:48 PM PST 23 Dec 20 01:01:10 PM PST 23 396697405 ps
T944 /workspace/coverage/default/21.sram_ctrl_lc_escalation.2786837512 Dec 20 12:59:30 PM PST 23 Dec 20 12:59:51 PM PST 23 2085230131 ps
T945 /workspace/coverage/default/26.sram_ctrl_partial_access.3748654452 Dec 20 01:00:08 PM PST 23 Dec 20 01:00:41 PM PST 23 4009062097 ps
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T947 /workspace/coverage/default/29.sram_ctrl_alert_test.2787132396 Dec 20 01:00:43 PM PST 23 Dec 20 01:01:00 PM PST 23 13598561 ps
T948 /workspace/coverage/default/16.sram_ctrl_ram_cfg.1857070050 Dec 20 12:59:06 PM PST 23 Dec 20 12:59:20 PM PST 23 36697180 ps
T949 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.1552553708 Dec 20 12:59:45 PM PST 23 Dec 20 01:00:00 PM PST 23 138059024 ps
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T960 /workspace/coverage/default/30.sram_ctrl_executable.3313044517 Dec 20 01:00:33 PM PST 23 Dec 20 01:05:53 PM PST 23 12074239779 ps
T961 /workspace/coverage/default/14.sram_ctrl_partial_access.2901806761 Dec 20 12:58:19 PM PST 23 Dec 20 12:58:52 PM PST 23 855464467 ps
T962 /workspace/coverage/default/32.sram_ctrl_ram_cfg.2255539804 Dec 20 01:00:47 PM PST 23 Dec 20 01:01:10 PM PST 23 155876539 ps
T963 /workspace/coverage/default/8.sram_ctrl_smoke.1573547295 Dec 20 12:58:11 PM PST 23 Dec 20 12:58:35 PM PST 23 1230920970 ps
T964 /workspace/coverage/default/9.sram_ctrl_partial_access.1482157390 Dec 20 12:58:16 PM PST 23 Dec 20 12:58:51 PM PST 23 1370310843 ps
T965 /workspace/coverage/default/7.sram_ctrl_max_throughput.4115056856 Dec 20 12:58:04 PM PST 23 Dec 20 12:59:40 PM PST 23 233206173 ps
T966 /workspace/coverage/default/6.sram_ctrl_regwen.1510954251 Dec 20 12:58:19 PM PST 23 Dec 20 01:23:17 PM PST 23 18206978045 ps
T967 /workspace/coverage/default/8.sram_ctrl_mem_walk.1282131215 Dec 20 12:58:13 PM PST 23 Dec 20 12:58:36 PM PST 23 79056073 ps
T968 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2466117673 Dec 20 01:00:20 PM PST 23 Dec 20 01:01:29 PM PST 23 498224743 ps
T969 /workspace/coverage/default/17.sram_ctrl_stress_all.1266431632 Dec 20 12:59:02 PM PST 23 Dec 20 01:30:51 PM PST 23 91732015157 ps
T970 /workspace/coverage/default/31.sram_ctrl_executable.1994656327 Dec 20 01:00:36 PM PST 23 Dec 20 01:03:28 PM PST 23 17750881163 ps
T971 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.145622804 Dec 20 01:01:28 PM PST 23 Dec 20 01:02:08 PM PST 23 97023057 ps
T972 /workspace/coverage/default/45.sram_ctrl_alert_test.1632771890 Dec 20 01:02:33 PM PST 23 Dec 20 01:02:58 PM PST 23 17949846 ps
T973 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.92877574 Dec 20 01:01:37 PM PST 23 Dec 20 01:36:17 PM PST 23 956344685 ps
T974 /workspace/coverage/default/29.sram_ctrl_max_throughput.3695058318 Dec 20 01:00:10 PM PST 23 Dec 20 01:00:28 PM PST 23 67637213 ps
T975 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3112655964 Dec 20 12:58:45 PM PST 23 Dec 20 12:59:22 PM PST 23 113987355 ps
T976 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.77485893 Dec 20 12:59:00 PM PST 23 Dec 20 01:17:44 PM PST 23 561562080 ps
T977 /workspace/coverage/default/0.sram_ctrl_smoke.2699086946 Dec 20 12:58:22 PM PST 23 Dec 20 12:58:40 PM PST 23 57001742 ps
T978 /workspace/coverage/default/31.sram_ctrl_stress_all.3586647668 Dec 20 01:00:37 PM PST 23 Dec 20 01:44:16 PM PST 23 41705159148 ps
T979 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.2362040840 Dec 20 01:00:26 PM PST 23 Dec 20 01:03:02 PM PST 23 753956018 ps
T980 /workspace/coverage/default/39.sram_ctrl_multiple_keys.2126584742 Dec 20 01:01:14 PM PST 23 Dec 20 01:14:44 PM PST 23 6142775898 ps
T981 /workspace/coverage/default/8.sram_ctrl_bijection.1194570795 Dec 20 12:58:12 PM PST 23 Dec 20 12:59:02 PM PST 23 508007004 ps
T982 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.804986550 Dec 20 12:58:21 PM PST 23 Dec 20 01:32:30 PM PST 23 2844817539 ps
T983 /workspace/coverage/default/48.sram_ctrl_multiple_keys.3922358696 Dec 20 01:02:33 PM PST 23 Dec 20 01:16:36 PM PST 23 10942694803 ps
T984 /workspace/coverage/default/33.sram_ctrl_bijection.4036725751 Dec 20 01:00:59 PM PST 23 Dec 20 01:02:05 PM PST 23 1381020469 ps
T985 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.746244336 Dec 20 01:02:21 PM PST 23 Dec 20 01:02:58 PM PST 23 75315318 ps
T986 /workspace/coverage/default/36.sram_ctrl_alert_test.97319667 Dec 20 01:00:48 PM PST 23 Dec 20 01:01:10 PM PST 23 16242208 ps
T987 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.3631133605 Dec 20 12:59:48 PM PST 23 Dec 20 01:02:32 PM PST 23 306973058 ps
T988 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.2505650447 Dec 20 01:00:30 PM PST 23 Dec 20 01:01:50 PM PST 23 1869107202 ps
T989 /workspace/coverage/default/43.sram_ctrl_regwen.964929025 Dec 20 01:01:47 PM PST 23 Dec 20 01:24:35 PM PST 23 4137261229 ps
T990 /workspace/coverage/default/30.sram_ctrl_smoke.2672464277 Dec 20 01:00:28 PM PST 23 Dec 20 01:00:50 PM PST 23 301574037 ps
T991 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.3799536358 Dec 20 12:58:11 PM PST 23 Dec 20 01:15:47 PM PST 23 15118421564 ps
T992 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.3473774799 Dec 20 01:00:28 PM PST 23 Dec 20 01:09:59 PM PST 23 7916409863 ps
T993 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.1434818755 Dec 20 12:57:59 PM PST 23 Dec 20 12:58:16 PM PST 23 91904142 ps
T994 /workspace/coverage/default/44.sram_ctrl_max_throughput.1344176826 Dec 20 01:02:11 PM PST 23 Dec 20 01:03:23 PM PST 23 106072532 ps
T995 /workspace/coverage/default/13.sram_ctrl_alert_test.4109238296 Dec 20 12:58:22 PM PST 23 Dec 20 12:58:40 PM PST 23 23058762 ps
T996 /workspace/coverage/default/27.sram_ctrl_executable.3326879005 Dec 20 01:00:33 PM PST 23 Dec 20 01:07:40 PM PST 23 1183307458 ps
T997 /workspace/coverage/default/47.sram_ctrl_bijection.2772806570 Dec 20 01:02:28 PM PST 23 Dec 20 01:03:13 PM PST 23 1581606160 ps
T998 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.805004835 Dec 20 01:00:26 PM PST 23 Dec 20 01:07:19 PM PST 23 1856788467 ps
T999 /workspace/coverage/default/5.sram_ctrl_bijection.2510190206 Dec 20 12:58:07 PM PST 23 Dec 20 12:59:05 PM PST 23 10532665751 ps
T1000 /workspace/coverage/default/0.sram_ctrl_executable.47573834 Dec 20 12:58:30 PM PST 23 Dec 20 12:59:28 PM PST 23 2254922263 ps
T1001 /workspace/coverage/default/7.sram_ctrl_partial_access.2790023284 Dec 20 12:58:09 PM PST 23 Dec 20 12:58:43 PM PST 23 1630873517 ps
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