| T257 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.123765916 |
|
|
Dec 24 12:35:48 PM PST 23 |
Dec 24 12:36:20 PM PST 23 |
2620663210 ps |
| T258 |
/workspace/coverage/default/38.sram_ctrl_partial_access.1153709453 |
|
|
Dec 24 12:36:52 PM PST 23 |
Dec 24 12:37:11 PM PST 23 |
76270888 ps |
| T259 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.1239321929 |
|
|
Dec 24 12:37:08 PM PST 23 |
Dec 24 12:37:25 PM PST 23 |
39674420 ps |
| T260 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.3856196423 |
|
|
Dec 24 12:35:51 PM PST 23 |
Dec 24 12:37:05 PM PST 23 |
127742173 ps |
| T261 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.1933271757 |
|
|
Dec 24 12:36:37 PM PST 23 |
Dec 24 12:37:04 PM PST 23 |
769861028 ps |
| T21 |
/workspace/coverage/default/2.sram_ctrl_alert_test.2161696786 |
|
|
Dec 24 12:34:58 PM PST 23 |
Dec 24 12:35:34 PM PST 23 |
16400296 ps |
| T262 |
/workspace/coverage/default/11.sram_ctrl_executable.3059835548 |
|
|
Dec 24 12:35:16 PM PST 23 |
Dec 24 12:42:32 PM PST 23 |
6468014286 ps |
| T263 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.3368034239 |
|
|
Dec 24 12:37:00 PM PST 23 |
Dec 24 12:37:20 PM PST 23 |
338881697 ps |
| T264 |
/workspace/coverage/default/0.sram_ctrl_alert_test.909400690 |
|
|
Dec 24 12:35:23 PM PST 23 |
Dec 24 12:35:51 PM PST 23 |
161151056 ps |
| T265 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2517190458 |
|
|
Dec 24 12:35:37 PM PST 23 |
Dec 24 12:36:06 PM PST 23 |
64641879 ps |
| T266 |
/workspace/coverage/default/49.sram_ctrl_executable.437984438 |
|
|
Dec 24 12:37:35 PM PST 23 |
Dec 24 12:44:51 PM PST 23 |
27255669873 ps |
| T267 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.3457738140 |
|
|
Dec 24 12:36:02 PM PST 23 |
Dec 24 12:40:38 PM PST 23 |
38109674834 ps |
| T268 |
/workspace/coverage/default/21.sram_ctrl_partial_access.3721237034 |
|
|
Dec 24 12:36:22 PM PST 23 |
Dec 24 12:37:09 PM PST 23 |
401006018 ps |
| T269 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.3111991120 |
|
|
Dec 24 12:36:27 PM PST 23 |
Dec 24 12:40:54 PM PST 23 |
5069632299 ps |
| T270 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.2983567024 |
|
|
Dec 24 12:36:19 PM PST 23 |
Dec 24 12:36:44 PM PST 23 |
139312653 ps |
| T271 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3990881784 |
|
|
Dec 24 12:35:33 PM PST 23 |
Dec 24 12:43:14 PM PST 23 |
3004973749 ps |
| T272 |
/workspace/coverage/default/12.sram_ctrl_bijection.1368622089 |
|
|
Dec 24 12:35:28 PM PST 23 |
Dec 24 12:36:59 PM PST 23 |
4031001211 ps |
| T273 |
/workspace/coverage/default/27.sram_ctrl_alert_test.1355826544 |
|
|
Dec 24 12:36:49 PM PST 23 |
Dec 24 12:37:05 PM PST 23 |
22794099 ps |
| T274 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.4164106905 |
|
|
Dec 24 12:35:33 PM PST 23 |
Dec 24 12:37:21 PM PST 23 |
896316271 ps |
| T275 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.640761874 |
|
|
Dec 24 12:36:11 PM PST 23 |
Dec 24 12:37:31 PM PST 23 |
952892988 ps |
| T121 |
/workspace/coverage/default/49.sram_ctrl_stress_all.2013726144 |
|
|
Dec 24 12:37:23 PM PST 23 |
Dec 24 01:47:59 PM PST 23 |
48071722468 ps |
| T276 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.3662277971 |
|
|
Dec 24 12:35:14 PM PST 23 |
Dec 24 12:35:49 PM PST 23 |
489237570 ps |
| T277 |
/workspace/coverage/default/4.sram_ctrl_smoke.2651938280 |
|
|
Dec 24 12:35:23 PM PST 23 |
Dec 24 12:36:12 PM PST 23 |
85663053 ps |
| T278 |
/workspace/coverage/default/22.sram_ctrl_executable.2459545032 |
|
|
Dec 24 12:36:09 PM PST 23 |
Dec 24 12:53:13 PM PST 23 |
3364214715 ps |
| T279 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3270555132 |
|
|
Dec 24 12:35:33 PM PST 23 |
Dec 24 12:39:00 PM PST 23 |
2322078222 ps |
| T280 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1308628246 |
|
|
Dec 24 12:37:20 PM PST 23 |
Dec 24 12:43:16 PM PST 23 |
1502924982 ps |
| T281 |
/workspace/coverage/default/37.sram_ctrl_regwen.3259337840 |
|
|
Dec 24 12:36:47 PM PST 23 |
Dec 24 12:38:28 PM PST 23 |
1854950568 ps |
| T282 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.600165332 |
|
|
Dec 24 12:36:53 PM PST 23 |
Dec 24 12:40:37 PM PST 23 |
3209743339 ps |
| T283 |
/workspace/coverage/default/3.sram_ctrl_stress_all.161291059 |
|
|
Dec 24 12:35:05 PM PST 23 |
Dec 24 12:43:54 PM PST 23 |
50242912786 ps |
| T284 |
/workspace/coverage/default/11.sram_ctrl_bijection.2725095673 |
|
|
Dec 24 12:35:25 PM PST 23 |
Dec 24 12:36:32 PM PST 23 |
1140205390 ps |
| T285 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.418217331 |
|
|
Dec 24 12:35:39 PM PST 23 |
Dec 24 12:36:56 PM PST 23 |
127722900 ps |
| T286 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1687599318 |
|
|
Dec 24 12:35:34 PM PST 23 |
Dec 24 12:55:03 PM PST 23 |
7425232363 ps |
| T287 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3000079288 |
|
|
Dec 24 12:36:56 PM PST 23 |
Dec 24 12:42:32 PM PST 23 |
4609648420 ps |
| T288 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.1911397941 |
|
|
Dec 24 12:35:55 PM PST 23 |
Dec 24 12:42:54 PM PST 23 |
8223059954 ps |
| T289 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2632912997 |
|
|
Dec 24 12:35:31 PM PST 23 |
Dec 24 12:36:08 PM PST 23 |
268426126 ps |
| T290 |
/workspace/coverage/default/6.sram_ctrl_smoke.1796006761 |
|
|
Dec 24 12:35:23 PM PST 23 |
Dec 24 12:36:19 PM PST 23 |
1570433955 ps |
| T291 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1847599228 |
|
|
Dec 24 12:37:18 PM PST 23 |
Dec 24 12:47:00 PM PST 23 |
2759903850 ps |
| T292 |
/workspace/coverage/default/38.sram_ctrl_bijection.3704970209 |
|
|
Dec 24 12:36:48 PM PST 23 |
Dec 24 12:38:11 PM PST 23 |
1023176625 ps |
| T293 |
/workspace/coverage/default/35.sram_ctrl_regwen.3259759878 |
|
|
Dec 24 12:36:38 PM PST 23 |
Dec 24 12:51:11 PM PST 23 |
17831058222 ps |
| T294 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.3163091644 |
|
|
Dec 24 12:35:44 PM PST 23 |
Dec 24 12:36:11 PM PST 23 |
99220214 ps |
| T295 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.487291499 |
|
|
Dec 24 12:35:12 PM PST 23 |
Dec 24 12:48:38 PM PST 23 |
1767124632 ps |
| T296 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3508699116 |
|
|
Dec 24 12:37:27 PM PST 23 |
Dec 24 12:37:40 PM PST 23 |
32194199 ps |
| T297 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2859217931 |
|
|
Dec 24 12:35:56 PM PST 23 |
Dec 24 02:09:04 PM PST 23 |
9060442970 ps |
| T298 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.2429250686 |
|
|
Dec 24 12:36:28 PM PST 23 |
Dec 24 12:36:54 PM PST 23 |
59930560 ps |
| T299 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.2566874679 |
|
|
Dec 24 12:36:27 PM PST 23 |
Dec 24 12:37:30 PM PST 23 |
209756511 ps |
| T300 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.876526479 |
|
|
Dec 24 12:36:14 PM PST 23 |
Dec 24 12:53:18 PM PST 23 |
13555214124 ps |
| T301 |
/workspace/coverage/default/1.sram_ctrl_regwen.2948504260 |
|
|
Dec 24 12:35:03 PM PST 23 |
Dec 24 12:50:14 PM PST 23 |
23085317116 ps |
| T302 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.388037648 |
|
|
Dec 24 12:35:47 PM PST 23 |
Dec 24 12:41:31 PM PST 23 |
713968502 ps |
| T303 |
/workspace/coverage/default/2.sram_ctrl_executable.4024118908 |
|
|
Dec 24 12:35:08 PM PST 23 |
Dec 24 12:40:59 PM PST 23 |
12324436864 ps |
| T304 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.3182413295 |
|
|
Dec 24 12:37:08 PM PST 23 |
Dec 24 12:40:05 PM PST 23 |
9612437641 ps |
| T305 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.2330693158 |
|
|
Dec 24 12:36:21 PM PST 23 |
Dec 24 12:40:29 PM PST 23 |
2566663805 ps |
| T306 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.2817968166 |
|
|
Dec 24 12:35:46 PM PST 23 |
Dec 24 12:53:40 PM PST 23 |
2215566964 ps |
| T307 |
/workspace/coverage/default/46.sram_ctrl_stress_all.711571534 |
|
|
Dec 24 12:37:29 PM PST 23 |
Dec 24 01:24:02 PM PST 23 |
420661359341 ps |
| T308 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.2782630139 |
|
|
Dec 24 12:36:26 PM PST 23 |
Dec 24 12:36:49 PM PST 23 |
146420686 ps |
| T309 |
/workspace/coverage/default/30.sram_ctrl_stress_all.486345002 |
|
|
Dec 24 12:36:25 PM PST 23 |
Dec 24 12:47:45 PM PST 23 |
5600603400 ps |
| T310 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1779843887 |
|
|
Dec 24 12:35:16 PM PST 23 |
Dec 24 02:04:42 PM PST 23 |
8227935824 ps |
| T311 |
/workspace/coverage/default/14.sram_ctrl_executable.2698174349 |
|
|
Dec 24 12:35:40 PM PST 23 |
Dec 24 12:51:03 PM PST 23 |
12011681174 ps |
| T312 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.3647555570 |
|
|
Dec 24 12:37:04 PM PST 23 |
Dec 24 12:37:22 PM PST 23 |
27862482 ps |
| T313 |
/workspace/coverage/default/4.sram_ctrl_alert_test.429817846 |
|
|
Dec 24 12:35:09 PM PST 23 |
Dec 24 12:35:41 PM PST 23 |
12811397 ps |
| T314 |
/workspace/coverage/default/13.sram_ctrl_executable.2922755092 |
|
|
Dec 24 12:35:52 PM PST 23 |
Dec 24 12:42:14 PM PST 23 |
1448177654 ps |
| T315 |
/workspace/coverage/default/29.sram_ctrl_bijection.930872678 |
|
|
Dec 24 12:36:46 PM PST 23 |
Dec 24 12:37:46 PM PST 23 |
2934742320 ps |
| T316 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.1320243627 |
|
|
Dec 24 12:35:19 PM PST 23 |
Dec 24 12:45:43 PM PST 23 |
10857727633 ps |
| T317 |
/workspace/coverage/default/17.sram_ctrl_bijection.3567344716 |
|
|
Dec 24 12:35:32 PM PST 23 |
Dec 24 12:37:01 PM PST 23 |
10739384941 ps |
| T318 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.3934324332 |
|
|
Dec 24 12:37:06 PM PST 23 |
Dec 24 12:48:46 PM PST 23 |
7087725329 ps |
| T319 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1168570509 |
|
|
Dec 24 12:35:47 PM PST 23 |
Dec 24 12:40:37 PM PST 23 |
63462374580 ps |
| T320 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.2623552632 |
|
|
Dec 24 12:35:50 PM PST 23 |
Dec 24 12:36:16 PM PST 23 |
242299381 ps |
| T321 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.892601185 |
|
|
Dec 24 12:36:06 PM PST 23 |
Dec 24 12:40:41 PM PST 23 |
2709906089 ps |
| T322 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1050914481 |
|
|
Dec 24 12:36:03 PM PST 23 |
Dec 24 12:38:50 PM PST 23 |
7024990628 ps |
| T323 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.1869973075 |
|
|
Dec 24 12:36:18 PM PST 23 |
Dec 24 12:36:42 PM PST 23 |
214306520 ps |
| T324 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.3279595447 |
|
|
Dec 24 12:35:01 PM PST 23 |
Dec 24 12:36:02 PM PST 23 |
189907357 ps |
| T325 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2915222743 |
|
|
Dec 24 12:37:09 PM PST 23 |
Dec 24 12:37:27 PM PST 23 |
104495376 ps |
| T326 |
/workspace/coverage/default/32.sram_ctrl_smoke.3200497063 |
|
|
Dec 24 12:36:41 PM PST 23 |
Dec 24 12:38:32 PM PST 23 |
1217947550 ps |
| T327 |
/workspace/coverage/default/37.sram_ctrl_smoke.2635699503 |
|
|
Dec 24 12:36:56 PM PST 23 |
Dec 24 12:37:31 PM PST 23 |
279759956 ps |
| T328 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.940720320 |
|
|
Dec 24 12:36:27 PM PST 23 |
Dec 24 12:37:38 PM PST 23 |
166093643 ps |
| T329 |
/workspace/coverage/default/3.sram_ctrl_bijection.3855280698 |
|
|
Dec 24 12:35:07 PM PST 23 |
Dec 24 12:36:24 PM PST 23 |
789739353 ps |
| T330 |
/workspace/coverage/default/40.sram_ctrl_bijection.41352639 |
|
|
Dec 24 12:36:57 PM PST 23 |
Dec 24 12:38:02 PM PST 23 |
2684875243 ps |
| T331 |
/workspace/coverage/default/44.sram_ctrl_smoke.3625539878 |
|
|
Dec 24 12:37:28 PM PST 23 |
Dec 24 12:37:40 PM PST 23 |
24151893 ps |
| T332 |
/workspace/coverage/default/47.sram_ctrl_executable.3583584649 |
|
|
Dec 24 12:37:56 PM PST 23 |
Dec 24 12:51:06 PM PST 23 |
38384636615 ps |
| T333 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1587605130 |
|
|
Dec 24 12:35:41 PM PST 23 |
Dec 24 12:42:38 PM PST 23 |
11099881738 ps |
| T334 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.305008948 |
|
|
Dec 24 12:35:16 PM PST 23 |
Dec 24 12:35:49 PM PST 23 |
284795360 ps |
| T335 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.1405814594 |
|
|
Dec 24 12:35:53 PM PST 23 |
Dec 24 12:56:27 PM PST 23 |
5095912342 ps |
| T336 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.272223672 |
|
|
Dec 24 12:37:31 PM PST 23 |
Dec 24 12:38:07 PM PST 23 |
299444335 ps |
| T337 |
/workspace/coverage/default/22.sram_ctrl_bijection.714655498 |
|
|
Dec 24 12:36:06 PM PST 23 |
Dec 24 12:37:27 PM PST 23 |
5507897117 ps |
| T338 |
/workspace/coverage/default/3.sram_ctrl_executable.2111734620 |
|
|
Dec 24 12:34:59 PM PST 23 |
Dec 24 01:09:00 PM PST 23 |
19884751689 ps |
| T339 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.1548052711 |
|
|
Dec 24 12:37:01 PM PST 23 |
Dec 24 12:37:20 PM PST 23 |
136288827 ps |
| T340 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.3138755549 |
|
|
Dec 24 12:36:54 PM PST 23 |
Dec 24 12:37:12 PM PST 23 |
84817015 ps |
| T341 |
/workspace/coverage/default/28.sram_ctrl_stress_all.2439168896 |
|
|
Dec 24 12:36:23 PM PST 23 |
Dec 24 01:13:59 PM PST 23 |
27007688546 ps |
| T342 |
/workspace/coverage/default/18.sram_ctrl_executable.1172475958 |
|
|
Dec 24 12:35:35 PM PST 23 |
Dec 24 12:58:20 PM PST 23 |
73420716108 ps |
| T343 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2469711266 |
|
|
Dec 24 12:37:14 PM PST 23 |
Dec 24 12:37:29 PM PST 23 |
34741368 ps |
| T344 |
/workspace/coverage/default/31.sram_ctrl_partial_access.2535269736 |
|
|
Dec 24 12:36:45 PM PST 23 |
Dec 24 12:38:51 PM PST 23 |
2541743988 ps |
| T345 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2846016757 |
|
|
Dec 24 12:36:26 PM PST 23 |
Dec 24 12:38:18 PM PST 23 |
708539471 ps |
| T346 |
/workspace/coverage/default/43.sram_ctrl_alert_test.1190284062 |
|
|
Dec 24 12:37:16 PM PST 23 |
Dec 24 12:37:30 PM PST 23 |
12901496 ps |
| T347 |
/workspace/coverage/default/20.sram_ctrl_stress_all.2685486880 |
|
|
Dec 24 12:36:15 PM PST 23 |
Dec 24 12:58:37 PM PST 23 |
18247958970 ps |
| T348 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.2596402265 |
|
|
Dec 24 12:37:19 PM PST 23 |
Dec 24 12:38:18 PM PST 23 |
110268214 ps |
| T349 |
/workspace/coverage/default/46.sram_ctrl_executable.898672727 |
|
|
Dec 24 12:37:11 PM PST 23 |
Dec 24 01:14:57 PM PST 23 |
18299580651 ps |
| T350 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1647336532 |
|
|
Dec 24 12:35:22 PM PST 23 |
Dec 24 12:35:59 PM PST 23 |
1892209158 ps |
| T351 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.2127655556 |
|
|
Dec 24 12:36:01 PM PST 23 |
Dec 24 12:45:39 PM PST 23 |
5083300480 ps |
| T352 |
/workspace/coverage/default/28.sram_ctrl_partial_access.557572534 |
|
|
Dec 24 12:36:15 PM PST 23 |
Dec 24 12:36:46 PM PST 23 |
810104847 ps |
| T353 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1617699864 |
|
|
Dec 24 12:35:24 PM PST 23 |
Dec 24 12:43:07 PM PST 23 |
36731938072 ps |
| T354 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.832788649 |
|
|
Dec 24 12:36:52 PM PST 23 |
Dec 24 12:59:47 PM PST 23 |
688338433 ps |
| T355 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2849559086 |
|
|
Dec 24 12:36:43 PM PST 23 |
Dec 24 12:42:04 PM PST 23 |
12632784029 ps |
| T356 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.3597190051 |
|
|
Dec 24 12:35:33 PM PST 23 |
Dec 24 12:48:21 PM PST 23 |
3829484576 ps |
| T357 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.2494595344 |
|
|
Dec 24 12:36:30 PM PST 23 |
Dec 24 12:36:53 PM PST 23 |
330898267 ps |
| T358 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.2289554470 |
|
|
Dec 24 12:36:21 PM PST 23 |
Dec 24 12:36:39 PM PST 23 |
70565861 ps |
| T359 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.2585426840 |
|
|
Dec 24 12:37:06 PM PST 23 |
Dec 24 01:23:15 PM PST 23 |
526385554 ps |
| T360 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3803426762 |
|
|
Dec 24 12:35:13 PM PST 23 |
Dec 24 12:40:21 PM PST 23 |
6379247918 ps |
| T361 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.3805249913 |
|
|
Dec 24 12:36:03 PM PST 23 |
Dec 24 12:36:25 PM PST 23 |
165147116 ps |
| T362 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.2116456446 |
|
|
Dec 24 12:35:53 PM PST 23 |
Dec 24 12:36:22 PM PST 23 |
462295998 ps |
| T363 |
/workspace/coverage/default/26.sram_ctrl_alert_test.1355590753 |
|
|
Dec 24 12:36:06 PM PST 23 |
Dec 24 12:36:26 PM PST 23 |
74305079 ps |
| T364 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.3193766274 |
|
|
Dec 24 12:37:12 PM PST 23 |
Dec 24 12:39:01 PM PST 23 |
261950737 ps |
| T365 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1412038505 |
|
|
Dec 24 12:37:22 PM PST 23 |
Dec 24 12:37:36 PM PST 23 |
229565020 ps |
| T366 |
/workspace/coverage/default/18.sram_ctrl_regwen.4116708376 |
|
|
Dec 24 12:35:58 PM PST 23 |
Dec 24 12:52:47 PM PST 23 |
49798705224 ps |
| T367 |
/workspace/coverage/default/32.sram_ctrl_partial_access.1473183317 |
|
|
Dec 24 12:36:25 PM PST 23 |
Dec 24 12:37:17 PM PST 23 |
810194730 ps |
| T368 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2374662675 |
|
|
Dec 24 12:36:09 PM PST 23 |
Dec 24 12:39:20 PM PST 23 |
4950411471 ps |
| T369 |
/workspace/coverage/default/10.sram_ctrl_bijection.3691290169 |
|
|
Dec 24 12:35:36 PM PST 23 |
Dec 24 12:37:12 PM PST 23 |
17878434374 ps |
| T370 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.2324542346 |
|
|
Dec 24 12:35:13 PM PST 23 |
Dec 24 12:35:48 PM PST 23 |
243249092 ps |
| T371 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.1595180871 |
|
|
Dec 24 12:36:53 PM PST 23 |
Dec 24 12:38:17 PM PST 23 |
452314630 ps |
| T372 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.2367789036 |
|
|
Dec 24 12:36:42 PM PST 23 |
Dec 24 12:37:06 PM PST 23 |
1911074997 ps |
| T373 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.2929322852 |
|
|
Dec 24 12:37:18 PM PST 23 |
Dec 24 12:37:59 PM PST 23 |
142933569 ps |
| T374 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3686509954 |
|
|
Dec 24 12:36:21 PM PST 23 |
Dec 24 12:38:17 PM PST 23 |
514390755 ps |
| T375 |
/workspace/coverage/default/0.sram_ctrl_stress_all.4266616186 |
|
|
Dec 24 12:34:57 PM PST 23 |
Dec 24 01:06:53 PM PST 23 |
27251123865 ps |
| T376 |
/workspace/coverage/default/2.sram_ctrl_partial_access.2818343028 |
|
|
Dec 24 12:35:03 PM PST 23 |
Dec 24 12:35:43 PM PST 23 |
503198997 ps |
| T377 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.3946741062 |
|
|
Dec 24 12:36:07 PM PST 23 |
Dec 24 12:36:31 PM PST 23 |
166810387 ps |
| T378 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2646580661 |
|
|
Dec 24 12:37:16 PM PST 23 |
Dec 24 12:37:38 PM PST 23 |
151356681 ps |
| T379 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.2570417953 |
|
|
Dec 24 12:36:50 PM PST 23 |
Dec 24 12:45:28 PM PST 23 |
5579341604 ps |
| T380 |
/workspace/coverage/default/37.sram_ctrl_bijection.1653079589 |
|
|
Dec 24 12:36:33 PM PST 23 |
Dec 24 12:37:24 PM PST 23 |
538553856 ps |
| T381 |
/workspace/coverage/default/36.sram_ctrl_partial_access.3225343711 |
|
|
Dec 24 12:36:40 PM PST 23 |
Dec 24 12:38:50 PM PST 23 |
1362190056 ps |
| T382 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.324905237 |
|
|
Dec 24 12:36:01 PM PST 23 |
Dec 24 12:36:23 PM PST 23 |
144197644 ps |
| T383 |
/workspace/coverage/default/16.sram_ctrl_executable.3645270855 |
|
|
Dec 24 12:35:47 PM PST 23 |
Dec 24 12:51:46 PM PST 23 |
35764355500 ps |
| T384 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.1373357149 |
|
|
Dec 24 12:36:01 PM PST 23 |
Dec 24 12:42:50 PM PST 23 |
84121430216 ps |
| T385 |
/workspace/coverage/default/28.sram_ctrl_smoke.2684533595 |
|
|
Dec 24 12:36:24 PM PST 23 |
Dec 24 12:37:00 PM PST 23 |
74046839 ps |
| T386 |
/workspace/coverage/default/2.sram_ctrl_bijection.3370755263 |
|
|
Dec 24 12:34:59 PM PST 23 |
Dec 24 12:36:09 PM PST 23 |
9477217334 ps |
| T387 |
/workspace/coverage/default/8.sram_ctrl_executable.4288765783 |
|
|
Dec 24 12:35:33 PM PST 23 |
Dec 24 12:52:13 PM PST 23 |
2741545050 ps |
| T388 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.406130538 |
|
|
Dec 24 12:35:48 PM PST 23 |
Dec 24 12:36:54 PM PST 23 |
116807386 ps |
| T389 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3577036621 |
|
|
Dec 24 12:37:33 PM PST 23 |
Dec 24 12:42:08 PM PST 23 |
15666841679 ps |
| T390 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.2190918552 |
|
|
Dec 24 12:36:45 PM PST 23 |
Dec 24 01:02:19 PM PST 23 |
82637996475 ps |
| T391 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.642698400 |
|
|
Dec 24 12:37:09 PM PST 23 |
Dec 24 12:37:29 PM PST 23 |
315694127 ps |
| T392 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.3775066520 |
|
|
Dec 24 12:35:55 PM PST 23 |
Dec 24 12:39:38 PM PST 23 |
8196614533 ps |
| T393 |
/workspace/coverage/default/8.sram_ctrl_partial_access.2457111022 |
|
|
Dec 24 12:35:50 PM PST 23 |
Dec 24 12:36:18 PM PST 23 |
344196060 ps |
| T394 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.2383796795 |
|
|
Dec 24 12:36:14 PM PST 23 |
Dec 24 12:41:46 PM PST 23 |
12961519021 ps |
| T395 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.3779952116 |
|
|
Dec 24 12:36:02 PM PST 23 |
Dec 24 12:41:30 PM PST 23 |
3025467043 ps |
| T396 |
/workspace/coverage/default/49.sram_ctrl_bijection.2656946724 |
|
|
Dec 24 12:37:49 PM PST 23 |
Dec 24 12:39:20 PM PST 23 |
10808303555 ps |
| T397 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2147408579 |
|
|
Dec 24 12:36:07 PM PST 23 |
Dec 24 01:47:10 PM PST 23 |
6337737461 ps |
| T398 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.1015686107 |
|
|
Dec 24 12:37:18 PM PST 23 |
Dec 24 12:38:05 PM PST 23 |
1082933320 ps |
| T23 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.1451852440 |
|
|
Dec 24 12:35:08 PM PST 23 |
Dec 24 12:35:42 PM PST 23 |
649762387 ps |
| T399 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.1795065898 |
|
|
Dec 24 12:36:20 PM PST 23 |
Dec 24 12:36:40 PM PST 23 |
916551600 ps |
| T400 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.805017683 |
|
|
Dec 24 12:36:28 PM PST 23 |
Dec 24 12:36:58 PM PST 23 |
46601308 ps |
| T401 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.2102502840 |
|
|
Dec 24 12:36:34 PM PST 23 |
Dec 24 12:44:07 PM PST 23 |
11818150267 ps |
| T402 |
/workspace/coverage/default/20.sram_ctrl_partial_access.1127101046 |
|
|
Dec 24 12:36:25 PM PST 23 |
Dec 24 12:36:55 PM PST 23 |
916509030 ps |
| T403 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1288828570 |
|
|
Dec 24 12:37:51 PM PST 23 |
Dec 24 12:54:48 PM PST 23 |
2555369588 ps |
| T404 |
/workspace/coverage/default/10.sram_ctrl_stress_all.2268013677 |
|
|
Dec 24 12:35:24 PM PST 23 |
Dec 24 01:19:15 PM PST 23 |
35555039274 ps |
| T405 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2268759879 |
|
|
Dec 24 12:37:31 PM PST 23 |
Dec 24 12:53:36 PM PST 23 |
7784791182 ps |
| T406 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.707957917 |
|
|
Dec 24 12:37:20 PM PST 23 |
Dec 24 12:39:19 PM PST 23 |
1173034958 ps |
| T407 |
/workspace/coverage/default/41.sram_ctrl_regwen.1728504116 |
|
|
Dec 24 12:37:02 PM PST 23 |
Dec 24 01:00:45 PM PST 23 |
15845144361 ps |
| T408 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1672713709 |
|
|
Dec 24 12:35:55 PM PST 23 |
Dec 24 12:39:20 PM PST 23 |
2692280695 ps |
| T409 |
/workspace/coverage/default/40.sram_ctrl_stress_all.3441502530 |
|
|
Dec 24 12:36:56 PM PST 23 |
Dec 24 01:17:42 PM PST 23 |
50337035600 ps |
| T410 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.2404511032 |
|
|
Dec 24 12:36:56 PM PST 23 |
Dec 24 12:37:24 PM PST 23 |
293200333 ps |
| T411 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.2973859937 |
|
|
Dec 24 12:35:57 PM PST 23 |
Dec 24 12:57:40 PM PST 23 |
1767892780 ps |
| T412 |
/workspace/coverage/default/1.sram_ctrl_alert_test.1997624111 |
|
|
Dec 24 12:35:01 PM PST 23 |
Dec 24 12:35:37 PM PST 23 |
13820178 ps |
| T413 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1714238253 |
|
|
Dec 24 12:35:27 PM PST 23 |
Dec 24 12:43:01 PM PST 23 |
13757921028 ps |
| T414 |
/workspace/coverage/default/13.sram_ctrl_alert_test.958584937 |
|
|
Dec 24 12:35:31 PM PST 23 |
Dec 24 12:35:56 PM PST 23 |
79764580 ps |
| T415 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.1851166884 |
|
|
Dec 24 12:36:57 PM PST 23 |
Dec 24 12:41:17 PM PST 23 |
1578567148 ps |
| T416 |
/workspace/coverage/default/41.sram_ctrl_executable.2123289129 |
|
|
Dec 24 12:37:13 PM PST 23 |
Dec 24 12:49:47 PM PST 23 |
20298980105 ps |
| T417 |
/workspace/coverage/default/16.sram_ctrl_bijection.2254709228 |
|
|
Dec 24 12:35:42 PM PST 23 |
Dec 24 12:36:49 PM PST 23 |
10832112857 ps |
| T418 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.4233791850 |
|
|
Dec 24 12:37:15 PM PST 23 |
Dec 24 12:45:05 PM PST 23 |
143431604469 ps |
| T419 |
/workspace/coverage/default/5.sram_ctrl_executable.2971304718 |
|
|
Dec 24 12:35:40 PM PST 23 |
Dec 24 12:54:51 PM PST 23 |
1809887303 ps |
| T420 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.3393571714 |
|
|
Dec 24 12:36:11 PM PST 23 |
Dec 24 12:37:52 PM PST 23 |
121025074 ps |
| T421 |
/workspace/coverage/default/38.sram_ctrl_stress_all.1070607545 |
|
|
Dec 24 12:36:44 PM PST 23 |
Dec 24 01:58:00 PM PST 23 |
59740062314 ps |
| T24 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.433809972 |
|
|
Dec 24 12:35:08 PM PST 23 |
Dec 24 12:35:42 PM PST 23 |
248606442 ps |
| T422 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.3265577240 |
|
|
Dec 24 12:36:12 PM PST 23 |
Dec 24 12:57:55 PM PST 23 |
22977118125 ps |
| T423 |
/workspace/coverage/default/1.sram_ctrl_partial_access.1136835519 |
|
|
Dec 24 12:35:12 PM PST 23 |
Dec 24 12:37:43 PM PST 23 |
4220645103 ps |
| T424 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.2391677434 |
|
|
Dec 24 12:35:37 PM PST 23 |
Dec 24 12:36:02 PM PST 23 |
30435050 ps |
| T425 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.944506229 |
|
|
Dec 24 12:36:14 PM PST 23 |
Dec 24 12:37:30 PM PST 23 |
112758315 ps |
| T426 |
/workspace/coverage/default/4.sram_ctrl_regwen.1125762036 |
|
|
Dec 24 12:35:15 PM PST 23 |
Dec 24 12:47:59 PM PST 23 |
33203773721 ps |
| T427 |
/workspace/coverage/default/1.sram_ctrl_bijection.2633785365 |
|
|
Dec 24 12:35:16 PM PST 23 |
Dec 24 12:36:13 PM PST 23 |
4861086419 ps |
| T428 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2499471120 |
|
|
Dec 24 12:36:57 PM PST 23 |
Dec 24 12:54:55 PM PST 23 |
1489580570 ps |
| T429 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.4139789287 |
|
|
Dec 24 12:35:56 PM PST 23 |
Dec 24 12:53:31 PM PST 23 |
3908409556 ps |
| T430 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.1437111168 |
|
|
Dec 24 12:36:25 PM PST 23 |
Dec 24 12:36:48 PM PST 23 |
90101764 ps |
| T431 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.204663820 |
|
|
Dec 24 12:36:01 PM PST 23 |
Dec 24 12:55:25 PM PST 23 |
5141650025 ps |
| T432 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.941373473 |
|
|
Dec 24 12:35:39 PM PST 23 |
Dec 24 12:36:10 PM PST 23 |
150025151 ps |
| T433 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3970082275 |
|
|
Dec 24 12:37:25 PM PST 23 |
Dec 24 12:38:52 PM PST 23 |
170942915 ps |
| T434 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.1038704015 |
|
|
Dec 24 12:36:11 PM PST 23 |
Dec 24 12:36:34 PM PST 23 |
224709255 ps |
| T435 |
/workspace/coverage/default/21.sram_ctrl_alert_test.241755909 |
|
|
Dec 24 12:36:04 PM PST 23 |
Dec 24 12:36:24 PM PST 23 |
15292389 ps |
| T436 |
/workspace/coverage/default/23.sram_ctrl_partial_access.274080068 |
|
|
Dec 24 12:36:24 PM PST 23 |
Dec 24 12:36:48 PM PST 23 |
879146525 ps |
| T437 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.3491772135 |
|
|
Dec 24 12:35:33 PM PST 23 |
Dec 24 12:35:59 PM PST 23 |
30341472 ps |
| T438 |
/workspace/coverage/default/43.sram_ctrl_regwen.1499765614 |
|
|
Dec 24 12:37:16 PM PST 23 |
Dec 24 12:44:39 PM PST 23 |
29420044786 ps |
| T439 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.2250784867 |
|
|
Dec 24 12:35:42 PM PST 23 |
Dec 24 12:50:33 PM PST 23 |
55873289092 ps |
| T440 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.3294613904 |
|
|
Dec 24 12:36:16 PM PST 23 |
Dec 24 12:36:43 PM PST 23 |
453360930 ps |
| T441 |
/workspace/coverage/default/25.sram_ctrl_partial_access.1881952971 |
|
|
Dec 24 12:36:09 PM PST 23 |
Dec 24 12:37:04 PM PST 23 |
506361695 ps |
| T442 |
/workspace/coverage/default/21.sram_ctrl_executable.2837359418 |
|
|
Dec 24 12:35:38 PM PST 23 |
Dec 24 12:52:46 PM PST 23 |
2477217155 ps |
| T443 |
/workspace/coverage/default/10.sram_ctrl_alert_test.3709077259 |
|
|
Dec 24 12:35:17 PM PST 23 |
Dec 24 12:35:46 PM PST 23 |
28846128 ps |
| T444 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.465382262 |
|
|
Dec 24 12:37:56 PM PST 23 |
Dec 24 12:38:04 PM PST 23 |
120212032 ps |
| T445 |
/workspace/coverage/default/40.sram_ctrl_alert_test.3203684678 |
|
|
Dec 24 12:36:57 PM PST 23 |
Dec 24 12:37:14 PM PST 23 |
55808733 ps |
| T446 |
/workspace/coverage/default/1.sram_ctrl_stress_all.3758233782 |
|
|
Dec 24 12:35:09 PM PST 23 |
Dec 24 12:56:57 PM PST 23 |
16025774254 ps |
| T447 |
/workspace/coverage/default/12.sram_ctrl_stress_all.2254792684 |
|
|
Dec 24 12:35:16 PM PST 23 |
Dec 24 12:49:47 PM PST 23 |
47873546031 ps |
| T448 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.1822155436 |
|
|
Dec 24 12:35:10 PM PST 23 |
Dec 24 12:44:18 PM PST 23 |
23027583837 ps |
| T449 |
/workspace/coverage/default/15.sram_ctrl_partial_access.2870276261 |
|
|
Dec 24 12:35:54 PM PST 23 |
Dec 24 12:36:20 PM PST 23 |
117615936 ps |
| T450 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.2091193816 |
|
|
Dec 24 12:36:42 PM PST 23 |
Dec 24 12:37:03 PM PST 23 |
174829288 ps |
| T451 |
/workspace/coverage/default/23.sram_ctrl_regwen.2068270038 |
|
|
Dec 24 12:36:11 PM PST 23 |
Dec 24 12:53:40 PM PST 23 |
23781420620 ps |
| T452 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.64294516 |
|
|
Dec 24 12:37:16 PM PST 23 |
Dec 24 12:37:39 PM PST 23 |
1308731111 ps |
| T453 |
/workspace/coverage/default/15.sram_ctrl_executable.593887468 |
|
|
Dec 24 12:35:40 PM PST 23 |
Dec 24 12:36:32 PM PST 23 |
3032921604 ps |
| T454 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.3093886598 |
|
|
Dec 24 12:36:24 PM PST 23 |
Dec 24 12:36:52 PM PST 23 |
195675698 ps |
| T455 |
/workspace/coverage/default/24.sram_ctrl_bijection.441471358 |
|
|
Dec 24 12:36:13 PM PST 23 |
Dec 24 12:36:51 PM PST 23 |
923382441 ps |
| T456 |
/workspace/coverage/default/35.sram_ctrl_alert_test.253921050 |
|
|
Dec 24 12:36:20 PM PST 23 |
Dec 24 12:36:38 PM PST 23 |
49726603 ps |
| T457 |
/workspace/coverage/default/46.sram_ctrl_smoke.93130432 |
|
|
Dec 24 12:37:16 PM PST 23 |
Dec 24 12:37:41 PM PST 23 |
499515416 ps |
| T458 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2964217436 |
|
|
Dec 24 12:37:27 PM PST 23 |
Dec 24 12:37:53 PM PST 23 |
297240825 ps |
| T459 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.1133866278 |
|
|
Dec 24 12:36:15 PM PST 23 |
Dec 24 12:53:30 PM PST 23 |
59474572228 ps |
| T460 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.1256871242 |
|
|
Dec 24 12:37:34 PM PST 23 |
Dec 24 12:46:26 PM PST 23 |
1413272691 ps |
| T461 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.3273648231 |
|
|
Dec 24 12:36:16 PM PST 23 |
Dec 24 12:36:37 PM PST 23 |
106473458 ps |
| T462 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.2282154281 |
|
|
Dec 24 12:35:58 PM PST 23 |
Dec 24 12:37:36 PM PST 23 |
129675560 ps |
| T463 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2269891670 |
|
|
Dec 24 12:35:28 PM PST 23 |
Dec 24 12:35:57 PM PST 23 |
65531108 ps |
| T464 |
/workspace/coverage/default/3.sram_ctrl_alert_test.1669011844 |
|
|
Dec 24 12:35:13 PM PST 23 |
Dec 24 12:35:44 PM PST 23 |
30451275 ps |
| T465 |
/workspace/coverage/default/3.sram_ctrl_regwen.4134587691 |
|
|
Dec 24 12:35:17 PM PST 23 |
Dec 24 12:43:28 PM PST 23 |
3779403354 ps |
| T466 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3151345697 |
|
|
Dec 24 12:34:52 PM PST 23 |
Dec 24 12:35:33 PM PST 23 |
288688819 ps |
| T467 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.2089345075 |
|
|
Dec 24 12:36:24 PM PST 23 |
Dec 24 12:36:44 PM PST 23 |
77691973 ps |
| T468 |
/workspace/coverage/default/14.sram_ctrl_stress_all.1921197672 |
|
|
Dec 24 12:35:22 PM PST 23 |
Dec 24 01:10:40 PM PST 23 |
23496103217 ps |
| T469 |
/workspace/coverage/default/45.sram_ctrl_smoke.3162233441 |
|
|
Dec 24 12:37:03 PM PST 23 |
Dec 24 12:37:36 PM PST 23 |
914474908 ps |
| T470 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1081490877 |
|
|
Dec 24 12:37:23 PM PST 23 |
Dec 24 12:40:15 PM PST 23 |
588970636 ps |
| T471 |
/workspace/coverage/default/22.sram_ctrl_regwen.2781732433 |
|
|
Dec 24 12:36:04 PM PST 23 |
Dec 24 12:52:13 PM PST 23 |
15588557414 ps |
| T472 |
/workspace/coverage/default/13.sram_ctrl_partial_access.4116278699 |
|
|
Dec 24 12:35:50 PM PST 23 |
Dec 24 12:38:50 PM PST 23 |
2604993024 ps |
| T473 |
/workspace/coverage/default/33.sram_ctrl_alert_test.2600863905 |
|
|
Dec 24 12:36:30 PM PST 23 |
Dec 24 12:36:50 PM PST 23 |
14266038 ps |
| T474 |
/workspace/coverage/default/48.sram_ctrl_regwen.4019759576 |
|
|
Dec 24 12:37:32 PM PST 23 |
Dec 24 12:43:08 PM PST 23 |
17361465636 ps |
| T475 |
/workspace/coverage/default/20.sram_ctrl_bijection.2109000847 |
|
|
Dec 24 12:36:03 PM PST 23 |
Dec 24 12:36:53 PM PST 23 |
487322620 ps |
| T476 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.3329952603 |
|
|
Dec 24 12:36:02 PM PST 23 |
Dec 24 12:38:55 PM PST 23 |
475171674 ps |
| T477 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.743690363 |
|
|
Dec 24 12:36:26 PM PST 23 |
Dec 24 12:40:04 PM PST 23 |
2713984407 ps |
| T478 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.3097866129 |
|
|
Dec 24 12:37:20 PM PST 23 |
Dec 24 12:37:36 PM PST 23 |
498883705 ps |
| T479 |
/workspace/coverage/default/13.sram_ctrl_smoke.4102269655 |
|
|
Dec 24 12:35:38 PM PST 23 |
Dec 24 12:36:50 PM PST 23 |
213196437 ps |
| T480 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.2600475075 |
|
|
Dec 24 12:35:15 PM PST 23 |
Dec 24 12:37:27 PM PST 23 |
988612992 ps |
| T481 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2453442404 |
|
|
Dec 24 12:35:25 PM PST 23 |
Dec 24 01:19:47 PM PST 23 |
2463270803 ps |
| T482 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.826562246 |
|
|
Dec 24 12:36:20 PM PST 23 |
Dec 24 12:41:50 PM PST 23 |
6521226724 ps |
| T483 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2517476872 |
|
|
Dec 24 12:35:40 PM PST 23 |
Dec 24 12:36:29 PM PST 23 |
98927155 ps |
| T484 |
/workspace/coverage/default/31.sram_ctrl_bijection.3421520144 |
|
|
Dec 24 12:36:38 PM PST 23 |
Dec 24 12:38:08 PM PST 23 |
4367220386 ps |
| T485 |
/workspace/coverage/default/6.sram_ctrl_executable.608344890 |
|
|
Dec 24 12:35:18 PM PST 23 |
Dec 24 12:52:49 PM PST 23 |
9960875659 ps |
| T486 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.2279826126 |
|
|
Dec 24 12:37:14 PM PST 23 |
Dec 24 12:53:32 PM PST 23 |
12436753719 ps |
| T487 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.495369175 |
|
|
Dec 24 12:36:25 PM PST 23 |
Dec 24 12:38:38 PM PST 23 |
476168423 ps |
| T488 |
/workspace/coverage/default/17.sram_ctrl_regwen.3333043349 |
|
|
Dec 24 12:35:52 PM PST 23 |
Dec 24 01:02:00 PM PST 23 |
47998036021 ps |
| T489 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.1987574088 |
|
|
Dec 24 12:35:56 PM PST 23 |
Dec 24 12:37:48 PM PST 23 |
996238414 ps |
| T490 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.2843956923 |
|
|
Dec 24 12:37:13 PM PST 23 |
Dec 24 12:37:52 PM PST 23 |
323908144 ps |
| T491 |
/workspace/coverage/default/42.sram_ctrl_bijection.2224133522 |
|
|
Dec 24 12:37:03 PM PST 23 |
Dec 24 12:38:27 PM PST 23 |
6177963616 ps |
| T492 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.519179797 |
|
|
Dec 24 12:36:09 PM PST 23 |
Dec 24 12:40:16 PM PST 23 |
38100411108 ps |
| T493 |
/workspace/coverage/default/9.sram_ctrl_partial_access.2415349217 |
|
|
Dec 24 12:35:32 PM PST 23 |
Dec 24 12:35:59 PM PST 23 |
63214378 ps |
| T494 |
/workspace/coverage/default/44.sram_ctrl_bijection.2076190554 |
|
|
Dec 24 12:37:02 PM PST 23 |
Dec 24 12:38:03 PM PST 23 |
1486603356 ps |
| T495 |
/workspace/coverage/default/4.sram_ctrl_bijection.2821796921 |
|
|
Dec 24 12:35:18 PM PST 23 |
Dec 24 12:36:05 PM PST 23 |
2285336542 ps |
| T496 |
/workspace/coverage/default/25.sram_ctrl_stress_all.1024202091 |
|
|
Dec 24 12:36:28 PM PST 23 |
Dec 24 01:38:53 PM PST 23 |
9120365214 ps |
| T497 |
/workspace/coverage/default/12.sram_ctrl_alert_test.3997368259 |
|
|
Dec 24 12:35:23 PM PST 23 |
Dec 24 12:35:51 PM PST 23 |
42328158 ps |
| T498 |
/workspace/coverage/default/19.sram_ctrl_smoke.3062862276 |
|
|
Dec 24 12:36:01 PM PST 23 |
Dec 24 12:37:05 PM PST 23 |
1590091347 ps |
| T499 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.499808833 |
|
|
Dec 24 12:35:27 PM PST 23 |
Dec 24 12:57:59 PM PST 23 |
4368040865 ps |
| T500 |
/workspace/coverage/default/5.sram_ctrl_regwen.1663106791 |
|
|
Dec 24 12:35:06 PM PST 23 |
Dec 24 12:52:41 PM PST 23 |
23954973180 ps |
| T501 |
/workspace/coverage/default/25.sram_ctrl_executable.3601909056 |
|
|
Dec 24 12:36:04 PM PST 23 |
Dec 24 12:54:15 PM PST 23 |
3487839317 ps |
| T502 |
/workspace/coverage/default/47.sram_ctrl_bijection.3936232123 |
|
|
Dec 24 12:37:38 PM PST 23 |
Dec 24 12:38:54 PM PST 23 |
17992060759 ps |