| T753 |
/workspace/coverage/default/26.sram_ctrl_partial_access.3116132501 |
|
|
Dec 24 12:35:54 PM PST 23 |
Dec 24 12:36:32 PM PST 23 |
618467247 ps |
| T754 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.427933909 |
|
|
Dec 24 12:35:54 PM PST 23 |
Dec 24 12:53:34 PM PST 23 |
9270434203 ps |
| T755 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.2244447338 |
|
|
Dec 24 12:37:13 PM PST 23 |
Dec 24 12:37:31 PM PST 23 |
260185685 ps |
| T756 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.1639941115 |
|
|
Dec 24 12:36:03 PM PST 23 |
Dec 24 12:36:23 PM PST 23 |
74228057 ps |
| T757 |
/workspace/coverage/default/1.sram_ctrl_executable.3632000352 |
|
|
Dec 24 12:34:50 PM PST 23 |
Dec 24 12:37:38 PM PST 23 |
4548657371 ps |
| T758 |
/workspace/coverage/default/32.sram_ctrl_alert_test.1303206520 |
|
|
Dec 24 12:36:24 PM PST 23 |
Dec 24 12:36:43 PM PST 23 |
16085830 ps |
| T759 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.3951663092 |
|
|
Dec 24 12:36:54 PM PST 23 |
Dec 24 12:37:18 PM PST 23 |
875288252 ps |
| T760 |
/workspace/coverage/default/2.sram_ctrl_regwen.2199526689 |
|
|
Dec 24 12:34:51 PM PST 23 |
Dec 24 01:01:58 PM PST 23 |
19555606362 ps |
| T761 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.4127288749 |
|
|
Dec 24 12:35:33 PM PST 23 |
Dec 24 12:36:03 PM PST 23 |
387669848 ps |
| T762 |
/workspace/coverage/default/7.sram_ctrl_bijection.2743114305 |
|
|
Dec 24 12:35:29 PM PST 23 |
Dec 24 12:36:08 PM PST 23 |
226378897 ps |
| T763 |
/workspace/coverage/default/14.sram_ctrl_regwen.3820866992 |
|
|
Dec 24 12:35:54 PM PST 23 |
Dec 24 12:50:45 PM PST 23 |
9696593989 ps |
| T764 |
/workspace/coverage/default/33.sram_ctrl_smoke.752234294 |
|
|
Dec 24 12:36:42 PM PST 23 |
Dec 24 12:37:03 PM PST 23 |
323812034 ps |
| T765 |
/workspace/coverage/default/6.sram_ctrl_bijection.2810713613 |
|
|
Dec 24 12:35:21 PM PST 23 |
Dec 24 12:36:15 PM PST 23 |
447498518 ps |
| T766 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.1282806099 |
|
|
Dec 24 12:37:29 PM PST 23 |
Dec 24 12:37:44 PM PST 23 |
76570204 ps |
| T767 |
/workspace/coverage/default/37.sram_ctrl_executable.4154244130 |
|
|
Dec 24 12:36:55 PM PST 23 |
Dec 24 12:53:22 PM PST 23 |
13275447183 ps |
| T768 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.3595101618 |
|
|
Dec 24 12:36:14 PM PST 23 |
Dec 24 12:36:36 PM PST 23 |
295949477 ps |
| T769 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.1891582700 |
|
|
Dec 24 12:35:21 PM PST 23 |
Dec 24 12:35:57 PM PST 23 |
316559847 ps |
| T770 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.1574029017 |
|
|
Dec 24 12:35:54 PM PST 23 |
Dec 24 12:39:19 PM PST 23 |
1943896541 ps |
| T771 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2695834017 |
|
|
Dec 24 12:35:15 PM PST 23 |
Dec 24 12:35:46 PM PST 23 |
55356673 ps |
| T772 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2415500777 |
|
|
Dec 24 12:35:11 PM PST 23 |
Dec 24 12:53:39 PM PST 23 |
16845387865 ps |
| T773 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.803579631 |
|
|
Dec 24 12:36:20 PM PST 23 |
Dec 24 12:39:34 PM PST 23 |
1762351038 ps |
| T774 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.23763551 |
|
|
Dec 24 12:35:29 PM PST 23 |
Dec 24 12:40:00 PM PST 23 |
3678157667 ps |
| T775 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3015740698 |
|
|
Dec 24 12:35:57 PM PST 23 |
Dec 24 12:37:41 PM PST 23 |
156756988 ps |
| T776 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.2933378516 |
|
|
Dec 24 12:37:22 PM PST 23 |
Dec 24 12:37:34 PM PST 23 |
55599502 ps |
| T777 |
/workspace/coverage/default/7.sram_ctrl_smoke.1381734286 |
|
|
Dec 24 12:35:14 PM PST 23 |
Dec 24 12:35:52 PM PST 23 |
351219493 ps |
| T778 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.2022964693 |
|
|
Dec 24 12:36:06 PM PST 23 |
Dec 24 12:36:30 PM PST 23 |
186710776 ps |
| T779 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1537994069 |
|
|
Dec 24 12:35:51 PM PST 23 |
Dec 24 12:40:10 PM PST 23 |
11429102574 ps |
| T780 |
/workspace/coverage/default/28.sram_ctrl_executable.3431790956 |
|
|
Dec 24 12:36:09 PM PST 23 |
Dec 24 01:07:21 PM PST 23 |
19385756745 ps |
| T781 |
/workspace/coverage/default/5.sram_ctrl_smoke.1737100454 |
|
|
Dec 24 12:35:24 PM PST 23 |
Dec 24 12:36:05 PM PST 23 |
947412256 ps |
| T782 |
/workspace/coverage/default/5.sram_ctrl_stress_all.3643292646 |
|
|
Dec 24 12:35:36 PM PST 23 |
Dec 24 01:42:50 PM PST 23 |
45609069315 ps |
| T35 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.2033720048 |
|
|
Dec 24 12:35:00 PM PST 23 |
Dec 24 12:35:41 PM PST 23 |
706349487 ps |
| T783 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.3849814087 |
|
|
Dec 24 12:36:45 PM PST 23 |
Dec 24 12:37:09 PM PST 23 |
135957239 ps |
| T784 |
/workspace/coverage/default/44.sram_ctrl_partial_access.1714382976 |
|
|
Dec 24 12:37:06 PM PST 23 |
Dec 24 12:38:33 PM PST 23 |
605918748 ps |
| T785 |
/workspace/coverage/default/0.sram_ctrl_executable.3301536619 |
|
|
Dec 24 12:34:51 PM PST 23 |
Dec 24 01:03:45 PM PST 23 |
4436115953 ps |
| T786 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1394880700 |
|
|
Dec 24 12:35:04 PM PST 23 |
Dec 24 12:35:43 PM PST 23 |
73265886 ps |
| T787 |
/workspace/coverage/default/35.sram_ctrl_partial_access.3646420072 |
|
|
Dec 24 12:36:38 PM PST 23 |
Dec 24 12:37:39 PM PST 23 |
193173673 ps |
| T788 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.555896359 |
|
|
Dec 24 12:35:20 PM PST 23 |
Dec 24 12:35:55 PM PST 23 |
2080785515 ps |
| T789 |
/workspace/coverage/default/41.sram_ctrl_bijection.917626847 |
|
|
Dec 24 12:36:53 PM PST 23 |
Dec 24 12:38:35 PM PST 23 |
5689690166 ps |
| T790 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1224373252 |
|
|
Dec 24 12:35:22 PM PST 23 |
Dec 24 01:23:12 PM PST 23 |
1118002409 ps |
| T791 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.3983627338 |
|
|
Dec 24 12:36:21 PM PST 23 |
Dec 24 12:42:52 PM PST 23 |
6184067083 ps |
| T792 |
/workspace/coverage/default/19.sram_ctrl_bijection.3791778625 |
|
|
Dec 24 12:36:06 PM PST 23 |
Dec 24 12:38:01 PM PST 23 |
45158575483 ps |
| T793 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1932428555 |
|
|
Dec 24 12:35:19 PM PST 23 |
Dec 24 12:35:55 PM PST 23 |
120818875 ps |
| T794 |
/workspace/coverage/default/39.sram_ctrl_smoke.460944141 |
|
|
Dec 24 12:37:04 PM PST 23 |
Dec 24 12:37:36 PM PST 23 |
709146543 ps |
| T795 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.3431736538 |
|
|
Dec 24 12:37:16 PM PST 23 |
Dec 24 12:37:39 PM PST 23 |
1389361773 ps |
| T796 |
/workspace/coverage/default/38.sram_ctrl_smoke.4051543386 |
|
|
Dec 24 12:36:51 PM PST 23 |
Dec 24 12:37:11 PM PST 23 |
251862220 ps |
| T797 |
/workspace/coverage/default/11.sram_ctrl_alert_test.321217052 |
|
|
Dec 24 12:35:58 PM PST 23 |
Dec 24 12:36:18 PM PST 23 |
46054353 ps |
| T798 |
/workspace/coverage/default/11.sram_ctrl_partial_access.3566629728 |
|
|
Dec 24 12:35:45 PM PST 23 |
Dec 24 12:36:20 PM PST 23 |
2684348719 ps |
| T799 |
/workspace/coverage/default/15.sram_ctrl_smoke.3926567115 |
|
|
Dec 24 12:35:34 PM PST 23 |
Dec 24 12:36:36 PM PST 23 |
177362690 ps |
| T800 |
/workspace/coverage/default/34.sram_ctrl_executable.2070060275 |
|
|
Dec 24 12:36:54 PM PST 23 |
Dec 24 01:01:09 PM PST 23 |
12690493358 ps |
| T801 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.4122338305 |
|
|
Dec 24 12:36:15 PM PST 23 |
Dec 24 12:36:34 PM PST 23 |
28411955 ps |
| T802 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.3088194624 |
|
|
Dec 24 12:35:18 PM PST 23 |
Dec 24 12:35:56 PM PST 23 |
1617382742 ps |
| T803 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2959961988 |
|
|
Dec 24 12:36:16 PM PST 23 |
Dec 24 01:31:42 PM PST 23 |
878745251 ps |
| T804 |
/workspace/coverage/default/43.sram_ctrl_bijection.1555274752 |
|
|
Dec 24 12:37:16 PM PST 23 |
Dec 24 12:37:46 PM PST 23 |
795422070 ps |
| T805 |
/workspace/coverage/default/18.sram_ctrl_alert_test.1512211284 |
|
|
Dec 24 12:35:59 PM PST 23 |
Dec 24 12:36:20 PM PST 23 |
53274689 ps |
| T806 |
/workspace/coverage/default/9.sram_ctrl_bijection.3529326241 |
|
|
Dec 24 12:35:29 PM PST 23 |
Dec 24 12:36:39 PM PST 23 |
2174540712 ps |
| T807 |
/workspace/coverage/default/31.sram_ctrl_alert_test.870208743 |
|
|
Dec 24 12:36:36 PM PST 23 |
Dec 24 12:36:54 PM PST 23 |
117380046 ps |
| T808 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.622043854 |
|
|
Dec 24 12:36:25 PM PST 23 |
Dec 24 12:40:47 PM PST 23 |
9748835212 ps |
| T809 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1428476109 |
|
|
Dec 24 12:37:20 PM PST 23 |
Dec 24 12:42:59 PM PST 23 |
17242910825 ps |
| T810 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.569669385 |
|
|
Dec 24 12:35:27 PM PST 23 |
Dec 24 12:39:57 PM PST 23 |
9706145591 ps |
| T811 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3971460910 |
|
|
Dec 24 12:35:41 PM PST 23 |
Dec 24 12:52:22 PM PST 23 |
11000705298 ps |
| T812 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1872487819 |
|
|
Dec 24 12:37:44 PM PST 23 |
Dec 24 12:42:01 PM PST 23 |
2675180740 ps |
| T813 |
/workspace/coverage/default/44.sram_ctrl_alert_test.2502461822 |
|
|
Dec 24 12:37:15 PM PST 23 |
Dec 24 12:37:29 PM PST 23 |
64627237 ps |
| T814 |
/workspace/coverage/default/16.sram_ctrl_smoke.3860022440 |
|
|
Dec 24 12:36:00 PM PST 23 |
Dec 24 12:38:14 PM PST 23 |
999924141 ps |
| T815 |
/workspace/coverage/default/17.sram_ctrl_executable.1020429032 |
|
|
Dec 24 12:36:28 PM PST 23 |
Dec 24 01:01:59 PM PST 23 |
16823872786 ps |
| T816 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.3891284610 |
|
|
Dec 24 12:36:44 PM PST 23 |
Dec 24 01:02:54 PM PST 23 |
45153531456 ps |
| T817 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.20539977 |
|
|
Dec 24 12:36:46 PM PST 23 |
Dec 24 12:37:36 PM PST 23 |
96369648 ps |
| T818 |
/workspace/coverage/default/26.sram_ctrl_executable.1778146909 |
|
|
Dec 24 12:36:09 PM PST 23 |
Dec 24 12:45:31 PM PST 23 |
2526941608 ps |
| T819 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.2780256880 |
|
|
Dec 24 12:37:00 PM PST 23 |
Dec 24 12:42:39 PM PST 23 |
9091045554 ps |
| T820 |
/workspace/coverage/default/7.sram_ctrl_partial_access.3508100532 |
|
|
Dec 24 12:35:22 PM PST 23 |
Dec 24 12:36:06 PM PST 23 |
862931995 ps |
| T821 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2676207010 |
|
|
Dec 24 12:35:33 PM PST 23 |
Dec 24 01:26:59 PM PST 23 |
421484782 ps |
| T822 |
/workspace/coverage/default/42.sram_ctrl_smoke.2720388979 |
|
|
Dec 24 12:37:12 PM PST 23 |
Dec 24 12:37:41 PM PST 23 |
253411208 ps |
| T823 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1410691536 |
|
|
Dec 24 12:35:15 PM PST 23 |
Dec 24 12:42:31 PM PST 23 |
5803164884 ps |
| T824 |
/workspace/coverage/default/36.sram_ctrl_bijection.312282818 |
|
|
Dec 24 12:36:47 PM PST 23 |
Dec 24 12:37:41 PM PST 23 |
2379692578 ps |
| T825 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.2947612273 |
|
|
Dec 24 12:37:04 PM PST 23 |
Dec 24 12:42:36 PM PST 23 |
18315729537 ps |
| T826 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.3019331110 |
|
|
Dec 24 12:36:52 PM PST 23 |
Dec 24 12:37:12 PM PST 23 |
106545067 ps |
| T827 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.4128646863 |
|
|
Dec 24 12:35:33 PM PST 23 |
Dec 24 12:36:03 PM PST 23 |
295142232 ps |
| T828 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1374439252 |
|
|
Dec 24 12:37:20 PM PST 23 |
Dec 24 02:17:30 PM PST 23 |
7689297332 ps |
| T829 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.304441760 |
|
|
Dec 24 12:35:16 PM PST 23 |
Dec 24 12:36:21 PM PST 23 |
230863731 ps |
| T830 |
/workspace/coverage/default/16.sram_ctrl_regwen.2809130133 |
|
|
Dec 24 12:35:28 PM PST 23 |
Dec 24 12:46:13 PM PST 23 |
16432731932 ps |
| T831 |
/workspace/coverage/default/13.sram_ctrl_bijection.737822260 |
|
|
Dec 24 12:35:23 PM PST 23 |
Dec 24 12:36:20 PM PST 23 |
1808304697 ps |
| T832 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.4188500665 |
|
|
Dec 24 12:37:08 PM PST 23 |
Dec 24 12:37:24 PM PST 23 |
53275314 ps |
| T833 |
/workspace/coverage/default/0.sram_ctrl_regwen.2970029268 |
|
|
Dec 24 12:35:27 PM PST 23 |
Dec 24 12:49:06 PM PST 23 |
3056712396 ps |
| T834 |
/workspace/coverage/default/45.sram_ctrl_bijection.394236927 |
|
|
Dec 24 12:37:07 PM PST 23 |
Dec 24 12:38:15 PM PST 23 |
1679823661 ps |
| T835 |
/workspace/coverage/default/31.sram_ctrl_smoke.3482325011 |
|
|
Dec 24 12:36:34 PM PST 23 |
Dec 24 12:36:54 PM PST 23 |
434544744 ps |
| T836 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.641225966 |
|
|
Dec 24 12:36:03 PM PST 23 |
Dec 24 12:36:33 PM PST 23 |
2987486613 ps |
| T837 |
/workspace/coverage/default/14.sram_ctrl_bijection.2626579914 |
|
|
Dec 24 12:35:46 PM PST 23 |
Dec 24 12:36:47 PM PST 23 |
652044300 ps |
| T838 |
/workspace/coverage/default/23.sram_ctrl_stress_all.1968864983 |
|
|
Dec 24 12:36:04 PM PST 23 |
Dec 24 12:56:38 PM PST 23 |
56253038232 ps |
| T839 |
/workspace/coverage/default/15.sram_ctrl_bijection.2427978722 |
|
|
Dec 24 12:36:00 PM PST 23 |
Dec 24 12:36:53 PM PST 23 |
1991165652 ps |
| T840 |
/workspace/coverage/default/36.sram_ctrl_alert_test.2179139028 |
|
|
Dec 24 12:36:47 PM PST 23 |
Dec 24 12:37:09 PM PST 23 |
11937651 ps |
| T841 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.1990542267 |
|
|
Dec 24 12:36:29 PM PST 23 |
Dec 24 01:33:23 PM PST 23 |
1701855540 ps |
| T842 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.3496588708 |
|
|
Dec 24 12:36:05 PM PST 23 |
Dec 24 12:36:26 PM PST 23 |
80111446 ps |
| T843 |
/workspace/coverage/default/17.sram_ctrl_partial_access.3346322303 |
|
|
Dec 24 12:35:50 PM PST 23 |
Dec 24 12:36:53 PM PST 23 |
533933110 ps |
| T844 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3945064644 |
|
|
Dec 24 12:35:31 PM PST 23 |
Dec 24 12:41:12 PM PST 23 |
3246636963 ps |
| T845 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1988028600 |
|
|
Dec 24 12:37:00 PM PST 23 |
Dec 24 12:57:36 PM PST 23 |
129046930 ps |
| T846 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.4279724682 |
|
|
Dec 24 12:37:57 PM PST 23 |
Dec 24 12:38:09 PM PST 23 |
1974103603 ps |
| T847 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1582334118 |
|
|
Dec 24 12:36:06 PM PST 23 |
Dec 24 02:06:55 PM PST 23 |
1273398464 ps |
| T848 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.966046095 |
|
|
Dec 24 12:36:54 PM PST 23 |
Dec 24 12:51:39 PM PST 23 |
4079728896 ps |
| T849 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.3892420970 |
|
|
Dec 24 12:37:16 PM PST 23 |
Dec 24 12:37:38 PM PST 23 |
875931552 ps |
| T850 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.2025723931 |
|
|
Dec 24 12:35:39 PM PST 23 |
Dec 24 12:36:04 PM PST 23 |
119803071 ps |
| T851 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.2238692402 |
|
|
Dec 24 12:37:02 PM PST 23 |
Dec 24 01:07:47 PM PST 23 |
20707104923 ps |
| T852 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.706358982 |
|
|
Dec 24 12:35:15 PM PST 23 |
Dec 24 12:42:52 PM PST 23 |
6215167937 ps |
| T853 |
/workspace/coverage/default/30.sram_ctrl_executable.1903977217 |
|
|
Dec 24 12:36:27 PM PST 23 |
Dec 24 12:57:44 PM PST 23 |
72793738851 ps |
| T854 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1601508361 |
|
|
Dec 24 12:36:47 PM PST 23 |
Dec 24 01:41:49 PM PST 23 |
324229858 ps |
| T855 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.464668305 |
|
|
Dec 24 12:35:39 PM PST 23 |
Dec 24 12:37:59 PM PST 23 |
1712382767 ps |
| T856 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.2129545697 |
|
|
Dec 24 12:36:04 PM PST 23 |
Dec 24 12:36:25 PM PST 23 |
486771861 ps |
| T857 |
/workspace/coverage/default/39.sram_ctrl_executable.1392286933 |
|
|
Dec 24 12:36:53 PM PST 23 |
Dec 24 12:48:40 PM PST 23 |
26631323685 ps |
| T858 |
/workspace/coverage/default/23.sram_ctrl_alert_test.4274837890 |
|
|
Dec 24 12:35:53 PM PST 23 |
Dec 24 12:36:14 PM PST 23 |
13463063 ps |
| T859 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.3610790855 |
|
|
Dec 24 12:36:46 PM PST 23 |
Dec 24 12:37:05 PM PST 23 |
52697646 ps |
| T860 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2318182791 |
|
|
Dec 24 12:37:20 PM PST 23 |
Dec 24 12:43:06 PM PST 23 |
7292465556 ps |
| T861 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.3978672893 |
|
|
Dec 24 12:36:06 PM PST 23 |
Dec 24 12:46:13 PM PST 23 |
2931192579 ps |
| T862 |
/workspace/coverage/default/39.sram_ctrl_stress_all.2681540766 |
|
|
Dec 24 12:37:02 PM PST 23 |
Dec 24 01:14:03 PM PST 23 |
33575649869 ps |
| T863 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2171413552 |
|
|
Dec 24 12:37:18 PM PST 23 |
Dec 24 12:38:20 PM PST 23 |
453557044 ps |
| T864 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.567328555 |
|
|
Dec 24 12:35:54 PM PST 23 |
Dec 24 12:36:16 PM PST 23 |
137076730 ps |
| T865 |
/workspace/coverage/default/29.sram_ctrl_executable.1722265022 |
|
|
Dec 24 12:36:44 PM PST 23 |
Dec 24 12:54:49 PM PST 23 |
25035259173 ps |
| T866 |
/workspace/coverage/default/19.sram_ctrl_regwen.975740648 |
|
|
Dec 24 12:36:28 PM PST 23 |
Dec 24 12:46:49 PM PST 23 |
16659945047 ps |
| T867 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.2389023007 |
|
|
Dec 24 12:36:44 PM PST 23 |
Dec 24 01:00:12 PM PST 23 |
10919007289 ps |
| T868 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.224998146 |
|
|
Dec 24 12:36:04 PM PST 23 |
Dec 24 12:36:27 PM PST 23 |
662365095 ps |
| T869 |
/workspace/coverage/default/22.sram_ctrl_partial_access.1632527633 |
|
|
Dec 24 12:36:22 PM PST 23 |
Dec 24 12:36:41 PM PST 23 |
27101143 ps |
| T870 |
/workspace/coverage/default/42.sram_ctrl_executable.3177081895 |
|
|
Dec 24 12:37:01 PM PST 23 |
Dec 24 12:57:00 PM PST 23 |
4432495658 ps |
| T871 |
/workspace/coverage/default/42.sram_ctrl_alert_test.1706938834 |
|
|
Dec 24 12:37:34 PM PST 23 |
Dec 24 12:37:43 PM PST 23 |
29673261 ps |
| T872 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.4285675589 |
|
|
Dec 24 12:36:22 PM PST 23 |
Dec 24 02:01:07 PM PST 23 |
1194832849 ps |
| T873 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.3129086051 |
|
|
Dec 24 12:36:55 PM PST 23 |
Dec 24 12:58:21 PM PST 23 |
21702212831 ps |
| T874 |
/workspace/coverage/default/30.sram_ctrl_smoke.2942870793 |
|
|
Dec 24 12:36:22 PM PST 23 |
Dec 24 12:37:25 PM PST 23 |
1542702877 ps |
| T875 |
/workspace/coverage/default/44.sram_ctrl_executable.3005914945 |
|
|
Dec 24 12:37:14 PM PST 23 |
Dec 24 12:49:22 PM PST 23 |
26108752346 ps |
| T876 |
/workspace/coverage/default/39.sram_ctrl_alert_test.2584286799 |
|
|
Dec 24 12:37:03 PM PST 23 |
Dec 24 12:37:20 PM PST 23 |
14201358 ps |
| T877 |
/workspace/coverage/default/20.sram_ctrl_executable.242591165 |
|
|
Dec 24 12:36:09 PM PST 23 |
Dec 24 12:44:07 PM PST 23 |
30901145395 ps |
| T878 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.4129817636 |
|
|
Dec 24 12:37:20 PM PST 23 |
Dec 24 12:43:03 PM PST 23 |
3458748408 ps |
| T879 |
/workspace/coverage/default/26.sram_ctrl_regwen.6671834 |
|
|
Dec 24 12:36:19 PM PST 23 |
Dec 24 12:38:25 PM PST 23 |
2228865787 ps |
| T880 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1291823666 |
|
|
Dec 24 12:37:56 PM PST 23 |
Dec 24 12:45:57 PM PST 23 |
30676889394 ps |
| T881 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.1427188504 |
|
|
Dec 24 12:35:47 PM PST 23 |
Dec 24 12:36:12 PM PST 23 |
160141832 ps |
| T882 |
/workspace/coverage/default/26.sram_ctrl_bijection.3279392012 |
|
|
Dec 24 12:36:05 PM PST 23 |
Dec 24 12:37:16 PM PST 23 |
3001619038 ps |
| T883 |
/workspace/coverage/default/46.sram_ctrl_regwen.2012969400 |
|
|
Dec 24 12:37:20 PM PST 23 |
Dec 24 12:50:27 PM PST 23 |
16108816057 ps |
| T884 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4264614193 |
|
|
Dec 24 12:35:23 PM PST 23 |
Dec 24 12:35:55 PM PST 23 |
91235295 ps |
| T885 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.963719217 |
|
|
Dec 24 12:36:24 PM PST 23 |
Dec 24 12:37:00 PM PST 23 |
91840865 ps |
| T886 |
/workspace/coverage/default/34.sram_ctrl_alert_test.2265534063 |
|
|
Dec 24 12:36:25 PM PST 23 |
Dec 24 12:36:44 PM PST 23 |
18086806 ps |
| T887 |
/workspace/coverage/default/45.sram_ctrl_stress_all.415874548 |
|
|
Dec 24 12:37:06 PM PST 23 |
Dec 24 12:46:26 PM PST 23 |
15411793182 ps |
| T888 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.451431744 |
|
|
Dec 24 12:34:59 PM PST 23 |
Dec 24 12:35:44 PM PST 23 |
680048151 ps |
| T889 |
/workspace/coverage/default/2.sram_ctrl_smoke.1540854049 |
|
|
Dec 24 12:34:46 PM PST 23 |
Dec 24 12:35:34 PM PST 23 |
757061068 ps |
| T890 |
/workspace/coverage/default/33.sram_ctrl_regwen.343603265 |
|
|
Dec 24 12:36:28 PM PST 23 |
Dec 24 01:06:26 PM PST 23 |
32444742605 ps |
| T891 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1702216885 |
|
|
Dec 24 12:35:31 PM PST 23 |
Dec 24 12:35:56 PM PST 23 |
77910853 ps |
| T892 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.1783587076 |
|
|
Dec 24 12:37:23 PM PST 23 |
Dec 24 12:37:43 PM PST 23 |
235840900 ps |
| T893 |
/workspace/coverage/default/6.sram_ctrl_alert_test.2065872948 |
|
|
Dec 24 12:35:19 PM PST 23 |
Dec 24 12:35:48 PM PST 23 |
34815259 ps |
| T894 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.3643017422 |
|
|
Dec 24 12:36:07 PM PST 23 |
Dec 24 12:36:36 PM PST 23 |
2863446400 ps |
| T895 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1401122488 |
|
|
Dec 24 12:35:22 PM PST 23 |
Dec 24 12:35:52 PM PST 23 |
233427102 ps |
| T896 |
/workspace/coverage/default/40.sram_ctrl_executable.2659911660 |
|
|
Dec 24 12:37:08 PM PST 23 |
Dec 24 12:59:59 PM PST 23 |
14232554283 ps |
| T897 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.1547096937 |
|
|
Dec 24 12:35:12 PM PST 23 |
Dec 24 12:40:08 PM PST 23 |
13378715185 ps |
| T898 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.2320931265 |
|
|
Dec 24 12:35:19 PM PST 23 |
Dec 24 12:40:09 PM PST 23 |
33548012637 ps |
| T899 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.2411193452 |
|
|
Dec 24 12:35:34 PM PST 23 |
Dec 24 12:36:11 PM PST 23 |
231604049 ps |
| T900 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2855309509 |
|
|
Dec 24 12:37:14 PM PST 23 |
Dec 24 12:40:45 PM PST 23 |
14956270860 ps |
| T901 |
/workspace/coverage/default/15.sram_ctrl_regwen.3463357353 |
|
|
Dec 24 12:35:32 PM PST 23 |
Dec 24 12:49:34 PM PST 23 |
59331579002 ps |
| T902 |
/workspace/coverage/default/35.sram_ctrl_executable.1625230654 |
|
|
Dec 24 12:36:26 PM PST 23 |
Dec 24 12:46:54 PM PST 23 |
1727056235 ps |
| T903 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3962641121 |
|
|
Dec 24 12:35:41 PM PST 23 |
Dec 24 01:30:58 PM PST 23 |
1250163866 ps |
| T904 |
/workspace/coverage/default/29.sram_ctrl_alert_test.4128866366 |
|
|
Dec 24 12:36:22 PM PST 23 |
Dec 24 12:36:40 PM PST 23 |
34463784 ps |
| T905 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.606925627 |
|
|
Dec 24 12:36:36 PM PST 23 |
Dec 24 12:36:59 PM PST 23 |
307682808 ps |
| T906 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.2461013050 |
|
|
Dec 24 12:35:31 PM PST 23 |
Dec 24 12:37:02 PM PST 23 |
118915830 ps |
| T907 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3096423551 |
|
|
Dec 24 12:35:14 PM PST 23 |
Dec 24 12:41:17 PM PST 23 |
4620477595 ps |
| T908 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.3799457216 |
|
|
Dec 24 12:36:23 PM PST 23 |
Dec 24 12:36:41 PM PST 23 |
93901978 ps |
| T909 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3196598115 |
|
|
Dec 24 12:35:14 PM PST 23 |
Dec 24 01:26:01 PM PST 23 |
5950253407 ps |
| T910 |
/workspace/coverage/default/48.sram_ctrl_bijection.27403393 |
|
|
Dec 24 12:37:12 PM PST 23 |
Dec 24 12:38:06 PM PST 23 |
13427403834 ps |
| T911 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.4116955568 |
|
|
Dec 24 12:37:06 PM PST 23 |
Dec 24 12:40:45 PM PST 23 |
8328489364 ps |
| T912 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.4192454154 |
|
|
Dec 24 12:34:59 PM PST 23 |
Dec 24 12:35:41 PM PST 23 |
1996951900 ps |
| T913 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.2963373552 |
|
|
Dec 24 12:35:28 PM PST 23 |
Dec 24 12:36:44 PM PST 23 |
120055283 ps |
| T914 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.390982351 |
|
|
Dec 24 12:35:21 PM PST 23 |
Dec 24 01:32:28 PM PST 23 |
2338310666 ps |
| T915 |
/workspace/coverage/default/11.sram_ctrl_stress_all.1123203841 |
|
|
Dec 24 12:35:20 PM PST 23 |
Dec 24 01:32:57 PM PST 23 |
56523578786 ps |
| T916 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.814101559 |
|
|
Dec 24 12:36:32 PM PST 23 |
Dec 24 12:54:39 PM PST 23 |
9670484413 ps |
| T917 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2208315036 |
|
|
Dec 24 12:35:25 PM PST 23 |
Dec 24 12:35:54 PM PST 23 |
97456601 ps |
| T918 |
/workspace/coverage/default/4.sram_ctrl_executable.2711772128 |
|
|
Dec 24 12:35:11 PM PST 23 |
Dec 24 01:11:52 PM PST 23 |
70409017347 ps |
| T919 |
/workspace/coverage/default/23.sram_ctrl_bijection.718871242 |
|
|
Dec 24 12:36:09 PM PST 23 |
Dec 24 12:37:25 PM PST 23 |
1865720968 ps |
| T920 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3296179013 |
|
|
Dec 24 12:36:04 PM PST 23 |
Dec 24 12:43:36 PM PST 23 |
5169755559 ps |
| T921 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.3674358603 |
|
|
Dec 24 12:35:06 PM PST 23 |
Dec 24 12:37:51 PM PST 23 |
2860655819 ps |
| T922 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.77016327 |
|
|
Dec 24 12:35:15 PM PST 23 |
Dec 24 12:36:00 PM PST 23 |
153747643 ps |
| T923 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.905714924 |
|
|
Dec 24 12:36:40 PM PST 23 |
Dec 24 12:37:01 PM PST 23 |
295404275 ps |
| T924 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.3626166333 |
|
|
Dec 24 12:36:24 PM PST 23 |
Dec 24 01:00:18 PM PST 23 |
4999299962 ps |
| T925 |
/workspace/coverage/default/17.sram_ctrl_alert_test.1248205715 |
|
|
Dec 24 12:35:49 PM PST 23 |
Dec 24 12:36:12 PM PST 23 |
38739638 ps |
| T926 |
/workspace/coverage/default/25.sram_ctrl_bijection.126552237 |
|
|
Dec 24 12:36:25 PM PST 23 |
Dec 24 12:37:30 PM PST 23 |
2935824350 ps |
| T927 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.182951168 |
|
|
Dec 24 12:35:28 PM PST 23 |
Dec 24 12:41:19 PM PST 23 |
12596208304 ps |
| T928 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.3037842970 |
|
|
Dec 24 12:36:29 PM PST 23 |
Dec 24 12:47:41 PM PST 23 |
38091887173 ps |
| T929 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.3197336797 |
|
|
Dec 24 12:37:00 PM PST 23 |
Dec 24 12:37:17 PM PST 23 |
49114352 ps |
| T930 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.711399727 |
|
|
Dec 24 12:35:15 PM PST 23 |
Dec 24 12:41:12 PM PST 23 |
20474537009 ps |
| T931 |
/workspace/coverage/default/8.sram_ctrl_regwen.584135295 |
|
|
Dec 24 12:35:25 PM PST 23 |
Dec 24 12:40:03 PM PST 23 |
901661156 ps |
| T932 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.3531551596 |
|
|
Dec 24 12:36:13 PM PST 23 |
Dec 24 12:36:33 PM PST 23 |
1999204163 ps |
| T933 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.1014543140 |
|
|
Dec 24 12:36:26 PM PST 23 |
Dec 24 12:36:53 PM PST 23 |
970484284 ps |
| T934 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.3013134654 |
|
|
Dec 24 12:35:43 PM PST 23 |
Dec 24 12:38:59 PM PST 23 |
1819355232 ps |
| T935 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.2262615044 |
|
|
Dec 24 12:37:06 PM PST 23 |
Dec 24 12:37:25 PM PST 23 |
478618693 ps |
| T936 |
/workspace/coverage/default/47.sram_ctrl_smoke.1142253933 |
|
|
Dec 24 12:37:58 PM PST 23 |
Dec 24 12:38:17 PM PST 23 |
954961638 ps |
| T937 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.693505090 |
|
|
Dec 24 12:37:07 PM PST 23 |
Dec 24 12:42:48 PM PST 23 |
32664700137 ps |
| T938 |
/workspace/coverage/default/12.sram_ctrl_executable.2908291388 |
|
|
Dec 24 12:35:34 PM PST 23 |
Dec 24 12:52:47 PM PST 23 |
10977625752 ps |
| T939 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.1274002353 |
|
|
Dec 24 12:35:53 PM PST 23 |
Dec 24 12:40:30 PM PST 23 |
4617388592 ps |
| T940 |
/workspace/coverage/default/18.sram_ctrl_smoke.719989351 |
|
|
Dec 24 12:36:12 PM PST 23 |
Dec 24 12:36:47 PM PST 23 |
1879892894 ps |
| T941 |
/workspace/coverage/default/18.sram_ctrl_stress_all.66541511 |
|
|
Dec 24 12:35:38 PM PST 23 |
Dec 24 01:16:08 PM PST 23 |
10142668855 ps |
| T942 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.1381209379 |
|
|
Dec 24 12:36:03 PM PST 23 |
Dec 24 12:54:44 PM PST 23 |
8504519225 ps |
| T943 |
/workspace/coverage/default/26.sram_ctrl_smoke.3326594558 |
|
|
Dec 24 12:36:20 PM PST 23 |
Dec 24 12:36:53 PM PST 23 |
766340573 ps |
| T944 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.1591790658 |
|
|
Dec 24 12:35:24 PM PST 23 |
Dec 24 12:36:27 PM PST 23 |
102419521 ps |
| T945 |
/workspace/coverage/default/12.sram_ctrl_regwen.2782146013 |
|
|
Dec 24 12:35:51 PM PST 23 |
Dec 24 12:46:47 PM PST 23 |
6997717824 ps |
| T946 |
/workspace/coverage/default/24.sram_ctrl_executable.941880943 |
|
|
Dec 24 12:36:16 PM PST 23 |
Dec 24 12:48:54 PM PST 23 |
2845275282 ps |
| T947 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.1570190690 |
|
|
Dec 24 12:36:43 PM PST 23 |
Dec 24 12:55:24 PM PST 23 |
15241798615 ps |
| T948 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.2001026440 |
|
|
Dec 24 12:34:51 PM PST 23 |
Dec 24 12:39:57 PM PST 23 |
14643542863 ps |
| T949 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.1200404031 |
|
|
Dec 24 12:36:27 PM PST 23 |
Dec 24 12:40:23 PM PST 23 |
2255186608 ps |
| T950 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3361144144 |
|
|
Dec 24 12:37:19 PM PST 23 |
Dec 24 01:10:49 PM PST 23 |
939413110 ps |
| T951 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.858930582 |
|
|
Dec 24 12:36:20 PM PST 23 |
Dec 24 12:36:55 PM PST 23 |
169271749 ps |
| T952 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.2671686970 |
|
|
Dec 24 12:36:34 PM PST 23 |
Dec 24 12:36:57 PM PST 23 |
388166799 ps |
| T953 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.3335195028 |
|
|
Dec 24 12:36:26 PM PST 23 |
Dec 24 12:42:28 PM PST 23 |
14135645208 ps |
| T954 |
/workspace/coverage/default/21.sram_ctrl_stress_all.2181370197 |
|
|
Dec 24 12:36:20 PM PST 23 |
Dec 24 01:29:01 PM PST 23 |
114216532757 ps |
| T955 |
/workspace/coverage/default/42.sram_ctrl_stress_all.3492813898 |
|
|
Dec 24 12:37:04 PM PST 23 |
Dec 24 12:39:10 PM PST 23 |
4402670273 ps |
| T956 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.3033845653 |
|
|
Dec 24 12:35:37 PM PST 23 |
Dec 24 12:36:06 PM PST 23 |
29563237 ps |
| T957 |
/workspace/coverage/default/32.sram_ctrl_bijection.135433974 |
|
|
Dec 24 12:36:41 PM PST 23 |
Dec 24 12:37:11 PM PST 23 |
472037138 ps |
| T958 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.4214123653 |
|
|
Dec 24 12:36:04 PM PST 23 |
Dec 24 12:37:09 PM PST 23 |
466600269 ps |
| T959 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1111879894 |
|
|
Dec 24 12:36:05 PM PST 23 |
Dec 24 01:16:53 PM PST 23 |
1665689049 ps |
| T960 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.2123583415 |
|
|
Dec 24 12:36:00 PM PST 23 |
Dec 24 12:45:51 PM PST 23 |
51769387424 ps |
| T961 |
/workspace/coverage/default/38.sram_ctrl_alert_test.3910529358 |
|
|
Dec 24 12:36:58 PM PST 23 |
Dec 24 12:37:15 PM PST 23 |
38596655 ps |
| T962 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2415826978 |
|
|
Dec 24 12:37:33 PM PST 23 |
Dec 24 12:37:46 PM PST 23 |
125952774 ps |
| T963 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.2997517576 |
|
|
Dec 24 12:35:25 PM PST 23 |
Dec 24 12:35:52 PM PST 23 |
372713711 ps |
| T964 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.1002752834 |
|
|
Dec 24 12:37:09 PM PST 23 |
Dec 24 12:39:31 PM PST 23 |
423270010 ps |
| T965 |
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3413428846 |
|
|
Dec 24 12:37:40 PM PST 23 |
Dec 24 12:43:51 PM PST 23 |
5059398648 ps |
| T966 |
/workspace/coverage/default/47.sram_ctrl_stress_all.2526865268 |
|
|
Dec 24 12:37:40 PM PST 23 |
Dec 24 01:26:38 PM PST 23 |
104575408825 ps |
| T967 |
/workspace/coverage/default/43.sram_ctrl_partial_access.1606152013 |
|
|
Dec 24 12:37:07 PM PST 23 |
Dec 24 12:39:18 PM PST 23 |
627142284 ps |
| T968 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.244066900 |
|
|
Dec 24 12:37:00 PM PST 23 |
Dec 24 02:02:20 PM PST 23 |
3578342662 ps |
| T969 |
/workspace/coverage/default/25.sram_ctrl_alert_test.1070644010 |
|
|
Dec 24 12:36:22 PM PST 23 |
Dec 24 12:36:41 PM PST 23 |
20304465 ps |
| T970 |
/workspace/coverage/default/23.sram_ctrl_executable.3977809926 |
|
|
Dec 24 12:35:52 PM PST 23 |
Dec 24 12:56:25 PM PST 23 |
17358378557 ps |
| T971 |
/workspace/coverage/default/20.sram_ctrl_smoke.2311359751 |
|
|
Dec 24 12:36:09 PM PST 23 |
Dec 24 12:36:40 PM PST 23 |
703977142 ps |
| T972 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2511036658 |
|
|
Dec 24 12:37:34 PM PST 23 |
Dec 24 12:57:06 PM PST 23 |
4162449741 ps |
| T973 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3291372940 |
|
|
Dec 24 12:35:37 PM PST 23 |
Dec 24 12:41:16 PM PST 23 |
56103887766 ps |
| T974 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.4205978543 |
|
|
Dec 24 12:37:53 PM PST 23 |
Dec 24 12:38:01 PM PST 23 |
301119520 ps |
| T975 |
/workspace/coverage/default/47.sram_ctrl_regwen.2278388468 |
|
|
Dec 24 12:37:44 PM PST 23 |
Dec 24 12:47:49 PM PST 23 |
8048576569 ps |
| T976 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.140123017 |
|
|
Dec 24 12:36:10 PM PST 23 |
Dec 24 12:40:12 PM PST 23 |
8841835497 ps |
| T977 |
/workspace/coverage/default/10.sram_ctrl_smoke.1545785301 |
|
|
Dec 24 12:35:42 PM PST 23 |
Dec 24 12:36:08 PM PST 23 |
173336900 ps |
| T978 |
/workspace/coverage/default/9.sram_ctrl_stress_all.2429745948 |
|
|
Dec 24 12:35:27 PM PST 23 |
Dec 24 01:01:13 PM PST 23 |
58028901461 ps |
| T979 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.4288343102 |
|
|
Dec 24 12:35:26 PM PST 23 |
Dec 24 12:36:08 PM PST 23 |
84341927 ps |
| T980 |
/workspace/coverage/default/34.sram_ctrl_bijection.3925264963 |
|
|
Dec 24 12:36:30 PM PST 23 |
Dec 24 12:37:51 PM PST 23 |
8003057632 ps |
| T981 |
/workspace/coverage/default/14.sram_ctrl_alert_test.392845028 |
|
|
Dec 24 12:35:39 PM PST 23 |
Dec 24 12:36:03 PM PST 23 |
19745323 ps |
| T982 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1236218745 |
|
|
Dec 24 12:37:30 PM PST 23 |
Dec 24 12:40:20 PM PST 23 |
1705843200 ps |
| T983 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.4186268026 |
|
|
Dec 24 12:35:23 PM PST 23 |
Dec 24 12:41:37 PM PST 23 |
13248056621 ps |
| T984 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2853489255 |
|
|
Dec 24 12:35:15 PM PST 23 |
Dec 24 12:35:53 PM PST 23 |
64862327 ps |
| T985 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.833460744 |
|
|
Dec 24 12:36:33 PM PST 23 |
Dec 24 12:39:49 PM PST 23 |
2538875923 ps |
| T986 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1677652454 |
|
|
Dec 24 12:35:30 PM PST 23 |
Dec 24 12:39:54 PM PST 23 |
2513689184 ps |
| T987 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2463570012 |
|
|
Dec 24 12:37:19 PM PST 23 |
Dec 24 12:37:31 PM PST 23 |
130987452 ps |
| T988 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2738632958 |
|
|
Dec 24 12:35:10 PM PST 23 |
Dec 24 01:09:19 PM PST 23 |
5038029425 ps |
| T989 |
/workspace/coverage/default/40.sram_ctrl_regwen.3171687999 |
|
|
Dec 24 12:37:12 PM PST 23 |
Dec 24 12:48:47 PM PST 23 |
29478413816 ps |
| T990 |
/workspace/coverage/default/8.sram_ctrl_stress_all.2957292106 |
|
|
Dec 24 12:35:21 PM PST 23 |
Dec 24 01:58:17 PM PST 23 |
11509182702 ps |
| T991 |
/workspace/coverage/default/31.sram_ctrl_stress_all.4183251599 |
|
|
Dec 24 12:36:12 PM PST 23 |
Dec 24 01:19:07 PM PST 23 |
26465970805 ps |
| T992 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.562678752 |
|
|
Dec 24 12:36:19 PM PST 23 |
Dec 24 01:20:27 PM PST 23 |
640444980 ps |
| T993 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.489904217 |
|
|
Dec 24 12:36:21 PM PST 23 |
Dec 24 12:43:40 PM PST 23 |
73040509670 ps |
| T994 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2925150305 |
|
|
Dec 24 12:37:30 PM PST 23 |
Dec 24 12:38:06 PM PST 23 |
95397721 ps |
| T995 |
/workspace/coverage/default/30.sram_ctrl_regwen.2845774696 |
|
|
Dec 24 12:36:44 PM PST 23 |
Dec 24 12:39:24 PM PST 23 |
38212978891 ps |
| T996 |
/workspace/coverage/default/36.sram_ctrl_smoke.2821901128 |
|
|
Dec 24 12:36:26 PM PST 23 |
Dec 24 12:37:41 PM PST 23 |
511065050 ps |
| T997 |
/workspace/coverage/default/28.sram_ctrl_regwen.4072454944 |
|
|
Dec 24 12:36:23 PM PST 23 |
Dec 24 12:50:36 PM PST 23 |
15059287837 ps |
| T998 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.2578776376 |
|
|
Dec 24 12:35:39 PM PST 23 |
Dec 24 12:36:10 PM PST 23 |
71666129 ps |
| T999 |
/workspace/coverage/default/49.sram_ctrl_smoke.1246206417 |
|
|
Dec 24 12:37:21 PM PST 23 |
Dec 24 12:37:45 PM PST 23 |
754120235 ps |
| T1000 |
/workspace/coverage/default/32.sram_ctrl_stress_all.3570377580 |
|
|
Dec 24 12:36:28 PM PST 23 |
Dec 24 01:13:36 PM PST 23 |
7990836438 ps |
| T1001 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3439988678 |
|
|
Dec 24 12:35:28 PM PST 23 |
Dec 24 12:36:09 PM PST 23 |
2190339827 ps |