T266 |
/workspace/coverage/default/20.sram_ctrl_smoke.527607574 |
|
|
Jan 10 12:45:54 PM PST 24 |
Jan 10 12:48:21 PM PST 24 |
519823456 ps |
T267 |
/workspace/coverage/default/29.sram_ctrl_smoke.1991540064 |
|
|
Jan 10 12:46:12 PM PST 24 |
Jan 10 12:47:45 PM PST 24 |
457409677 ps |
T268 |
/workspace/coverage/default/41.sram_ctrl_bijection.1763831352 |
|
|
Jan 10 12:46:43 PM PST 24 |
Jan 10 12:48:32 PM PST 24 |
475061031 ps |
T49 |
/workspace/coverage/default/44.sram_ctrl_regwen.1791288235 |
|
|
Jan 10 12:46:50 PM PST 24 |
Jan 10 01:05:52 PM PST 24 |
46259979816 ps |
T269 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.1426478619 |
|
|
Jan 10 12:46:00 PM PST 24 |
Jan 10 01:00:09 PM PST 24 |
1671469578 ps |
T270 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.3455996295 |
|
|
Jan 10 12:46:31 PM PST 24 |
Jan 10 01:02:35 PM PST 24 |
61746262191 ps |
T271 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.3398456342 |
|
|
Jan 10 12:46:53 PM PST 24 |
Jan 10 12:48:21 PM PST 24 |
38954068 ps |
T50 |
/workspace/coverage/default/39.sram_ctrl_regwen.2863258347 |
|
|
Jan 10 12:46:55 PM PST 24 |
Jan 10 12:59:21 PM PST 24 |
13525229518 ps |
T272 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.1726240569 |
|
|
Jan 10 12:46:18 PM PST 24 |
Jan 10 01:01:56 PM PST 24 |
5739653047 ps |
T273 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.736915240 |
|
|
Jan 10 12:46:21 PM PST 24 |
Jan 10 12:53:38 PM PST 24 |
52307025188 ps |
T274 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.405030573 |
|
|
Jan 10 12:44:30 PM PST 24 |
Jan 10 12:45:47 PM PST 24 |
33279567 ps |
T275 |
/workspace/coverage/default/14.sram_ctrl_partial_access.1433391269 |
|
|
Jan 10 12:45:18 PM PST 24 |
Jan 10 12:48:19 PM PST 24 |
707911372 ps |
T276 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.875944885 |
|
|
Jan 10 12:46:17 PM PST 24 |
Jan 10 12:48:54 PM PST 24 |
134440014 ps |
T277 |
/workspace/coverage/default/23.sram_ctrl_regwen.4235302508 |
|
|
Jan 10 12:45:54 PM PST 24 |
Jan 10 12:54:09 PM PST 24 |
45139726747 ps |
T122 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.2601625912 |
|
|
Jan 10 12:46:21 PM PST 24 |
Jan 10 12:47:46 PM PST 24 |
2573970968 ps |
T278 |
/workspace/coverage/default/10.sram_ctrl_partial_access.579521803 |
|
|
Jan 10 12:45:04 PM PST 24 |
Jan 10 12:46:30 PM PST 24 |
231054934 ps |
T279 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.2575451043 |
|
|
Jan 10 12:45:56 PM PST 24 |
Jan 10 12:52:46 PM PST 24 |
3359910279 ps |
T280 |
/workspace/coverage/default/31.sram_ctrl_bijection.457126505 |
|
|
Jan 10 12:46:13 PM PST 24 |
Jan 10 12:48:14 PM PST 24 |
3273046725 ps |
T281 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3973336668 |
|
|
Jan 10 12:45:00 PM PST 24 |
Jan 10 12:50:20 PM PST 24 |
3459888347 ps |
T95 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.4228896014 |
|
|
Jan 10 12:44:36 PM PST 24 |
Jan 10 12:45:57 PM PST 24 |
560573188 ps |
T282 |
/workspace/coverage/default/36.sram_ctrl_smoke.1139485110 |
|
|
Jan 10 12:46:29 PM PST 24 |
Jan 10 12:48:02 PM PST 24 |
840702514 ps |
T283 |
/workspace/coverage/default/6.sram_ctrl_partial_access.937816175 |
|
|
Jan 10 12:44:58 PM PST 24 |
Jan 10 12:46:27 PM PST 24 |
334713753 ps |
T284 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3052357216 |
|
|
Jan 10 12:46:16 PM PST 24 |
Jan 10 12:58:38 PM PST 24 |
92078244436 ps |
T285 |
/workspace/coverage/default/5.sram_ctrl_alert_test.290276305 |
|
|
Jan 10 12:45:00 PM PST 24 |
Jan 10 12:46:23 PM PST 24 |
14192130 ps |
T286 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1736692048 |
|
|
Jan 10 12:44:31 PM PST 24 |
Jan 10 12:51:46 PM PST 24 |
45936354655 ps |
T287 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.2896971385 |
|
|
Jan 10 12:46:58 PM PST 24 |
Jan 10 12:49:50 PM PST 24 |
2101372819 ps |
T136 |
/workspace/coverage/default/35.sram_ctrl_regwen.3461872317 |
|
|
Jan 10 12:46:23 PM PST 24 |
Jan 10 01:12:49 PM PST 24 |
75162843599 ps |
T288 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.3071082488 |
|
|
Jan 10 12:46:53 PM PST 24 |
Jan 10 12:48:14 PM PST 24 |
30696807 ps |
T289 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.4069781009 |
|
|
Jan 10 12:46:02 PM PST 24 |
Jan 10 12:52:50 PM PST 24 |
5042721706 ps |
T290 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2726026904 |
|
|
Jan 10 12:46:41 PM PST 24 |
Jan 10 12:48:00 PM PST 24 |
36922788 ps |
T291 |
/workspace/coverage/default/42.sram_ctrl_stress_all.1914149578 |
|
|
Jan 10 12:46:48 PM PST 24 |
Jan 10 01:35:34 PM PST 24 |
148777940452 ps |
T292 |
/workspace/coverage/default/10.sram_ctrl_smoke.2479281927 |
|
|
Jan 10 12:45:11 PM PST 24 |
Jan 10 12:46:51 PM PST 24 |
1130643055 ps |
T137 |
/workspace/coverage/default/3.sram_ctrl_executable.1618388684 |
|
|
Jan 10 12:44:52 PM PST 24 |
Jan 10 01:04:50 PM PST 24 |
31921157322 ps |
T293 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3429997291 |
|
|
Jan 10 12:46:58 PM PST 24 |
Jan 10 12:48:18 PM PST 24 |
231326927 ps |
T294 |
/workspace/coverage/default/34.sram_ctrl_partial_access.3484400274 |
|
|
Jan 10 12:46:16 PM PST 24 |
Jan 10 12:48:10 PM PST 24 |
154308341 ps |
T295 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2053873129 |
|
|
Jan 10 12:44:56 PM PST 24 |
Jan 10 12:46:45 PM PST 24 |
413083466 ps |
T296 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3461284933 |
|
|
Jan 10 12:46:51 PM PST 24 |
Jan 10 12:48:11 PM PST 24 |
91152693 ps |
T297 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.3899816806 |
|
|
Jan 10 12:45:50 PM PST 24 |
Jan 10 12:47:11 PM PST 24 |
34182547 ps |
T298 |
/workspace/coverage/default/31.sram_ctrl_smoke.167813002 |
|
|
Jan 10 12:46:13 PM PST 24 |
Jan 10 12:47:39 PM PST 24 |
140464950 ps |
T299 |
/workspace/coverage/default/33.sram_ctrl_partial_access.3364473356 |
|
|
Jan 10 12:46:25 PM PST 24 |
Jan 10 12:47:54 PM PST 24 |
693257460 ps |
T300 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1895078770 |
|
|
Jan 10 12:46:50 PM PST 24 |
Jan 10 12:51:09 PM PST 24 |
2332924611 ps |
T301 |
/workspace/coverage/default/21.sram_ctrl_partial_access.1963575231 |
|
|
Jan 10 12:45:53 PM PST 24 |
Jan 10 12:47:27 PM PST 24 |
269174420 ps |
T302 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.3757747927 |
|
|
Jan 10 12:46:15 PM PST 24 |
Jan 10 12:48:56 PM PST 24 |
272999511 ps |
T303 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2746089871 |
|
|
Jan 10 12:45:00 PM PST 24 |
Jan 10 12:46:30 PM PST 24 |
535201186 ps |
T304 |
/workspace/coverage/default/45.sram_ctrl_partial_access.1913362245 |
|
|
Jan 10 12:47:05 PM PST 24 |
Jan 10 12:48:48 PM PST 24 |
351959460 ps |
T305 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.3942474150 |
|
|
Jan 10 12:46:01 PM PST 24 |
Jan 10 12:51:35 PM PST 24 |
1434914214 ps |
T306 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.2627618548 |
|
|
Jan 10 12:46:02 PM PST 24 |
Jan 10 01:11:41 PM PST 24 |
7345175752 ps |
T307 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.3157607739 |
|
|
Jan 10 12:45:56 PM PST 24 |
Jan 10 12:47:56 PM PST 24 |
503631150 ps |
T308 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2702504434 |
|
|
Jan 10 12:47:11 PM PST 24 |
Jan 10 12:49:57 PM PST 24 |
143212777 ps |
T309 |
/workspace/coverage/default/25.sram_ctrl_stress_all.2698268472 |
|
|
Jan 10 12:45:54 PM PST 24 |
Jan 10 01:34:42 PM PST 24 |
297849998260 ps |
T310 |
/workspace/coverage/default/9.sram_ctrl_executable.1219837589 |
|
|
Jan 10 12:44:55 PM PST 24 |
Jan 10 12:55:23 PM PST 24 |
6549219548 ps |
T311 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.1463235390 |
|
|
Jan 10 12:45:50 PM PST 24 |
Jan 10 12:47:20 PM PST 24 |
448791769 ps |
T312 |
/workspace/coverage/default/25.sram_ctrl_regwen.3027900080 |
|
|
Jan 10 12:45:58 PM PST 24 |
Jan 10 01:01:16 PM PST 24 |
11007023403 ps |
T139 |
/workspace/coverage/default/35.sram_ctrl_stress_all.4198505677 |
|
|
Jan 10 12:46:40 PM PST 24 |
Jan 10 01:15:06 PM PST 24 |
80572779448 ps |
T313 |
/workspace/coverage/default/22.sram_ctrl_regwen.1781130709 |
|
|
Jan 10 12:46:02 PM PST 24 |
Jan 10 12:59:48 PM PST 24 |
1997044206 ps |
T314 |
/workspace/coverage/default/40.sram_ctrl_executable.2863876701 |
|
|
Jan 10 12:46:31 PM PST 24 |
Jan 10 12:51:22 PM PST 24 |
7565430456 ps |
T315 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.4040869224 |
|
|
Jan 10 12:47:11 PM PST 24 |
Jan 10 12:48:50 PM PST 24 |
63905199 ps |
T316 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.964719016 |
|
|
Jan 10 12:45:42 PM PST 24 |
Jan 10 12:59:31 PM PST 24 |
13830208164 ps |
T317 |
/workspace/coverage/default/40.sram_ctrl_regwen.2420724351 |
|
|
Jan 10 12:46:38 PM PST 24 |
Jan 10 01:11:31 PM PST 24 |
10759831399 ps |
T318 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.3834065513 |
|
|
Jan 10 12:46:37 PM PST 24 |
Jan 10 01:37:59 PM PST 24 |
1611368640 ps |
T319 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.3371228560 |
|
|
Jan 10 12:46:07 PM PST 24 |
Jan 10 12:47:32 PM PST 24 |
634707367 ps |
T320 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3867302458 |
|
|
Jan 10 12:46:46 PM PST 24 |
Jan 10 12:48:14 PM PST 24 |
3602929987 ps |
T321 |
/workspace/coverage/default/44.sram_ctrl_bijection.4146020760 |
|
|
Jan 10 12:46:49 PM PST 24 |
Jan 10 12:48:35 PM PST 24 |
5455833489 ps |
T322 |
/workspace/coverage/default/48.sram_ctrl_stress_all.2251025601 |
|
|
Jan 10 12:47:07 PM PST 24 |
Jan 10 01:37:06 PM PST 24 |
221305245080 ps |
T323 |
/workspace/coverage/default/10.sram_ctrl_regwen.33172325 |
|
|
Jan 10 12:45:07 PM PST 24 |
Jan 10 12:55:05 PM PST 24 |
7010950795 ps |
T324 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.51560304 |
|
|
Jan 10 12:44:53 PM PST 24 |
Jan 10 12:46:13 PM PST 24 |
47176025 ps |
T325 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2191231053 |
|
|
Jan 10 12:47:04 PM PST 24 |
Jan 10 01:12:36 PM PST 24 |
10357898074 ps |
T326 |
/workspace/coverage/default/36.sram_ctrl_alert_test.1930785735 |
|
|
Jan 10 12:46:32 PM PST 24 |
Jan 10 12:47:46 PM PST 24 |
21085413 ps |
T327 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1654998780 |
|
|
Jan 10 12:45:40 PM PST 24 |
Jan 10 12:52:03 PM PST 24 |
44486514452 ps |
T328 |
/workspace/coverage/default/13.sram_ctrl_bijection.1475025828 |
|
|
Jan 10 12:45:20 PM PST 24 |
Jan 10 12:47:14 PM PST 24 |
3042046187 ps |
T329 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1899013291 |
|
|
Jan 10 12:46:58 PM PST 24 |
Jan 10 12:56:18 PM PST 24 |
7461631825 ps |
T330 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3017870844 |
|
|
Jan 10 12:45:11 PM PST 24 |
Jan 10 12:51:31 PM PST 24 |
1732501900 ps |
T331 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.1417964590 |
|
|
Jan 10 12:46:36 PM PST 24 |
Jan 10 12:48:18 PM PST 24 |
562983218 ps |
T332 |
/workspace/coverage/default/11.sram_ctrl_stress_all.2008600809 |
|
|
Jan 10 12:45:12 PM PST 24 |
Jan 10 12:53:05 PM PST 24 |
14766530995 ps |
T333 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.1772002060 |
|
|
Jan 10 12:46:30 PM PST 24 |
Jan 10 12:47:58 PM PST 24 |
147293736 ps |
T334 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1067266160 |
|
|
Jan 10 12:46:20 PM PST 24 |
Jan 10 12:47:52 PM PST 24 |
258602399 ps |
T335 |
/workspace/coverage/default/9.sram_ctrl_bijection.3177234181 |
|
|
Jan 10 12:45:02 PM PST 24 |
Jan 10 12:46:46 PM PST 24 |
1045747024 ps |
T336 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.3145425561 |
|
|
Jan 10 12:46:22 PM PST 24 |
Jan 10 12:51:32 PM PST 24 |
1325754918 ps |
T337 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1870804251 |
|
|
Jan 10 12:47:04 PM PST 24 |
Jan 10 01:01:14 PM PST 24 |
10319663739 ps |
T338 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.2998905560 |
|
|
Jan 10 12:45:10 PM PST 24 |
Jan 10 12:46:42 PM PST 24 |
1186144168 ps |
T339 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.757970051 |
|
|
Jan 10 12:46:49 PM PST 24 |
Jan 10 12:49:38 PM PST 24 |
670011347 ps |
T340 |
/workspace/coverage/default/37.sram_ctrl_stress_all.1252549079 |
|
|
Jan 10 12:46:36 PM PST 24 |
Jan 10 12:54:40 PM PST 24 |
57886035693 ps |
T341 |
/workspace/coverage/default/28.sram_ctrl_bijection.3507358042 |
|
|
Jan 10 12:45:59 PM PST 24 |
Jan 10 12:48:15 PM PST 24 |
3244716068 ps |
T342 |
/workspace/coverage/default/43.sram_ctrl_partial_access.4080503310 |
|
|
Jan 10 12:47:06 PM PST 24 |
Jan 10 12:48:38 PM PST 24 |
106055030 ps |
T343 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.2852338547 |
|
|
Jan 10 12:45:36 PM PST 24 |
Jan 10 12:46:59 PM PST 24 |
308754926 ps |
T344 |
/workspace/coverage/default/25.sram_ctrl_bijection.1514274989 |
|
|
Jan 10 12:45:58 PM PST 24 |
Jan 10 12:48:42 PM PST 24 |
14440976282 ps |
T345 |
/workspace/coverage/default/38.sram_ctrl_partial_access.1240207023 |
|
|
Jan 10 12:46:49 PM PST 24 |
Jan 10 12:48:13 PM PST 24 |
395397375 ps |
T346 |
/workspace/coverage/default/25.sram_ctrl_smoke.2433934322 |
|
|
Jan 10 12:46:04 PM PST 24 |
Jan 10 12:47:34 PM PST 24 |
575673143 ps |
T347 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1826355221 |
|
|
Jan 10 12:45:18 PM PST 24 |
Jan 10 12:53:42 PM PST 24 |
22103700214 ps |
T348 |
/workspace/coverage/default/49.sram_ctrl_regwen.2223634188 |
|
|
Jan 10 12:47:15 PM PST 24 |
Jan 10 12:51:58 PM PST 24 |
1164027424 ps |
T349 |
/workspace/coverage/default/0.sram_ctrl_stress_all.1703777450 |
|
|
Jan 10 12:44:50 PM PST 24 |
Jan 10 01:07:24 PM PST 24 |
19661600686 ps |
T350 |
/workspace/coverage/default/30.sram_ctrl_bijection.4031810653 |
|
|
Jan 10 12:46:15 PM PST 24 |
Jan 10 12:48:32 PM PST 24 |
15328978538 ps |
T351 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.487207311 |
|
|
Jan 10 12:46:27 PM PST 24 |
Jan 10 12:47:55 PM PST 24 |
1820387043 ps |
T352 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.2694593682 |
|
|
Jan 10 12:46:50 PM PST 24 |
Jan 10 12:53:34 PM PST 24 |
16951508675 ps |
T353 |
/workspace/coverage/default/36.sram_ctrl_bijection.2759089908 |
|
|
Jan 10 12:46:21 PM PST 24 |
Jan 10 12:48:13 PM PST 24 |
2400946225 ps |
T354 |
/workspace/coverage/default/2.sram_ctrl_partial_access.3329733828 |
|
|
Jan 10 12:44:46 PM PST 24 |
Jan 10 12:46:19 PM PST 24 |
595560707 ps |
T355 |
/workspace/coverage/default/36.sram_ctrl_stress_all.1418819032 |
|
|
Jan 10 12:46:33 PM PST 24 |
Jan 10 01:42:13 PM PST 24 |
209922752336 ps |
T356 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.2259503443 |
|
|
Jan 10 12:45:18 PM PST 24 |
Jan 10 12:46:48 PM PST 24 |
510433575 ps |
T357 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.3734911911 |
|
|
Jan 10 12:45:56 PM PST 24 |
Jan 10 12:47:28 PM PST 24 |
199573855 ps |
T358 |
/workspace/coverage/default/8.sram_ctrl_stress_all.284207877 |
|
|
Jan 10 12:44:58 PM PST 24 |
Jan 10 01:28:01 PM PST 24 |
151671166171 ps |
T359 |
/workspace/coverage/default/37.sram_ctrl_executable.1307449167 |
|
|
Jan 10 12:46:37 PM PST 24 |
Jan 10 01:07:15 PM PST 24 |
4277679511 ps |
T360 |
/workspace/coverage/default/3.sram_ctrl_bijection.4124840283 |
|
|
Jan 10 12:44:45 PM PST 24 |
Jan 10 12:46:41 PM PST 24 |
4630878001 ps |
T361 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.379652597 |
|
|
Jan 10 12:46:27 PM PST 24 |
Jan 10 01:37:41 PM PST 24 |
2761098723 ps |
T362 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1900695475 |
|
|
Jan 10 12:44:55 PM PST 24 |
Jan 10 12:49:06 PM PST 24 |
2465004507 ps |
T363 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.2127506431 |
|
|
Jan 10 12:46:07 PM PST 24 |
Jan 10 12:47:33 PM PST 24 |
111161711 ps |
T364 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.395084777 |
|
|
Jan 10 12:45:49 PM PST 24 |
Jan 10 12:47:11 PM PST 24 |
28646134 ps |
T365 |
/workspace/coverage/default/45.sram_ctrl_regwen.379725206 |
|
|
Jan 10 12:46:53 PM PST 24 |
Jan 10 12:59:49 PM PST 24 |
45027392836 ps |
T366 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.4192553613 |
|
|
Jan 10 12:46:52 PM PST 24 |
Jan 10 12:51:26 PM PST 24 |
2189154520 ps |
T367 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.3297759938 |
|
|
Jan 10 12:45:50 PM PST 24 |
Jan 10 12:47:15 PM PST 24 |
957535101 ps |
T368 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.1706872700 |
|
|
Jan 10 12:44:54 PM PST 24 |
Jan 10 12:46:38 PM PST 24 |
390233548 ps |
T369 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.2873066006 |
|
|
Jan 10 12:46:20 PM PST 24 |
Jan 10 12:47:49 PM PST 24 |
354892928 ps |
T370 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.2279548697 |
|
|
Jan 10 12:46:35 PM PST 24 |
Jan 10 12:47:50 PM PST 24 |
79843957 ps |
T371 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.4232946071 |
|
|
Jan 10 12:46:04 PM PST 24 |
Jan 10 12:51:38 PM PST 24 |
11625472618 ps |
T372 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.714857979 |
|
|
Jan 10 12:45:03 PM PST 24 |
Jan 10 12:51:26 PM PST 24 |
841555668 ps |
T373 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.1974591257 |
|
|
Jan 10 12:46:01 PM PST 24 |
Jan 10 12:58:57 PM PST 24 |
2596520471 ps |
T374 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.297174823 |
|
|
Jan 10 12:47:11 PM PST 24 |
Jan 10 12:49:29 PM PST 24 |
454540892 ps |
T375 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3291411775 |
|
|
Jan 10 12:45:09 PM PST 24 |
Jan 10 12:47:17 PM PST 24 |
252621291 ps |
T376 |
/workspace/coverage/default/16.sram_ctrl_alert_test.4141984347 |
|
|
Jan 10 12:45:36 PM PST 24 |
Jan 10 12:46:55 PM PST 24 |
28303567 ps |
T377 |
/workspace/coverage/default/40.sram_ctrl_partial_access.1377558452 |
|
|
Jan 10 12:46:46 PM PST 24 |
Jan 10 12:48:16 PM PST 24 |
253709133 ps |
T378 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2963345269 |
|
|
Jan 10 12:46:49 PM PST 24 |
Jan 10 12:48:11 PM PST 24 |
590721718 ps |
T96 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.280935927 |
|
|
Jan 10 12:44:34 PM PST 24 |
Jan 10 12:45:54 PM PST 24 |
89576302 ps |
T379 |
/workspace/coverage/default/4.sram_ctrl_bijection.2001770760 |
|
|
Jan 10 12:44:50 PM PST 24 |
Jan 10 12:47:03 PM PST 24 |
3512141846 ps |
T380 |
/workspace/coverage/default/33.sram_ctrl_alert_test.2141706617 |
|
|
Jan 10 12:46:35 PM PST 24 |
Jan 10 12:48:02 PM PST 24 |
24108092 ps |
T381 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.466593250 |
|
|
Jan 10 12:45:17 PM PST 24 |
Jan 10 12:58:00 PM PST 24 |
12295827183 ps |
T382 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2916887224 |
|
|
Jan 10 12:46:46 PM PST 24 |
Jan 10 12:48:28 PM PST 24 |
334981915 ps |
T383 |
/workspace/coverage/default/17.sram_ctrl_executable.3994291190 |
|
|
Jan 10 12:45:39 PM PST 24 |
Jan 10 01:07:20 PM PST 24 |
45036203642 ps |
T384 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.536682063 |
|
|
Jan 10 12:44:47 PM PST 24 |
Jan 10 12:52:53 PM PST 24 |
23267266382 ps |
T385 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.2099353497 |
|
|
Jan 10 12:45:54 PM PST 24 |
Jan 10 12:47:18 PM PST 24 |
490914005 ps |
T386 |
/workspace/coverage/default/9.sram_ctrl_partial_access.3150997435 |
|
|
Jan 10 12:45:00 PM PST 24 |
Jan 10 12:46:28 PM PST 24 |
333410691 ps |
T387 |
/workspace/coverage/default/3.sram_ctrl_regwen.2954377830 |
|
|
Jan 10 12:44:47 PM PST 24 |
Jan 10 12:55:36 PM PST 24 |
7450366233 ps |
T388 |
/workspace/coverage/default/5.sram_ctrl_smoke.2814231476 |
|
|
Jan 10 12:45:00 PM PST 24 |
Jan 10 12:46:42 PM PST 24 |
1292589108 ps |
T389 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.3440184618 |
|
|
Jan 10 12:46:41 PM PST 24 |
Jan 10 12:52:59 PM PST 24 |
3273271485 ps |
T390 |
/workspace/coverage/default/46.sram_ctrl_executable.963467503 |
|
|
Jan 10 12:47:01 PM PST 24 |
Jan 10 01:17:06 PM PST 24 |
76469804643 ps |
T391 |
/workspace/coverage/default/24.sram_ctrl_partial_access.1064290961 |
|
|
Jan 10 12:45:56 PM PST 24 |
Jan 10 12:47:25 PM PST 24 |
160222275 ps |
T392 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.3860105236 |
|
|
Jan 10 12:46:34 PM PST 24 |
Jan 10 01:16:30 PM PST 24 |
837484138 ps |
T393 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2233075196 |
|
|
Jan 10 12:46:58 PM PST 24 |
Jan 10 01:00:28 PM PST 24 |
7450661071 ps |
T394 |
/workspace/coverage/default/42.sram_ctrl_smoke.3742247213 |
|
|
Jan 10 12:46:38 PM PST 24 |
Jan 10 12:48:06 PM PST 24 |
614925725 ps |
T395 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3520117693 |
|
|
Jan 10 12:46:51 PM PST 24 |
Jan 10 12:54:10 PM PST 24 |
58396529911 ps |
T396 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2143491108 |
|
|
Jan 10 12:46:13 PM PST 24 |
Jan 10 01:14:24 PM PST 24 |
554054414 ps |
T397 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2595076554 |
|
|
Jan 10 12:45:08 PM PST 24 |
Jan 10 12:46:50 PM PST 24 |
432244890 ps |
T398 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.877272571 |
|
|
Jan 10 12:44:38 PM PST 24 |
Jan 10 01:11:37 PM PST 24 |
14560596575 ps |
T399 |
/workspace/coverage/default/31.sram_ctrl_executable.863376003 |
|
|
Jan 10 12:46:42 PM PST 24 |
Jan 10 12:58:34 PM PST 24 |
10303488753 ps |
T400 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.3570639708 |
|
|
Jan 10 12:44:54 PM PST 24 |
Jan 10 12:46:39 PM PST 24 |
89735438 ps |
T401 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.761568956 |
|
|
Jan 10 12:44:36 PM PST 24 |
Jan 10 12:45:55 PM PST 24 |
27642387 ps |
T402 |
/workspace/coverage/default/30.sram_ctrl_smoke.50752689 |
|
|
Jan 10 12:46:16 PM PST 24 |
Jan 10 12:47:56 PM PST 24 |
1032387738 ps |
T403 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.3193676061 |
|
|
Jan 10 12:45:56 PM PST 24 |
Jan 10 12:59:37 PM PST 24 |
31777272054 ps |
T404 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.1485295896 |
|
|
Jan 10 12:46:49 PM PST 24 |
Jan 10 12:48:09 PM PST 24 |
411399591 ps |
T141 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.378050640 |
|
|
Jan 10 12:46:27 PM PST 24 |
Jan 10 12:53:10 PM PST 24 |
15062278935 ps |
T405 |
/workspace/coverage/default/34.sram_ctrl_executable.1427873694 |
|
|
Jan 10 12:46:25 PM PST 24 |
Jan 10 12:54:28 PM PST 24 |
1609764768 ps |
T406 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3530091145 |
|
|
Jan 10 12:47:04 PM PST 24 |
Jan 10 12:49:48 PM PST 24 |
921998333 ps |
T407 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2449789335 |
|
|
Jan 10 12:45:40 PM PST 24 |
Jan 10 12:48:06 PM PST 24 |
130220387 ps |
T408 |
/workspace/coverage/default/44.sram_ctrl_alert_test.2972865981 |
|
|
Jan 10 12:46:47 PM PST 24 |
Jan 10 12:48:12 PM PST 24 |
40016286 ps |
T409 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.600791747 |
|
|
Jan 10 12:46:31 PM PST 24 |
Jan 10 12:53:53 PM PST 24 |
7179747027 ps |
T410 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3363387104 |
|
|
Jan 10 12:44:50 PM PST 24 |
Jan 10 12:46:31 PM PST 24 |
95938856 ps |
T411 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.2167158949 |
|
|
Jan 10 12:45:54 PM PST 24 |
Jan 10 12:47:21 PM PST 24 |
518663487 ps |
T412 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.2611404681 |
|
|
Jan 10 12:46:19 PM PST 24 |
Jan 10 01:03:06 PM PST 24 |
12524100726 ps |
T413 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3930349644 |
|
|
Jan 10 12:44:54 PM PST 24 |
Jan 10 12:46:20 PM PST 24 |
1583178588 ps |
T414 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.1470180849 |
|
|
Jan 10 12:45:40 PM PST 24 |
Jan 10 12:47:30 PM PST 24 |
102461674 ps |
T415 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2132548133 |
|
|
Jan 10 12:45:11 PM PST 24 |
Jan 10 12:46:39 PM PST 24 |
155820369 ps |
T416 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.4101831729 |
|
|
Jan 10 12:47:12 PM PST 24 |
Jan 10 12:48:34 PM PST 24 |
301594115 ps |
T417 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.2586316715 |
|
|
Jan 10 12:47:04 PM PST 24 |
Jan 10 12:48:55 PM PST 24 |
371126059 ps |
T418 |
/workspace/coverage/default/43.sram_ctrl_stress_all.3344477946 |
|
|
Jan 10 12:46:49 PM PST 24 |
Jan 10 01:35:15 PM PST 24 |
39063004613 ps |
T419 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.500507069 |
|
|
Jan 10 12:44:57 PM PST 24 |
Jan 10 01:32:59 PM PST 24 |
4182486725 ps |
T420 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3158092657 |
|
|
Jan 10 12:44:59 PM PST 24 |
Jan 10 12:53:40 PM PST 24 |
1939782646 ps |
T421 |
/workspace/coverage/default/32.sram_ctrl_executable.95841922 |
|
|
Jan 10 12:46:20 PM PST 24 |
Jan 10 12:50:18 PM PST 24 |
597948168 ps |
T422 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.2695930529 |
|
|
Jan 10 12:44:41 PM PST 24 |
Jan 10 12:46:22 PM PST 24 |
322115207 ps |
T423 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.388595003 |
|
|
Jan 10 12:45:59 PM PST 24 |
Jan 10 12:53:06 PM PST 24 |
96838215468 ps |
T424 |
/workspace/coverage/default/31.sram_ctrl_regwen.1220474590 |
|
|
Jan 10 12:46:23 PM PST 24 |
Jan 10 01:02:07 PM PST 24 |
3002925738 ps |
T425 |
/workspace/coverage/default/17.sram_ctrl_smoke.3407051565 |
|
|
Jan 10 12:45:37 PM PST 24 |
Jan 10 12:47:01 PM PST 24 |
1332102889 ps |
T426 |
/workspace/coverage/default/3.sram_ctrl_stress_all.3063696008 |
|
|
Jan 10 12:45:01 PM PST 24 |
Jan 10 01:20:15 PM PST 24 |
185550942123 ps |
T427 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.270773844 |
|
|
Jan 10 12:44:49 PM PST 24 |
Jan 10 01:01:37 PM PST 24 |
58514233718 ps |
T428 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.1806414546 |
|
|
Jan 10 12:46:09 PM PST 24 |
Jan 10 12:47:37 PM PST 24 |
81312710 ps |
T429 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.2207546686 |
|
|
Jan 10 12:46:40 PM PST 24 |
Jan 10 12:48:17 PM PST 24 |
462988915 ps |
T430 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.4059132846 |
|
|
Jan 10 12:46:47 PM PST 24 |
Jan 10 01:43:23 PM PST 24 |
682405296 ps |
T431 |
/workspace/coverage/default/13.sram_ctrl_stress_all.4006633941 |
|
|
Jan 10 12:45:20 PM PST 24 |
Jan 10 01:07:54 PM PST 24 |
22439191509 ps |
T432 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3093649825 |
|
|
Jan 10 12:45:02 PM PST 24 |
Jan 10 12:46:29 PM PST 24 |
149017623 ps |
T433 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3779182174 |
|
|
Jan 10 12:44:58 PM PST 24 |
Jan 10 12:52:07 PM PST 24 |
3732301806 ps |
T434 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.735104979 |
|
|
Jan 10 12:46:47 PM PST 24 |
Jan 10 12:48:08 PM PST 24 |
316782400 ps |
T435 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.2482223953 |
|
|
Jan 10 12:46:48 PM PST 24 |
Jan 10 01:01:05 PM PST 24 |
20633492032 ps |
T436 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.2895948165 |
|
|
Jan 10 12:45:38 PM PST 24 |
Jan 10 12:51:12 PM PST 24 |
5394376882 ps |
T437 |
/workspace/coverage/default/48.sram_ctrl_executable.401270259 |
|
|
Jan 10 12:46:56 PM PST 24 |
Jan 10 12:53:53 PM PST 24 |
3075817012 ps |
T438 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1819345290 |
|
|
Jan 10 12:44:57 PM PST 24 |
Jan 10 12:47:25 PM PST 24 |
1031872970 ps |
T439 |
/workspace/coverage/default/32.sram_ctrl_partial_access.2818455319 |
|
|
Jan 10 12:46:32 PM PST 24 |
Jan 10 12:48:16 PM PST 24 |
3548207889 ps |
T440 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2028954484 |
|
|
Jan 10 12:44:46 PM PST 24 |
Jan 10 12:46:05 PM PST 24 |
224854080 ps |
T441 |
/workspace/coverage/default/22.sram_ctrl_smoke.3295148649 |
|
|
Jan 10 12:46:11 PM PST 24 |
Jan 10 12:47:43 PM PST 24 |
388383275 ps |
T442 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.2805445620 |
|
|
Jan 10 12:44:56 PM PST 24 |
Jan 10 12:50:58 PM PST 24 |
1772158385 ps |
T443 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.3119910275 |
|
|
Jan 10 12:46:35 PM PST 24 |
Jan 10 12:48:03 PM PST 24 |
49753575 ps |
T444 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.389811082 |
|
|
Jan 10 12:44:36 PM PST 24 |
Jan 10 12:48:49 PM PST 24 |
34933884818 ps |
T445 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.368956119 |
|
|
Jan 10 12:46:21 PM PST 24 |
Jan 10 12:52:27 PM PST 24 |
3095702564 ps |
T446 |
/workspace/coverage/default/41.sram_ctrl_regwen.1607266342 |
|
|
Jan 10 12:46:52 PM PST 24 |
Jan 10 12:51:18 PM PST 24 |
43147177941 ps |
T447 |
/workspace/coverage/default/45.sram_ctrl_smoke.1795695267 |
|
|
Jan 10 12:46:54 PM PST 24 |
Jan 10 12:48:25 PM PST 24 |
3135966238 ps |
T448 |
/workspace/coverage/default/29.sram_ctrl_alert_test.177552991 |
|
|
Jan 10 12:46:14 PM PST 24 |
Jan 10 12:47:33 PM PST 24 |
12919751 ps |
T449 |
/workspace/coverage/default/15.sram_ctrl_bijection.24781429 |
|
|
Jan 10 12:45:35 PM PST 24 |
Jan 10 12:47:09 PM PST 24 |
855064053 ps |
T450 |
/workspace/coverage/default/40.sram_ctrl_bijection.1802376959 |
|
|
Jan 10 12:46:31 PM PST 24 |
Jan 10 12:48:26 PM PST 24 |
479654477 ps |
T451 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3250135455 |
|
|
Jan 10 12:45:21 PM PST 24 |
Jan 10 12:46:45 PM PST 24 |
91730462 ps |
T452 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.3100749742 |
|
|
Jan 10 12:45:15 PM PST 24 |
Jan 10 12:46:52 PM PST 24 |
1683034187 ps |
T453 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1995268514 |
|
|
Jan 10 12:44:53 PM PST 24 |
Jan 10 01:04:40 PM PST 24 |
80952717104 ps |
T454 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.3873970178 |
|
|
Jan 10 12:46:17 PM PST 24 |
Jan 10 12:47:43 PM PST 24 |
86754922 ps |
T455 |
/workspace/coverage/default/2.sram_ctrl_bijection.3859752475 |
|
|
Jan 10 12:44:35 PM PST 24 |
Jan 10 12:46:44 PM PST 24 |
1819051604 ps |
T456 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.661007142 |
|
|
Jan 10 12:44:53 PM PST 24 |
Jan 10 12:46:45 PM PST 24 |
144506465 ps |
T457 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2384998604 |
|
|
Jan 10 12:44:54 PM PST 24 |
Jan 10 12:49:35 PM PST 24 |
2245766327 ps |
T458 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.1517733379 |
|
|
Jan 10 12:46:01 PM PST 24 |
Jan 10 01:16:59 PM PST 24 |
238704574647 ps |
T459 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.166776586 |
|
|
Jan 10 12:46:41 PM PST 24 |
Jan 10 12:59:17 PM PST 24 |
6161614132 ps |
T460 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.2020790322 |
|
|
Jan 10 12:45:53 PM PST 24 |
Jan 10 12:47:19 PM PST 24 |
31488000 ps |
T461 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.4113061242 |
|
|
Jan 10 01:49:05 PM PST 24 |
Jan 10 01:49:23 PM PST 24 |
526934588 ps |
T462 |
/workspace/coverage/default/30.sram_ctrl_stress_all.822938457 |
|
|
Jan 10 12:46:13 PM PST 24 |
Jan 10 01:04:18 PM PST 24 |
19015601072 ps |
T463 |
/workspace/coverage/default/15.sram_ctrl_stress_all.1787554894 |
|
|
Jan 10 12:45:41 PM PST 24 |
Jan 10 02:17:39 PM PST 24 |
166898344464 ps |
T464 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.1720622576 |
|
|
Jan 10 12:46:07 PM PST 24 |
Jan 10 12:47:32 PM PST 24 |
229262550 ps |
T465 |
/workspace/coverage/default/15.sram_ctrl_partial_access.1010259204 |
|
|
Jan 10 12:45:43 PM PST 24 |
Jan 10 12:47:15 PM PST 24 |
203298672 ps |
T466 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.1169758675 |
|
|
Jan 10 12:45:54 PM PST 24 |
Jan 10 12:47:19 PM PST 24 |
631097050 ps |
T467 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.2065706841 |
|
|
Jan 10 12:45:37 PM PST 24 |
Jan 10 12:47:04 PM PST 24 |
485444402 ps |
T468 |
/workspace/coverage/default/32.sram_ctrl_bijection.3553599230 |
|
|
Jan 10 12:46:27 PM PST 24 |
Jan 10 12:48:50 PM PST 24 |
1073892673 ps |
T469 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.3112458991 |
|
|
Jan 10 12:45:50 PM PST 24 |
Jan 10 01:59:43 PM PST 24 |
22600983641 ps |
T470 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3749247359 |
|
|
Jan 10 12:47:02 PM PST 24 |
Jan 10 01:09:11 PM PST 24 |
6647260603 ps |
T471 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.1659888145 |
|
|
Jan 10 12:46:14 PM PST 24 |
Jan 10 12:47:40 PM PST 24 |
275248033 ps |
T472 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.4040537292 |
|
|
Jan 10 12:44:43 PM PST 24 |
Jan 10 12:46:06 PM PST 24 |
459987399 ps |
T473 |
/workspace/coverage/default/21.sram_ctrl_smoke.3098864745 |
|
|
Jan 10 12:45:53 PM PST 24 |
Jan 10 12:47:29 PM PST 24 |
2287714361 ps |
T474 |
/workspace/coverage/default/37.sram_ctrl_bijection.4036239177 |
|
|
Jan 10 12:46:45 PM PST 24 |
Jan 10 12:48:50 PM PST 24 |
2172912419 ps |
T475 |
/workspace/coverage/default/49.sram_ctrl_executable.1810082887 |
|
|
Jan 10 12:47:09 PM PST 24 |
Jan 10 12:53:20 PM PST 24 |
3236993817 ps |
T476 |
/workspace/coverage/default/37.sram_ctrl_partial_access.458439022 |
|
|
Jan 10 12:46:38 PM PST 24 |
Jan 10 12:47:59 PM PST 24 |
50701236 ps |
T477 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.248807062 |
|
|
Jan 10 12:44:55 PM PST 24 |
Jan 10 12:46:26 PM PST 24 |
1849249736 ps |
T478 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1659721822 |
|
|
Jan 10 12:44:59 PM PST 24 |
Jan 10 12:46:23 PM PST 24 |
280728780 ps |
T479 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.420287889 |
|
|
Jan 10 12:46:06 PM PST 24 |
Jan 10 12:47:39 PM PST 24 |
409323443 ps |
T480 |
/workspace/coverage/default/4.sram_ctrl_regwen.2418988061 |
|
|
Jan 10 12:44:48 PM PST 24 |
Jan 10 12:48:34 PM PST 24 |
3580393481 ps |
T481 |
/workspace/coverage/default/8.sram_ctrl_executable.1240646179 |
|
|
Jan 10 12:45:02 PM PST 24 |
Jan 10 12:54:45 PM PST 24 |
19168306388 ps |
T482 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.367837064 |
|
|
Jan 10 12:46:23 PM PST 24 |
Jan 10 12:48:54 PM PST 24 |
981416481 ps |
T483 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.1804360195 |
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|
Jan 10 12:46:23 PM PST 24 |
Jan 10 12:52:12 PM PST 24 |
8212053409 ps |
T484 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.3607023867 |
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|
Jan 10 12:46:54 PM PST 24 |
Jan 10 12:48:20 PM PST 24 |
710994496 ps |
T485 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2968068191 |
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|
Jan 10 12:46:53 PM PST 24 |
Jan 10 12:53:24 PM PST 24 |
3204433276 ps |
T486 |
/workspace/coverage/default/30.sram_ctrl_regwen.3080089699 |
|
|
Jan 10 12:46:07 PM PST 24 |
Jan 10 01:04:07 PM PST 24 |
10522919659 ps |
T487 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.524331088 |
|
|
Jan 10 12:47:06 PM PST 24 |
Jan 10 12:48:31 PM PST 24 |
486303416 ps |
T488 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.146662955 |
|
|
Jan 10 12:45:56 PM PST 24 |
Jan 10 12:47:31 PM PST 24 |
760670985 ps |
T489 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.543797692 |
|
|
Jan 10 12:44:55 PM PST 24 |
Jan 10 01:20:33 PM PST 24 |
4465313719 ps |
T490 |
/workspace/coverage/default/0.sram_ctrl_smoke.282753137 |
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|
Jan 10 12:44:34 PM PST 24 |
Jan 10 12:47:25 PM PST 24 |
2509956906 ps |
T491 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.2615263841 |
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|
Jan 10 12:45:37 PM PST 24 |
Jan 10 12:46:57 PM PST 24 |
271381989 ps |
T492 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.2093898665 |
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|
Jan 10 12:46:08 PM PST 24 |
Jan 10 12:47:28 PM PST 24 |
32077749 ps |
T493 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.4256814081 |
|
|
Jan 10 12:44:53 PM PST 24 |
Jan 10 12:46:14 PM PST 24 |
142985892 ps |
T494 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2139048248 |
|
|
Jan 10 12:45:38 PM PST 24 |
Jan 10 01:20:40 PM PST 24 |
1584417583 ps |
T495 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.557598918 |
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|
Jan 10 12:46:18 PM PST 24 |
Jan 10 12:48:06 PM PST 24 |
388448047 ps |
T496 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.1251484119 |
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|
Jan 10 12:46:21 PM PST 24 |
Jan 10 12:47:40 PM PST 24 |
91768088 ps |
T497 |
/workspace/coverage/default/42.sram_ctrl_partial_access.1692398751 |
|
|
Jan 10 12:46:53 PM PST 24 |
Jan 10 12:49:18 PM PST 24 |
164982559 ps |
T498 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.383798071 |
|
|
Jan 10 12:46:14 PM PST 24 |
Jan 10 12:51:24 PM PST 24 |
20786098044 ps |
T499 |
/workspace/coverage/default/45.sram_ctrl_bijection.3790919900 |
|
|
Jan 10 12:46:49 PM PST 24 |
Jan 10 12:49:01 PM PST 24 |
13045647263 ps |
T500 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.2974940733 |
|
|
Jan 10 12:46:34 PM PST 24 |
Jan 10 12:47:56 PM PST 24 |
285957570 ps |
T501 |
/workspace/coverage/default/1.sram_ctrl_smoke.3959568375 |
|
|
Jan 10 12:44:41 PM PST 24 |
Jan 10 12:46:07 PM PST 24 |
525069896 ps |
T502 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.1981302832 |
|
|
Jan 10 12:46:16 PM PST 24 |
Jan 10 12:51:10 PM PST 24 |
6093447967 ps |
T503 |
/workspace/coverage/default/45.sram_ctrl_alert_test.1754634685 |
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|
Jan 10 12:46:51 PM PST 24 |
Jan 10 12:48:10 PM PST 24 |
30647334 ps |
T504 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.692956559 |
|
|
Jan 10 12:44:38 PM PST 24 |
Jan 10 12:47:37 PM PST 24 |
982993001 ps |
T29 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.2564353991 |
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|
Jan 10 12:44:44 PM PST 24 |
Jan 10 12:46:04 PM PST 24 |
475477848 ps |
T505 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2343680283 |
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|
Jan 10 12:45:08 PM PST 24 |
Jan 10 01:16:14 PM PST 24 |
5755962144 ps |