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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.65 100.00 98.13 100.00 100.00 99.71 99.70 100.00


Total test records in report: 1021
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T506 /workspace/coverage/default/41.sram_ctrl_max_throughput.1292200013 Jan 10 12:46:53 PM PST 24 Jan 10 12:49:22 PM PST 24 571571268 ps
T507 /workspace/coverage/default/33.sram_ctrl_smoke.1800812098 Jan 10 12:46:24 PM PST 24 Jan 10 12:48:16 PM PST 24 920439837 ps
T508 /workspace/coverage/default/22.sram_ctrl_executable.1766841794 Jan 10 12:46:14 PM PST 24 Jan 10 01:10:35 PM PST 24 19571750207 ps
T509 /workspace/coverage/default/19.sram_ctrl_ram_cfg.539583960 Jan 10 12:45:47 PM PST 24 Jan 10 12:47:07 PM PST 24 34756372 ps
T510 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.303855885 Jan 10 12:45:38 PM PST 24 Jan 10 12:47:03 PM PST 24 210733641 ps
T511 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.2218920056 Jan 10 12:46:16 PM PST 24 Jan 10 12:47:36 PM PST 24 86961377 ps
T512 /workspace/coverage/default/0.sram_ctrl_regwen.507831047 Jan 10 12:44:23 PM PST 24 Jan 10 01:02:36 PM PST 24 27160743691 ps
T513 /workspace/coverage/default/45.sram_ctrl_ram_cfg.2366900298 Jan 10 12:46:56 PM PST 24 Jan 10 12:48:15 PM PST 24 39085066 ps
T514 /workspace/coverage/default/34.sram_ctrl_bijection.2426896555 Jan 10 12:46:31 PM PST 24 Jan 10 12:48:22 PM PST 24 990014531 ps
T515 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.925678399 Jan 10 12:46:29 PM PST 24 Jan 10 12:49:37 PM PST 24 1633066125 ps
T516 /workspace/coverage/default/33.sram_ctrl_stress_all.1473745814 Jan 10 12:46:28 PM PST 24 Jan 10 12:49:09 PM PST 24 4886628143 ps
T517 /workspace/coverage/default/43.sram_ctrl_executable.376403848 Jan 10 12:46:56 PM PST 24 Jan 10 12:56:11 PM PST 24 6551740053 ps
T518 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.3288873851 Jan 10 12:46:22 PM PST 24 Jan 10 12:51:34 PM PST 24 5997947118 ps
T519 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.1505514624 Jan 10 12:46:05 PM PST 24 Jan 10 12:48:20 PM PST 24 278347943 ps
T520 /workspace/coverage/default/48.sram_ctrl_bijection.2845876426 Jan 10 12:47:07 PM PST 24 Jan 10 12:48:57 PM PST 24 2142290699 ps
T521 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3050144833 Jan 10 12:45:01 PM PST 24 Jan 10 12:52:43 PM PST 24 263642535 ps
T522 /workspace/coverage/default/6.sram_ctrl_executable.781868051 Jan 10 12:44:57 PM PST 24 Jan 10 01:03:24 PM PST 24 13261198804 ps
T523 /workspace/coverage/default/13.sram_ctrl_partial_access.1000591436 Jan 10 12:45:15 PM PST 24 Jan 10 12:46:49 PM PST 24 500277815 ps
T524 /workspace/coverage/default/3.sram_ctrl_multiple_keys.1252603886 Jan 10 12:44:51 PM PST 24 Jan 10 12:54:37 PM PST 24 21692417120 ps
T525 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.3458367544 Jan 10 12:44:36 PM PST 24 Jan 10 12:47:36 PM PST 24 3754579692 ps
T526 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.3993905138 Jan 10 12:45:41 PM PST 24 Jan 10 12:48:14 PM PST 24 3733320606 ps
T527 /workspace/coverage/default/3.sram_ctrl_mem_walk.1304076473 Jan 10 12:44:58 PM PST 24 Jan 10 12:46:29 PM PST 24 1846760655 ps
T528 /workspace/coverage/default/43.sram_ctrl_alert_test.1056482672 Jan 10 12:46:46 PM PST 24 Jan 10 12:48:06 PM PST 24 16552661 ps
T529 /workspace/coverage/default/40.sram_ctrl_lc_escalation.245574703 Jan 10 12:46:43 PM PST 24 Jan 10 12:48:08 PM PST 24 467617847 ps
T530 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.55235249 Jan 10 12:44:35 PM PST 24 Jan 10 12:46:01 PM PST 24 136314382 ps
T531 /workspace/coverage/default/2.sram_ctrl_max_throughput.1417619334 Jan 10 12:44:35 PM PST 24 Jan 10 12:47:02 PM PST 24 123798586 ps
T532 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.4158513170 Jan 10 12:46:35 PM PST 24 Jan 10 12:47:52 PM PST 24 512477803 ps
T533 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.817606620 Jan 10 12:46:31 PM PST 24 Jan 10 12:48:47 PM PST 24 129307735 ps
T534 /workspace/coverage/default/21.sram_ctrl_executable.2200516811 Jan 10 12:45:57 PM PST 24 Jan 10 01:03:58 PM PST 24 11910279473 ps
T535 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.1594309507 Jan 10 12:45:11 PM PST 24 Jan 10 12:48:35 PM PST 24 5039712048 ps
T536 /workspace/coverage/default/0.sram_ctrl_bijection.2625697901 Jan 10 12:44:31 PM PST 24 Jan 10 12:46:18 PM PST 24 2335290646 ps
T537 /workspace/coverage/default/42.sram_ctrl_multiple_keys.2629944839 Jan 10 12:46:47 PM PST 24 Jan 10 12:50:38 PM PST 24 2339939490 ps
T538 /workspace/coverage/default/21.sram_ctrl_alert_test.4235501410 Jan 10 12:45:59 PM PST 24 Jan 10 12:47:24 PM PST 24 13242857 ps
T539 /workspace/coverage/default/41.sram_ctrl_alert_test.2862351132 Jan 10 12:46:38 PM PST 24 Jan 10 12:47:53 PM PST 24 43774748 ps
T540 /workspace/coverage/default/8.sram_ctrl_multiple_keys.2164668695 Jan 10 12:45:11 PM PST 24 Jan 10 01:02:06 PM PST 24 5953092087 ps
T541 /workspace/coverage/default/42.sram_ctrl_bijection.2780419215 Jan 10 12:46:47 PM PST 24 Jan 10 12:48:50 PM PST 24 1966935897 ps
T542 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2989861872 Jan 10 12:45:10 PM PST 24 Jan 10 02:24:47 PM PST 24 6279132976 ps
T543 /workspace/coverage/default/30.sram_ctrl_partial_access.1515448206 Jan 10 12:46:13 PM PST 24 Jan 10 12:47:54 PM PST 24 4820382186 ps
T544 /workspace/coverage/default/32.sram_ctrl_regwen.1744146767 Jan 10 12:46:26 PM PST 24 Jan 10 12:56:51 PM PST 24 7933082454 ps
T545 /workspace/coverage/default/26.sram_ctrl_bijection.3850476219 Jan 10 12:46:10 PM PST 24 Jan 10 12:48:09 PM PST 24 2503910661 ps
T546 /workspace/coverage/default/30.sram_ctrl_multiple_keys.2100646685 Jan 10 12:46:12 PM PST 24 Jan 10 01:03:59 PM PST 24 3488668422 ps
T547 /workspace/coverage/default/20.sram_ctrl_stress_all.1997121171 Jan 10 12:45:59 PM PST 24 Jan 10 02:08:04 PM PST 24 278640595808 ps
T548 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.963789868 Jan 10 12:46:21 PM PST 24 Jan 10 12:53:19 PM PST 24 3560660571 ps
T549 /workspace/coverage/default/5.sram_ctrl_regwen.4267261306 Jan 10 12:45:01 PM PST 24 Jan 10 12:47:50 PM PST 24 2660576632 ps
T550 /workspace/coverage/default/4.sram_ctrl_alert_test.625866470 Jan 10 12:44:50 PM PST 24 Jan 10 12:46:10 PM PST 24 18873595 ps
T551 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.1481268003 Jan 10 12:47:11 PM PST 24 Jan 10 12:59:18 PM PST 24 12714283650 ps
T552 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.4205786638 Jan 10 12:45:36 PM PST 24 Jan 10 12:46:58 PM PST 24 173854798 ps
T553 /workspace/coverage/default/46.sram_ctrl_partial_access.682325320 Jan 10 12:46:50 PM PST 24 Jan 10 12:48:21 PM PST 24 2177645735 ps
T554 /workspace/coverage/default/21.sram_ctrl_regwen.591103161 Jan 10 12:46:10 PM PST 24 Jan 10 12:56:53 PM PST 24 17031681880 ps
T555 /workspace/coverage/default/14.sram_ctrl_regwen.1686195291 Jan 10 12:45:19 PM PST 24 Jan 10 01:02:16 PM PST 24 58855356370 ps
T556 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3108457297 Jan 10 12:45:18 PM PST 24 Jan 10 01:13:44 PM PST 24 343484770 ps
T557 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.4197511859 Jan 10 12:46:22 PM PST 24 Jan 10 12:54:55 PM PST 24 1860518615 ps
T558 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1836487511 Jan 10 12:45:07 PM PST 24 Jan 10 12:50:20 PM PST 24 56479233068 ps
T559 /workspace/coverage/default/28.sram_ctrl_executable.955689743 Jan 10 12:46:13 PM PST 24 Jan 10 12:56:16 PM PST 24 3084194709 ps
T560 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.805538842 Jan 10 12:46:57 PM PST 24 Jan 10 12:48:19 PM PST 24 81785646 ps
T561 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3939426845 Jan 10 12:46:12 PM PST 24 Jan 10 12:48:34 PM PST 24 554462203 ps
T562 /workspace/coverage/default/8.sram_ctrl_smoke.2022778438 Jan 10 12:44:56 PM PST 24 Jan 10 12:47:23 PM PST 24 257138223 ps
T563 /workspace/coverage/default/15.sram_ctrl_alert_test.1958829979 Jan 10 12:45:39 PM PST 24 Jan 10 12:46:59 PM PST 24 16706019 ps
T564 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.804603736 Jan 10 01:31:26 PM PST 24 Jan 10 01:31:32 PM PST 24 1271268226 ps
T565 /workspace/coverage/default/48.sram_ctrl_lc_escalation.2507843435 Jan 10 12:47:11 PM PST 24 Jan 10 12:48:31 PM PST 24 225277843 ps
T566 /workspace/coverage/default/11.sram_ctrl_multiple_keys.1240564147 Jan 10 12:45:15 PM PST 24 Jan 10 12:49:10 PM PST 24 2612592492 ps
T567 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.4155177339 Jan 10 12:46:07 PM PST 24 Jan 10 12:52:43 PM PST 24 6404537588 ps
T568 /workspace/coverage/default/49.sram_ctrl_alert_test.1404728833 Jan 10 12:47:09 PM PST 24 Jan 10 12:48:27 PM PST 24 43350445 ps
T569 /workspace/coverage/default/29.sram_ctrl_executable.2995541253 Jan 10 12:46:13 PM PST 24 Jan 10 12:58:25 PM PST 24 2901959863 ps
T570 /workspace/coverage/default/12.sram_ctrl_ram_cfg.828135365 Jan 10 12:45:18 PM PST 24 Jan 10 12:46:49 PM PST 24 33506195 ps
T571 /workspace/coverage/default/8.sram_ctrl_ram_cfg.2604348904 Jan 10 12:45:01 PM PST 24 Jan 10 12:46:24 PM PST 24 110414529 ps
T572 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1206469203 Jan 10 12:45:18 PM PST 24 Jan 10 12:46:45 PM PST 24 38337594 ps
T573 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.1383846832 Jan 10 12:46:19 PM PST 24 Jan 10 01:19:48 PM PST 24 792307400 ps
T574 /workspace/coverage/default/31.sram_ctrl_multiple_keys.3455680176 Jan 10 12:46:13 PM PST 24 Jan 10 01:07:53 PM PST 24 7956895837 ps
T575 /workspace/coverage/default/45.sram_ctrl_mem_walk.605130394 Jan 10 12:46:58 PM PST 24 Jan 10 12:48:25 PM PST 24 689118545 ps
T576 /workspace/coverage/default/41.sram_ctrl_stress_all.3130559652 Jan 10 12:46:54 PM PST 24 Jan 10 01:33:28 PM PST 24 31545834713 ps
T577 /workspace/coverage/default/12.sram_ctrl_regwen.849606148 Jan 10 12:45:17 PM PST 24 Jan 10 12:58:19 PM PST 24 30858496419 ps
T578 /workspace/coverage/default/33.sram_ctrl_mem_walk.1897462046 Jan 10 12:46:19 PM PST 24 Jan 10 12:47:46 PM PST 24 4318100834 ps
T579 /workspace/coverage/default/49.sram_ctrl_mem_walk.4131498955 Jan 10 12:47:06 PM PST 24 Jan 10 12:48:33 PM PST 24 2214292346 ps
T580 /workspace/coverage/default/49.sram_ctrl_partial_access.2369175869 Jan 10 12:47:07 PM PST 24 Jan 10 12:48:41 PM PST 24 1344448159 ps
T581 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.471257373 Jan 10 12:46:16 PM PST 24 Jan 10 12:54:14 PM PST 24 30984691184 ps
T582 /workspace/coverage/default/23.sram_ctrl_bijection.1779702010 Jan 10 12:45:56 PM PST 24 Jan 10 12:47:49 PM PST 24 4302933396 ps
T583 /workspace/coverage/default/25.sram_ctrl_mem_walk.2247592611 Jan 10 12:46:02 PM PST 24 Jan 10 12:47:39 PM PST 24 565766110 ps
T584 /workspace/coverage/default/36.sram_ctrl_regwen.2256773690 Jan 10 12:46:30 PM PST 24 Jan 10 12:55:31 PM PST 24 7641885084 ps
T585 /workspace/coverage/default/44.sram_ctrl_mem_walk.2409825622 Jan 10 12:46:52 PM PST 24 Jan 10 12:48:22 PM PST 24 1367659768 ps
T586 /workspace/coverage/default/42.sram_ctrl_alert_test.3205026817 Jan 10 12:46:46 PM PST 24 Jan 10 12:48:09 PM PST 24 20850289 ps
T587 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.472903477 Jan 10 12:45:52 PM PST 24 Jan 10 12:47:16 PM PST 24 529563213 ps
T588 /workspace/coverage/default/4.sram_ctrl_executable.3605936140 Jan 10 12:44:48 PM PST 24 Jan 10 01:01:02 PM PST 24 12715802321 ps
T589 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.1483675143 Jan 10 12:47:09 PM PST 24 Jan 10 12:48:31 PM PST 24 170907861 ps
T590 /workspace/coverage/default/2.sram_ctrl_lc_escalation.1999810153 Jan 10 12:44:39 PM PST 24 Jan 10 12:46:00 PM PST 24 443673813 ps
T591 /workspace/coverage/default/13.sram_ctrl_multiple_keys.731115823 Jan 10 12:45:17 PM PST 24 Jan 10 01:01:50 PM PST 24 12329999105 ps
T592 /workspace/coverage/default/28.sram_ctrl_mem_walk.4042946740 Jan 10 12:46:11 PM PST 24 Jan 10 12:47:34 PM PST 24 142295807 ps
T593 /workspace/coverage/default/6.sram_ctrl_bijection.1282814244 Jan 10 12:45:04 PM PST 24 Jan 10 12:47:07 PM PST 24 5431123392 ps
T594 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.2010983648 Jan 10 12:46:47 PM PST 24 Jan 10 12:48:44 PM PST 24 456939801 ps
T595 /workspace/coverage/default/37.sram_ctrl_multiple_keys.105355410 Jan 10 12:46:28 PM PST 24 Jan 10 12:48:13 PM PST 24 772081401 ps
T596 /workspace/coverage/default/23.sram_ctrl_max_throughput.2136625375 Jan 10 12:46:08 PM PST 24 Jan 10 12:48:18 PM PST 24 158010910 ps
T597 /workspace/coverage/default/18.sram_ctrl_multiple_keys.2528980934 Jan 10 12:45:40 PM PST 24 Jan 10 12:53:06 PM PST 24 6599972807 ps
T598 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.4198413672 Jan 10 12:46:45 PM PST 24 Jan 10 01:25:21 PM PST 24 2283140024 ps
T599 /workspace/coverage/default/12.sram_ctrl_lc_escalation.2972449281 Jan 10 12:45:23 PM PST 24 Jan 10 12:46:50 PM PST 24 486535131 ps
T600 /workspace/coverage/default/28.sram_ctrl_max_throughput.274694620 Jan 10 12:46:01 PM PST 24 Jan 10 12:47:27 PM PST 24 135273381 ps
T601 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.2427419985 Jan 10 12:45:04 PM PST 24 Jan 10 01:19:09 PM PST 24 1657207368 ps
T97 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.4109808879 Jan 10 12:46:55 PM PST 24 Jan 10 12:48:20 PM PST 24 64341888 ps
T602 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2335653014 Jan 10 12:46:10 PM PST 24 Jan 10 12:48:26 PM PST 24 134997115 ps
T603 /workspace/coverage/default/25.sram_ctrl_executable.1266114773 Jan 10 12:46:13 PM PST 24 Jan 10 01:11:43 PM PST 24 53893555429 ps
T604 /workspace/coverage/default/11.sram_ctrl_partial_access.1051613940 Jan 10 12:45:06 PM PST 24 Jan 10 12:46:40 PM PST 24 249444348 ps
T605 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.202079082 Jan 10 12:46:12 PM PST 24 Jan 10 12:53:40 PM PST 24 32968065805 ps
T606 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2606906511 Jan 10 12:44:56 PM PST 24 Jan 10 12:46:27 PM PST 24 434878672 ps
T607 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1234871542 Jan 10 12:45:21 PM PST 24 Jan 10 12:47:15 PM PST 24 794203301 ps
T608 /workspace/coverage/default/39.sram_ctrl_multiple_keys.4048626899 Jan 10 12:46:32 PM PST 24 Jan 10 12:48:42 PM PST 24 1964199289 ps
T609 /workspace/coverage/default/33.sram_ctrl_lc_escalation.3161208716 Jan 10 12:46:18 PM PST 24 Jan 10 12:47:50 PM PST 24 528044744 ps
T610 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.4147004636 Jan 10 12:45:50 PM PST 24 Jan 10 12:51:27 PM PST 24 9879322864 ps
T611 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1213220785 Jan 10 12:45:55 PM PST 24 Jan 10 01:24:40 PM PST 24 2615596656 ps
T612 /workspace/coverage/default/18.sram_ctrl_smoke.3137675807 Jan 10 12:45:43 PM PST 24 Jan 10 12:47:13 PM PST 24 670706181 ps
T613 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.4227984145 Jan 10 12:47:03 PM PST 24 Jan 10 01:41:54 PM PST 24 1353052500 ps
T614 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.3613407353 Jan 10 12:46:27 PM PST 24 Jan 10 12:47:48 PM PST 24 46722860 ps
T615 /workspace/coverage/default/21.sram_ctrl_mem_walk.2053839893 Jan 10 12:46:06 PM PST 24 Jan 10 12:47:33 PM PST 24 347450719 ps
T616 /workspace/coverage/default/18.sram_ctrl_executable.1908657737 Jan 10 12:45:41 PM PST 24 Jan 10 01:03:25 PM PST 24 11915812997 ps
T617 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2749781506 Jan 10 12:45:38 PM PST 24 Jan 10 12:47:00 PM PST 24 83968056 ps
T618 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1585256269 Jan 10 12:46:54 PM PST 24 Jan 10 01:37:49 PM PST 24 7013313278 ps
T619 /workspace/coverage/default/20.sram_ctrl_partial_access.1357113293 Jan 10 12:46:00 PM PST 24 Jan 10 12:47:25 PM PST 24 217001557 ps
T620 /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.1932803054 Jan 10 12:46:32 PM PST 24 Jan 10 12:48:50 PM PST 24 318222254 ps
T621 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.1637189593 Jan 10 12:45:56 PM PST 24 Jan 10 12:47:24 PM PST 24 51168770 ps
T622 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.3593205748 Jan 10 12:46:05 PM PST 24 Jan 10 01:06:25 PM PST 24 15378882091 ps
T623 /workspace/coverage/default/24.sram_ctrl_alert_test.3604743821 Jan 10 12:46:14 PM PST 24 Jan 10 12:47:33 PM PST 24 13877765 ps
T624 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.4225687096 Jan 10 12:44:59 PM PST 24 Jan 10 12:51:03 PM PST 24 6264071283 ps
T625 /workspace/coverage/default/26.sram_ctrl_max_throughput.1256607082 Jan 10 12:46:12 PM PST 24 Jan 10 12:47:56 PM PST 24 127981453 ps
T626 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.4109400591 Jan 10 12:47:09 PM PST 24 Jan 10 12:53:36 PM PST 24 9468626619 ps
T627 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.2317296534 Jan 10 12:45:52 PM PST 24 Jan 10 12:47:18 PM PST 24 92578982 ps
T628 /workspace/coverage/default/19.sram_ctrl_lc_escalation.3204298832 Jan 10 12:45:52 PM PST 24 Jan 10 12:47:22 PM PST 24 1068055879 ps
T629 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2266992230 Jan 10 12:45:51 PM PST 24 Jan 10 12:52:37 PM PST 24 12367072168 ps
T630 /workspace/coverage/default/10.sram_ctrl_stress_all.3454482536 Jan 10 12:45:08 PM PST 24 Jan 10 01:42:50 PM PST 24 33443701272 ps
T631 /workspace/coverage/default/9.sram_ctrl_multiple_keys.3579264739 Jan 10 12:45:03 PM PST 24 Jan 10 01:09:08 PM PST 24 214572569873 ps
T632 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.988544887 Jan 10 12:45:04 PM PST 24 Jan 10 12:51:52 PM PST 24 8765653180 ps
T633 /workspace/coverage/default/10.sram_ctrl_alert_test.3584117031 Jan 10 12:45:07 PM PST 24 Jan 10 12:46:34 PM PST 24 13169548 ps
T634 /workspace/coverage/default/25.sram_ctrl_lc_escalation.87778230 Jan 10 12:46:13 PM PST 24 Jan 10 12:47:43 PM PST 24 9565901668 ps
T635 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.658021312 Jan 10 12:45:53 PM PST 24 Jan 10 12:52:42 PM PST 24 4768171369 ps
T636 /workspace/coverage/default/47.sram_ctrl_multiple_keys.264963750 Jan 10 12:46:59 PM PST 24 Jan 10 12:55:53 PM PST 24 9449607754 ps
T637 /workspace/coverage/default/0.sram_ctrl_executable.3137962186 Jan 10 12:44:31 PM PST 24 Jan 10 01:01:57 PM PST 24 3154788602 ps
T638 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.400146297 Jan 10 12:46:36 PM PST 24 Jan 10 12:53:42 PM PST 24 20638418155 ps
T639 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.3171389242 Jan 10 12:44:48 PM PST 24 Jan 10 12:51:26 PM PST 24 8078382323 ps
T640 /workspace/coverage/default/42.sram_ctrl_max_throughput.1337006250 Jan 10 12:46:56 PM PST 24 Jan 10 12:49:55 PM PST 24 132549523 ps
T641 /workspace/coverage/default/15.sram_ctrl_smoke.706511687 Jan 10 12:45:38 PM PST 24 Jan 10 12:47:56 PM PST 24 4406559648 ps
T642 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.3001643819 Jan 10 12:45:40 PM PST 24 Jan 10 12:53:30 PM PST 24 11388335331 ps
T643 /workspace/coverage/default/3.sram_ctrl_smoke.2277514132 Jan 10 12:44:50 PM PST 24 Jan 10 12:46:55 PM PST 24 882059891 ps
T644 /workspace/coverage/default/4.sram_ctrl_multiple_keys.4214179576 Jan 10 12:44:48 PM PST 24 Jan 10 12:54:20 PM PST 24 15693603827 ps
T645 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1696441550 Jan 10 12:46:54 PM PST 24 Jan 10 12:48:20 PM PST 24 63221523 ps
T646 /workspace/coverage/default/16.sram_ctrl_smoke.3386163319 Jan 10 12:45:37 PM PST 24 Jan 10 12:47:04 PM PST 24 166033242 ps
T647 /workspace/coverage/default/38.sram_ctrl_ram_cfg.464025552 Jan 10 12:47:12 PM PST 24 Jan 10 12:48:32 PM PST 24 108791461 ps
T648 /workspace/coverage/default/19.sram_ctrl_bijection.3002773751 Jan 10 12:45:55 PM PST 24 Jan 10 12:48:21 PM PST 24 4626235338 ps
T649 /workspace/coverage/default/19.sram_ctrl_executable.1611096562 Jan 10 12:45:53 PM PST 24 Jan 10 12:52:51 PM PST 24 11552328462 ps
T650 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.2985235114 Jan 10 12:45:07 PM PST 24 Jan 10 12:52:07 PM PST 24 28584222165 ps
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T731 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.2739752236 Jan 10 12:45:53 PM PST 24 Jan 10 12:47:28 PM PST 24 97488706 ps
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T741 /workspace/coverage/default/8.sram_ctrl_regwen.1750943697 Jan 10 12:45:07 PM PST 24 Jan 10 12:58:59 PM PST 24 3400091145 ps
T742 /workspace/coverage/default/3.sram_ctrl_lc_escalation.56111518 Jan 10 12:44:51 PM PST 24 Jan 10 12:46:17 PM PST 24 1269102085 ps
T743 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2260680591 Jan 10 12:46:25 PM PST 24 Jan 10 12:51:16 PM PST 24 28392558533 ps
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T745 /workspace/coverage/default/48.sram_ctrl_stress_pipeline.3475053239 Jan 10 12:47:13 PM PST 24 Jan 10 12:51:41 PM PST 24 2064666776 ps
T746 /workspace/coverage/default/16.sram_ctrl_executable.2258454856 Jan 10 12:45:41 PM PST 24 Jan 10 01:00:58 PM PST 24 6641938732 ps
T747 /workspace/coverage/default/28.sram_ctrl_alert_test.3231375881 Jan 10 12:46:24 PM PST 24 Jan 10 12:47:41 PM PST 24 12826186 ps
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T748 /workspace/coverage/default/44.sram_ctrl_max_throughput.4176115157 Jan 10 12:46:37 PM PST 24 Jan 10 12:49:25 PM PST 24 291133863 ps
T749 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1363574907 Jan 10 12:46:58 PM PST 24 Jan 10 12:53:31 PM PST 24 13036017611 ps
T750 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.989846652 Jan 10 12:44:40 PM PST 24 Jan 10 12:51:55 PM PST 24 3510683850 ps
T751 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2622654023 Jan 10 12:44:53 PM PST 24 Jan 10 01:37:45 PM PST 24 1161194779 ps
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T753 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.1078797542 Jan 10 12:46:06 PM PST 24 Jan 10 12:52:15 PM PST 24 2983973241 ps
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