T753 |
/workspace/coverage/default/43.sram_ctrl_regwen.2380333041 |
|
|
Feb 04 03:17:21 PM PST 24 |
Feb 04 03:43:27 PM PST 24 |
19145365964 ps |
T754 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.1127243006 |
|
|
Feb 04 03:10:35 PM PST 24 |
Feb 04 03:12:46 PM PST 24 |
546495780 ps |
T755 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.192136683 |
|
|
Feb 04 03:13:16 PM PST 24 |
Feb 04 03:16:52 PM PST 24 |
2194713535 ps |
T756 |
/workspace/coverage/default/35.sram_ctrl_partial_access.580429630 |
|
|
Feb 04 03:14:57 PM PST 24 |
Feb 04 03:15:12 PM PST 24 |
489341132 ps |
T757 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1326489640 |
|
|
Feb 04 03:03:50 PM PST 24 |
Feb 04 03:05:57 PM PST 24 |
10896007679 ps |
T758 |
/workspace/coverage/default/26.sram_ctrl_stress_all.1692179462 |
|
|
Feb 04 03:12:25 PM PST 24 |
Feb 04 04:16:10 PM PST 24 |
33421734726 ps |
T759 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2763005995 |
|
|
Feb 04 03:06:27 PM PST 24 |
Feb 04 03:09:00 PM PST 24 |
360058609 ps |
T760 |
/workspace/coverage/default/39.sram_ctrl_smoke.2161706720 |
|
|
Feb 04 03:15:50 PM PST 24 |
Feb 04 03:16:08 PM PST 24 |
231205485 ps |
T761 |
/workspace/coverage/default/18.sram_ctrl_partial_access.312442682 |
|
|
Feb 04 03:09:16 PM PST 24 |
Feb 04 03:09:54 PM PST 24 |
363936639 ps |
T762 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.2046858048 |
|
|
Feb 04 03:10:55 PM PST 24 |
Feb 04 03:11:01 PM PST 24 |
65184810 ps |
T763 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.126748443 |
|
|
Feb 04 03:01:28 PM PST 24 |
Feb 04 03:01:36 PM PST 24 |
64919247 ps |
T764 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.1715013019 |
|
|
Feb 04 03:10:33 PM PST 24 |
Feb 04 03:10:41 PM PST 24 |
1780027310 ps |
T765 |
/workspace/coverage/default/35.sram_ctrl_stress_all.922740840 |
|
|
Feb 04 03:15:02 PM PST 24 |
Feb 04 04:12:02 PM PST 24 |
59424708635 ps |
T766 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.795353809 |
|
|
Feb 04 03:04:02 PM PST 24 |
Feb 04 03:04:10 PM PST 24 |
81157776 ps |
T767 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.420758877 |
|
|
Feb 04 03:09:09 PM PST 24 |
Feb 04 03:25:15 PM PST 24 |
4761775996 ps |
T768 |
/workspace/coverage/default/3.sram_ctrl_regwen.3986404553 |
|
|
Feb 04 03:03:09 PM PST 24 |
Feb 04 03:26:21 PM PST 24 |
13583542663 ps |
T769 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.3012959837 |
|
|
Feb 04 03:16:35 PM PST 24 |
Feb 04 03:16:40 PM PST 24 |
92440825 ps |
T770 |
/workspace/coverage/default/8.sram_ctrl_executable.3558377479 |
|
|
Feb 04 03:05:40 PM PST 24 |
Feb 04 03:10:11 PM PST 24 |
22897869828 ps |
T771 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.1396732146 |
|
|
Feb 04 03:11:56 PM PST 24 |
Feb 04 03:45:40 PM PST 24 |
561729079 ps |
T772 |
/workspace/coverage/default/7.sram_ctrl_stress_all.444966616 |
|
|
Feb 04 03:05:33 PM PST 24 |
Feb 04 03:49:32 PM PST 24 |
22156549621 ps |
T773 |
/workspace/coverage/default/1.sram_ctrl_regwen.2350900867 |
|
|
Feb 04 03:02:02 PM PST 24 |
Feb 04 03:11:59 PM PST 24 |
25485534090 ps |
T774 |
/workspace/coverage/default/15.sram_ctrl_bijection.1718006144 |
|
|
Feb 04 03:08:07 PM PST 24 |
Feb 04 03:08:41 PM PST 24 |
2361589494 ps |
T775 |
/workspace/coverage/default/10.sram_ctrl_smoke.968282570 |
|
|
Feb 04 03:06:18 PM PST 24 |
Feb 04 03:06:27 PM PST 24 |
1427192328 ps |
T776 |
/workspace/coverage/default/49.sram_ctrl_stress_all.3848009146 |
|
|
Feb 04 03:19:36 PM PST 24 |
Feb 04 03:50:41 PM PST 24 |
40835754863 ps |
T777 |
/workspace/coverage/default/16.sram_ctrl_regwen.3182858530 |
|
|
Feb 04 03:08:55 PM PST 24 |
Feb 04 03:26:03 PM PST 24 |
11768312516 ps |
T778 |
/workspace/coverage/default/49.sram_ctrl_bijection.2945609644 |
|
|
Feb 04 03:19:02 PM PST 24 |
Feb 04 03:20:00 PM PST 24 |
14539788641 ps |
T779 |
/workspace/coverage/default/11.sram_ctrl_alert_test.3272802903 |
|
|
Feb 04 03:07:02 PM PST 24 |
Feb 04 03:07:09 PM PST 24 |
48154610 ps |
T780 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1857873131 |
|
|
Feb 04 03:07:04 PM PST 24 |
Feb 04 03:14:37 PM PST 24 |
20586141652 ps |
T781 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.3762338324 |
|
|
Feb 04 03:08:43 PM PST 24 |
Feb 04 03:08:52 PM PST 24 |
266715496 ps |
T782 |
/workspace/coverage/default/29.sram_ctrl_stress_all.732640625 |
|
|
Feb 04 03:13:19 PM PST 24 |
Feb 04 03:37:18 PM PST 24 |
23343398726 ps |
T783 |
/workspace/coverage/default/12.sram_ctrl_executable.1450109096 |
|
|
Feb 04 03:07:12 PM PST 24 |
Feb 04 03:28:53 PM PST 24 |
19274713432 ps |
T784 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2540374988 |
|
|
Feb 04 03:03:27 PM PST 24 |
Feb 04 03:10:22 PM PST 24 |
5911459376 ps |
T785 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1296338845 |
|
|
Feb 04 03:06:20 PM PST 24 |
Feb 04 03:06:26 PM PST 24 |
24337499 ps |
T786 |
/workspace/coverage/default/36.sram_ctrl_stress_all.1610111361 |
|
|
Feb 04 03:15:32 PM PST 24 |
Feb 04 03:46:17 PM PST 24 |
105550045240 ps |
T787 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3174147027 |
|
|
Feb 04 03:17:53 PM PST 24 |
Feb 04 03:25:48 PM PST 24 |
92037977434 ps |
T788 |
/workspace/coverage/default/45.sram_ctrl_alert_test.3276661364 |
|
|
Feb 04 03:18:07 PM PST 24 |
Feb 04 03:18:10 PM PST 24 |
17448482 ps |
T789 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.80479839 |
|
|
Feb 04 03:18:37 PM PST 24 |
Feb 04 03:48:29 PM PST 24 |
48500777276 ps |
T790 |
/workspace/coverage/default/3.sram_ctrl_stress_all.201982413 |
|
|
Feb 04 03:03:07 PM PST 24 |
Feb 04 04:24:58 PM PST 24 |
146854447698 ps |
T791 |
/workspace/coverage/default/15.sram_ctrl_partial_access.3130002779 |
|
|
Feb 04 03:08:10 PM PST 24 |
Feb 04 03:09:03 PM PST 24 |
394457673 ps |
T792 |
/workspace/coverage/default/25.sram_ctrl_partial_access.197216310 |
|
|
Feb 04 03:11:58 PM PST 24 |
Feb 04 03:14:11 PM PST 24 |
9620643244 ps |
T793 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.1494701649 |
|
|
Feb 04 03:09:25 PM PST 24 |
Feb 04 03:35:41 PM PST 24 |
7694523683 ps |
T794 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.2347180413 |
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|
Feb 04 03:15:50 PM PST 24 |
Feb 04 03:15:52 PM PST 24 |
51457219 ps |
T795 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.655389730 |
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|
Feb 04 03:03:04 PM PST 24 |
Feb 04 03:03:11 PM PST 24 |
64899323 ps |
T796 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.3979938367 |
|
|
Feb 04 03:12:57 PM PST 24 |
Feb 04 03:12:59 PM PST 24 |
33492833 ps |
T797 |
/workspace/coverage/default/2.sram_ctrl_alert_test.2378243338 |
|
|
Feb 04 03:02:51 PM PST 24 |
Feb 04 03:02:54 PM PST 24 |
17874943 ps |
T798 |
/workspace/coverage/default/43.sram_ctrl_bijection.3715322585 |
|
|
Feb 04 03:17:13 PM PST 24 |
Feb 04 03:18:10 PM PST 24 |
1678248557 ps |
T799 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.2726286697 |
|
|
Feb 04 03:12:56 PM PST 24 |
Feb 04 03:27:51 PM PST 24 |
4365770274 ps |
T800 |
/workspace/coverage/default/16.sram_ctrl_partial_access.624044048 |
|
|
Feb 04 03:08:30 PM PST 24 |
Feb 04 03:09:59 PM PST 24 |
162096519 ps |
T801 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.4212632249 |
|
|
Feb 04 03:14:58 PM PST 24 |
Feb 04 03:17:37 PM PST 24 |
1639007541 ps |
T802 |
/workspace/coverage/default/11.sram_ctrl_partial_access.1407550350 |
|
|
Feb 04 03:06:49 PM PST 24 |
Feb 04 03:07:04 PM PST 24 |
3176133775 ps |
T803 |
/workspace/coverage/default/44.sram_ctrl_executable.3265772685 |
|
|
Feb 04 03:17:59 PM PST 24 |
Feb 04 03:28:42 PM PST 24 |
12210803429 ps |
T804 |
/workspace/coverage/default/27.sram_ctrl_smoke.971149642 |
|
|
Feb 04 03:12:26 PM PST 24 |
Feb 04 03:12:44 PM PST 24 |
4161118148 ps |
T805 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3018959439 |
|
|
Feb 04 03:17:33 PM PST 24 |
Feb 04 04:04:08 PM PST 24 |
5506418207 ps |
T806 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.2276387989 |
|
|
Feb 04 03:13:29 PM PST 24 |
Feb 04 03:14:21 PM PST 24 |
104372484 ps |
T807 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3309562466 |
|
|
Feb 04 03:04:02 PM PST 24 |
Feb 04 03:04:09 PM PST 24 |
39440774 ps |
T808 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2998754173 |
|
|
Feb 04 03:15:38 PM PST 24 |
Feb 04 03:18:41 PM PST 24 |
34083331202 ps |
T809 |
/workspace/coverage/default/14.sram_ctrl_alert_test.3361214987 |
|
|
Feb 04 03:08:15 PM PST 24 |
Feb 04 03:08:19 PM PST 24 |
13856022 ps |
T810 |
/workspace/coverage/default/17.sram_ctrl_regwen.3134608880 |
|
|
Feb 04 03:09:08 PM PST 24 |
Feb 04 03:15:46 PM PST 24 |
3663813214 ps |
T811 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.811642996 |
|
|
Feb 04 03:16:16 PM PST 24 |
Feb 04 03:49:54 PM PST 24 |
22639144659 ps |
T812 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1155385489 |
|
|
Feb 04 03:19:04 PM PST 24 |
Feb 04 03:19:15 PM PST 24 |
1610504802 ps |
T813 |
/workspace/coverage/default/31.sram_ctrl_partial_access.729457303 |
|
|
Feb 04 03:13:51 PM PST 24 |
Feb 04 03:14:08 PM PST 24 |
317527343 ps |
T814 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4152663736 |
|
|
Feb 04 03:06:48 PM PST 24 |
Feb 04 03:11:13 PM PST 24 |
9274768166 ps |
T815 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.4182211822 |
|
|
Feb 04 03:07:31 PM PST 24 |
Feb 04 03:07:45 PM PST 24 |
739468903 ps |
T816 |
/workspace/coverage/default/16.sram_ctrl_alert_test.3831413482 |
|
|
Feb 04 03:08:56 PM PST 24 |
Feb 04 03:09:01 PM PST 24 |
22816450 ps |
T817 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1932351031 |
|
|
Feb 04 03:18:45 PM PST 24 |
Feb 04 03:18:54 PM PST 24 |
169024544 ps |
T818 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1367035268 |
|
|
Feb 04 03:05:36 PM PST 24 |
Feb 04 03:09:50 PM PST 24 |
55607695796 ps |
T819 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2597441773 |
|
|
Feb 04 03:19:23 PM PST 24 |
Feb 04 03:19:29 PM PST 24 |
985576582 ps |
T820 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.2026342965 |
|
|
Feb 04 03:08:42 PM PST 24 |
Feb 04 03:09:14 PM PST 24 |
85421908 ps |
T821 |
/workspace/coverage/default/14.sram_ctrl_smoke.3115343757 |
|
|
Feb 04 03:07:56 PM PST 24 |
Feb 04 03:08:19 PM PST 24 |
655048920 ps |
T822 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1472761178 |
|
|
Feb 04 03:19:35 PM PST 24 |
Feb 04 03:19:37 PM PST 24 |
13620374 ps |
T823 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.1010855269 |
|
|
Feb 04 03:12:34 PM PST 24 |
Feb 04 03:12:47 PM PST 24 |
260659873 ps |
T824 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.815867076 |
|
|
Feb 04 03:10:15 PM PST 24 |
Feb 04 03:28:57 PM PST 24 |
3529827638 ps |
T825 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2774712465 |
|
|
Feb 04 03:06:50 PM PST 24 |
Feb 04 03:07:02 PM PST 24 |
768762703 ps |
T826 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2531604600 |
|
|
Feb 04 03:05:33 PM PST 24 |
Feb 04 03:08:31 PM PST 24 |
593377012 ps |
T827 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2915218652 |
|
|
Feb 04 03:18:01 PM PST 24 |
Feb 04 03:24:24 PM PST 24 |
30297321548 ps |
T828 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.1296810297 |
|
|
Feb 04 03:14:58 PM PST 24 |
Feb 04 03:14:59 PM PST 24 |
37253949 ps |
T829 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3387322804 |
|
|
Feb 04 03:12:55 PM PST 24 |
Feb 04 03:14:30 PM PST 24 |
553308337 ps |
T830 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.3858554772 |
|
|
Feb 04 03:16:21 PM PST 24 |
Feb 04 03:16:59 PM PST 24 |
97165910 ps |
T831 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.2186378569 |
|
|
Feb 04 03:11:23 PM PST 24 |
Feb 04 03:11:29 PM PST 24 |
1670395028 ps |
T832 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.1229725097 |
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|
Feb 04 03:11:11 PM PST 24 |
Feb 04 03:16:56 PM PST 24 |
19426604291 ps |
T833 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1186874827 |
|
|
Feb 04 03:10:35 PM PST 24 |
Feb 04 03:16:34 PM PST 24 |
10239439685 ps |
T834 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.4123340436 |
|
|
Feb 04 03:10:27 PM PST 24 |
Feb 04 03:10:30 PM PST 24 |
127765910 ps |
T835 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2631029933 |
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|
Feb 04 03:07:57 PM PST 24 |
Feb 04 03:15:20 PM PST 24 |
19324061037 ps |
T836 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3764513567 |
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Feb 04 03:06:19 PM PST 24 |
Feb 04 03:11:07 PM PST 24 |
8007922471 ps |
T837 |
/workspace/coverage/default/24.sram_ctrl_executable.84354071 |
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|
Feb 04 03:11:45 PM PST 24 |
Feb 04 03:27:14 PM PST 24 |
3961709891 ps |
T838 |
/workspace/coverage/default/13.sram_ctrl_regwen.1745528968 |
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|
Feb 04 03:07:25 PM PST 24 |
Feb 04 03:17:23 PM PST 24 |
4269736255 ps |
T839 |
/workspace/coverage/default/11.sram_ctrl_bijection.571247060 |
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Feb 04 03:06:44 PM PST 24 |
Feb 04 03:07:28 PM PST 24 |
1889650337 ps |
T840 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.3935545413 |
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Feb 04 03:15:35 PM PST 24 |
Feb 04 03:59:17 PM PST 24 |
1250223997 ps |
T841 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2038514345 |
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Feb 04 03:05:41 PM PST 24 |
Feb 04 03:09:38 PM PST 24 |
3175124823 ps |
T842 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.3878612478 |
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Feb 04 03:16:59 PM PST 24 |
Feb 04 03:21:33 PM PST 24 |
2840590826 ps |
T843 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3885882706 |
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Feb 04 03:14:34 PM PST 24 |
Feb 04 03:15:50 PM PST 24 |
620364621 ps |
T844 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.700166572 |
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Feb 04 03:18:00 PM PST 24 |
Feb 04 03:21:42 PM PST 24 |
2494370756 ps |
T845 |
/workspace/coverage/default/32.sram_ctrl_partial_access.2382786065 |
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|
Feb 04 03:14:06 PM PST 24 |
Feb 04 03:14:47 PM PST 24 |
119708191 ps |
T846 |
/workspace/coverage/default/25.sram_ctrl_alert_test.324004414 |
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Feb 04 03:12:07 PM PST 24 |
Feb 04 03:12:10 PM PST 24 |
55745747 ps |
T847 |
/workspace/coverage/default/10.sram_ctrl_partial_access.2754506558 |
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Feb 04 03:06:22 PM PST 24 |
Feb 04 03:09:12 PM PST 24 |
3349968300 ps |
T848 |
/workspace/coverage/default/44.sram_ctrl_regwen.2576975849 |
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Feb 04 03:17:54 PM PST 24 |
Feb 04 03:25:07 PM PST 24 |
1300289341 ps |
T849 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.4081083635 |
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Feb 04 03:17:58 PM PST 24 |
Feb 04 03:18:04 PM PST 24 |
1759993138 ps |
T850 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.336421310 |
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Feb 04 03:13:32 PM PST 24 |
Feb 04 03:27:51 PM PST 24 |
6191751925 ps |
T851 |
/workspace/coverage/default/27.sram_ctrl_partial_access.1783863713 |
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Feb 04 03:12:21 PM PST 24 |
Feb 04 03:13:07 PM PST 24 |
400253696 ps |
T852 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1672163508 |
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Feb 04 03:06:11 PM PST 24 |
Feb 04 03:07:31 PM PST 24 |
130074528 ps |
T853 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2994233190 |
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Feb 04 03:06:22 PM PST 24 |
Feb 04 03:28:27 PM PST 24 |
5154679317 ps |
T854 |
/workspace/coverage/default/19.sram_ctrl_executable.3264591000 |
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Feb 04 03:09:54 PM PST 24 |
Feb 04 03:27:46 PM PST 24 |
29180989325 ps |
T855 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2547897478 |
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Feb 04 03:17:56 PM PST 24 |
Feb 04 03:17:58 PM PST 24 |
139803226 ps |
T856 |
/workspace/coverage/default/28.sram_ctrl_executable.1941400186 |
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Feb 04 03:12:54 PM PST 24 |
Feb 04 03:29:14 PM PST 24 |
16359285385 ps |
T857 |
/workspace/coverage/default/1.sram_ctrl_smoke.3879743846 |
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Feb 04 03:01:30 PM PST 24 |
Feb 04 03:02:39 PM PST 24 |
3015660520 ps |
T858 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.2802291729 |
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Feb 04 03:10:54 PM PST 24 |
Feb 04 03:10:56 PM PST 24 |
120249293 ps |
T859 |
/workspace/coverage/default/49.sram_ctrl_executable.3433774899 |
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Feb 04 03:19:21 PM PST 24 |
Feb 04 03:27:25 PM PST 24 |
11012493574 ps |
T860 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.1115569954 |
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Feb 04 03:07:14 PM PST 24 |
Feb 04 03:28:54 PM PST 24 |
116010901531 ps |
T861 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3308885832 |
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Feb 04 03:05:26 PM PST 24 |
Feb 04 03:13:38 PM PST 24 |
19358435767 ps |
T862 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.23888143 |
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Feb 04 03:16:25 PM PST 24 |
Feb 04 05:08:37 PM PST 24 |
1531582214 ps |
T863 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1817933127 |
|
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Feb 04 03:18:12 PM PST 24 |
Feb 04 03:18:31 PM PST 24 |
1196903414 ps |
T864 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.3018559706 |
|
|
Feb 04 03:05:27 PM PST 24 |
Feb 04 03:05:38 PM PST 24 |
723998720 ps |
T865 |
/workspace/coverage/default/0.sram_ctrl_alert_test.4060827692 |
|
|
Feb 04 03:01:28 PM PST 24 |
Feb 04 03:01:31 PM PST 24 |
61042813 ps |
T866 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.2453577759 |
|
|
Feb 04 03:15:47 PM PST 24 |
Feb 04 03:32:02 PM PST 24 |
3509567185 ps |
T867 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.353785599 |
|
|
Feb 04 03:11:14 PM PST 24 |
Feb 04 03:15:15 PM PST 24 |
4974422586 ps |
T868 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.4011686266 |
|
|
Feb 04 03:18:36 PM PST 24 |
Feb 04 03:18:42 PM PST 24 |
77045393 ps |
T869 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.3758940959 |
|
|
Feb 04 03:16:52 PM PST 24 |
Feb 04 03:16:59 PM PST 24 |
1107665387 ps |
T870 |
/workspace/coverage/default/47.sram_ctrl_executable.2358953047 |
|
|
Feb 04 03:18:36 PM PST 24 |
Feb 04 03:33:29 PM PST 24 |
28419321397 ps |
T871 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.3066428496 |
|
|
Feb 04 03:08:13 PM PST 24 |
Feb 04 03:17:04 PM PST 24 |
1904927684 ps |
T872 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.2963416052 |
|
|
Feb 04 03:12:57 PM PST 24 |
Feb 04 03:13:05 PM PST 24 |
103114994 ps |
T873 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.2206421153 |
|
|
Feb 04 03:12:22 PM PST 24 |
Feb 04 03:12:25 PM PST 24 |
53954584 ps |
T874 |
/workspace/coverage/default/40.sram_ctrl_regwen.2289641060 |
|
|
Feb 04 03:16:27 PM PST 24 |
Feb 04 03:19:09 PM PST 24 |
174892874 ps |
T875 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.170460629 |
|
|
Feb 04 03:04:03 PM PST 24 |
Feb 04 03:04:44 PM PST 24 |
2285815563 ps |
T32 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.4192696104 |
|
|
Feb 04 03:03:49 PM PST 24 |
Feb 04 03:03:53 PM PST 24 |
166184910 ps |
T876 |
/workspace/coverage/default/36.sram_ctrl_executable.872093765 |
|
|
Feb 04 03:15:30 PM PST 24 |
Feb 04 03:24:10 PM PST 24 |
38472643599 ps |
T877 |
/workspace/coverage/default/27.sram_ctrl_regwen.2710451000 |
|
|
Feb 04 03:12:34 PM PST 24 |
Feb 04 03:40:05 PM PST 24 |
42302696604 ps |
T878 |
/workspace/coverage/default/16.sram_ctrl_executable.3333228548 |
|
|
Feb 04 03:08:43 PM PST 24 |
Feb 04 03:13:56 PM PST 24 |
23788598353 ps |
T879 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.841019155 |
|
|
Feb 04 03:12:38 PM PST 24 |
Feb 04 03:12:44 PM PST 24 |
443706802 ps |
T880 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2328175398 |
|
|
Feb 04 03:18:55 PM PST 24 |
Feb 04 03:23:05 PM PST 24 |
2637746170 ps |
T881 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.448030454 |
|
|
Feb 04 03:13:51 PM PST 24 |
Feb 04 03:14:51 PM PST 24 |
1097374791 ps |
T882 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.4051165230 |
|
|
Feb 04 03:19:03 PM PST 24 |
Feb 04 03:19:14 PM PST 24 |
4896723361 ps |
T883 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.2781266909 |
|
|
Feb 04 03:12:05 PM PST 24 |
Feb 04 03:12:13 PM PST 24 |
161699813 ps |
T884 |
/workspace/coverage/default/48.sram_ctrl_alert_test.2951846892 |
|
|
Feb 04 03:19:04 PM PST 24 |
Feb 04 03:19:11 PM PST 24 |
62695200 ps |
T885 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.1315527646 |
|
|
Feb 04 03:08:27 PM PST 24 |
Feb 04 03:08:33 PM PST 24 |
1358571071 ps |
T886 |
/workspace/coverage/default/16.sram_ctrl_smoke.2781069386 |
|
|
Feb 04 03:08:26 PM PST 24 |
Feb 04 03:08:39 PM PST 24 |
772887463 ps |
T887 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.3186713319 |
|
|
Feb 04 03:17:21 PM PST 24 |
Feb 04 03:17:34 PM PST 24 |
895772715 ps |
T888 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1393055158 |
|
|
Feb 04 03:18:02 PM PST 24 |
Feb 04 03:23:19 PM PST 24 |
6525628447 ps |
T889 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.4081859468 |
|
|
Feb 04 03:09:38 PM PST 24 |
Feb 04 03:14:06 PM PST 24 |
18620090381 ps |
T890 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.504440759 |
|
|
Feb 04 03:14:59 PM PST 24 |
Feb 04 03:15:05 PM PST 24 |
1003558943 ps |
T891 |
/workspace/coverage/default/33.sram_ctrl_regwen.3787201384 |
|
|
Feb 04 03:14:37 PM PST 24 |
Feb 04 03:15:06 PM PST 24 |
1727320952 ps |
T892 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.1283809887 |
|
|
Feb 04 03:08:13 PM PST 24 |
Feb 04 03:08:20 PM PST 24 |
185533392 ps |
T893 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.2115275425 |
|
|
Feb 04 03:13:08 PM PST 24 |
Feb 04 03:13:17 PM PST 24 |
203064823 ps |
T894 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.208480561 |
|
|
Feb 04 03:18:30 PM PST 24 |
Feb 04 04:01:40 PM PST 24 |
3826921479 ps |
T895 |
/workspace/coverage/default/23.sram_ctrl_partial_access.1167068213 |
|
|
Feb 04 03:11:12 PM PST 24 |
Feb 04 03:11:33 PM PST 24 |
2074206614 ps |
T896 |
/workspace/coverage/default/40.sram_ctrl_executable.3239302054 |
|
|
Feb 04 03:16:27 PM PST 24 |
Feb 04 03:34:38 PM PST 24 |
22117118492 ps |
T897 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.995728796 |
|
|
Feb 04 03:13:08 PM PST 24 |
Feb 04 03:13:14 PM PST 24 |
187720122 ps |
T898 |
/workspace/coverage/default/27.sram_ctrl_executable.2000035694 |
|
|
Feb 04 03:12:33 PM PST 24 |
Feb 04 03:26:32 PM PST 24 |
9836969310 ps |
T899 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.689713224 |
|
|
Feb 04 03:07:06 PM PST 24 |
Feb 04 03:09:06 PM PST 24 |
5285471109 ps |
T900 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3242723721 |
|
|
Feb 04 03:18:36 PM PST 24 |
Feb 04 03:18:37 PM PST 24 |
87446773 ps |
T901 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.2092100319 |
|
|
Feb 04 03:14:37 PM PST 24 |
Feb 04 03:19:08 PM PST 24 |
10445743863 ps |
T902 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.1502826149 |
|
|
Feb 04 03:02:20 PM PST 24 |
Feb 04 03:02:22 PM PST 24 |
42500428 ps |
T903 |
/workspace/coverage/default/8.sram_ctrl_partial_access.744959624 |
|
|
Feb 04 03:05:33 PM PST 24 |
Feb 04 03:05:59 PM PST 24 |
315490370 ps |
T904 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.2948252916 |
|
|
Feb 04 03:16:21 PM PST 24 |
Feb 04 03:16:27 PM PST 24 |
95647681 ps |
T905 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.814143143 |
|
|
Feb 04 03:06:49 PM PST 24 |
Feb 04 03:07:53 PM PST 24 |
182077309 ps |
T906 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.138395647 |
|
|
Feb 04 03:16:24 PM PST 24 |
Feb 04 03:37:28 PM PST 24 |
4619368060 ps |
T907 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.525909462 |
|
|
Feb 04 03:18:37 PM PST 24 |
Feb 04 03:29:56 PM PST 24 |
9851931121 ps |
T908 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.1987962071 |
|
|
Feb 04 03:12:57 PM PST 24 |
Feb 04 03:17:38 PM PST 24 |
47550516254 ps |
T909 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.1730746189 |
|
|
Feb 04 03:15:48 PM PST 24 |
Feb 04 03:16:00 PM PST 24 |
4858138720 ps |
T910 |
/workspace/coverage/default/46.sram_ctrl_partial_access.3866618278 |
|
|
Feb 04 03:18:15 PM PST 24 |
Feb 04 03:18:27 PM PST 24 |
976901175 ps |
T911 |
/workspace/coverage/default/30.sram_ctrl_stress_all.17123351 |
|
|
Feb 04 03:13:31 PM PST 24 |
Feb 04 03:49:40 PM PST 24 |
12233084958 ps |
T912 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.681539965 |
|
|
Feb 04 03:13:52 PM PST 24 |
Feb 04 03:14:33 PM PST 24 |
94318613 ps |
T913 |
/workspace/coverage/default/42.sram_ctrl_bijection.2974485369 |
|
|
Feb 04 03:17:00 PM PST 24 |
Feb 04 03:17:31 PM PST 24 |
2150069415 ps |
T914 |
/workspace/coverage/default/0.sram_ctrl_stress_all.3553243648 |
|
|
Feb 04 03:01:27 PM PST 24 |
Feb 04 03:53:37 PM PST 24 |
269457361607 ps |
T915 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2764058708 |
|
|
Feb 04 03:02:12 PM PST 24 |
Feb 04 03:02:17 PM PST 24 |
48771242 ps |
T916 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.647283018 |
|
|
Feb 04 03:14:03 PM PST 24 |
Feb 04 03:40:26 PM PST 24 |
6740636267 ps |
T917 |
/workspace/coverage/default/41.sram_ctrl_alert_test.2010013480 |
|
|
Feb 04 03:16:59 PM PST 24 |
Feb 04 03:17:01 PM PST 24 |
40397418 ps |
T918 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2022629947 |
|
|
Feb 04 03:17:13 PM PST 24 |
Feb 04 03:33:52 PM PST 24 |
13174783734 ps |
T919 |
/workspace/coverage/default/36.sram_ctrl_bijection.650512786 |
|
|
Feb 04 03:14:57 PM PST 24 |
Feb 04 03:15:21 PM PST 24 |
2152379819 ps |
T920 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.3481267449 |
|
|
Feb 04 03:15:52 PM PST 24 |
Feb 04 03:16:03 PM PST 24 |
2629112604 ps |
T921 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.1775648121 |
|
|
Feb 04 03:10:00 PM PST 24 |
Feb 04 03:12:31 PM PST 24 |
605363762 ps |
T922 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2531979904 |
|
|
Feb 04 03:18:36 PM PST 24 |
Feb 04 03:24:44 PM PST 24 |
5152032270 ps |
T923 |
/workspace/coverage/default/46.sram_ctrl_bijection.2745444695 |
|
|
Feb 04 03:18:13 PM PST 24 |
Feb 04 03:19:05 PM PST 24 |
2391156276 ps |
T924 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3003086823 |
|
|
Feb 04 03:12:34 PM PST 24 |
Feb 04 03:13:05 PM PST 24 |
312462207 ps |
T925 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.2337432598 |
|
|
Feb 04 03:13:05 PM PST 24 |
Feb 04 03:13:12 PM PST 24 |
306302164 ps |
T926 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3502023536 |
|
|
Feb 04 03:03:48 PM PST 24 |
Feb 04 04:14:23 PM PST 24 |
22510500001 ps |
T927 |
/workspace/coverage/default/2.sram_ctrl_partial_access.1514407275 |
|
|
Feb 04 03:02:12 PM PST 24 |
Feb 04 03:02:22 PM PST 24 |
720161290 ps |
T928 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.3298456999 |
|
|
Feb 04 03:18:11 PM PST 24 |
Feb 04 03:18:21 PM PST 24 |
476578069 ps |
T929 |
/workspace/coverage/default/17.sram_ctrl_partial_access.1739212136 |
|
|
Feb 04 03:09:10 PM PST 24 |
Feb 04 03:11:23 PM PST 24 |
238107616 ps |
T930 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.4064760089 |
|
|
Feb 04 03:06:11 PM PST 24 |
Feb 04 03:06:16 PM PST 24 |
281937000 ps |
T931 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.1291896234 |
|
|
Feb 04 03:15:34 PM PST 24 |
Feb 04 03:15:36 PM PST 24 |
31025594 ps |
T33 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.2874986038 |
|
|
Feb 04 03:02:30 PM PST 24 |
Feb 04 03:02:34 PM PST 24 |
479355251 ps |
T932 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3385444861 |
|
|
Feb 04 03:02:19 PM PST 24 |
Feb 04 03:04:37 PM PST 24 |
555655751 ps |
T933 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1535871433 |
|
|
Feb 04 03:19:23 PM PST 24 |
Feb 04 03:32:30 PM PST 24 |
6226235635 ps |
T934 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.468105807 |
|
|
Feb 04 03:15:43 PM PST 24 |
Feb 04 03:30:04 PM PST 24 |
3960456236 ps |
T935 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.822862418 |
|
|
Feb 04 03:18:56 PM PST 24 |
Feb 04 03:19:49 PM PST 24 |
321883656 ps |
T936 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3625868732 |
|
|
Feb 04 03:05:48 PM PST 24 |
Feb 04 03:21:55 PM PST 24 |
3916015974 ps |
T937 |
/workspace/coverage/default/46.sram_ctrl_smoke.4166858700 |
|
|
Feb 04 03:18:11 PM PST 24 |
Feb 04 03:18:18 PM PST 24 |
94730581 ps |
T938 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1775344457 |
|
|
Feb 04 03:05:33 PM PST 24 |
Feb 04 03:55:09 PM PST 24 |
2643655119 ps |
T939 |
/workspace/coverage/default/46.sram_ctrl_executable.4122818235 |
|
|
Feb 04 03:18:32 PM PST 24 |
Feb 04 04:01:28 PM PST 24 |
28150996103 ps |
T940 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.3928990835 |
|
|
Feb 04 03:11:58 PM PST 24 |
Feb 04 03:16:28 PM PST 24 |
2829240741 ps |
T941 |
/workspace/coverage/default/14.sram_ctrl_bijection.460687117 |
|
|
Feb 04 03:07:57 PM PST 24 |
Feb 04 03:08:38 PM PST 24 |
9638537891 ps |
T942 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.2841463524 |
|
|
Feb 04 03:19:13 PM PST 24 |
Feb 04 03:19:52 PM PST 24 |
194809551 ps |
T943 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.760894940 |
|
|
Feb 04 03:04:11 PM PST 24 |
Feb 04 03:14:29 PM PST 24 |
14785177338 ps |
T944 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3877528876 |
|
|
Feb 04 03:03:48 PM PST 24 |
Feb 04 03:10:09 PM PST 24 |
33850357997 ps |
T945 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.4246250235 |
|
|
Feb 04 03:01:42 PM PST 24 |
Feb 04 03:01:46 PM PST 24 |
494263710 ps |
T946 |
/workspace/coverage/default/20.sram_ctrl_partial_access.2635836777 |
|
|
Feb 04 03:09:59 PM PST 24 |
Feb 04 03:10:03 PM PST 24 |
38907084 ps |
T947 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.572790093 |
|
|
Feb 04 03:03:18 PM PST 24 |
Feb 04 03:14:13 PM PST 24 |
11480403960 ps |
T948 |
/workspace/coverage/default/48.sram_ctrl_stress_all.873967457 |
|
|
Feb 04 03:19:02 PM PST 24 |
Feb 04 04:07:44 PM PST 24 |
152479864374 ps |
T949 |
/workspace/coverage/default/41.sram_ctrl_smoke.2843399207 |
|
|
Feb 04 03:16:38 PM PST 24 |
Feb 04 03:16:55 PM PST 24 |
1511603393 ps |
T950 |
/workspace/coverage/default/24.sram_ctrl_smoke.241871148 |
|
|
Feb 04 03:11:29 PM PST 24 |
Feb 04 03:11:45 PM PST 24 |
914022547 ps |
T951 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.413847898 |
|
|
Feb 04 03:00:54 PM PST 24 |
Feb 04 03:05:46 PM PST 24 |
12119000110 ps |
T952 |
/workspace/coverage/default/7.sram_ctrl_bijection.2740578115 |
|
|
Feb 04 03:04:55 PM PST 24 |
Feb 04 03:05:48 PM PST 24 |
4837485085 ps |
T953 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.765151981 |
|
|
Feb 04 03:18:38 PM PST 24 |
Feb 04 03:18:45 PM PST 24 |
432119783 ps |
T954 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.2020731341 |
|
|
Feb 04 03:09:09 PM PST 24 |
Feb 04 03:09:59 PM PST 24 |
1057647821 ps |
T955 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.3836116494 |
|
|
Feb 04 03:14:18 PM PST 24 |
Feb 04 03:17:04 PM PST 24 |
1699599293 ps |
T956 |
/workspace/coverage/default/32.sram_ctrl_alert_test.1796151913 |
|
|
Feb 04 03:14:16 PM PST 24 |
Feb 04 03:14:18 PM PST 24 |
49537791 ps |
T957 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.2544525681 |
|
|
Feb 04 03:03:34 PM PST 24 |
Feb 04 03:05:58 PM PST 24 |
131163727 ps |
T958 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.45404145 |
|
|
Feb 04 03:10:46 PM PST 24 |
Feb 04 03:10:54 PM PST 24 |
540560837 ps |
T959 |
/workspace/coverage/default/13.sram_ctrl_executable.3410048607 |
|
|
Feb 04 03:07:25 PM PST 24 |
Feb 04 03:18:14 PM PST 24 |
3480248914 ps |
T960 |
/workspace/coverage/default/45.sram_ctrl_partial_access.2117987380 |
|
|
Feb 04 03:18:09 PM PST 24 |
Feb 04 03:18:17 PM PST 24 |
370132814 ps |
T961 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.1732523627 |
|
|
Feb 04 03:13:30 PM PST 24 |
Feb 04 03:13:35 PM PST 24 |
147044441 ps |
T962 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1719645213 |
|
|
Feb 04 03:17:15 PM PST 24 |
Feb 04 05:38:09 PM PST 24 |
9245102351 ps |
T963 |
/workspace/coverage/default/46.sram_ctrl_alert_test.3612137841 |
|
|
Feb 04 03:18:28 PM PST 24 |
Feb 04 03:18:32 PM PST 24 |
18939302 ps |
T964 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.1147613234 |
|
|
Feb 04 03:16:34 PM PST 24 |
Feb 04 03:50:43 PM PST 24 |
1658538418 ps |
T965 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.1948336896 |
|
|
Feb 04 03:15:36 PM PST 24 |
Feb 04 03:30:25 PM PST 24 |
28168434688 ps |
T966 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3562102577 |
|
|
Feb 04 03:17:24 PM PST 24 |
Feb 04 03:18:48 PM PST 24 |
144866888 ps |
T967 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3502472594 |
|
|
Feb 04 03:07:25 PM PST 24 |
Feb 04 03:14:08 PM PST 24 |
52024861700 ps |
T968 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.697200022 |
|
|
Feb 04 03:14:17 PM PST 24 |
Feb 04 03:22:31 PM PST 24 |
19338948102 ps |
T969 |
/workspace/coverage/default/7.sram_ctrl_executable.3183778425 |
|
|
Feb 04 03:05:33 PM PST 24 |
Feb 04 03:13:19 PM PST 24 |
1658411325 ps |
T970 |
/workspace/coverage/default/3.sram_ctrl_bijection.1277650974 |
|
|
Feb 04 03:02:45 PM PST 24 |
Feb 04 03:03:47 PM PST 24 |
4198880772 ps |
T971 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.1634354697 |
|
|
Feb 04 03:13:29 PM PST 24 |
Feb 04 03:33:58 PM PST 24 |
20535014261 ps |
T972 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.2025533192 |
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Feb 04 03:16:52 PM PST 24 |
Feb 04 03:16:56 PM PST 24 |
768180158 ps |
T973 |
/workspace/coverage/default/3.sram_ctrl_partial_access.1235492686 |
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|
Feb 04 03:02:51 PM PST 24 |
Feb 04 03:03:25 PM PST 24 |
336406795 ps |
T974 |
/workspace/coverage/default/34.sram_ctrl_bijection.3745149642 |
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|
Feb 04 03:14:39 PM PST 24 |
Feb 04 03:15:25 PM PST 24 |
17314794762 ps |
T975 |
/workspace/coverage/default/21.sram_ctrl_executable.3390487648 |
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Feb 04 03:10:35 PM PST 24 |
Feb 04 03:17:40 PM PST 24 |
23081307293 ps |
T976 |
/workspace/coverage/default/20.sram_ctrl_bijection.3921748430 |
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Feb 04 03:09:52 PM PST 24 |
Feb 04 03:10:48 PM PST 24 |
2585263520 ps |
T977 |
/workspace/coverage/default/14.sram_ctrl_stress_all.809540451 |
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|
Feb 04 03:08:10 PM PST 24 |
Feb 04 03:57:56 PM PST 24 |
94251649046 ps |
T978 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.3086324841 |
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|
Feb 04 03:15:47 PM PST 24 |
Feb 04 03:22:07 PM PST 24 |
4088641498 ps |
T979 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.2330782126 |
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|
Feb 04 03:06:11 PM PST 24 |
Feb 04 03:06:17 PM PST 24 |
174963836 ps |
T980 |
/workspace/coverage/default/40.sram_ctrl_partial_access.2136574374 |
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Feb 04 03:16:23 PM PST 24 |
Feb 04 03:16:34 PM PST 24 |
403814597 ps |
T981 |
/workspace/coverage/default/29.sram_ctrl_regwen.3568955135 |
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Feb 04 03:13:11 PM PST 24 |
Feb 04 03:32:53 PM PST 24 |
23146198660 ps |
T982 |
/workspace/coverage/default/24.sram_ctrl_regwen.3270946418 |
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Feb 04 03:11:42 PM PST 24 |
Feb 04 03:15:55 PM PST 24 |
18658831628 ps |
T983 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.3350414729 |
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Feb 04 03:14:59 PM PST 24 |
Feb 04 03:15:04 PM PST 24 |
168175550 ps |
T984 |
/workspace/coverage/default/36.sram_ctrl_partial_access.2931021092 |
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Feb 04 03:15:00 PM PST 24 |
Feb 04 03:15:22 PM PST 24 |
2016232968 ps |
T985 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.1206905095 |
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Feb 04 03:11:59 PM PST 24 |
Feb 04 03:14:27 PM PST 24 |
135338797 ps |
T986 |
/workspace/coverage/default/34.sram_ctrl_alert_test.3488388450 |
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Feb 04 03:14:48 PM PST 24 |
Feb 04 03:14:50 PM PST 24 |
187051474 ps |
T987 |
/workspace/coverage/default/32.sram_ctrl_regwen.1857630457 |
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|
Feb 04 03:14:05 PM PST 24 |
Feb 04 03:28:20 PM PST 24 |
44502682285 ps |
T988 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.1387075448 |
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Feb 04 03:11:39 PM PST 24 |
Feb 04 03:24:51 PM PST 24 |
5028492752 ps |
T989 |
/workspace/coverage/default/21.sram_ctrl_bijection.2739704507 |
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Feb 04 03:10:28 PM PST 24 |
Feb 04 03:11:38 PM PST 24 |
19834195041 ps |
T990 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.325903552 |
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Feb 04 03:15:36 PM PST 24 |
Feb 04 03:15:42 PM PST 24 |
62502947 ps |
T991 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.4002502978 |
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Feb 04 03:16:52 PM PST 24 |
Feb 04 03:17:00 PM PST 24 |
548626973 ps |
T992 |
/workspace/coverage/default/21.sram_ctrl_alert_test.2917872403 |
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Feb 04 03:10:40 PM PST 24 |
Feb 04 03:10:44 PM PST 24 |
24459969 ps |
T993 |
/workspace/coverage/default/31.sram_ctrl_bijection.184416475 |
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Feb 04 03:13:51 PM PST 24 |
Feb 04 03:14:10 PM PST 24 |
5248838630 ps |
T994 |
/workspace/coverage/default/44.sram_ctrl_bijection.2447111694 |
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Feb 04 03:17:53 PM PST 24 |
Feb 04 03:18:59 PM PST 24 |
3070329808 ps |
T995 |
/workspace/coverage/default/36.sram_ctrl_smoke.3900447328 |
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Feb 04 03:14:59 PM PST 24 |
Feb 04 03:15:12 PM PST 24 |
74410460 ps |
T996 |
/workspace/coverage/default/9.sram_ctrl_executable.3285798207 |
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Feb 04 03:06:19 PM PST 24 |
Feb 04 03:24:24 PM PST 24 |
27460381970 ps |
T997 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1588814115 |
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Feb 04 03:07:25 PM PST 24 |
Feb 04 03:09:36 PM PST 24 |
904209378 ps |
T998 |
/workspace/coverage/default/11.sram_ctrl_executable.824668509 |
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Feb 04 03:07:03 PM PST 24 |
Feb 04 03:09:45 PM PST 24 |
627006377 ps |
T999 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.461524898 |
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Feb 04 03:18:52 PM PST 24 |
Feb 04 03:18:54 PM PST 24 |
33898158 ps |
T1000 |
/workspace/coverage/default/17.sram_ctrl_smoke.4266013068 |
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Feb 04 03:08:56 PM PST 24 |
Feb 04 03:09:49 PM PST 24 |
461101434 ps |