T306 |
/workspace/coverage/default/42.sram_ctrl_bijection.743540093 |
|
|
Mar 10 02:40:31 PM PDT 24 |
Mar 10 02:41:13 PM PDT 24 |
4223058211 ps |
T307 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.1866065306 |
|
|
Mar 10 02:36:53 PM PDT 24 |
Mar 10 02:36:53 PM PDT 24 |
41952387 ps |
T308 |
/workspace/coverage/default/41.sram_ctrl_smoke.1470472020 |
|
|
Mar 10 02:40:23 PM PDT 24 |
Mar 10 02:40:24 PM PDT 24 |
183623223 ps |
T309 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.2088647486 |
|
|
Mar 10 02:36:37 PM PDT 24 |
Mar 10 03:00:53 PM PDT 24 |
19976577778 ps |
T310 |
/workspace/coverage/default/38.sram_ctrl_alert_test.548373570 |
|
|
Mar 10 02:40:01 PM PDT 24 |
Mar 10 02:40:02 PM PDT 24 |
41833226 ps |
T311 |
/workspace/coverage/default/4.sram_ctrl_bijection.2609256535 |
|
|
Mar 10 02:35:13 PM PDT 24 |
Mar 10 02:35:40 PM PDT 24 |
1547726804 ps |
T312 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.3981111376 |
|
|
Mar 10 02:38:40 PM PDT 24 |
Mar 10 02:38:42 PM PDT 24 |
96549731 ps |
T313 |
/workspace/coverage/default/12.sram_ctrl_alert_test.3296842667 |
|
|
Mar 10 02:36:13 PM PDT 24 |
Mar 10 02:36:14 PM PDT 24 |
31447250 ps |
T314 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2790957794 |
|
|
Mar 10 02:41:25 PM PDT 24 |
Mar 10 02:56:48 PM PDT 24 |
13755994620 ps |
T315 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.337282003 |
|
|
Mar 10 02:36:08 PM PDT 24 |
Mar 10 02:38:42 PM PDT 24 |
153531620 ps |
T316 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.236951216 |
|
|
Mar 10 02:36:14 PM PDT 24 |
Mar 10 03:06:33 PM PDT 24 |
25948452750 ps |
T317 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.476998533 |
|
|
Mar 10 02:41:22 PM PDT 24 |
Mar 10 02:41:25 PM PDT 24 |
170837368 ps |
T318 |
/workspace/coverage/default/37.sram_ctrl_alert_test.2893901987 |
|
|
Mar 10 02:39:45 PM PDT 24 |
Mar 10 02:39:47 PM PDT 24 |
32573085 ps |
T319 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.73985172 |
|
|
Mar 10 02:35:30 PM PDT 24 |
Mar 10 02:35:35 PM PDT 24 |
295964506 ps |
T320 |
/workspace/coverage/default/36.sram_ctrl_alert_test.1746205487 |
|
|
Mar 10 02:39:43 PM PDT 24 |
Mar 10 02:39:45 PM PDT 24 |
40373654 ps |
T47 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1724190001 |
|
|
Mar 10 02:35:35 PM PDT 24 |
Mar 10 02:46:43 PM PDT 24 |
13369066787 ps |
T321 |
/workspace/coverage/default/8.sram_ctrl_smoke.1547238741 |
|
|
Mar 10 02:35:42 PM PDT 24 |
Mar 10 02:35:54 PM PDT 24 |
467320540 ps |
T322 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.4222827272 |
|
|
Mar 10 02:40:32 PM PDT 24 |
Mar 10 02:43:30 PM PDT 24 |
1943851853 ps |
T323 |
/workspace/coverage/default/20.sram_ctrl_regwen.1364971761 |
|
|
Mar 10 02:37:18 PM PDT 24 |
Mar 10 02:48:33 PM PDT 24 |
35734803479 ps |
T324 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.3101347038 |
|
|
Mar 10 02:39:58 PM PDT 24 |
Mar 10 02:40:58 PM PDT 24 |
2464200221 ps |
T325 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2684613412 |
|
|
Mar 10 02:35:45 PM PDT 24 |
Mar 10 02:35:48 PM PDT 24 |
36159047 ps |
T326 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3710355343 |
|
|
Mar 10 02:35:46 PM PDT 24 |
Mar 10 02:35:49 PM PDT 24 |
38747556 ps |
T327 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.2736378794 |
|
|
Mar 10 02:38:14 PM PDT 24 |
Mar 10 02:38:26 PM PDT 24 |
810629124 ps |
T328 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.3319551549 |
|
|
Mar 10 02:36:38 PM PDT 24 |
Mar 10 02:36:47 PM PDT 24 |
764259889 ps |
T329 |
/workspace/coverage/default/40.sram_ctrl_partial_access.829289585 |
|
|
Mar 10 02:40:15 PM PDT 24 |
Mar 10 02:40:35 PM PDT 24 |
1121942512 ps |
T330 |
/workspace/coverage/default/45.sram_ctrl_regwen.3693250515 |
|
|
Mar 10 02:41:06 PM PDT 24 |
Mar 10 02:52:38 PM PDT 24 |
2393965193 ps |
T331 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.1138456630 |
|
|
Mar 10 02:39:29 PM PDT 24 |
Mar 10 02:39:30 PM PDT 24 |
32322694 ps |
T332 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.398885899 |
|
|
Mar 10 02:36:15 PM PDT 24 |
Mar 10 02:37:56 PM PDT 24 |
590955100 ps |
T333 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.2451291281 |
|
|
Mar 10 02:39:37 PM PDT 24 |
Mar 10 02:39:47 PM PDT 24 |
1190527964 ps |
T334 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.627103070 |
|
|
Mar 10 02:40:56 PM PDT 24 |
Mar 10 02:40:57 PM PDT 24 |
32096659 ps |
T335 |
/workspace/coverage/default/46.sram_ctrl_partial_access.3261130036 |
|
|
Mar 10 02:41:14 PM PDT 24 |
Mar 10 02:41:16 PM PDT 24 |
33950882 ps |
T336 |
/workspace/coverage/default/47.sram_ctrl_stress_all.1833082103 |
|
|
Mar 10 02:41:24 PM PDT 24 |
Mar 10 03:44:21 PM PDT 24 |
27812879922 ps |
T337 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3111396502 |
|
|
Mar 10 02:40:46 PM PDT 24 |
Mar 10 02:40:53 PM PDT 24 |
1833552731 ps |
T338 |
/workspace/coverage/default/25.sram_ctrl_smoke.1887411292 |
|
|
Mar 10 02:38:14 PM PDT 24 |
Mar 10 02:38:18 PM PDT 24 |
361326484 ps |
T339 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3264162712 |
|
|
Mar 10 02:34:52 PM PDT 24 |
Mar 10 02:35:06 PM PDT 24 |
1818245549 ps |
T340 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.2215182353 |
|
|
Mar 10 02:35:06 PM PDT 24 |
Mar 10 02:38:56 PM PDT 24 |
15115263733 ps |
T341 |
/workspace/coverage/default/21.sram_ctrl_stress_all.3160446443 |
|
|
Mar 10 02:37:30 PM PDT 24 |
Mar 10 03:20:49 PM PDT 24 |
37387977220 ps |
T342 |
/workspace/coverage/default/10.sram_ctrl_bijection.1507681839 |
|
|
Mar 10 02:35:50 PM PDT 24 |
Mar 10 02:36:58 PM PDT 24 |
4320589645 ps |
T343 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.2277613715 |
|
|
Mar 10 02:36:24 PM PDT 24 |
Mar 10 02:38:41 PM PDT 24 |
3184270667 ps |
T344 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.3801248582 |
|
|
Mar 10 02:38:21 PM PDT 24 |
Mar 10 02:38:22 PM PDT 24 |
76163210 ps |
T345 |
/workspace/coverage/default/13.sram_ctrl_smoke.2357966100 |
|
|
Mar 10 02:36:13 PM PDT 24 |
Mar 10 02:36:19 PM PDT 24 |
94536430 ps |
T346 |
/workspace/coverage/default/19.sram_ctrl_alert_test.3519263638 |
|
|
Mar 10 02:37:16 PM PDT 24 |
Mar 10 02:37:17 PM PDT 24 |
11995511 ps |
T347 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3551456618 |
|
|
Mar 10 02:36:02 PM PDT 24 |
Mar 10 02:41:52 PM PDT 24 |
18481426801 ps |
T348 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.3718305913 |
|
|
Mar 10 02:35:21 PM PDT 24 |
Mar 10 02:36:16 PM PDT 24 |
119445563 ps |
T48 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1196376256 |
|
|
Mar 10 02:39:37 PM PDT 24 |
Mar 10 02:41:48 PM PDT 24 |
1753505850 ps |
T349 |
/workspace/coverage/default/19.sram_ctrl_smoke.1292686315 |
|
|
Mar 10 02:37:05 PM PDT 24 |
Mar 10 02:37:13 PM PDT 24 |
147443957 ps |
T350 |
/workspace/coverage/default/7.sram_ctrl_executable.821313077 |
|
|
Mar 10 02:35:36 PM PDT 24 |
Mar 10 02:52:37 PM PDT 24 |
71466735623 ps |
T351 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1774638788 |
|
|
Mar 10 02:40:56 PM PDT 24 |
Mar 10 02:43:47 PM PDT 24 |
10839816960 ps |
T352 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2774156734 |
|
|
Mar 10 02:41:44 PM PDT 24 |
Mar 10 02:41:46 PM PDT 24 |
87182199 ps |
T353 |
/workspace/coverage/default/25.sram_ctrl_executable.481474390 |
|
|
Mar 10 02:38:15 PM PDT 24 |
Mar 10 02:49:08 PM PDT 24 |
10937609125 ps |
T354 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2518200549 |
|
|
Mar 10 02:34:50 PM PDT 24 |
Mar 10 02:42:03 PM PDT 24 |
5551846661 ps |
T355 |
/workspace/coverage/default/5.sram_ctrl_regwen.2686088205 |
|
|
Mar 10 02:35:23 PM PDT 24 |
Mar 10 02:48:36 PM PDT 24 |
7420744808 ps |
T356 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.1689677261 |
|
|
Mar 10 02:34:59 PM PDT 24 |
Mar 10 02:35:10 PM PDT 24 |
685782814 ps |
T139 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.3389097490 |
|
|
Mar 10 02:36:56 PM PDT 24 |
Mar 10 02:37:00 PM PDT 24 |
552993701 ps |
T357 |
/workspace/coverage/default/0.sram_ctrl_smoke.2814546513 |
|
|
Mar 10 02:34:44 PM PDT 24 |
Mar 10 02:36:07 PM PDT 24 |
130532328 ps |
T358 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.2751360025 |
|
|
Mar 10 02:40:26 PM PDT 24 |
Mar 10 02:40:29 PM PDT 24 |
374084308 ps |
T359 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.438703207 |
|
|
Mar 10 02:40:59 PM PDT 24 |
Mar 10 02:52:25 PM PDT 24 |
3340481164 ps |
T360 |
/workspace/coverage/default/47.sram_ctrl_bijection.964386061 |
|
|
Mar 10 02:41:18 PM PDT 24 |
Mar 10 02:41:56 PM PDT 24 |
2447707332 ps |
T361 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.4000629906 |
|
|
Mar 10 02:40:36 PM PDT 24 |
Mar 10 03:00:33 PM PDT 24 |
4658432117 ps |
T49 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.576686714 |
|
|
Mar 10 02:41:06 PM PDT 24 |
Mar 10 02:41:27 PM PDT 24 |
1416364542 ps |
T362 |
/workspace/coverage/default/8.sram_ctrl_executable.3202672146 |
|
|
Mar 10 02:35:41 PM PDT 24 |
Mar 10 02:46:06 PM PDT 24 |
14094204211 ps |
T363 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.2495113311 |
|
|
Mar 10 02:39:46 PM PDT 24 |
Mar 10 02:39:57 PM PDT 24 |
576056326 ps |
T364 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.690097313 |
|
|
Mar 10 02:39:29 PM PDT 24 |
Mar 10 03:08:34 PM PDT 24 |
8899234308 ps |
T365 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.1319485483 |
|
|
Mar 10 02:38:55 PM PDT 24 |
Mar 10 02:41:03 PM PDT 24 |
595205442 ps |
T366 |
/workspace/coverage/default/21.sram_ctrl_bijection.3978550400 |
|
|
Mar 10 02:37:24 PM PDT 24 |
Mar 10 02:38:31 PM PDT 24 |
1051686349 ps |
T367 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.3643640070 |
|
|
Mar 10 02:39:03 PM PDT 24 |
Mar 10 02:39:10 PM PDT 24 |
625317539 ps |
T368 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.4098987189 |
|
|
Mar 10 02:40:54 PM PDT 24 |
Mar 10 02:41:00 PM PDT 24 |
792163035 ps |
T369 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.3016353581 |
|
|
Mar 10 02:38:17 PM PDT 24 |
Mar 10 02:49:58 PM PDT 24 |
29889102885 ps |
T370 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.870644507 |
|
|
Mar 10 02:38:39 PM PDT 24 |
Mar 10 02:43:34 PM PDT 24 |
23842864761 ps |
T371 |
/workspace/coverage/default/19.sram_ctrl_bijection.1356339237 |
|
|
Mar 10 02:37:06 PM PDT 24 |
Mar 10 02:37:52 PM PDT 24 |
10591367906 ps |
T372 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.766761091 |
|
|
Mar 10 02:40:10 PM PDT 24 |
Mar 10 02:40:11 PM PDT 24 |
30930766 ps |
T373 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.2465269321 |
|
|
Mar 10 02:40:13 PM PDT 24 |
Mar 10 02:40:20 PM PDT 24 |
269205660 ps |
T374 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3179028957 |
|
|
Mar 10 02:34:48 PM PDT 24 |
Mar 10 02:38:32 PM PDT 24 |
10074991612 ps |
T375 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.4088749120 |
|
|
Mar 10 02:35:05 PM PDT 24 |
Mar 10 02:35:44 PM PDT 24 |
4160559332 ps |
T376 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.3004883345 |
|
|
Mar 10 02:39:44 PM PDT 24 |
Mar 10 02:39:49 PM PDT 24 |
600725763 ps |
T21 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.2513679596 |
|
|
Mar 10 02:34:58 PM PDT 24 |
Mar 10 02:35:01 PM PDT 24 |
378521982 ps |
T377 |
/workspace/coverage/default/45.sram_ctrl_smoke.945635339 |
|
|
Mar 10 02:41:02 PM PDT 24 |
Mar 10 02:42:46 PM PDT 24 |
2133618711 ps |
T378 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2177303570 |
|
|
Mar 10 02:41:38 PM PDT 24 |
Mar 10 02:41:56 PM PDT 24 |
332627663 ps |
T379 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1687333239 |
|
|
Mar 10 02:41:34 PM PDT 24 |
Mar 10 02:44:06 PM PDT 24 |
1689735777 ps |
T380 |
/workspace/coverage/default/29.sram_ctrl_alert_test.272591826 |
|
|
Mar 10 02:38:50 PM PDT 24 |
Mar 10 02:38:51 PM PDT 24 |
118980410 ps |
T381 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1359558289 |
|
|
Mar 10 02:37:29 PM PDT 24 |
Mar 10 02:43:02 PM PDT 24 |
21181415250 ps |
T85 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.1984122696 |
|
|
Mar 10 02:38:29 PM PDT 24 |
Mar 10 02:38:34 PM PDT 24 |
154407387 ps |
T382 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.1384137197 |
|
|
Mar 10 02:38:56 PM PDT 24 |
Mar 10 02:46:28 PM PDT 24 |
10336555696 ps |
T383 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.1636884609 |
|
|
Mar 10 02:38:24 PM PDT 24 |
Mar 10 02:41:17 PM PDT 24 |
3600261500 ps |
T384 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.4207028703 |
|
|
Mar 10 02:41:14 PM PDT 24 |
Mar 10 02:41:23 PM PDT 24 |
464051769 ps |
T385 |
/workspace/coverage/default/1.sram_ctrl_partial_access.123669035 |
|
|
Mar 10 02:34:49 PM PDT 24 |
Mar 10 02:35:09 PM PDT 24 |
4738335648 ps |
T386 |
/workspace/coverage/default/19.sram_ctrl_stress_all.7702263 |
|
|
Mar 10 02:37:17 PM PDT 24 |
Mar 10 03:06:15 PM PDT 24 |
16293042327 ps |
T387 |
/workspace/coverage/default/8.sram_ctrl_bijection.2004028770 |
|
|
Mar 10 02:35:43 PM PDT 24 |
Mar 10 02:36:26 PM PDT 24 |
9885253793 ps |
T388 |
/workspace/coverage/default/44.sram_ctrl_alert_test.2008487558 |
|
|
Mar 10 02:40:55 PM PDT 24 |
Mar 10 02:40:56 PM PDT 24 |
22145655 ps |
T389 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1173118385 |
|
|
Mar 10 02:35:48 PM PDT 24 |
Mar 10 02:35:50 PM PDT 24 |
16415681 ps |
T390 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3451561289 |
|
|
Mar 10 02:39:19 PM PDT 24 |
Mar 10 02:41:30 PM PDT 24 |
579148971 ps |
T391 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.1900210385 |
|
|
Mar 10 02:40:26 PM PDT 24 |
Mar 10 02:41:39 PM PDT 24 |
243183613 ps |
T392 |
/workspace/coverage/default/35.sram_ctrl_partial_access.854872775 |
|
|
Mar 10 02:39:23 PM PDT 24 |
Mar 10 02:39:30 PM PDT 24 |
745151738 ps |
T393 |
/workspace/coverage/default/32.sram_ctrl_alert_test.3126116039 |
|
|
Mar 10 02:39:05 PM PDT 24 |
Mar 10 02:39:08 PM PDT 24 |
21353949 ps |
T394 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.3484648576 |
|
|
Mar 10 02:39:55 PM PDT 24 |
Mar 10 02:39:56 PM PDT 24 |
47646011 ps |
T395 |
/workspace/coverage/default/36.sram_ctrl_executable.2502234405 |
|
|
Mar 10 02:39:35 PM PDT 24 |
Mar 10 02:45:41 PM PDT 24 |
6100704472 ps |
T396 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.483514199 |
|
|
Mar 10 02:37:15 PM PDT 24 |
Mar 10 02:40:38 PM PDT 24 |
16376262392 ps |
T397 |
/workspace/coverage/default/46.sram_ctrl_smoke.812786684 |
|
|
Mar 10 02:41:08 PM PDT 24 |
Mar 10 02:41:14 PM PDT 24 |
130911216 ps |
T398 |
/workspace/coverage/default/16.sram_ctrl_executable.2146794021 |
|
|
Mar 10 02:36:42 PM PDT 24 |
Mar 10 03:00:01 PM PDT 24 |
43593405354 ps |
T399 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1942670728 |
|
|
Mar 10 02:35:27 PM PDT 24 |
Mar 10 02:35:31 PM PDT 24 |
122318823 ps |
T400 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1202670925 |
|
|
Mar 10 02:36:12 PM PDT 24 |
Mar 10 02:40:43 PM PDT 24 |
4467680448 ps |
T401 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.4160183603 |
|
|
Mar 10 02:35:47 PM PDT 24 |
Mar 10 02:35:58 PM PDT 24 |
439286455 ps |
T402 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.3953761721 |
|
|
Mar 10 02:36:41 PM PDT 24 |
Mar 10 02:39:54 PM PDT 24 |
9170036993 ps |
T403 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1350469045 |
|
|
Mar 10 02:40:55 PM PDT 24 |
Mar 10 02:41:14 PM PDT 24 |
1203576125 ps |
T404 |
/workspace/coverage/default/30.sram_ctrl_alert_test.663415541 |
|
|
Mar 10 02:38:51 PM PDT 24 |
Mar 10 02:38:52 PM PDT 24 |
37161841 ps |
T405 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.585934817 |
|
|
Mar 10 02:41:41 PM PDT 24 |
Mar 10 02:55:37 PM PDT 24 |
2039642655 ps |
T406 |
/workspace/coverage/default/34.sram_ctrl_regwen.1808349468 |
|
|
Mar 10 02:39:17 PM PDT 24 |
Mar 10 02:49:55 PM PDT 24 |
15506210839 ps |
T407 |
/workspace/coverage/default/7.sram_ctrl_partial_access.1650818296 |
|
|
Mar 10 02:35:39 PM PDT 24 |
Mar 10 02:37:53 PM PDT 24 |
2718690819 ps |
T408 |
/workspace/coverage/default/26.sram_ctrl_alert_test.3753686023 |
|
|
Mar 10 02:38:21 PM PDT 24 |
Mar 10 02:38:21 PM PDT 24 |
50029651 ps |
T409 |
/workspace/coverage/default/31.sram_ctrl_smoke.2108949799 |
|
|
Mar 10 02:38:50 PM PDT 24 |
Mar 10 02:39:06 PM PDT 24 |
2840889360 ps |
T410 |
/workspace/coverage/default/17.sram_ctrl_partial_access.262227954 |
|
|
Mar 10 02:36:50 PM PDT 24 |
Mar 10 02:36:53 PM PDT 24 |
538659653 ps |
T411 |
/workspace/coverage/default/24.sram_ctrl_bijection.1868933354 |
|
|
Mar 10 02:38:11 PM PDT 24 |
Mar 10 02:38:37 PM PDT 24 |
809899895 ps |
T50 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.4080147253 |
|
|
Mar 10 02:34:46 PM PDT 24 |
Mar 10 02:37:12 PM PDT 24 |
1818902761 ps |
T412 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.1063225309 |
|
|
Mar 10 02:39:18 PM PDT 24 |
Mar 10 02:54:00 PM PDT 24 |
7447699642 ps |
T22 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.1831958545 |
|
|
Mar 10 02:35:00 PM PDT 24 |
Mar 10 02:35:04 PM PDT 24 |
1755651594 ps |
T413 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.4137451190 |
|
|
Mar 10 02:39:57 PM PDT 24 |
Mar 10 02:40:06 PM PDT 24 |
140862943 ps |
T414 |
/workspace/coverage/default/34.sram_ctrl_executable.1780969545 |
|
|
Mar 10 02:39:20 PM PDT 24 |
Mar 10 02:45:04 PM PDT 24 |
5122421559 ps |
T415 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2861436195 |
|
|
Mar 10 02:38:19 PM PDT 24 |
Mar 10 02:42:11 PM PDT 24 |
18125092912 ps |
T416 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.1818595511 |
|
|
Mar 10 02:40:06 PM PDT 24 |
Mar 10 02:42:02 PM PDT 24 |
270297588 ps |
T417 |
/workspace/coverage/default/31.sram_ctrl_executable.1086272585 |
|
|
Mar 10 02:38:57 PM PDT 24 |
Mar 10 02:40:38 PM PDT 24 |
414356625 ps |
T418 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.188937785 |
|
|
Mar 10 02:41:09 PM PDT 24 |
Mar 10 02:54:10 PM PDT 24 |
14073324539 ps |
T419 |
/workspace/coverage/default/36.sram_ctrl_smoke.1433069000 |
|
|
Mar 10 02:39:34 PM PDT 24 |
Mar 10 02:41:49 PM PDT 24 |
1396645477 ps |
T420 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.1494138818 |
|
|
Mar 10 02:39:28 PM PDT 24 |
Mar 10 02:39:33 PM PDT 24 |
61576668 ps |
T421 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1506251788 |
|
|
Mar 10 02:34:48 PM PDT 24 |
Mar 10 02:34:51 PM PDT 24 |
122628588 ps |
T422 |
/workspace/coverage/default/43.sram_ctrl_smoke.237173531 |
|
|
Mar 10 02:40:42 PM PDT 24 |
Mar 10 02:40:49 PM PDT 24 |
416735823 ps |
T423 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1800916016 |
|
|
Mar 10 02:41:19 PM PDT 24 |
Mar 10 02:41:29 PM PDT 24 |
471143259 ps |
T424 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.3118691685 |
|
|
Mar 10 02:38:53 PM PDT 24 |
Mar 10 02:42:33 PM PDT 24 |
2315650535 ps |
T425 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.670305761 |
|
|
Mar 10 02:39:02 PM PDT 24 |
Mar 10 02:39:08 PM PDT 24 |
219250210 ps |
T426 |
/workspace/coverage/default/41.sram_ctrl_stress_all.2622912615 |
|
|
Mar 10 02:40:26 PM PDT 24 |
Mar 10 03:32:44 PM PDT 24 |
104805660966 ps |
T427 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3159516674 |
|
|
Mar 10 02:41:31 PM PDT 24 |
Mar 10 03:04:31 PM PDT 24 |
22742482601 ps |
T428 |
/workspace/coverage/default/11.sram_ctrl_smoke.3191259169 |
|
|
Mar 10 02:36:00 PM PDT 24 |
Mar 10 02:36:09 PM PDT 24 |
4163655275 ps |
T429 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.1338391266 |
|
|
Mar 10 02:40:23 PM PDT 24 |
Mar 10 02:40:26 PM PDT 24 |
172101136 ps |
T430 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.344104386 |
|
|
Mar 10 02:34:45 PM PDT 24 |
Mar 10 02:34:58 PM PDT 24 |
899894947 ps |
T431 |
/workspace/coverage/default/1.sram_ctrl_bijection.3050897843 |
|
|
Mar 10 02:34:47 PM PDT 24 |
Mar 10 02:35:32 PM PDT 24 |
862937355 ps |
T432 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2673192467 |
|
|
Mar 10 02:41:35 PM PDT 24 |
Mar 10 02:41:35 PM PDT 24 |
41916673 ps |
T433 |
/workspace/coverage/default/16.sram_ctrl_alert_test.3800581752 |
|
|
Mar 10 02:36:45 PM PDT 24 |
Mar 10 02:36:46 PM PDT 24 |
17597948 ps |
T434 |
/workspace/coverage/default/35.sram_ctrl_executable.1813460110 |
|
|
Mar 10 02:39:27 PM PDT 24 |
Mar 10 02:53:13 PM PDT 24 |
3235268675 ps |
T435 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1261024011 |
|
|
Mar 10 02:35:30 PM PDT 24 |
Mar 10 02:38:10 PM PDT 24 |
9427384320 ps |
T436 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.2143448147 |
|
|
Mar 10 02:35:02 PM PDT 24 |
Mar 10 02:35:06 PM PDT 24 |
98426646 ps |
T437 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.3646957739 |
|
|
Mar 10 02:37:36 PM PDT 24 |
Mar 10 02:37:46 PM PDT 24 |
230151511 ps |
T438 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1095984516 |
|
|
Mar 10 02:35:47 PM PDT 24 |
Mar 10 02:41:11 PM PDT 24 |
3894525323 ps |
T439 |
/workspace/coverage/default/34.sram_ctrl_alert_test.3966608073 |
|
|
Mar 10 02:39:26 PM PDT 24 |
Mar 10 02:39:28 PM PDT 24 |
27056903 ps |
T440 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.2596518241 |
|
|
Mar 10 02:40:16 PM PDT 24 |
Mar 10 02:42:50 PM PDT 24 |
146398266 ps |
T441 |
/workspace/coverage/default/49.sram_ctrl_executable.2747270220 |
|
|
Mar 10 02:41:38 PM PDT 24 |
Mar 10 03:17:56 PM PDT 24 |
77930705950 ps |
T442 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.4048469604 |
|
|
Mar 10 02:35:30 PM PDT 24 |
Mar 10 02:35:31 PM PDT 24 |
85081339 ps |
T443 |
/workspace/coverage/default/6.sram_ctrl_regwen.556247292 |
|
|
Mar 10 02:35:32 PM PDT 24 |
Mar 10 02:41:05 PM PDT 24 |
2791960579 ps |
T444 |
/workspace/coverage/default/45.sram_ctrl_alert_test.3073774755 |
|
|
Mar 10 02:41:10 PM PDT 24 |
Mar 10 02:41:10 PM PDT 24 |
16318034 ps |
T445 |
/workspace/coverage/default/23.sram_ctrl_executable.3709267806 |
|
|
Mar 10 02:38:09 PM PDT 24 |
Mar 10 02:50:11 PM PDT 24 |
16821049050 ps |
T446 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.318997887 |
|
|
Mar 10 02:39:28 PM PDT 24 |
Mar 10 02:44:51 PM PDT 24 |
29982275936 ps |
T447 |
/workspace/coverage/default/6.sram_ctrl_stress_all.4163905125 |
|
|
Mar 10 02:35:32 PM PDT 24 |
Mar 10 03:59:26 PM PDT 24 |
210430367024 ps |
T448 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1936941237 |
|
|
Mar 10 02:36:03 PM PDT 24 |
Mar 10 02:36:04 PM PDT 24 |
97657853 ps |
T449 |
/workspace/coverage/default/11.sram_ctrl_alert_test.2121618331 |
|
|
Mar 10 02:36:04 PM PDT 24 |
Mar 10 02:36:05 PM PDT 24 |
35992210 ps |
T450 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2957846170 |
|
|
Mar 10 02:41:25 PM PDT 24 |
Mar 10 02:41:30 PM PDT 24 |
651316927 ps |
T451 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.1799783285 |
|
|
Mar 10 02:36:34 PM PDT 24 |
Mar 10 02:38:52 PM PDT 24 |
165747455 ps |
T452 |
/workspace/coverage/default/2.sram_ctrl_alert_test.818951811 |
|
|
Mar 10 02:35:02 PM PDT 24 |
Mar 10 02:35:04 PM PDT 24 |
16870519 ps |
T453 |
/workspace/coverage/default/19.sram_ctrl_regwen.456953525 |
|
|
Mar 10 02:37:09 PM PDT 24 |
Mar 10 02:47:14 PM PDT 24 |
46706075101 ps |
T454 |
/workspace/coverage/default/33.sram_ctrl_alert_test.2995087591 |
|
|
Mar 10 02:39:12 PM PDT 24 |
Mar 10 02:39:14 PM PDT 24 |
25788847 ps |
T455 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.3571452662 |
|
|
Mar 10 02:37:06 PM PDT 24 |
Mar 10 02:37:09 PM PDT 24 |
167112154 ps |
T456 |
/workspace/coverage/default/6.sram_ctrl_partial_access.2361050681 |
|
|
Mar 10 02:35:28 PM PDT 24 |
Mar 10 02:35:47 PM PDT 24 |
3681898987 ps |
T457 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.3822492340 |
|
|
Mar 10 02:36:28 PM PDT 24 |
Mar 10 02:55:57 PM PDT 24 |
16830705451 ps |
T458 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.1922655593 |
|
|
Mar 10 02:39:23 PM PDT 24 |
Mar 10 02:43:03 PM PDT 24 |
2352310819 ps |
T459 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.402257509 |
|
|
Mar 10 02:41:29 PM PDT 24 |
Mar 10 03:03:35 PM PDT 24 |
7641422072 ps |
T460 |
/workspace/coverage/default/18.sram_ctrl_bijection.2430710777 |
|
|
Mar 10 02:37:00 PM PDT 24 |
Mar 10 02:37:18 PM PDT 24 |
279933467 ps |
T461 |
/workspace/coverage/default/17.sram_ctrl_smoke.3629187232 |
|
|
Mar 10 02:36:51 PM PDT 24 |
Mar 10 02:37:24 PM PDT 24 |
359253994 ps |
T462 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2802904267 |
|
|
Mar 10 02:36:00 PM PDT 24 |
Mar 10 02:36:31 PM PDT 24 |
2996077752 ps |
T463 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.3552205696 |
|
|
Mar 10 02:39:16 PM PDT 24 |
Mar 10 02:39:22 PM PDT 24 |
299948794 ps |
T464 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3572618200 |
|
|
Mar 10 02:41:01 PM PDT 24 |
Mar 10 02:46:54 PM PDT 24 |
3739584924 ps |
T465 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1437006961 |
|
|
Mar 10 02:40:42 PM PDT 24 |
Mar 10 02:40:44 PM PDT 24 |
154173690 ps |
T466 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2467944005 |
|
|
Mar 10 02:36:17 PM PDT 24 |
Mar 10 02:36:22 PM PDT 24 |
88424435 ps |
T467 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.3556151048 |
|
|
Mar 10 02:39:37 PM PDT 24 |
Mar 10 02:39:40 PM PDT 24 |
265085573 ps |
T468 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.3276984850 |
|
|
Mar 10 02:38:14 PM PDT 24 |
Mar 10 02:43:04 PM PDT 24 |
13884384022 ps |
T469 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.306446003 |
|
|
Mar 10 02:35:55 PM PDT 24 |
Mar 10 02:35:56 PM PDT 24 |
38304385 ps |
T470 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.1849823947 |
|
|
Mar 10 02:36:49 PM PDT 24 |
Mar 10 02:40:52 PM PDT 24 |
14021980515 ps |
T471 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.1521299137 |
|
|
Mar 10 02:40:10 PM PDT 24 |
Mar 10 02:40:15 PM PDT 24 |
74571597 ps |
T472 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.3279378490 |
|
|
Mar 10 02:35:05 PM PDT 24 |
Mar 10 02:35:11 PM PDT 24 |
287514243 ps |
T473 |
/workspace/coverage/default/2.sram_ctrl_stress_all.1325030505 |
|
|
Mar 10 02:35:00 PM PDT 24 |
Mar 10 02:48:38 PM PDT 24 |
20704972888 ps |
T474 |
/workspace/coverage/default/37.sram_ctrl_regwen.1459660198 |
|
|
Mar 10 02:39:45 PM PDT 24 |
Mar 10 03:00:20 PM PDT 24 |
5039399097 ps |
T475 |
/workspace/coverage/default/0.sram_ctrl_alert_test.2189987126 |
|
|
Mar 10 02:34:48 PM PDT 24 |
Mar 10 02:34:51 PM PDT 24 |
34305550 ps |
T476 |
/workspace/coverage/default/6.sram_ctrl_alert_test.3071799688 |
|
|
Mar 10 02:35:32 PM PDT 24 |
Mar 10 02:35:32 PM PDT 24 |
22163466 ps |
T477 |
/workspace/coverage/default/37.sram_ctrl_smoke.1017908317 |
|
|
Mar 10 02:39:43 PM PDT 24 |
Mar 10 02:40:00 PM PDT 24 |
3962571778 ps |
T51 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.882571389 |
|
|
Mar 10 02:35:46 PM PDT 24 |
Mar 10 02:36:20 PM PDT 24 |
875558703 ps |
T478 |
/workspace/coverage/default/12.sram_ctrl_executable.2027348543 |
|
|
Mar 10 02:36:09 PM PDT 24 |
Mar 10 02:51:42 PM PDT 24 |
21454153348 ps |
T479 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.863117858 |
|
|
Mar 10 02:34:50 PM PDT 24 |
Mar 10 02:34:56 PM PDT 24 |
241398440 ps |
T480 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.2686748706 |
|
|
Mar 10 02:39:40 PM PDT 24 |
Mar 10 02:43:11 PM PDT 24 |
2273580487 ps |
T481 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.2040158785 |
|
|
Mar 10 02:39:14 PM PDT 24 |
Mar 10 02:39:18 PM PDT 24 |
86996916 ps |
T482 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.4005296126 |
|
|
Mar 10 02:36:19 PM PDT 24 |
Mar 10 02:36:24 PM PDT 24 |
967474388 ps |
T483 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.196650990 |
|
|
Mar 10 02:36:41 PM PDT 24 |
Mar 10 02:36:57 PM PDT 24 |
3191704130 ps |
T484 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.3985884369 |
|
|
Mar 10 02:38:56 PM PDT 24 |
Mar 10 02:39:00 PM PDT 24 |
750275292 ps |
T485 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.535467925 |
|
|
Mar 10 02:40:41 PM PDT 24 |
Mar 10 02:54:24 PM PDT 24 |
2998239328 ps |
T486 |
/workspace/coverage/default/13.sram_ctrl_bijection.1001805710 |
|
|
Mar 10 02:36:14 PM PDT 24 |
Mar 10 02:36:45 PM PDT 24 |
5239096140 ps |
T487 |
/workspace/coverage/default/23.sram_ctrl_partial_access.124415920 |
|
|
Mar 10 02:37:40 PM PDT 24 |
Mar 10 02:39:52 PM PDT 24 |
1454644991 ps |
T488 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.3482401523 |
|
|
Mar 10 02:39:18 PM PDT 24 |
Mar 10 02:45:22 PM PDT 24 |
19793549200 ps |
T489 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.4233565449 |
|
|
Mar 10 02:36:19 PM PDT 24 |
Mar 10 02:39:29 PM PDT 24 |
2517381736 ps |
T490 |
/workspace/coverage/default/26.sram_ctrl_regwen.673039308 |
|
|
Mar 10 02:38:18 PM PDT 24 |
Mar 10 02:48:13 PM PDT 24 |
7562376927 ps |
T491 |
/workspace/coverage/default/5.sram_ctrl_partial_access.1855962097 |
|
|
Mar 10 02:35:21 PM PDT 24 |
Mar 10 02:35:34 PM PDT 24 |
882691277 ps |
T492 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.3421098704 |
|
|
Mar 10 02:39:33 PM PDT 24 |
Mar 10 02:39:43 PM PDT 24 |
603197857 ps |
T493 |
/workspace/coverage/default/21.sram_ctrl_regwen.4119768608 |
|
|
Mar 10 02:37:30 PM PDT 24 |
Mar 10 02:57:16 PM PDT 24 |
68780018931 ps |
T494 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1951822907 |
|
|
Mar 10 02:36:09 PM PDT 24 |
Mar 10 02:39:27 PM PDT 24 |
3003666125 ps |
T495 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.1800148902 |
|
|
Mar 10 02:40:23 PM PDT 24 |
Mar 10 02:44:41 PM PDT 24 |
2858792721 ps |
T496 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1751254749 |
|
|
Mar 10 02:35:23 PM PDT 24 |
Mar 10 02:38:04 PM PDT 24 |
1735757061 ps |
T497 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.449947422 |
|
|
Mar 10 02:37:30 PM PDT 24 |
Mar 10 02:37:31 PM PDT 24 |
89912497 ps |
T498 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.752841877 |
|
|
Mar 10 02:35:06 PM PDT 24 |
Mar 10 02:35:13 PM PDT 24 |
57778651 ps |
T499 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.3669248960 |
|
|
Mar 10 02:38:15 PM PDT 24 |
Mar 10 02:41:53 PM PDT 24 |
11490697449 ps |
T500 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3244092787 |
|
|
Mar 10 02:41:23 PM PDT 24 |
Mar 10 02:41:24 PM PDT 24 |
84610929 ps |
T501 |
/workspace/coverage/default/41.sram_ctrl_bijection.659822986 |
|
|
Mar 10 02:40:22 PM PDT 24 |
Mar 10 02:40:39 PM PDT 24 |
543243663 ps |
T502 |
/workspace/coverage/default/43.sram_ctrl_regwen.3293133249 |
|
|
Mar 10 02:40:46 PM PDT 24 |
Mar 10 02:42:02 PM PDT 24 |
2606005895 ps |
T503 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.1018502034 |
|
|
Mar 10 02:36:59 PM PDT 24 |
Mar 10 02:38:55 PM PDT 24 |
544221190 ps |
T504 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.2103666929 |
|
|
Mar 10 02:38:10 PM PDT 24 |
Mar 10 02:38:11 PM PDT 24 |
92831528 ps |
T505 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.3160557531 |
|
|
Mar 10 02:38:16 PM PDT 24 |
Mar 10 02:41:46 PM PDT 24 |
2258345488 ps |
T106 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.3074541208 |
|
|
Mar 10 02:38:57 PM PDT 24 |
Mar 10 02:39:05 PM PDT 24 |
279175426 ps |
T506 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.4030176784 |
|
|
Mar 10 02:38:48 PM PDT 24 |
Mar 10 02:38:51 PM PDT 24 |
44942929 ps |
T507 |
/workspace/coverage/default/3.sram_ctrl_executable.1335239726 |
|
|
Mar 10 02:35:05 PM PDT 24 |
Mar 10 02:56:10 PM PDT 24 |
4951621197 ps |
T508 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3881186508 |
|
|
Mar 10 02:34:52 PM PDT 24 |
Mar 10 02:34:53 PM PDT 24 |
42482800 ps |
T509 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1209160673 |
|
|
Mar 10 02:35:46 PM PDT 24 |
Mar 10 02:40:44 PM PDT 24 |
4197738537 ps |
T510 |
/workspace/coverage/default/3.sram_ctrl_stress_all.2096579492 |
|
|
Mar 10 02:35:11 PM PDT 24 |
Mar 10 03:05:30 PM PDT 24 |
128042845073 ps |
T511 |
/workspace/coverage/default/3.sram_ctrl_alert_test.3218872045 |
|
|
Mar 10 02:35:14 PM PDT 24 |
Mar 10 02:35:15 PM PDT 24 |
51583713 ps |
T512 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.320289884 |
|
|
Mar 10 02:37:20 PM PDT 24 |
Mar 10 02:37:37 PM PDT 24 |
2516148748 ps |
T513 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.1496958041 |
|
|
Mar 10 02:39:02 PM PDT 24 |
Mar 10 02:54:04 PM PDT 24 |
10536292050 ps |
T514 |
/workspace/coverage/default/28.sram_ctrl_smoke.4078084317 |
|
|
Mar 10 02:38:24 PM PDT 24 |
Mar 10 02:39:47 PM PDT 24 |
179787742 ps |
T515 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2018290958 |
|
|
Mar 10 02:37:38 PM PDT 24 |
Mar 10 02:37:40 PM PDT 24 |
143326442 ps |
T516 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.1671070627 |
|
|
Mar 10 02:37:22 PM PDT 24 |
Mar 10 02:39:47 PM PDT 24 |
530313673 ps |
T517 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.309391494 |
|
|
Mar 10 02:36:16 PM PDT 24 |
Mar 10 02:50:26 PM PDT 24 |
36031024674 ps |
T518 |
/workspace/coverage/default/3.sram_ctrl_bijection.2980280381 |
|
|
Mar 10 02:35:07 PM PDT 24 |
Mar 10 02:36:00 PM PDT 24 |
845438933 ps |
T519 |
/workspace/coverage/default/27.sram_ctrl_partial_access.3747463643 |
|
|
Mar 10 02:38:19 PM PDT 24 |
Mar 10 02:39:36 PM PDT 24 |
661526361 ps |
T520 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.3931164489 |
|
|
Mar 10 02:36:59 PM PDT 24 |
Mar 10 02:37:07 PM PDT 24 |
668148142 ps |
T521 |
/workspace/coverage/default/5.sram_ctrl_smoke.3918494052 |
|
|
Mar 10 02:35:15 PM PDT 24 |
Mar 10 02:35:22 PM PDT 24 |
401205183 ps |
T522 |
/workspace/coverage/default/31.sram_ctrl_alert_test.2859106345 |
|
|
Mar 10 02:38:55 PM PDT 24 |
Mar 10 02:38:56 PM PDT 24 |
78026672 ps |
T523 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.2039431184 |
|
|
Mar 10 02:35:02 PM PDT 24 |
Mar 10 02:35:04 PM PDT 24 |
80254573 ps |
T524 |
/workspace/coverage/default/23.sram_ctrl_alert_test.4137478787 |
|
|
Mar 10 02:38:11 PM PDT 24 |
Mar 10 02:38:12 PM PDT 24 |
23813843 ps |
T525 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.4264717083 |
|
|
Mar 10 02:35:47 PM PDT 24 |
Mar 10 02:37:55 PM PDT 24 |
292384865 ps |
T526 |
/workspace/coverage/default/18.sram_ctrl_regwen.2069031416 |
|
|
Mar 10 02:37:01 PM PDT 24 |
Mar 10 02:43:58 PM PDT 24 |
25340475204 ps |
T527 |
/workspace/coverage/default/40.sram_ctrl_alert_test.1455473669 |
|
|
Mar 10 02:40:21 PM PDT 24 |
Mar 10 02:40:21 PM PDT 24 |
17871589 ps |
T528 |
/workspace/coverage/default/48.sram_ctrl_regwen.2988519727 |
|
|
Mar 10 02:41:33 PM PDT 24 |
Mar 10 03:20:17 PM PDT 24 |
23575389149 ps |
T529 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.1613757776 |
|
|
Mar 10 02:38:32 PM PDT 24 |
Mar 10 02:39:58 PM PDT 24 |
19010165387 ps |
T530 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.4245845553 |
|
|
Mar 10 02:34:48 PM PDT 24 |
Mar 10 02:34:55 PM PDT 24 |
170075822 ps |
T531 |
/workspace/coverage/default/8.sram_ctrl_regwen.925324262 |
|
|
Mar 10 02:35:43 PM PDT 24 |
Mar 10 02:59:19 PM PDT 24 |
63056725663 ps |
T532 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.3054581953 |
|
|
Mar 10 02:37:42 PM PDT 24 |
Mar 10 02:37:43 PM PDT 24 |
49333847 ps |
T533 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.1925894380 |
|
|
Mar 10 02:35:12 PM PDT 24 |
Mar 10 02:43:43 PM PDT 24 |
19969050377 ps |
T534 |
/workspace/coverage/default/14.sram_ctrl_alert_test.3838059287 |
|
|
Mar 10 02:36:29 PM PDT 24 |
Mar 10 02:36:29 PM PDT 24 |
14291914 ps |
T535 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.174832593 |
|
|
Mar 10 02:37:19 PM PDT 24 |
Mar 10 02:39:35 PM PDT 24 |
14381767416 ps |
T536 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.3141927959 |
|
|
Mar 10 02:36:46 PM PDT 24 |
Mar 10 02:36:55 PM PDT 24 |
159847019 ps |
T537 |
/workspace/coverage/default/15.sram_ctrl_alert_test.1441717469 |
|
|
Mar 10 02:36:38 PM PDT 24 |
Mar 10 02:36:39 PM PDT 24 |
78997418 ps |
T538 |
/workspace/coverage/default/2.sram_ctrl_executable.2166359738 |
|
|
Mar 10 02:34:57 PM PDT 24 |
Mar 10 02:45:17 PM PDT 24 |
8329253117 ps |
T539 |
/workspace/coverage/default/13.sram_ctrl_executable.1223611184 |
|
|
Mar 10 02:36:16 PM PDT 24 |
Mar 10 03:06:49 PM PDT 24 |
5560249779 ps |
T540 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1795545214 |
|
|
Mar 10 02:35:24 PM PDT 24 |
Mar 10 02:43:46 PM PDT 24 |
19549344770 ps |
T541 |
/workspace/coverage/default/29.sram_ctrl_regwen.2172953342 |
|
|
Mar 10 02:38:44 PM PDT 24 |
Mar 10 02:44:43 PM PDT 24 |
8934366649 ps |
T542 |
/workspace/coverage/default/33.sram_ctrl_smoke.1909335785 |
|
|
Mar 10 02:39:04 PM PDT 24 |
Mar 10 02:39:43 PM PDT 24 |
1461674697 ps |
T543 |
/workspace/coverage/default/20.sram_ctrl_bijection.347475764 |
|
|
Mar 10 02:37:15 PM PDT 24 |
Mar 10 02:38:03 PM PDT 24 |
872707171 ps |
T544 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3166887996 |
|
|
Mar 10 02:35:48 PM PDT 24 |
Mar 10 02:35:54 PM PDT 24 |
119662997 ps |
T545 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3615794458 |
|
|
Mar 10 02:41:03 PM PDT 24 |
Mar 10 02:41:04 PM PDT 24 |
85648040 ps |