Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	13796941	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

56452131

1

T1

109349

T2

7174

T3

1250

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	35011033	1			T1	60414		T2	3930		T3	3548
values[0x0]	16236988	1			T1	28854		T2	1913		T3	1172
values[0x1]	19001051	1			T1	30956		T2	2052		T3	2257

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	6874069	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

63375003

1

T1

114790

T2

7539

T3

4058

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	253382	1			T2	29		T3	32		T7	11
valid_sources[0x01]	317775	1			T2	25		T3	26		T7	14
valid_sources[0x02]	257598	1			T2	21		T3	25		T7	17
valid_sources[0x03]	304147	1			T2	22		T3	23		T7	9
valid_sources[0x04]	259888	1			T1	12988		T2	27		T3	37
valid_sources[0x05]	305775	1			T2	41		T3	28		T7	11
valid_sources[0x06]	261139	1			T2	35		T3	27		T7	10
valid_sources[0x07]	254898	1			T2	21		T3	25		T7	7
valid_sources[0x08]	266959	1			T2	32		T3	21		T7	10
valid_sources[0x09]	299036	1			T2	21		T3	20		T7	18
valid_sources[0x0a]	265391	1			T2	20		T3	34		T7	18
valid_sources[0x0b]	273507	1			T1	2576		T2	25		T3	30
valid_sources[0x0c]	259635	1			T2	36		T3	15		T7	8
valid_sources[0x0d]	271566	1			T2	38		T3	29		T7	10
valid_sources[0x0e]	276879	1			T1	4208		T2	30		T3	24
valid_sources[0x0f]	263971	1			T2	29		T3	29		T7	8
valid_sources[0x10]	310099	1			T2	25		T3	31		T7	14
valid_sources[0x11]	281052	1			T2	28		T3	24		T7	8
valid_sources[0x12]	261136	1			T2	23		T3	21		T7	12
valid_sources[0x13]	267161	1			T2	42		T3	26		T7	11
valid_sources[0x14]	250600	1			T2	25		T3	26		T7	4
valid_sources[0x15]	248560	1			T2	28		T3	28		T7	14
valid_sources[0x16]	290469	1			T2	30		T3	27		T7	19
valid_sources[0x17]	261871	1			T2	32		T3	32		T7	5
valid_sources[0x18]	275061	1			T1	284		T2	23		T3	21
valid_sources[0x19]	276416	1			T2	32		T3	33		T7	18
valid_sources[0x1a]	268157	1			T2	17		T3	31		T7	16
valid_sources[0x1b]	268492	1			T2	40		T3	30		T7	12
valid_sources[0x1c]	276838	1			T2	31		T3	38		T7	11
valid_sources[0x1d]	256763	1			T2	41		T3	26		T7	13
valid_sources[0x1e]	252440	1			T2	31		T3	28		T7	18
valid_sources[0x1f]	316590	1			T2	19		T3	25		T7	14
valid_sources[0x20]	252969	1			T2	29		T3	18		T7	17
valid_sources[0x21]	298354	1			T2	26		T3	23		T7	15
valid_sources[0x22]	267698	1			T2	36		T3	29		T7	8
valid_sources[0x23]	299673	1			T2	34		T3	32		T7	11
valid_sources[0x24]	255992	1			T2	34		T3	36		T7	19
valid_sources[0x25]	278517	1			T2	31		T3	32		T7	6
valid_sources[0x26]	245690	1			T2	32		T3	24		T7	20
valid_sources[0x27]	269917	1			T2	30		T3	24		T7	13
valid_sources[0x28]	270695	1			T2	34		T3	31		T7	15
valid_sources[0x29]	292970	1			T2	23		T3	30		T7	15
valid_sources[0x2a]	254518	1			T2	31		T3	16		T7	7
valid_sources[0x2b]	251105	1			T2	30		T3	28		T7	10
valid_sources[0x2c]	245646	1			T2	38		T3	24		T7	8
valid_sources[0x2d]	281639	1			T2	38		T3	29		T7	15
valid_sources[0x2e]	265529	1			T2	18		T3	34		T7	13
valid_sources[0x2f]	261371	1			T2	30		T3	25		T7	12
valid_sources[0x30]	265063	1			T2	26		T3	19		T7	17
valid_sources[0x31]	245958	1			T2	29		T3	30		T7	11
valid_sources[0x32]	297348	1			T2	38		T3	29		T7	13
valid_sources[0x33]	259200	1			T2	31		T3	22		T7	9
valid_sources[0x34]	245589	1			T2	34		T3	37		T7	15
valid_sources[0x35]	284665	1			T2	36		T3	34		T7	9
valid_sources[0x36]	335748	1			T2	30		T3	27		T7	16
valid_sources[0x37]	252665	1			T2	30		T3	24		T7	16
valid_sources[0x38]	290061	1			T2	32		T3	20		T7	12
valid_sources[0x39]	283708	1			T2	18		T3	21		T7	15
valid_sources[0x3a]	252586	1			T2	28		T3	41		T7	6
valid_sources[0x3b]	260640	1			T2	43		T3	21		T7	20
valid_sources[0x3c]	244677	1			T2	44		T3	17		T7	9
valid_sources[0x3d]	282334	1			T2	22		T3	30		T7	11
valid_sources[0x3e]	312231	1			T2	33		T3	24		T7	13
valid_sources[0x3f]	301111	1			T2	33		T3	23		T7	4
valid_sources[0x40]	270025	1			T2	33		T3	25		T7	15
valid_sources[0x41]	274948	1			T2	26		T3	25		T7	12
valid_sources[0x42]	274829	1			T2	48		T3	33		T7	11
valid_sources[0x43]	275641	1			T2	19		T3	34		T7	17
valid_sources[0x44]	265939	1			T2	28		T3	30		T7	16
valid_sources[0x45]	273997	1			T2	38		T3	26		T7	7
valid_sources[0x46]	244931	1			T2	34		T3	25		T7	7
valid_sources[0x47]	262063	1			T2	30		T3	25		T7	10
valid_sources[0x48]	258072	1			T2	32		T3	34		T7	19
valid_sources[0x49]	247578	1			T2	45		T3	29		T7	14
valid_sources[0x4a]	258983	1			T2	28		T3	19		T7	10
valid_sources[0x4b]	333590	1			T2	28		T3	35		T7	20
valid_sources[0x4c]	244740	1			T2	21		T3	32		T7	13
valid_sources[0x4d]	332558	1			T2	29		T3	27		T7	15
valid_sources[0x4e]	277283	1			T2	33		T3	28		T7	8
valid_sources[0x4f]	275975	1			T2	34		T3	13		T7	8
valid_sources[0x50]	257284	1			T1	5159		T2	26		T3	16
valid_sources[0x51]	283195	1			T2	29		T3	27		T7	15
valid_sources[0x52]	293121	1			T2	30		T3	23		T7	11
valid_sources[0x53]	253509	1			T2	29		T3	30		T7	13
valid_sources[0x54]	280299	1			T2	20		T3	23		T7	17
valid_sources[0x55]	253382	1			T2	31		T3	33		T7	15
valid_sources[0x56]	255767	1			T2	27		T3	22		T7	16
valid_sources[0x57]	269073	1			T2	28		T3	23		T7	14
valid_sources[0x58]	260247	1			T2	27		T3	20		T7	6
valid_sources[0x59]	395102	1			T2	40		T3	32		T7	12
valid_sources[0x5a]	260688	1			T2	31		T3	23		T7	11
valid_sources[0x5b]	266416	1			T2	39		T3	26		T7	14
valid_sources[0x5c]	281685	1			T2	32		T3	23		T7	7
valid_sources[0x5d]	274831	1			T2	21		T3	32		T7	9
valid_sources[0x5e]	336500	1			T2	27		T3	25		T7	6
valid_sources[0x5f]	268948	1			T2	28		T3	31		T7	4
valid_sources[0x60]	272807	1			T2	29		T3	34		T7	11
valid_sources[0x61]	250310	1			T2	28		T3	28		T7	19
valid_sources[0x62]	280105	1			T1	16537		T2	48		T3	35
valid_sources[0x63]	277308	1			T2	34		T3	32		T7	10
valid_sources[0x64]	253846	1			T2	27		T3	31		T7	10
valid_sources[0x65]	258184	1			T2	38		T3	24		T7	13
valid_sources[0x66]	256057	1			T2	24		T3	24		T7	7
valid_sources[0x67]	249846	1			T2	26		T3	30		T7	8
valid_sources[0x68]	248753	1			T2	28		T3	28		T7	12
valid_sources[0x69]	254310	1			T2	30		T3	16		T7	7
valid_sources[0x6a]	260703	1			T2	36		T3	39		T7	11
valid_sources[0x6b]	285839	1			T2	37		T3	20		T7	16
valid_sources[0x6c]	290773	1			T2	43		T3	32		T7	27
valid_sources[0x6d]	323438	1			T2	30		T3	30		T7	6
valid_sources[0x6e]	248739	1			T2	35		T3	30		T7	13
valid_sources[0x6f]	256267	1			T1	24		T2	40		T3	28
valid_sources[0x70]	281312	1			T2	30		T3	24		T7	13
valid_sources[0x71]	263469	1			T2	43		T3	23		T7	21
valid_sources[0x72]	274822	1			T2	27		T3	25		T7	19
valid_sources[0x73]	295987	1			T2	35		T3	33		T7	15
valid_sources[0x74]	340803	1			T2	26		T3	26		T7	14
valid_sources[0x75]	260046	1			T2	28		T3	27		T7	7
valid_sources[0x76]	259177	1			T2	44		T3	27		T7	12
valid_sources[0x77]	248806	1			T2	32		T3	26		T7	15
valid_sources[0x78]	265951	1			T2	30		T3	31		T7	9
valid_sources[0x79]	266157	1			T2	40		T3	32		T7	13
valid_sources[0x7a]	268361	1			T2	24		T3	29		T7	10
valid_sources[0x7b]	272745	1			T2	30		T3	21		T7	15
valid_sources[0x7c]	275971	1			T2	35		T3	30		T7	11
valid_sources[0x7d]	270409	1			T2	39		T3	33		T7	11
valid_sources[0x7e]	255929	1			T2	29		T3	32		T7	14
valid_sources[0x7f]	328339	1			T2	38		T3	27		T7	12
valid_sources[0x80]	285541	1			T2	30		T3	33		T7	7

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

28112140

1

T1

54886

T2

3585

T3

643

values[0x0]

all_enables

biggest_size

14168963

1

T1

27256

T2

1798

T3

317

values[0x1]

all_enables

biggest_size

14171028

1

T1

27207

T2

1791

T3

290

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	33398	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

143262

1

T1

8

T8

2

T10

3

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	51222	1			T1	9		T4	49		T31	1492
values[0x0]	60830	1			T1	21		T3	1		T8	3
values[0x1]	64608	1			T1	19		T2	1		T8	3

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	25303	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

151357

1

T1

13

T8

4

T10

6

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	743	1			T18	1		T31	22		T36	13
valid_sources[0x01]	739	1			T14	1		T37	4		T31	32
valid_sources[0x02]	1222	1			T31	22		T35	4		T36	12
valid_sources[0x03]	789	1			T1	1		T31	17		T35	2
valid_sources[0x04]	486	1			T31	21		T15	2		T35	4
valid_sources[0x05]	871	1			T2	1		T31	17		T15	1
valid_sources[0x06]	439	1			T31	23		T117	2		T36	14
valid_sources[0x07]	788	1			T31	20		T35	2		T104	6
valid_sources[0x08]	710	1			T37	1		T31	23		T15	3
valid_sources[0x09]	599	1			T31	15		T5	5		T35	5
valid_sources[0x0a]	580	1			T31	26		T60	1		T15	1
valid_sources[0x0b]	581	1			T31	33		T35	2		T6	1
valid_sources[0x0c]	597	1			T4	3		T31	21		T35	5
valid_sources[0x0d]	916	1			T29	1		T31	24		T35	1
valid_sources[0x0e]	460	1			T31	24		T15	11		T78	3
valid_sources[0x0f]	601	1			T31	18		T60	1		T5	3
valid_sources[0x10]	528	1			T31	17		T62	1		T35	2
valid_sources[0x11]	906	1			T29	1		T31	19		T15	12
valid_sources[0x12]	851	1			T31	21		T35	4		T36	8
valid_sources[0x13]	521	1			T31	23		T35	4		T117	1
valid_sources[0x14]	682	1			T31	14		T35	3		T36	5
valid_sources[0x15]	439	1			T1	1		T29	1		T31	26
valid_sources[0x16]	544	1			T11	2		T18	1		T31	20
valid_sources[0x17]	453	1			T31	21		T52	5		T35	2
valid_sources[0x18]	758	1			T18	1		T31	17		T15	4
valid_sources[0x19]	536	1			T29	1		T37	1		T31	16
valid_sources[0x1a]	699	1			T31	19		T35	3		T36	15
valid_sources[0x1b]	825	1			T31	26		T35	1		T117	1
valid_sources[0x1c]	712	1			T4	9		T31	18		T35	3
valid_sources[0x1d]	985	1			T1	1		T31	20		T5	4
valid_sources[0x1e]	921	1			T31	17		T15	4		T5	2
valid_sources[0x1f]	505	1			T1	1		T31	24		T5	1
valid_sources[0x20]	462	1			T16	2		T31	23		T35	3
valid_sources[0x21]	675	1			T31	30		T15	4		T35	8
valid_sources[0x22]	1062	1			T31	27		T5	3		T52	3
valid_sources[0x23]	713	1			T31	29		T15	2		T5	1
valid_sources[0x24]	954	1			T31	26		T15	1		T35	1
valid_sources[0x25]	669	1			T31	21		T35	5		T36	14
valid_sources[0x26]	518	1			T31	22		T40	1		T143	2
valid_sources[0x27]	420	1			T31	23		T15	4		T35	4
valid_sources[0x28]	497	1			T29	1		T31	26		T5	1
valid_sources[0x29]	1083	1			T31	24		T23	1		T117	1
valid_sources[0x2a]	687	1			T31	30		T15	4		T35	6
valid_sources[0x2b]	850	1			T31	28		T78	1		T36	7
valid_sources[0x2c]	727	1			T31	22		T22	1		T35	2
valid_sources[0x2d]	789	1			T29	1		T31	18		T35	5
valid_sources[0x2e]	743	1			T1	1		T31	25		T35	2
valid_sources[0x2f]	764	1			T1	1		T31	20		T35	2
valid_sources[0x30]	643	1			T31	19		T23	1		T35	4
valid_sources[0x31]	616	1			T31	22		T5	2		T35	6
valid_sources[0x32]	565	1			T31	18		T33	1		T36	7
valid_sources[0x33]	455	1			T31	22		T137	2		T35	4
valid_sources[0x34]	517	1			T1	1		T31	16		T143	6
valid_sources[0x35]	582	1			T31	18		T35	5		T36	8
valid_sources[0x36]	1183	1			T31	21		T35	2		T36	14
valid_sources[0x37]	464	1			T18	1		T31	20		T78	1
valid_sources[0x38]	860	1			T31	11		T35	3		T36	10
valid_sources[0x39]	546	1			T31	21		T35	1		T36	14
valid_sources[0x3a]	648	1			T1	1		T31	22		T15	2
valid_sources[0x3b]	1282	1			T1	1		T37	3		T31	26
valid_sources[0x3c]	730	1			T31	28		T35	10		T36	15
valid_sources[0x3d]	1219	1			T31	11		T35	5		T36	17
valid_sources[0x3e]	775	1			T31	17		T5	2		T35	10
valid_sources[0x3f]	613	1			T31	29		T36	18		T54	8
valid_sources[0x40]	852	1			T31	28		T5	5		T35	4
valid_sources[0x41]	546	1			T1	1		T31	23		T15	1
valid_sources[0x42]	704	1			T1	1		T31	20		T15	4
valid_sources[0x43]	619	1			T18	1		T31	26		T5	1
valid_sources[0x44]	731	1			T31	25		T36	3		T54	6
valid_sources[0x45]	917	1			T1	2		T31	22		T5	1
valid_sources[0x46]	640	1			T1	1		T31	16		T15	3
valid_sources[0x47]	466	1			T31	22		T35	4		T36	11
valid_sources[0x48]	663	1			T31	22		T101	6		T35	6
valid_sources[0x49]	660	1			T31	26		T5	2		T22	1
valid_sources[0x4a]	798	1			T31	16		T35	2		T36	10
valid_sources[0x4b]	868	1			T31	22		T35	2		T6	2
valid_sources[0x4c]	507	1			T4	1		T31	24		T5	4
valid_sources[0x4d]	461	1			T31	24		T35	6		T36	11
valid_sources[0x4e]	785	1			T31	21		T35	5		T36	15
valid_sources[0x4f]	911	1			T31	24		T36	13		T67	1
valid_sources[0x50]	554	1			T31	22		T5	1		T35	7
valid_sources[0x51]	698	1			T31	29		T36	11		T20	1
valid_sources[0x52]	508	1			T4	12		T31	24		T35	1
valid_sources[0x53]	596	1			T31	23		T5	1		T23	1
valid_sources[0x54]	627	1			T31	22		T5	3		T35	7
valid_sources[0x55]	692	1			T31	23		T5	1		T83	1
valid_sources[0x56]	595	1			T4	7		T31	29		T15	2
valid_sources[0x57]	510	1			T1	1		T31	20		T64	1
valid_sources[0x58]	547	1			T31	20		T35	1		T36	12
valid_sources[0x59]	626	1			T31	19		T15	1		T5	3
valid_sources[0x5a]	576	1			T31	18		T63	6		T35	4
valid_sources[0x5b]	630	1			T31	19		T15	2		T35	6
valid_sources[0x5c]	554	1			T31	23		T52	4		T35	5
valid_sources[0x5d]	495	1			T1	1		T31	19		T35	13
valid_sources[0x5e]	818	1			T10	20		T31	32		T35	4
valid_sources[0x5f]	831	1			T31	17		T35	2		T36	10
valid_sources[0x60]	609	1			T31	19		T35	7		T36	23
valid_sources[0x61]	781	1			T37	1		T31	18		T15	2
valid_sources[0x62]	798	1			T1	1		T31	19		T15	2
valid_sources[0x63]	833	1			T1	1		T31	27		T15	4
valid_sources[0x64]	538	1			T31	18		T36	10		T138	1
valid_sources[0x65]	545	1			T1	1		T31	21		T5	1
valid_sources[0x66]	706	1			T31	21		T5	1		T35	6
valid_sources[0x67]	541	1			T1	1		T31	20		T35	4
valid_sources[0x68]	427	1			T31	19		T35	1		T36	12
valid_sources[0x69]	637	1			T1	1		T31	30		T35	2
valid_sources[0x6a]	782	1			T31	28		T143	3		T35	9
valid_sources[0x6b]	448	1			T4	8		T31	26		T36	14
valid_sources[0x6c]	604	1			T1	1		T29	1		T31	18
valid_sources[0x6d]	806	1			T31	28		T35	2		T36	14
valid_sources[0x6e]	598	1			T31	26		T22	1		T35	1
valid_sources[0x6f]	419	1			T29	1		T31	29		T35	1
valid_sources[0x70]	738	1			T14	1		T31	20		T5	1
valid_sources[0x71]	993	1			T31	23		T32	13		T35	3
valid_sources[0x72]	994	1			T31	14		T52	2		T35	1
valid_sources[0x73]	700	1			T31	22		T35	8		T117	1
valid_sources[0x74]	424	1			T29	1		T31	21		T15	10
valid_sources[0x75]	502	1			T31	22		T35	4		T117	3
valid_sources[0x76]	627	1			T29	1		T31	27		T35	1
valid_sources[0x77]	846	1			T31	24		T25	4		T35	2
valid_sources[0x78]	679	1			T31	32		T15	2		T5	2
valid_sources[0x79]	540	1			T31	22		T15	21		T52	1
valid_sources[0x7a]	1530	1			T31	24		T15	1		T35	3
valid_sources[0x7b]	561	1			T1	1		T29	1		T31	21
valid_sources[0x7c]	642	1			T29	1		T31	21		T5	1
valid_sources[0x7d]	664	1			T31	18		T35	3		T36	4
valid_sources[0x7e]	463	1			T31	19		T15	4		T35	2
valid_sources[0x7f]	633	1			T31	27		T23	1		T35	3
valid_sources[0x80]	612	1			T31	22		T5	2		T35	9

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

39195

1

T1

5

T4

24

T31

1374

values[0x0]

all_enables

biggest_size

53047

1

T1

3

T8

1

T10

1

values[0x1]

all_enables

biggest_size

51020

1

T8

1

T10

2

T12

1