Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.39 100.00 97.77 100.00 100.00 99.71 99.70 98.52


Total tests in report: 1025
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
76.65 76.65 96.79 96.79 68.90 68.90 72.93 72.93 71.43 71.43 87.61 87.61 95.50 95.50 43.41 43.41 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.795457089
87.22 10.57 97.96 1.17 83.26 14.37 91.52 18.60 71.43 0.00 91.07 3.46 97.00 1.50 78.29 34.88 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2572771534
94.93 7.71 99.51 1.55 91.49 8.23 92.02 0.50 100.00 28.57 97.12 6.05 97.15 0.15 87.20 8.91 /workspace/coverage/default/7.sram_ctrl_stress_all.3812313935
96.18 1.25 99.51 0.00 94.00 2.51 95.92 3.90 100.00 0.00 97.98 0.86 97.15 0.00 88.68 1.48 /workspace/coverage/default/43.sram_ctrl_executable.990729702
97.28 1.10 99.71 0.19 94.98 0.98 96.14 0.21 100.00 0.00 98.85 0.86 97.60 0.45 93.69 5.01 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3860510020
97.92 0.64 99.90 0.19 97.07 2.09 96.49 0.36 100.00 0.00 99.71 0.86 98.20 0.60 94.06 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.1736441680
98.24 0.32 99.90 0.00 97.07 0.00 98.21 1.72 100.00 0.00 99.71 0.00 98.35 0.15 94.43 0.37 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2314838212
98.46 0.22 99.90 0.00 97.49 0.42 98.78 0.57 100.00 0.00 99.71 0.00 98.35 0.00 94.99 0.56 /workspace/coverage/default/32.sram_ctrl_alert_test.3863867021
98.62 0.16 99.90 0.00 97.49 0.00 98.86 0.07 100.00 0.00 99.71 0.00 99.40 1.05 94.99 0.00 /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1279894955
98.78 0.16 99.90 0.00 97.49 0.00 98.86 0.00 100.00 0.00 99.71 0.00 99.40 0.00 96.10 1.11 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.611497042
98.91 0.13 99.90 0.00 97.49 0.00 98.86 0.00 100.00 0.00 99.71 0.00 99.40 0.00 97.03 0.93 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.856340686
99.03 0.12 100.00 0.10 97.49 0.00 99.57 0.72 100.00 0.00 99.71 0.00 99.40 0.00 97.03 0.00 /workspace/coverage/default/14.sram_ctrl_ram_cfg.4149459162
99.14 0.11 100.00 0.00 97.49 0.00 100.00 0.43 100.00 0.00 99.71 0.00 99.40 0.00 97.40 0.37 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2912970379
99.22 0.08 100.00 0.00 97.49 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.40 0.00 97.96 0.56 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.4051898482
99.30 0.07 100.00 0.00 97.63 0.14 100.00 0.00 100.00 0.00 99.71 0.00 99.40 0.00 98.33 0.37 /workspace/coverage/default/21.sram_ctrl_stress_all.3627271626
99.34 0.04 100.00 0.00 97.63 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.70 0.30 98.33 0.00 /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.501425817
99.37 0.03 100.00 0.00 97.63 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.70 0.00 98.52 0.19 /workspace/coverage/default/14.sram_ctrl_executable.588381285

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1698286351
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1258502615
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3007297135
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2531869848
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.642192203
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.556372534
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3856848259
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2724533625
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.681755825
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1321792368
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1293084604
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3122038348
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.4061634265
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.541418165
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3094149037
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1365327309
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1024903263
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2478698987
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2526088943
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2137341488
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.234601204
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2348115465
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.659021509
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3995639398
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2447983250
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1273150261
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3961152656
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3911687643
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.4008281036
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.928619809
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3005151597
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2709487354
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.768671818
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2777559265
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.786646382
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2015537676
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1365967559
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3086957194
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.263684524
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2199568294
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1095539755
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3531777660
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1484731884
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1365904313
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3489928690
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3754466282
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1869591102
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.30971151
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1148855252
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2088063432
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.473409482
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2523448309
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.913645105
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3685529624
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3370223007
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2419943834
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.786151974
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3742773756
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2457493667
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2784360018
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1165277914
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.843556522
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.189053357
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1269453756
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.556188652
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.695216221
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1830369027
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1900807521
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.762102973
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1284844197
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.579806477
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1553280780
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3066351193
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.4091174851
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2479950292
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.458120497
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.858035333
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1613979914
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.438191131
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3060219977
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1460298136
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2776471799
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.4095174539
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1791152939
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3579657004
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3971288625
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.4024950741
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.4024097183
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2751022874
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1753307788
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.953372240
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2307335905
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1575912242
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1904347827
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3853082802
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3855695346
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1136220754
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.504331649
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2609992417
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3343020135
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.610117396
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1845415547
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3851783021
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3106760510
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2885903171
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3998419211
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3585672113
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.591914853
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3581367320
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.221497127
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3097424888
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2641963085
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3603844105
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.822817861
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2329550889
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.4243164687
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2610545712
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.924187058
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2316486463
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2651602418
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1479761654
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3916236886
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1833353789
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3704170766
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2915248450
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.4033654169
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3592752426
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3123006149
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1863061816
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3704758844
/workspace/coverage/default/0.sram_ctrl_alert_test.3826971884
/workspace/coverage/default/0.sram_ctrl_bijection.1129761008
/workspace/coverage/default/0.sram_ctrl_executable.1591472773
/workspace/coverage/default/0.sram_ctrl_lc_escalation.653798041
/workspace/coverage/default/0.sram_ctrl_max_throughput.124989115
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.951290025
/workspace/coverage/default/0.sram_ctrl_mem_walk.4107804271
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3831519663
/workspace/coverage/default/0.sram_ctrl_partial_access.3823345104
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3542012635
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1412170347
/workspace/coverage/default/0.sram_ctrl_regwen.2734809407
/workspace/coverage/default/0.sram_ctrl_smoke.2331166004
/workspace/coverage/default/0.sram_ctrl_stress_all.3153141509
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1987631711
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1068916749
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2801860114
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1916068274
/workspace/coverage/default/1.sram_ctrl_alert_test.1127195701
/workspace/coverage/default/1.sram_ctrl_bijection.2271705861
/workspace/coverage/default/1.sram_ctrl_executable.1470300546
/workspace/coverage/default/1.sram_ctrl_lc_escalation.14281676
/workspace/coverage/default/1.sram_ctrl_max_throughput.816837456
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1795082254
/workspace/coverage/default/1.sram_ctrl_mem_walk.4248728100
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1382989685
/workspace/coverage/default/1.sram_ctrl_partial_access.1798316864
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2656242114
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1143343456
/workspace/coverage/default/1.sram_ctrl_regwen.3704278668
/workspace/coverage/default/1.sram_ctrl_sec_cm.2366628289
/workspace/coverage/default/1.sram_ctrl_smoke.78057753
/workspace/coverage/default/1.sram_ctrl_stress_all.1532512751
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3715794100
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2277895812
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3317795512
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.571671529
/workspace/coverage/default/10.sram_ctrl_alert_test.1611731008
/workspace/coverage/default/10.sram_ctrl_bijection.249850687
/workspace/coverage/default/10.sram_ctrl_executable.1791504066
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2018005016
/workspace/coverage/default/10.sram_ctrl_max_throughput.4222878823
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.713178325
/workspace/coverage/default/10.sram_ctrl_mem_walk.2432444863
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2322209359
/workspace/coverage/default/10.sram_ctrl_partial_access.2543948052
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2165768363
/workspace/coverage/default/10.sram_ctrl_ram_cfg.440996288
/workspace/coverage/default/10.sram_ctrl_regwen.3161937252
/workspace/coverage/default/10.sram_ctrl_smoke.2187583652
/workspace/coverage/default/10.sram_ctrl_stress_all.2743790959
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.139079288
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2519313060
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.217657075
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.770139446
/workspace/coverage/default/11.sram_ctrl_alert_test.1422835173
/workspace/coverage/default/11.sram_ctrl_bijection.3732077853
/workspace/coverage/default/11.sram_ctrl_executable.4097079698
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2791824159
/workspace/coverage/default/11.sram_ctrl_max_throughput.468893982
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3188707460
/workspace/coverage/default/11.sram_ctrl_mem_walk.4043870746
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1870070377
/workspace/coverage/default/11.sram_ctrl_partial_access.181297947
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.482305279
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1409465714
/workspace/coverage/default/11.sram_ctrl_regwen.3779694275
/workspace/coverage/default/11.sram_ctrl_smoke.3166495595
/workspace/coverage/default/11.sram_ctrl_stress_all.64973734
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2465513175
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1580502797
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1904744892
/workspace/coverage/default/12.sram_ctrl_alert_test.2008802301
/workspace/coverage/default/12.sram_ctrl_bijection.1468785835
/workspace/coverage/default/12.sram_ctrl_executable.4099277207
/workspace/coverage/default/12.sram_ctrl_lc_escalation.951721525
/workspace/coverage/default/12.sram_ctrl_max_throughput.1390279590
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.505881373
/workspace/coverage/default/12.sram_ctrl_mem_walk.1934007745
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3904646227
/workspace/coverage/default/12.sram_ctrl_partial_access.784713013
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3847627838
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/workspace/coverage/default/43.sram_ctrl_ram_cfg.4060336944
/workspace/coverage/default/43.sram_ctrl_regwen.4181950755
/workspace/coverage/default/43.sram_ctrl_smoke.2411060861
/workspace/coverage/default/43.sram_ctrl_stress_all.3539495458
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.226747481
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1115828907
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.570765150
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3194842487
/workspace/coverage/default/44.sram_ctrl_alert_test.573059516
/workspace/coverage/default/44.sram_ctrl_bijection.521362108
/workspace/coverage/default/44.sram_ctrl_executable.2048119440
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3328744915
/workspace/coverage/default/44.sram_ctrl_max_throughput.1394979443
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2797916760
/workspace/coverage/default/44.sram_ctrl_mem_walk.836059437
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1851233598
/workspace/coverage/default/44.sram_ctrl_partial_access.3553333375
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1088062579
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2495260388
/workspace/coverage/default/44.sram_ctrl_regwen.994169631
/workspace/coverage/default/44.sram_ctrl_smoke.1229980140
/workspace/coverage/default/44.sram_ctrl_stress_all.794801252
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3128604143
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2269420790
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1813165392
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1611781055
/workspace/coverage/default/45.sram_ctrl_alert_test.2872487366
/workspace/coverage/default/45.sram_ctrl_bijection.219916322
/workspace/coverage/default/45.sram_ctrl_executable.3171106339
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2057660399
/workspace/coverage/default/45.sram_ctrl_max_throughput.4255263384
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3559986552
/workspace/coverage/default/45.sram_ctrl_mem_walk.2229486779
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3502512120
/workspace/coverage/default/45.sram_ctrl_partial_access.1943942183
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1307001529
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3245110253
/workspace/coverage/default/45.sram_ctrl_regwen.3581846090
/workspace/coverage/default/45.sram_ctrl_smoke.1539144708
/workspace/coverage/default/45.sram_ctrl_stress_all.3582670874
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.872257260
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.985125256
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1034579990
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.551650647
/workspace/coverage/default/46.sram_ctrl_alert_test.359781194
/workspace/coverage/default/46.sram_ctrl_bijection.4216896684
/workspace/coverage/default/46.sram_ctrl_executable.3474116233
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2586586828
/workspace/coverage/default/46.sram_ctrl_max_throughput.695948433
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.941570046
/workspace/coverage/default/46.sram_ctrl_mem_walk.185620816
/workspace/coverage/default/46.sram_ctrl_multiple_keys.451152658
/workspace/coverage/default/46.sram_ctrl_partial_access.814621236
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3512898277
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3009367157
/workspace/coverage/default/46.sram_ctrl_regwen.3969127143
/workspace/coverage/default/46.sram_ctrl_smoke.3498505072
/workspace/coverage/default/46.sram_ctrl_stress_all.1619572777
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3996349085
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3740839433
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2713156438
/workspace/coverage/default/47.sram_ctrl_alert_test.1799908561
/workspace/coverage/default/47.sram_ctrl_bijection.4275800983
/workspace/coverage/default/47.sram_ctrl_executable.1932030944
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2487973792
/workspace/coverage/default/47.sram_ctrl_max_throughput.305390780
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3275723827
/workspace/coverage/default/47.sram_ctrl_mem_walk.3123238090
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1794900184
/workspace/coverage/default/47.sram_ctrl_partial_access.2100187906
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1705857566
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2293540615
/workspace/coverage/default/47.sram_ctrl_regwen.4106198783
/workspace/coverage/default/47.sram_ctrl_smoke.1589371855
/workspace/coverage/default/47.sram_ctrl_stress_all.175120321
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1568623974
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2078447424
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.781108337
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1725744431
/workspace/coverage/default/48.sram_ctrl_alert_test.3541515371
/workspace/coverage/default/48.sram_ctrl_bijection.128422025
/workspace/coverage/default/48.sram_ctrl_executable.2173214488
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1913673790
/workspace/coverage/default/48.sram_ctrl_max_throughput.3650838190
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1607434673
/workspace/coverage/default/48.sram_ctrl_mem_walk.178293541
/workspace/coverage/default/48.sram_ctrl_multiple_keys.317395286
/workspace/coverage/default/48.sram_ctrl_partial_access.2748245049
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.65419319
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2517777212
/workspace/coverage/default/48.sram_ctrl_regwen.297441074
/workspace/coverage/default/48.sram_ctrl_smoke.2994830262
/workspace/coverage/default/48.sram_ctrl_stress_all.4092486898
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2997286893
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1522869599
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1819270521
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.342563557
/workspace/coverage/default/49.sram_ctrl_alert_test.2753749356
/workspace/coverage/default/49.sram_ctrl_bijection.749477463
/workspace/coverage/default/49.sram_ctrl_executable.4114029073
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1147725363
/workspace/coverage/default/49.sram_ctrl_max_throughput.1697485815
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2478670607
/workspace/coverage/default/49.sram_ctrl_mem_walk.3893653423
/workspace/coverage/default/49.sram_ctrl_multiple_keys.4037769335
/workspace/coverage/default/49.sram_ctrl_partial_access.2410200007
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3849750481
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3446245843
/workspace/coverage/default/49.sram_ctrl_regwen.3448529370
/workspace/coverage/default/49.sram_ctrl_smoke.3528816677
/workspace/coverage/default/49.sram_ctrl_stress_all.3902744116
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.502533171
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3777012961
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1153652522
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1466114634
/workspace/coverage/default/5.sram_ctrl_alert_test.3020608951
/workspace/coverage/default/5.sram_ctrl_bijection.3326392173
/workspace/coverage/default/5.sram_ctrl_executable.88260747
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2144278416
/workspace/coverage/default/5.sram_ctrl_max_throughput.3147779706
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.190365229
/workspace/coverage/default/5.sram_ctrl_mem_walk.272266210
/workspace/coverage/default/5.sram_ctrl_multiple_keys.649530089
/workspace/coverage/default/5.sram_ctrl_partial_access.31034639
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1845423314
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2887438406
/workspace/coverage/default/5.sram_ctrl_regwen.2486967989
/workspace/coverage/default/5.sram_ctrl_smoke.247807336
/workspace/coverage/default/5.sram_ctrl_stress_all.712245950
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3243500000
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2442310412
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3566189405
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3829346379
/workspace/coverage/default/6.sram_ctrl_alert_test.272874682
/workspace/coverage/default/6.sram_ctrl_bijection.4054583693
/workspace/coverage/default/6.sram_ctrl_executable.2278220773
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2404021385
/workspace/coverage/default/6.sram_ctrl_max_throughput.3653181170
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.767310405
/workspace/coverage/default/6.sram_ctrl_mem_walk.2210497677
/workspace/coverage/default/6.sram_ctrl_multiple_keys.823336976
/workspace/coverage/default/6.sram_ctrl_partial_access.2062685553
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1085949475
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2430525698
/workspace/coverage/default/6.sram_ctrl_regwen.2445612550
/workspace/coverage/default/6.sram_ctrl_smoke.3478331229
/workspace/coverage/default/6.sram_ctrl_stress_all.1622895687
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3692032333
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.574650087
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3219389902
/workspace/coverage/default/7.sram_ctrl_alert_test.641903239
/workspace/coverage/default/7.sram_ctrl_bijection.3015990276
/workspace/coverage/default/7.sram_ctrl_executable.2678583116
/workspace/coverage/default/7.sram_ctrl_lc_escalation.731090603
/workspace/coverage/default/7.sram_ctrl_max_throughput.971452513
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3733819330
/workspace/coverage/default/7.sram_ctrl_mem_walk.1333220660
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1073101015
/workspace/coverage/default/7.sram_ctrl_partial_access.3237700911
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1616577225
/workspace/coverage/default/7.sram_ctrl_regwen.1140225902
/workspace/coverage/default/7.sram_ctrl_smoke.4082646542
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.725855490
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2597799214
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1029222758
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.796569012
/workspace/coverage/default/8.sram_ctrl_alert_test.987178505
/workspace/coverage/default/8.sram_ctrl_bijection.3631966794
/workspace/coverage/default/8.sram_ctrl_executable.1776386411
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1960769320
/workspace/coverage/default/8.sram_ctrl_max_throughput.1985076067
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.790686072
/workspace/coverage/default/8.sram_ctrl_mem_walk.818252581
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1023041310
/workspace/coverage/default/8.sram_ctrl_partial_access.1824584420
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.351117271
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3026415681
/workspace/coverage/default/8.sram_ctrl_regwen.1981942579
/workspace/coverage/default/8.sram_ctrl_smoke.3885279526
/workspace/coverage/default/8.sram_ctrl_stress_all.1537076550
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1052324879
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2982403523
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.4086557276
/workspace/coverage/default/9.sram_ctrl_alert_test.4114658367
/workspace/coverage/default/9.sram_ctrl_bijection.3503716029
/workspace/coverage/default/9.sram_ctrl_executable.704129032
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2065496307
/workspace/coverage/default/9.sram_ctrl_max_throughput.2676884459
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2100523718
/workspace/coverage/default/9.sram_ctrl_mem_walk.622165827
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2970552263
/workspace/coverage/default/9.sram_ctrl_partial_access.1687398569
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1485707319
/workspace/coverage/default/9.sram_ctrl_ram_cfg.768563496
/workspace/coverage/default/9.sram_ctrl_regwen.2406470886
/workspace/coverage/default/9.sram_ctrl_smoke.4227173271
/workspace/coverage/default/9.sram_ctrl_stress_all.3059760519
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.14184105
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3026054988
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2558951029



Total test records in report: 1025
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/30.sram_ctrl_ram_cfg.2275281186 Mar 19 01:25:20 PM PDT 24 Mar 19 01:25:21 PM PDT 24 90712147 ps
T2 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.795457089 Mar 19 01:27:11 PM PDT 24 Mar 19 01:55:23 PM PDT 24 3798341239 ps
T3 /workspace/coverage/default/3.sram_ctrl_alert_test.3729838897 Mar 19 01:21:19 PM PDT 24 Mar 19 01:21:20 PM PDT 24 14186528 ps
T4 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.571671529 Mar 19 01:21:51 PM PDT 24 Mar 19 01:40:51 PM PDT 24 21879716012 ps
T11 /workspace/coverage/default/40.sram_ctrl_alert_test.983340720 Mar 19 01:27:18 PM PDT 24 Mar 19 01:27:29 PM PDT 24 13093735 ps
T6 /workspace/coverage/default/25.sram_ctrl_bijection.2561095456 Mar 19 01:24:12 PM PDT 24 Mar 19 01:24:53 PM PDT 24 5690035645 ps
T5 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.2944800149 Mar 19 01:26:48 PM PDT 24 Mar 19 01:27:33 PM PDT 24 330597621 ps
T12 /workspace/coverage/default/32.sram_ctrl_bijection.1066840628 Mar 19 01:25:35 PM PDT 24 Mar 19 01:25:49 PM PDT 24 938715781 ps
T7 /workspace/coverage/default/31.sram_ctrl_mem_walk.1640438384 Mar 19 01:25:33 PM PDT 24 Mar 19 01:25:44 PM PDT 24 589769568 ps
T13 /workspace/coverage/default/16.sram_ctrl_mem_walk.2287098728 Mar 19 01:22:48 PM PDT 24 Mar 19 01:22:58 PM PDT 24 2735052107 ps
T22 /workspace/coverage/default/29.sram_ctrl_ram_cfg.501109708 Mar 19 01:25:06 PM PDT 24 Mar 19 01:25:07 PM PDT 24 29723439 ps
T17 /workspace/coverage/default/20.sram_ctrl_regwen.3263078338 Mar 19 01:23:21 PM PDT 24 Mar 19 01:33:22 PM PDT 24 34466557073 ps
T14 /workspace/coverage/default/7.sram_ctrl_partial_access.3237700911 Mar 19 01:21:26 PM PDT 24 Mar 19 01:22:18 PM PDT 24 1935884017 ps
T18 /workspace/coverage/default/23.sram_ctrl_partial_access.2941726018 Mar 19 01:23:42 PM PDT 24 Mar 19 01:24:14 PM PDT 24 678341805 ps
T19 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.3704758844 Mar 19 01:21:03 PM PDT 24 Mar 19 01:30:00 PM PDT 24 5122022202 ps
T20 /workspace/coverage/default/5.sram_ctrl_partial_access.31034639 Mar 19 01:21:21 PM PDT 24 Mar 19 01:21:32 PM PDT 24 587069849 ps
T15 /workspace/coverage/default/43.sram_ctrl_executable.990729702 Mar 19 01:28:02 PM PDT 24 Mar 19 01:38:44 PM PDT 24 14416917619 ps
T21 /workspace/coverage/default/42.sram_ctrl_regwen.2860337489 Mar 19 01:27:48 PM PDT 24 Mar 19 01:28:30 PM PDT 24 362247739 ps
T8 /workspace/coverage/default/20.sram_ctrl_lc_escalation.1652722113 Mar 19 01:23:19 PM PDT 24 Mar 19 01:23:22 PM PDT 24 189019540 ps
T61 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.3246112044 Mar 19 01:22:48 PM PDT 24 Mar 19 01:25:42 PM PDT 24 7860351856 ps
T62 /workspace/coverage/default/42.sram_ctrl_max_throughput.670944321 Mar 19 01:27:36 PM PDT 24 Mar 19 01:30:01 PM PDT 24 251455430 ps
T94 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3744371475 Mar 19 01:22:08 PM PDT 24 Mar 19 01:23:38 PM PDT 24 575399213 ps
T95 /workspace/coverage/default/32.sram_ctrl_mem_walk.1206460338 Mar 19 01:25:51 PM PDT 24 Mar 19 01:26:01 PM PDT 24 716602226 ps
T32 /workspace/coverage/default/24.sram_ctrl_ram_cfg.1376710940 Mar 19 01:24:06 PM PDT 24 Mar 19 01:24:07 PM PDT 24 30139862 ps
T96 /workspace/coverage/default/21.sram_ctrl_partial_access.1315292945 Mar 19 01:23:26 PM PDT 24 Mar 19 01:23:35 PM PDT 24 176483202 ps
T97 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2314838212 Mar 19 01:21:27 PM PDT 24 Mar 19 01:27:59 PM PDT 24 16047852781 ps
T16 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.611497042 Mar 19 01:24:01 PM PDT 24 Mar 19 01:30:02 PM PDT 24 37492301512 ps
T73 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.713178325 Mar 19 01:21:54 PM PDT 24 Mar 19 01:21:58 PM PDT 24 120852843 ps
T29 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2572771534 Mar 19 01:21:37 PM PDT 24 Mar 19 01:26:55 PM PDT 24 4660159978 ps
T9 /workspace/coverage/default/15.sram_ctrl_stress_all.1423388657 Mar 19 01:22:34 PM PDT 24 Mar 19 02:38:01 PM PDT 24 192467314957 ps
T53 /workspace/coverage/default/21.sram_ctrl_bijection.3551676656 Mar 19 01:23:26 PM PDT 24 Mar 19 01:24:07 PM PDT 24 34097390614 ps
T27 /workspace/coverage/default/8.sram_ctrl_regwen.1981942579 Mar 19 01:21:37 PM PDT 24 Mar 19 01:22:22 PM PDT 24 6772035937 ps
T54 /workspace/coverage/default/35.sram_ctrl_partial_access.664379091 Mar 19 01:26:15 PM PDT 24 Mar 19 01:26:21 PM PDT 24 1033815015 ps
T55 /workspace/coverage/default/36.sram_ctrl_multiple_keys.1493268816 Mar 19 01:26:21 PM PDT 24 Mar 19 01:37:37 PM PDT 24 10093602016 ps
T56 /workspace/coverage/default/3.sram_ctrl_mem_walk.2837325796 Mar 19 01:21:23 PM PDT 24 Mar 19 01:21:28 PM PDT 24 78656950 ps
T57 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.2351159935 Mar 19 01:25:41 PM PDT 24 Mar 19 01:42:29 PM PDT 24 18733117787 ps
T58 /workspace/coverage/default/20.sram_ctrl_partial_access.3852237686 Mar 19 01:23:22 PM PDT 24 Mar 19 01:25:26 PM PDT 24 875893617 ps
T59 /workspace/coverage/default/3.sram_ctrl_bijection.4246482320 Mar 19 01:21:20 PM PDT 24 Mar 19 01:22:06 PM PDT 24 13480207989 ps
T10 /workspace/coverage/default/22.sram_ctrl_stress_all.138747770 Mar 19 01:23:47 PM PDT 24 Mar 19 02:01:59 PM PDT 24 30221578415 ps
T149 /workspace/coverage/default/21.sram_ctrl_max_throughput.2134568281 Mar 19 01:23:26 PM PDT 24 Mar 19 01:23:33 PM PDT 24 57131757 ps
T44 /workspace/coverage/default/44.sram_ctrl_stress_all.794801252 Mar 19 01:28:10 PM PDT 24 Mar 19 02:17:05 PM PDT 24 51923452556 ps
T78 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.3855281167 Mar 19 01:23:11 PM PDT 24 Mar 19 01:23:16 PM PDT 24 766998516 ps
T150 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3157270856 Mar 19 01:23:00 PM PDT 24 Mar 19 01:23:03 PM PDT 24 86242160 ps
T30 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.502533171 Mar 19 01:29:01 PM PDT 24 Mar 19 01:39:50 PM PDT 24 1468656432 ps
T151 /workspace/coverage/default/28.sram_ctrl_smoke.3547039767 Mar 19 01:24:45 PM PDT 24 Mar 19 01:25:00 PM PDT 24 1804114736 ps
T152 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1819270521 Mar 19 01:28:49 PM PDT 24 Mar 19 01:29:18 PM PDT 24 328404165 ps
T153 /workspace/coverage/default/21.sram_ctrl_ram_cfg.3420688906 Mar 19 01:23:33 PM PDT 24 Mar 19 01:23:34 PM PDT 24 47820705 ps
T143 /workspace/coverage/default/20.sram_ctrl_executable.4122805466 Mar 19 01:23:19 PM PDT 24 Mar 19 01:31:14 PM PDT 24 8818913871 ps
T103 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.4057493724 Mar 19 01:22:18 PM PDT 24 Mar 19 01:28:58 PM PDT 24 14949747458 ps
T142 /workspace/coverage/default/15.sram_ctrl_executable.3356499416 Mar 19 01:22:35 PM PDT 24 Mar 19 01:27:57 PM PDT 24 1956438415 ps
T79 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.648905687 Mar 19 01:24:03 PM PDT 24 Mar 19 01:24:06 PM PDT 24 42820304 ps
T154 /workspace/coverage/default/12.sram_ctrl_executable.4099277207 Mar 19 01:22:07 PM PDT 24 Mar 19 01:25:45 PM PDT 24 8658750720 ps
T155 /workspace/coverage/default/19.sram_ctrl_partial_access.1923042270 Mar 19 01:23:05 PM PDT 24 Mar 19 01:25:34 PM PDT 24 212893272 ps
T148 /workspace/coverage/default/26.sram_ctrl_multiple_keys.2360043021 Mar 19 01:24:17 PM PDT 24 Mar 19 01:44:54 PM PDT 24 9963360113 ps
T156 /workspace/coverage/default/31.sram_ctrl_multiple_keys.1766556936 Mar 19 01:25:33 PM PDT 24 Mar 19 01:41:16 PM PDT 24 2922385173 ps
T145 /workspace/coverage/default/21.sram_ctrl_smoke.3316955531 Mar 19 01:23:26 PM PDT 24 Mar 19 01:23:31 PM PDT 24 840675940 ps
T31 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.7049065 Mar 19 01:26:30 PM PDT 24 Mar 19 01:32:37 PM PDT 24 4832392748 ps
T80 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.2062475292 Mar 19 01:25:19 PM PDT 24 Mar 19 01:47:48 PM PDT 24 18070545993 ps
T157 /workspace/coverage/default/23.sram_ctrl_bijection.1618463191 Mar 19 01:23:44 PM PDT 24 Mar 19 01:24:14 PM PDT 24 1710489159 ps
T158 /workspace/coverage/default/13.sram_ctrl_smoke.2008366834 Mar 19 01:22:09 PM PDT 24 Mar 19 01:22:20 PM PDT 24 379897166 ps
T159 /workspace/coverage/default/6.sram_ctrl_ram_cfg.2430525698 Mar 19 01:21:27 PM PDT 24 Mar 19 01:21:28 PM PDT 24 42875113 ps
T160 /workspace/coverage/default/0.sram_ctrl_partial_access.3823345104 Mar 19 01:21:04 PM PDT 24 Mar 19 01:21:17 PM PDT 24 261756459 ps
T81 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.329698921 Mar 19 01:23:08 PM PDT 24 Mar 19 01:36:09 PM PDT 24 1739064750 ps
T161 /workspace/coverage/default/34.sram_ctrl_partial_access.31458904 Mar 19 01:26:02 PM PDT 24 Mar 19 01:26:36 PM PDT 24 338445414 ps
T104 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.1783815386 Mar 19 01:26:38 PM PDT 24 Mar 19 01:31:49 PM PDT 24 11136525368 ps
T23 /workspace/coverage/default/11.sram_ctrl_alert_test.1422835173 Mar 19 01:22:02 PM PDT 24 Mar 19 01:22:03 PM PDT 24 118706365 ps
T162 /workspace/coverage/default/32.sram_ctrl_alert_test.3863867021 Mar 19 01:25:45 PM PDT 24 Mar 19 01:25:47 PM PDT 24 15649208 ps
T82 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.3518055066 Mar 19 01:21:21 PM PDT 24 Mar 19 01:39:03 PM PDT 24 3250708026 ps
T105 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.1052324879 Mar 19 01:21:34 PM PDT 24 Mar 19 01:24:56 PM PDT 24 7473050266 ps
T45 /workspace/coverage/default/38.sram_ctrl_stress_all.2431038860 Mar 19 01:26:50 PM PDT 24 Mar 19 02:50:08 PM PDT 24 69551637369 ps
T106 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2656242114 Mar 19 01:21:06 PM PDT 24 Mar 19 01:27:30 PM PDT 24 52098088316 ps
T28 /workspace/coverage/default/2.sram_ctrl_lc_escalation.1074708124 Mar 19 01:21:13 PM PDT 24 Mar 19 01:21:18 PM PDT 24 427439612 ps
T107 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.433227556 Mar 19 01:22:56 PM PDT 24 Mar 19 01:27:46 PM PDT 24 3174828610 ps
T163 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.1263719838 Mar 19 01:23:42 PM PDT 24 Mar 19 01:28:06 PM PDT 24 11812488510 ps
T60 /workspace/coverage/default/7.sram_ctrl_stress_all.3812313935 Mar 19 01:21:38 PM PDT 24 Mar 19 02:02:26 PM PDT 24 53408875094 ps
T164 /workspace/coverage/default/40.sram_ctrl_partial_access.2363096820 Mar 19 01:27:16 PM PDT 24 Mar 19 01:28:02 PM PDT 24 141972434 ps
T165 /workspace/coverage/default/30.sram_ctrl_partial_access.351604603 Mar 19 01:25:25 PM PDT 24 Mar 19 01:25:35 PM PDT 24 1958372482 ps
T166 /workspace/coverage/default/4.sram_ctrl_max_throughput.1873606460 Mar 19 01:21:20 PM PDT 24 Mar 19 01:22:14 PM PDT 24 270152165 ps
T167 /workspace/coverage/default/37.sram_ctrl_mem_walk.938189350 Mar 19 01:26:41 PM PDT 24 Mar 19 01:26:46 PM PDT 24 1333932842 ps
T168 /workspace/coverage/default/14.sram_ctrl_ram_cfg.4149459162 Mar 19 01:22:25 PM PDT 24 Mar 19 01:22:27 PM PDT 24 106101117 ps
T169 /workspace/coverage/default/30.sram_ctrl_executable.511831051 Mar 19 01:25:22 PM PDT 24 Mar 19 01:33:12 PM PDT 24 3053380424 ps
T170 /workspace/coverage/default/4.sram_ctrl_smoke.3712795467 Mar 19 01:21:21 PM PDT 24 Mar 19 01:23:17 PM PDT 24 6706294476 ps
T171 /workspace/coverage/default/38.sram_ctrl_bijection.3428696073 Mar 19 01:26:50 PM PDT 24 Mar 19 01:27:46 PM PDT 24 4787922561 ps
T172 /workspace/coverage/default/6.sram_ctrl_partial_access.2062685553 Mar 19 01:21:28 PM PDT 24 Mar 19 01:21:34 PM PDT 24 111711328 ps
T173 /workspace/coverage/default/17.sram_ctrl_executable.1960056475 Mar 19 01:22:54 PM PDT 24 Mar 19 01:34:31 PM PDT 24 3618915117 ps
T174 /workspace/coverage/default/35.sram_ctrl_ram_cfg.124453847 Mar 19 01:26:16 PM PDT 24 Mar 19 01:26:17 PM PDT 24 38204456 ps
T175 /workspace/coverage/default/13.sram_ctrl_max_throughput.1193545505 Mar 19 01:22:11 PM PDT 24 Mar 19 01:22:57 PM PDT 24 199473610 ps
T176 /workspace/coverage/default/25.sram_ctrl_smoke.1703037253 Mar 19 01:24:12 PM PDT 24 Mar 19 01:24:53 PM PDT 24 1426055133 ps
T177 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.3139383965 Mar 19 01:24:51 PM PDT 24 Mar 19 01:24:58 PM PDT 24 126176116 ps
T178 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.2457648730 Mar 19 01:23:33 PM PDT 24 Mar 19 01:25:22 PM PDT 24 150891249 ps
T147 /workspace/coverage/default/49.sram_ctrl_lc_escalation.1147725363 Mar 19 01:29:03 PM PDT 24 Mar 19 01:29:07 PM PDT 24 1107448962 ps
T179 /workspace/coverage/default/29.sram_ctrl_partial_access.763310415 Mar 19 01:25:02 PM PDT 24 Mar 19 01:25:31 PM PDT 24 509287803 ps
T180 /workspace/coverage/default/19.sram_ctrl_mem_walk.3032884611 Mar 19 01:23:12 PM PDT 24 Mar 19 01:23:17 PM PDT 24 76162824 ps
T181 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.4284065605 Mar 19 01:24:12 PM PDT 24 Mar 19 01:38:39 PM PDT 24 7108825633 ps
T182 /workspace/coverage/default/19.sram_ctrl_alert_test.1700500004 Mar 19 01:23:12 PM PDT 24 Mar 19 01:23:13 PM PDT 24 28147108 ps
T183 /workspace/coverage/default/10.sram_ctrl_mem_walk.2432444863 Mar 19 01:21:53 PM PDT 24 Mar 19 01:22:04 PM PDT 24 2627991602 ps
T184 /workspace/coverage/default/19.sram_ctrl_smoke.828074045 Mar 19 01:23:05 PM PDT 24 Mar 19 01:23:46 PM PDT 24 437929013 ps
T185 /workspace/coverage/default/4.sram_ctrl_multiple_keys.4059803416 Mar 19 01:21:26 PM PDT 24 Mar 19 01:28:57 PM PDT 24 3835586776 ps
T46 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1992839911 Mar 19 01:25:14 PM PDT 24 Mar 19 01:26:48 PM PDT 24 822238703 ps
T186 /workspace/coverage/default/8.sram_ctrl_alert_test.987178505 Mar 19 01:21:38 PM PDT 24 Mar 19 01:21:39 PM PDT 24 32077836 ps
T187 /workspace/coverage/default/28.sram_ctrl_mem_walk.1679018708 Mar 19 01:24:51 PM PDT 24 Mar 19 01:25:04 PM PDT 24 2565238594 ps
T144 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2692055691 Mar 19 01:26:32 PM PDT 24 Mar 19 01:31:38 PM PDT 24 30301217957 ps
T188 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.217657075 Mar 19 01:21:48 PM PDT 24 Mar 19 01:22:21 PM PDT 24 367692421 ps
T189 /workspace/coverage/default/22.sram_ctrl_max_throughput.2095948812 Mar 19 01:23:39 PM PDT 24 Mar 19 01:24:06 PM PDT 24 97835589 ps
T129 /workspace/coverage/default/24.sram_ctrl_stress_all.490131708 Mar 19 01:24:05 PM PDT 24 Mar 19 02:29:06 PM PDT 24 521692521454 ps
T190 /workspace/coverage/default/25.sram_ctrl_max_throughput.4247735957 Mar 19 01:24:11 PM PDT 24 Mar 19 01:25:25 PM PDT 24 214778552 ps
T191 /workspace/coverage/default/48.sram_ctrl_partial_access.2748245049 Mar 19 01:28:50 PM PDT 24 Mar 19 01:28:51 PM PDT 24 51004563 ps
T192 /workspace/coverage/default/14.sram_ctrl_alert_test.441535256 Mar 19 01:22:26 PM PDT 24 Mar 19 01:22:27 PM PDT 24 10333032 ps
T193 /workspace/coverage/default/46.sram_ctrl_alert_test.359781194 Mar 19 01:28:35 PM PDT 24 Mar 19 01:28:36 PM PDT 24 19453698 ps
T194 /workspace/coverage/default/30.sram_ctrl_alert_test.1766368514 Mar 19 01:25:22 PM PDT 24 Mar 19 01:25:25 PM PDT 24 13180446 ps
T195 /workspace/coverage/default/19.sram_ctrl_stress_all.2753362474 Mar 19 01:23:12 PM PDT 24 Mar 19 01:25:27 PM PDT 24 6734844139 ps
T130 /workspace/coverage/default/22.sram_ctrl_lc_escalation.1638342439 Mar 19 01:23:39 PM PDT 24 Mar 19 01:23:48 PM PDT 24 783062556 ps
T196 /workspace/coverage/default/24.sram_ctrl_multiple_keys.1534777836 Mar 19 01:23:58 PM PDT 24 Mar 19 01:33:19 PM PDT 24 5161345136 ps
T197 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.1794466179 Mar 19 01:28:02 PM PDT 24 Mar 19 01:28:07 PM PDT 24 171395436 ps
T198 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.2670819870 Mar 19 01:23:06 PM PDT 24 Mar 19 01:24:23 PM PDT 24 475226987 ps
T199 /workspace/coverage/default/14.sram_ctrl_executable.588381285 Mar 19 01:22:23 PM PDT 24 Mar 19 01:38:41 PM PDT 24 17992354640 ps
T200 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.2120364646 Mar 19 01:21:20 PM PDT 24 Mar 19 01:23:06 PM PDT 24 599534189 ps
T201 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.65419319 Mar 19 01:28:48 PM PDT 24 Mar 19 01:34:57 PM PDT 24 21952247271 ps
T202 /workspace/coverage/default/18.sram_ctrl_multiple_keys.3432868838 Mar 19 01:22:55 PM PDT 24 Mar 19 01:43:41 PM PDT 24 52948866775 ps
T203 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.2713156438 Mar 19 01:28:38 PM PDT 24 Mar 19 01:33:11 PM PDT 24 5767647132 ps
T204 /workspace/coverage/default/47.sram_ctrl_partial_access.2100187906 Mar 19 01:28:38 PM PDT 24 Mar 19 01:30:30 PM PDT 24 5414790763 ps
T205 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1307001529 Mar 19 01:28:15 PM PDT 24 Mar 19 01:34:23 PM PDT 24 6459675962 ps
T206 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.616986007 Mar 19 01:22:48 PM PDT 24 Mar 19 01:29:04 PM PDT 24 31637314437 ps
T207 /workspace/coverage/default/48.sram_ctrl_lc_escalation.1913673790 Mar 19 01:28:51 PM PDT 24 Mar 19 01:28:58 PM PDT 24 1099366803 ps
T208 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2495633406 Mar 19 01:22:42 PM PDT 24 Mar 19 01:27:42 PM PDT 24 4451456768 ps
T209 /workspace/coverage/default/25.sram_ctrl_mem_walk.4038183006 Mar 19 01:24:16 PM PDT 24 Mar 19 01:24:24 PM PDT 24 630788456 ps
T210 /workspace/coverage/default/3.sram_ctrl_partial_access.599345301 Mar 19 01:21:22 PM PDT 24 Mar 19 01:21:25 PM PDT 24 93187770 ps
T47 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2912970379 Mar 19 01:27:06 PM PDT 24 Mar 19 01:29:47 PM PDT 24 1604235296 ps
T83 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.505881373 Mar 19 01:22:07 PM PDT 24 Mar 19 01:22:12 PM PDT 24 70135018 ps
T121 /workspace/coverage/default/33.sram_ctrl_executable.2103655935 Mar 19 01:25:58 PM PDT 24 Mar 19 01:52:19 PM PDT 24 27639429960 ps
T122 /workspace/coverage/default/42.sram_ctrl_alert_test.3383789423 Mar 19 01:27:49 PM PDT 24 Mar 19 01:27:50 PM PDT 24 12162317 ps
T123 /workspace/coverage/default/33.sram_ctrl_lc_escalation.1036949233 Mar 19 01:25:51 PM PDT 24 Mar 19 01:25:58 PM PDT 24 1960534805 ps
T124 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.2442310412 Mar 19 01:21:24 PM PDT 24 Mar 19 01:25:38 PM PDT 24 10189112781 ps
T125 /workspace/coverage/default/41.sram_ctrl_lc_escalation.3108228341 Mar 19 01:27:21 PM PDT 24 Mar 19 01:27:37 PM PDT 24 810927099 ps
T126 /workspace/coverage/default/26.sram_ctrl_bijection.736858227 Mar 19 01:24:17 PM PDT 24 Mar 19 01:25:20 PM PDT 24 3541169681 ps
T127 /workspace/coverage/default/34.sram_ctrl_mem_walk.2531765401 Mar 19 01:26:05 PM PDT 24 Mar 19 01:26:15 PM PDT 24 540477859 ps
T128 /workspace/coverage/default/47.sram_ctrl_stress_all.175120321 Mar 19 01:28:43 PM PDT 24 Mar 19 01:52:44 PM PDT 24 15763884926 ps
T211 /workspace/coverage/default/42.sram_ctrl_multiple_keys.744036616 Mar 19 01:27:32 PM PDT 24 Mar 19 01:40:35 PM PDT 24 8403938864 ps
T212 /workspace/coverage/default/22.sram_ctrl_smoke.566916269 Mar 19 01:23:32 PM PDT 24 Mar 19 01:23:36 PM PDT 24 79428321 ps
T213 /workspace/coverage/default/16.sram_ctrl_ram_cfg.3300818284 Mar 19 01:22:42 PM PDT 24 Mar 19 01:22:44 PM PDT 24 26373233 ps
T48 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.281878129 Mar 19 01:25:47 PM PDT 24 Mar 19 01:31:25 PM PDT 24 4798394031 ps
T214 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2708911923 Mar 19 01:27:14 PM PDT 24 Mar 19 01:30:57 PM PDT 24 7265406596 ps
T215 /workspace/coverage/default/20.sram_ctrl_ram_cfg.520397084 Mar 19 01:23:21 PM PDT 24 Mar 19 01:23:22 PM PDT 24 96826930 ps
T216 /workspace/coverage/default/41.sram_ctrl_executable.3277166855 Mar 19 01:27:22 PM PDT 24 Mar 19 01:49:10 PM PDT 24 2673192024 ps
T217 /workspace/coverage/default/26.sram_ctrl_executable.3743085251 Mar 19 01:24:20 PM PDT 24 Mar 19 01:38:05 PM PDT 24 8577279889 ps
T218 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.424181838 Mar 19 01:23:38 PM PDT 24 Mar 19 01:26:19 PM PDT 24 4708751951 ps
T49 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.396291614 Mar 19 01:21:19 PM PDT 24 Mar 19 01:34:25 PM PDT 24 4123375618 ps
T219 /workspace/coverage/default/21.sram_ctrl_executable.1746377620 Mar 19 01:23:33 PM PDT 24 Mar 19 01:27:54 PM PDT 24 8441564331 ps
T220 /workspace/coverage/default/40.sram_ctrl_multiple_keys.3559932011 Mar 19 01:27:08 PM PDT 24 Mar 19 01:37:22 PM PDT 24 15081257411 ps
T221 /workspace/coverage/default/36.sram_ctrl_lc_escalation.475963273 Mar 19 01:26:25 PM PDT 24 Mar 19 01:26:32 PM PDT 24 466122941 ps
T222 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.3047009992 Mar 19 01:25:15 PM PDT 24 Mar 19 01:27:35 PM PDT 24 1519432473 ps
T223 /workspace/coverage/default/38.sram_ctrl_ram_cfg.3567143762 Mar 19 01:26:52 PM PDT 24 Mar 19 01:27:23 PM PDT 24 79329563 ps
T224 /workspace/coverage/default/21.sram_ctrl_mem_walk.236746113 Mar 19 01:23:34 PM PDT 24 Mar 19 01:23:44 PM PDT 24 2595011064 ps
T146 /workspace/coverage/default/41.sram_ctrl_partial_access.362715053 Mar 19 01:27:21 PM PDT 24 Mar 19 01:28:49 PM PDT 24 3752150404 ps
T50 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2581024951 Mar 19 01:23:33 PM PDT 24 Mar 19 01:24:08 PM PDT 24 6468346583 ps
T51 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.226747481 Mar 19 01:28:00 PM PDT 24 Mar 19 01:31:19 PM PDT 24 2082491253 ps
T225 /workspace/coverage/default/0.sram_ctrl_bijection.1129761008 Mar 19 01:21:01 PM PDT 24 Mar 19 01:21:24 PM PDT 24 2507337705 ps
T226 /workspace/coverage/default/11.sram_ctrl_smoke.3166495595 Mar 19 01:21:54 PM PDT 24 Mar 19 01:21:59 PM PDT 24 83608750 ps
T227 /workspace/coverage/default/30.sram_ctrl_bijection.207532372 Mar 19 01:25:15 PM PDT 24 Mar 19 01:25:43 PM PDT 24 439941546 ps
T228 /workspace/coverage/default/21.sram_ctrl_lc_escalation.4133639712 Mar 19 01:23:32 PM PDT 24 Mar 19 01:23:39 PM PDT 24 1083638258 ps
T229 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2558951029 Mar 19 01:21:44 PM PDT 24 Mar 19 01:24:06 PM PDT 24 565427928 ps
T230 /workspace/coverage/default/18.sram_ctrl_partial_access.2380359255 Mar 19 01:22:53 PM PDT 24 Mar 19 01:23:05 PM PDT 24 143329111 ps
T231 /workspace/coverage/default/27.sram_ctrl_multiple_keys.4014395495 Mar 19 01:24:37 PM PDT 24 Mar 19 02:01:52 PM PDT 24 14176055014 ps
T232 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.351117271 Mar 19 01:21:31 PM PDT 24 Mar 19 01:25:30 PM PDT 24 3352872405 ps
T233 /workspace/coverage/default/18.sram_ctrl_max_throughput.3128242113 Mar 19 01:22:58 PM PDT 24 Mar 19 01:24:51 PM PDT 24 429780973 ps
T234 /workspace/coverage/default/4.sram_ctrl_lc_escalation.1637102568 Mar 19 01:21:22 PM PDT 24 Mar 19 01:21:31 PM PDT 24 786117382 ps
T235 /workspace/coverage/default/16.sram_ctrl_regwen.2247208819 Mar 19 01:22:43 PM PDT 24 Mar 19 01:38:02 PM PDT 24 45634417229 ps
T236 /workspace/coverage/default/25.sram_ctrl_alert_test.710055453 Mar 19 01:24:16 PM PDT 24 Mar 19 01:24:17 PM PDT 24 26228801 ps
T237 /workspace/coverage/default/20.sram_ctrl_bijection.198254444 Mar 19 01:23:11 PM PDT 24 Mar 19 01:23:52 PM PDT 24 1969040527 ps
T238 /workspace/coverage/default/9.sram_ctrl_alert_test.4114658367 Mar 19 01:21:48 PM PDT 24 Mar 19 01:21:51 PM PDT 24 41526184 ps
T239 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.3165888334 Mar 19 01:25:25 PM PDT 24 Mar 19 01:29:21 PM PDT 24 2448178166 ps
T240 /workspace/coverage/default/33.sram_ctrl_ram_cfg.4046084283 Mar 19 01:25:57 PM PDT 24 Mar 19 01:25:59 PM PDT 24 173824042 ps
T241 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.2277895812 Mar 19 01:21:07 PM PDT 24 Mar 19 01:25:34 PM PDT 24 5335771031 ps
T242 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.1533829059 Mar 19 01:23:32 PM PDT 24 Mar 19 01:36:40 PM PDT 24 16310020585 ps
T243 /workspace/coverage/default/32.sram_ctrl_max_throughput.3361168572 Mar 19 01:25:46 PM PDT 24 Mar 19 01:26:40 PM PDT 24 212054437 ps
T244 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2982403523 Mar 19 01:21:30 PM PDT 24 Mar 19 01:23:00 PM PDT 24 551255829 ps
T245 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.3829346379 Mar 19 01:21:24 PM PDT 24 Mar 19 01:23:00 PM PDT 24 460163949 ps
T246 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.3179918154 Mar 19 01:26:06 PM PDT 24 Mar 19 01:43:08 PM PDT 24 21566469679 ps
T247 /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.3301422562 Mar 19 01:23:51 PM PDT 24 Mar 19 01:27:32 PM PDT 24 10726679369 ps
T248 /workspace/coverage/default/6.sram_ctrl_bijection.4054583693 Mar 19 01:21:25 PM PDT 24 Mar 19 01:22:25 PM PDT 24 5127793581 ps
T249 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.781108337 Mar 19 01:28:39 PM PDT 24 Mar 19 01:30:26 PM PDT 24 284343970 ps
T250 /workspace/coverage/default/35.sram_ctrl_lc_escalation.1972971364 Mar 19 01:26:17 PM PDT 24 Mar 19 01:26:19 PM PDT 24 323524067 ps
T251 /workspace/coverage/default/27.sram_ctrl_alert_test.4098884656 Mar 19 01:24:44 PM PDT 24 Mar 19 01:24:45 PM PDT 24 12035910 ps
T252 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.1798199602 Mar 19 01:27:31 PM PDT 24 Mar 19 01:30:57 PM PDT 24 2116543046 ps
T253 /workspace/coverage/default/7.sram_ctrl_smoke.4082646542 Mar 19 01:21:29 PM PDT 24 Mar 19 01:21:54 PM PDT 24 635181336 ps
T254 /workspace/coverage/default/45.sram_ctrl_executable.3171106339 Mar 19 01:28:15 PM PDT 24 Mar 19 01:52:41 PM PDT 24 55599193305 ps
T255 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.1253666817 Mar 19 01:24:17 PM PDT 24 Mar 19 01:24:22 PM PDT 24 122609895 ps
T256 /workspace/coverage/default/15.sram_ctrl_multiple_keys.2348963560 Mar 19 01:22:23 PM PDT 24 Mar 19 01:40:08 PM PDT 24 10884534120 ps
T257 /workspace/coverage/default/8.sram_ctrl_partial_access.1824584420 Mar 19 01:21:31 PM PDT 24 Mar 19 01:21:44 PM PDT 24 82196727 ps
T258 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.60120181 Mar 19 01:26:58 PM PDT 24 Mar 19 01:27:21 PM PDT 24 395983174 ps
T259 /workspace/coverage/default/28.sram_ctrl_partial_access.2276943680 Mar 19 01:24:45 PM PDT 24 Mar 19 01:25:00 PM PDT 24 3416648930 ps
T141 /workspace/coverage/default/34.sram_ctrl_stress_all.32630459 Mar 19 01:26:10 PM PDT 24 Mar 19 02:30:01 PM PDT 24 202452039699 ps
T260 /workspace/coverage/default/1.sram_ctrl_mem_walk.4248728100 Mar 19 01:21:19 PM PDT 24 Mar 19 01:21:24 PM PDT 24 1683192288 ps
T261 /workspace/coverage/default/13.sram_ctrl_regwen.1118278193 Mar 19 01:22:15 PM PDT 24 Mar 19 01:24:46 PM PDT 24 2535863474 ps
T262 /workspace/coverage/default/6.sram_ctrl_max_throughput.3653181170 Mar 19 01:21:29 PM PDT 24 Mar 19 01:21:31 PM PDT 24 43410433 ps
T263 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.1916068274 Mar 19 01:21:15 PM PDT 24 Mar 19 01:35:59 PM PDT 24 3998217379 ps
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T268 /workspace/coverage/default/42.sram_ctrl_ram_cfg.2163609521 Mar 19 01:27:43 PM PDT 24 Mar 19 01:27:44 PM PDT 24 80908288 ps
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T308 /workspace/coverage/default/0.sram_ctrl_smoke.2331166004 Mar 19 01:21:02 PM PDT 24 Mar 19 01:21:04 PM PDT 24 99862311 ps
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T312 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.3559088660 Mar 19 01:25:57 PM PDT 24 Mar 19 01:26:01 PM PDT 24 103389176 ps
T313 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.4086557276 Mar 19 01:21:43 PM PDT 24 Mar 19 01:37:53 PM PDT 24 4674871966 ps
T314 /workspace/coverage/default/4.sram_ctrl_alert_test.1725512807 Mar 19 01:21:21 PM PDT 24 Mar 19 01:21:22 PM PDT 24 18332541 ps
T315 /workspace/coverage/default/17.sram_ctrl_lc_escalation.1385771976 Mar 19 01:22:49 PM PDT 24 Mar 19 01:22:57 PM PDT 24 2595214667 ps
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