| T306 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.289485869 |
|
|
Apr 04 12:35:50 PM PDT 24 |
Apr 04 12:43:06 PM PDT 24 |
170329320336 ps |
| T307 |
/workspace/coverage/default/35.sram_ctrl_partial_access.2564462088 |
|
|
Apr 04 12:38:00 PM PDT 24 |
Apr 04 12:38:10 PM PDT 24 |
682889002 ps |
| T308 |
/workspace/coverage/default/18.sram_ctrl_regwen.757041941 |
|
|
Apr 04 12:36:44 PM PDT 24 |
Apr 04 12:42:56 PM PDT 24 |
2735524737 ps |
| T44 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.284538858 |
|
|
Apr 04 12:36:13 PM PDT 24 |
Apr 04 12:38:42 PM PDT 24 |
9184783651 ps |
| T309 |
/workspace/coverage/default/5.sram_ctrl_executable.2189328334 |
|
|
Apr 04 12:36:18 PM PDT 24 |
Apr 04 01:02:03 PM PDT 24 |
20395422003 ps |
| T310 |
/workspace/coverage/default/10.sram_ctrl_alert_test.2125761069 |
|
|
Apr 04 12:36:38 PM PDT 24 |
Apr 04 12:36:39 PM PDT 24 |
36343025 ps |
| T311 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.205383138 |
|
|
Apr 04 12:36:26 PM PDT 24 |
Apr 04 01:11:37 PM PDT 24 |
80462333614 ps |
| T312 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.3571500068 |
|
|
Apr 04 12:36:14 PM PDT 24 |
Apr 04 12:36:15 PM PDT 24 |
181281986 ps |
| T313 |
/workspace/coverage/default/26.sram_ctrl_partial_access.1637669072 |
|
|
Apr 04 12:37:18 PM PDT 24 |
Apr 04 12:37:20 PM PDT 24 |
164091605 ps |
| T314 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.614188120 |
|
|
Apr 04 12:36:24 PM PDT 24 |
Apr 04 12:40:28 PM PDT 24 |
5287326639 ps |
| T315 |
/workspace/coverage/default/5.sram_ctrl_alert_test.516859533 |
|
|
Apr 04 12:35:56 PM PDT 24 |
Apr 04 12:35:57 PM PDT 24 |
67321025 ps |
| T316 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.2542011281 |
|
|
Apr 04 12:37:01 PM PDT 24 |
Apr 04 12:38:40 PM PDT 24 |
132470084 ps |
| T317 |
/workspace/coverage/default/1.sram_ctrl_smoke.212907601 |
|
|
Apr 04 12:35:51 PM PDT 24 |
Apr 04 12:36:05 PM PDT 24 |
211863057 ps |
| T318 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.2008171108 |
|
|
Apr 04 12:38:17 PM PDT 24 |
Apr 04 12:38:27 PM PDT 24 |
1742892906 ps |
| T319 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.2418920150 |
|
|
Apr 04 12:37:45 PM PDT 24 |
Apr 04 12:37:48 PM PDT 24 |
148208917 ps |
| T320 |
/workspace/coverage/default/31.sram_ctrl_bijection.2732796080 |
|
|
Apr 04 12:37:46 PM PDT 24 |
Apr 04 12:38:41 PM PDT 24 |
9914911738 ps |
| T321 |
/workspace/coverage/default/17.sram_ctrl_regwen.2495530955 |
|
|
Apr 04 12:36:44 PM PDT 24 |
Apr 04 12:46:17 PM PDT 24 |
43001245126 ps |
| T322 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.1182774425 |
|
|
Apr 04 12:36:55 PM PDT 24 |
Apr 04 12:39:11 PM PDT 24 |
158475052 ps |
| T323 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.92816954 |
|
|
Apr 04 12:36:57 PM PDT 24 |
Apr 04 12:36:59 PM PDT 24 |
78557258 ps |
| T324 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.440071046 |
|
|
Apr 04 12:35:49 PM PDT 24 |
Apr 04 12:35:49 PM PDT 24 |
27585797 ps |
| T325 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.2013960519 |
|
|
Apr 04 12:36:48 PM PDT 24 |
Apr 04 12:36:49 PM PDT 24 |
29446412 ps |
| T326 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.3661762434 |
|
|
Apr 04 12:38:36 PM PDT 24 |
Apr 04 12:49:29 PM PDT 24 |
5171615227 ps |
| T327 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.2126658197 |
|
|
Apr 04 12:37:14 PM PDT 24 |
Apr 04 12:37:16 PM PDT 24 |
130778988 ps |
| T328 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.229958808 |
|
|
Apr 04 12:39:20 PM PDT 24 |
Apr 04 12:44:23 PM PDT 24 |
4441271235 ps |
| T329 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1519486694 |
|
|
Apr 04 12:35:52 PM PDT 24 |
Apr 04 12:42:13 PM PDT 24 |
98534510814 ps |
| T330 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.1401566443 |
|
|
Apr 04 12:37:30 PM PDT 24 |
Apr 04 12:37:31 PM PDT 24 |
28803275 ps |
| T331 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.3898720339 |
|
|
Apr 04 12:39:12 PM PDT 24 |
Apr 04 12:39:40 PM PDT 24 |
92568563 ps |
| T332 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.991021575 |
|
|
Apr 04 12:39:20 PM PDT 24 |
Apr 04 12:39:21 PM PDT 24 |
48045118 ps |
| T333 |
/workspace/coverage/default/30.sram_ctrl_bijection.2234269360 |
|
|
Apr 04 12:37:35 PM PDT 24 |
Apr 04 12:38:34 PM PDT 24 |
959028543 ps |
| T334 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.440632165 |
|
|
Apr 04 12:35:50 PM PDT 24 |
Apr 04 12:54:18 PM PDT 24 |
21428252633 ps |
| T335 |
/workspace/coverage/default/44.sram_ctrl_smoke.694374421 |
|
|
Apr 04 12:39:05 PM PDT 24 |
Apr 04 12:39:58 PM PDT 24 |
579844754 ps |
| T336 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.893282792 |
|
|
Apr 04 12:39:01 PM PDT 24 |
Apr 04 12:39:06 PM PDT 24 |
907871812 ps |
| T337 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.2337417629 |
|
|
Apr 04 12:36:55 PM PDT 24 |
Apr 04 12:37:03 PM PDT 24 |
605893769 ps |
| T338 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.2749719312 |
|
|
Apr 04 12:36:50 PM PDT 24 |
Apr 04 12:36:51 PM PDT 24 |
41326978 ps |
| T339 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.3689534447 |
|
|
Apr 04 12:37:19 PM PDT 24 |
Apr 04 12:37:24 PM PDT 24 |
226840120 ps |
| T340 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.1855718697 |
|
|
Apr 04 12:36:57 PM PDT 24 |
Apr 04 12:38:32 PM PDT 24 |
269877733 ps |
| T341 |
/workspace/coverage/default/20.sram_ctrl_alert_test.1354417453 |
|
|
Apr 04 12:36:53 PM PDT 24 |
Apr 04 12:36:54 PM PDT 24 |
14541270 ps |
| T342 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.4054379568 |
|
|
Apr 04 12:36:28 PM PDT 24 |
Apr 04 12:42:48 PM PDT 24 |
7664295821 ps |
| T343 |
/workspace/coverage/default/8.sram_ctrl_alert_test.1778205319 |
|
|
Apr 04 12:36:21 PM PDT 24 |
Apr 04 12:36:22 PM PDT 24 |
13223401 ps |
| T344 |
/workspace/coverage/default/12.sram_ctrl_stress_all.1708137708 |
|
|
Apr 04 12:36:24 PM PDT 24 |
Apr 04 01:02:20 PM PDT 24 |
24487704650 ps |
| T98 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.429800526 |
|
|
Apr 04 12:39:34 PM PDT 24 |
Apr 04 12:40:06 PM PDT 24 |
1084599001 ps |
| T345 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.4014662955 |
|
|
Apr 04 12:36:28 PM PDT 24 |
Apr 04 12:47:33 PM PDT 24 |
6332801882 ps |
| T346 |
/workspace/coverage/default/10.sram_ctrl_bijection.2119547583 |
|
|
Apr 04 12:36:47 PM PDT 24 |
Apr 04 12:37:05 PM PDT 24 |
313146755 ps |
| T347 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.3005752512 |
|
|
Apr 04 12:37:02 PM PDT 24 |
Apr 04 12:37:04 PM PDT 24 |
175174398 ps |
| T348 |
/workspace/coverage/default/47.sram_ctrl_alert_test.2249838176 |
|
|
Apr 04 12:39:28 PM PDT 24 |
Apr 04 12:39:28 PM PDT 24 |
13694940 ps |
| T349 |
/workspace/coverage/default/35.sram_ctrl_alert_test.3940318811 |
|
|
Apr 04 12:38:47 PM PDT 24 |
Apr 04 12:38:48 PM PDT 24 |
18425710 ps |
| T350 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2131602904 |
|
|
Apr 04 12:37:35 PM PDT 24 |
Apr 04 12:38:28 PM PDT 24 |
143753222 ps |
| T351 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.638685370 |
|
|
Apr 04 12:36:46 PM PDT 24 |
Apr 04 12:41:51 PM PDT 24 |
44436651953 ps |
| T352 |
/workspace/coverage/default/37.sram_ctrl_bijection.510816310 |
|
|
Apr 04 12:38:20 PM PDT 24 |
Apr 04 12:38:55 PM PDT 24 |
3468382006 ps |
| T353 |
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.577195266 |
|
|
Apr 04 12:39:04 PM PDT 24 |
Apr 04 12:55:28 PM PDT 24 |
2533972605 ps |
| T22 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.3398927161 |
|
|
Apr 04 12:36:01 PM PDT 24 |
Apr 04 12:36:05 PM PDT 24 |
393209983 ps |
| T354 |
/workspace/coverage/default/25.sram_ctrl_alert_test.508325924 |
|
|
Apr 04 12:37:10 PM PDT 24 |
Apr 04 12:37:11 PM PDT 24 |
14997428 ps |
| T355 |
/workspace/coverage/default/28.sram_ctrl_bijection.2993817246 |
|
|
Apr 04 12:37:23 PM PDT 24 |
Apr 04 12:38:20 PM PDT 24 |
13759977509 ps |
| T356 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1615483695 |
|
|
Apr 04 12:36:19 PM PDT 24 |
Apr 04 12:36:29 PM PDT 24 |
2787957363 ps |
| T357 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3075330299 |
|
|
Apr 04 12:37:20 PM PDT 24 |
Apr 04 12:37:50 PM PDT 24 |
3925157093 ps |
| T358 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.1999867367 |
|
|
Apr 04 12:37:18 PM PDT 24 |
Apr 04 12:41:18 PM PDT 24 |
2814190241 ps |
| T359 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.330745497 |
|
|
Apr 04 12:36:53 PM PDT 24 |
Apr 04 12:36:56 PM PDT 24 |
168428954 ps |
| T360 |
/workspace/coverage/default/23.sram_ctrl_smoke.3450343366 |
|
|
Apr 04 12:37:02 PM PDT 24 |
Apr 04 12:37:10 PM PDT 24 |
186305276 ps |
| T361 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.1850408125 |
|
|
Apr 04 12:38:10 PM PDT 24 |
Apr 04 12:42:02 PM PDT 24 |
11598232134 ps |
| T362 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.477897561 |
|
|
Apr 04 12:36:26 PM PDT 24 |
Apr 04 12:44:21 PM PDT 24 |
26296160801 ps |
| T363 |
/workspace/coverage/default/10.sram_ctrl_regwen.2176152014 |
|
|
Apr 04 12:36:19 PM PDT 24 |
Apr 04 12:46:27 PM PDT 24 |
3565532297 ps |
| T364 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.2756403241 |
|
|
Apr 04 12:37:27 PM PDT 24 |
Apr 04 12:50:59 PM PDT 24 |
30052093587 ps |
| T365 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.743864608 |
|
|
Apr 04 12:37:54 PM PDT 24 |
Apr 04 12:37:58 PM PDT 24 |
908756223 ps |
| T366 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.4160467381 |
|
|
Apr 04 12:37:09 PM PDT 24 |
Apr 04 12:37:12 PM PDT 24 |
204654203 ps |
| T367 |
/workspace/coverage/default/13.sram_ctrl_executable.4198339726 |
|
|
Apr 04 12:36:42 PM PDT 24 |
Apr 04 12:54:16 PM PDT 24 |
6296549907 ps |
| T368 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.3448195695 |
|
|
Apr 04 12:37:19 PM PDT 24 |
Apr 04 12:39:33 PM PDT 24 |
307781867 ps |
| T369 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.1598697216 |
|
|
Apr 04 12:37:56 PM PDT 24 |
Apr 04 12:38:03 PM PDT 24 |
219808845 ps |
| T370 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.2259328200 |
|
|
Apr 04 12:38:00 PM PDT 24 |
Apr 04 12:38:02 PM PDT 24 |
84901189 ps |
| T371 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1122722024 |
|
|
Apr 04 12:36:31 PM PDT 24 |
Apr 04 12:41:13 PM PDT 24 |
3042885452 ps |
| T372 |
/workspace/coverage/default/48.sram_ctrl_smoke.868458448 |
|
|
Apr 04 12:39:30 PM PDT 24 |
Apr 04 12:39:43 PM PDT 24 |
841413130 ps |
| T373 |
/workspace/coverage/default/19.sram_ctrl_smoke.3377049026 |
|
|
Apr 04 12:36:46 PM PDT 24 |
Apr 04 12:37:00 PM PDT 24 |
881309590 ps |
| T374 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1171296065 |
|
|
Apr 04 12:39:04 PM PDT 24 |
Apr 04 12:39:13 PM PDT 24 |
124512438 ps |
| T375 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1888138452 |
|
|
Apr 04 12:39:17 PM PDT 24 |
Apr 04 12:41:39 PM PDT 24 |
1805545198 ps |
| T376 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.2119040433 |
|
|
Apr 04 12:37:43 PM PDT 24 |
Apr 04 12:59:54 PM PDT 24 |
5051773613 ps |
| T377 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.3221796248 |
|
|
Apr 04 12:37:36 PM PDT 24 |
Apr 04 12:37:38 PM PDT 24 |
94074901 ps |
| T378 |
/workspace/coverage/default/43.sram_ctrl_alert_test.763882294 |
|
|
Apr 04 12:39:06 PM PDT 24 |
Apr 04 12:39:06 PM PDT 24 |
47593840 ps |
| T379 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.2523520615 |
|
|
Apr 04 12:36:26 PM PDT 24 |
Apr 04 01:09:57 PM PDT 24 |
77817841501 ps |
| T380 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2564235513 |
|
|
Apr 04 12:36:02 PM PDT 24 |
Apr 04 12:44:29 PM PDT 24 |
19192144610 ps |
| T381 |
/workspace/coverage/default/41.sram_ctrl_executable.4232822168 |
|
|
Apr 04 12:38:45 PM PDT 24 |
Apr 04 12:47:06 PM PDT 24 |
27722194212 ps |
| T382 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.3274895607 |
|
|
Apr 04 12:36:05 PM PDT 24 |
Apr 04 12:38:16 PM PDT 24 |
133168160 ps |
| T383 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.114179018 |
|
|
Apr 04 12:39:28 PM PDT 24 |
Apr 04 12:39:31 PM PDT 24 |
662453865 ps |
| T384 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.1006266089 |
|
|
Apr 04 12:36:22 PM PDT 24 |
Apr 04 12:40:42 PM PDT 24 |
1237767705 ps |
| T385 |
/workspace/coverage/default/24.sram_ctrl_stress_all.246385887 |
|
|
Apr 04 12:37:14 PM PDT 24 |
Apr 04 01:24:46 PM PDT 24 |
7408452108 ps |
| T386 |
/workspace/coverage/default/31.sram_ctrl_regwen.1231800263 |
|
|
Apr 04 12:37:45 PM PDT 24 |
Apr 04 12:54:20 PM PDT 24 |
26238134279 ps |
| T387 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2539218521 |
|
|
Apr 04 12:35:48 PM PDT 24 |
Apr 04 12:35:53 PM PDT 24 |
133405924 ps |
| T388 |
/workspace/coverage/default/22.sram_ctrl_alert_test.867949688 |
|
|
Apr 04 12:37:07 PM PDT 24 |
Apr 04 12:37:09 PM PDT 24 |
100426851 ps |
| T389 |
/workspace/coverage/default/22.sram_ctrl_smoke.2335384123 |
|
|
Apr 04 12:36:57 PM PDT 24 |
Apr 04 12:37:01 PM PDT 24 |
149757815 ps |
| T390 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.3376316865 |
|
|
Apr 04 12:35:48 PM PDT 24 |
Apr 04 12:37:09 PM PDT 24 |
425471508 ps |
| T391 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.2341970435 |
|
|
Apr 04 12:35:53 PM PDT 24 |
Apr 04 12:35:55 PM PDT 24 |
144754435 ps |
| T392 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.180744375 |
|
|
Apr 04 12:38:01 PM PDT 24 |
Apr 04 12:38:02 PM PDT 24 |
31292671 ps |
| T393 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.3071808838 |
|
|
Apr 04 12:37:34 PM PDT 24 |
Apr 04 12:38:17 PM PDT 24 |
375428523 ps |
| T394 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.2194766921 |
|
|
Apr 04 12:36:39 PM PDT 24 |
Apr 04 12:36:42 PM PDT 24 |
52323440 ps |
| T395 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.272359013 |
|
|
Apr 04 12:36:53 PM PDT 24 |
Apr 04 12:36:56 PM PDT 24 |
155118223 ps |
| T396 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.793906689 |
|
|
Apr 04 12:36:00 PM PDT 24 |
Apr 04 12:36:05 PM PDT 24 |
56004372 ps |
| T397 |
/workspace/coverage/default/37.sram_ctrl_executable.337028052 |
|
|
Apr 04 12:38:24 PM PDT 24 |
Apr 04 12:42:13 PM PDT 24 |
2629389028 ps |
| T398 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.3754166529 |
|
|
Apr 04 12:37:28 PM PDT 24 |
Apr 04 12:37:33 PM PDT 24 |
584754346 ps |
| T399 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2441717413 |
|
|
Apr 04 12:38:36 PM PDT 24 |
Apr 04 12:43:29 PM PDT 24 |
53891082045 ps |
| T400 |
/workspace/coverage/default/33.sram_ctrl_regwen.2970865375 |
|
|
Apr 04 12:37:51 PM PDT 24 |
Apr 04 01:06:26 PM PDT 24 |
33569946506 ps |
| T401 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.2319927534 |
|
|
Apr 04 12:36:34 PM PDT 24 |
Apr 04 12:36:38 PM PDT 24 |
347218651 ps |
| T402 |
/workspace/coverage/default/19.sram_ctrl_stress_all.803502542 |
|
|
Apr 04 12:36:44 PM PDT 24 |
Apr 04 01:10:59 PM PDT 24 |
61098382464 ps |
| T403 |
/workspace/coverage/default/5.sram_ctrl_bijection.602330935 |
|
|
Apr 04 12:36:25 PM PDT 24 |
Apr 04 12:37:21 PM PDT 24 |
19239784247 ps |
| T404 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2176089898 |
|
|
Apr 04 12:38:08 PM PDT 24 |
Apr 04 12:38:53 PM PDT 24 |
240047298 ps |
| T405 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1327728576 |
|
|
Apr 04 12:36:24 PM PDT 24 |
Apr 04 12:39:15 PM PDT 24 |
7309958665 ps |
| T406 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.2453618295 |
|
|
Apr 04 12:37:35 PM PDT 24 |
Apr 04 12:37:40 PM PDT 24 |
174219901 ps |
| T407 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.1941262276 |
|
|
Apr 04 12:36:13 PM PDT 24 |
Apr 04 12:36:21 PM PDT 24 |
274273254 ps |
| T408 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.2119911403 |
|
|
Apr 04 12:37:02 PM PDT 24 |
Apr 04 12:37:11 PM PDT 24 |
252183167 ps |
| T409 |
/workspace/coverage/default/28.sram_ctrl_executable.3082909181 |
|
|
Apr 04 12:37:25 PM PDT 24 |
Apr 04 12:51:10 PM PDT 24 |
11078959411 ps |
| T410 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.181326688 |
|
|
Apr 04 12:36:43 PM PDT 24 |
Apr 04 12:36:51 PM PDT 24 |
144586962 ps |
| T411 |
/workspace/coverage/default/38.sram_ctrl_executable.3405629230 |
|
|
Apr 04 12:38:32 PM PDT 24 |
Apr 04 01:03:36 PM PDT 24 |
49234099355 ps |
| T412 |
/workspace/coverage/default/43.sram_ctrl_smoke.226868763 |
|
|
Apr 04 12:38:54 PM PDT 24 |
Apr 04 12:41:07 PM PDT 24 |
5674171694 ps |
| T413 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.350998592 |
|
|
Apr 04 12:37:25 PM PDT 24 |
Apr 04 12:42:49 PM PDT 24 |
59157997170 ps |
| T414 |
/workspace/coverage/default/16.sram_ctrl_smoke.1903403236 |
|
|
Apr 04 12:36:32 PM PDT 24 |
Apr 04 12:37:11 PM PDT 24 |
736896363 ps |
| T415 |
/workspace/coverage/default/3.sram_ctrl_smoke.2172634723 |
|
|
Apr 04 12:35:50 PM PDT 24 |
Apr 04 12:38:17 PM PDT 24 |
144167811 ps |
| T416 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.1193350296 |
|
|
Apr 04 12:37:46 PM PDT 24 |
Apr 04 12:37:49 PM PDT 24 |
921232317 ps |
| T417 |
/workspace/coverage/default/36.sram_ctrl_bijection.3843441810 |
|
|
Apr 04 12:38:09 PM PDT 24 |
Apr 04 12:38:55 PM PDT 24 |
1470202013 ps |
| T418 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.3001485072 |
|
|
Apr 04 12:36:40 PM PDT 24 |
Apr 04 12:43:13 PM PDT 24 |
36467180739 ps |
| T419 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.1749432693 |
|
|
Apr 04 12:36:51 PM PDT 24 |
Apr 04 12:41:16 PM PDT 24 |
29396066676 ps |
| T420 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.40654588 |
|
|
Apr 04 12:37:44 PM PDT 24 |
Apr 04 12:37:49 PM PDT 24 |
1153665704 ps |
| T421 |
/workspace/coverage/default/25.sram_ctrl_stress_all.72949822 |
|
|
Apr 04 12:37:27 PM PDT 24 |
Apr 04 01:05:10 PM PDT 24 |
73625067037 ps |
| T99 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1243453773 |
|
|
Apr 04 12:39:21 PM PDT 24 |
Apr 04 12:39:37 PM PDT 24 |
2591294157 ps |
| T422 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.2185566444 |
|
|
Apr 04 12:36:00 PM PDT 24 |
Apr 04 12:51:04 PM PDT 24 |
14646248209 ps |
| T423 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.678745685 |
|
|
Apr 04 12:39:36 PM PDT 24 |
Apr 04 12:39:42 PM PDT 24 |
202530778 ps |
| T424 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.607687766 |
|
|
Apr 04 12:38:28 PM PDT 24 |
Apr 04 12:38:32 PM PDT 24 |
736500074 ps |
| T425 |
/workspace/coverage/default/21.sram_ctrl_smoke.632735543 |
|
|
Apr 04 12:37:14 PM PDT 24 |
Apr 04 12:38:29 PM PDT 24 |
570395609 ps |
| T426 |
/workspace/coverage/default/22.sram_ctrl_executable.326480411 |
|
|
Apr 04 12:36:59 PM PDT 24 |
Apr 04 12:42:20 PM PDT 24 |
5245717592 ps |
| T100 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1630639727 |
|
|
Apr 04 12:38:45 PM PDT 24 |
Apr 04 12:42:04 PM PDT 24 |
2437174209 ps |
| T427 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.803126448 |
|
|
Apr 04 12:37:40 PM PDT 24 |
Apr 04 12:37:41 PM PDT 24 |
255335711 ps |
| T428 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1806248730 |
|
|
Apr 04 12:36:43 PM PDT 24 |
Apr 04 12:38:24 PM PDT 24 |
165499745 ps |
| T429 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2105314013 |
|
|
Apr 04 12:39:28 PM PDT 24 |
Apr 04 12:39:30 PM PDT 24 |
87452306 ps |
| T430 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.3181528341 |
|
|
Apr 04 12:38:00 PM PDT 24 |
Apr 04 12:55:18 PM PDT 24 |
13331733140 ps |
| T431 |
/workspace/coverage/default/33.sram_ctrl_partial_access.1270130361 |
|
|
Apr 04 12:37:53 PM PDT 24 |
Apr 04 12:38:12 PM PDT 24 |
18684226973 ps |
| T432 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1580939680 |
|
|
Apr 04 12:38:31 PM PDT 24 |
Apr 04 12:40:44 PM PDT 24 |
3035031149 ps |
| T433 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3513432328 |
|
|
Apr 04 12:36:44 PM PDT 24 |
Apr 04 12:36:47 PM PDT 24 |
176182810 ps |
| T434 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1796490234 |
|
|
Apr 04 12:39:35 PM PDT 24 |
Apr 04 12:47:42 PM PDT 24 |
2482012476 ps |
| T435 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.2822601111 |
|
|
Apr 04 12:37:36 PM PDT 24 |
Apr 04 12:37:41 PM PDT 24 |
704023690 ps |
| T436 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1476922912 |
|
|
Apr 04 12:36:33 PM PDT 24 |
Apr 04 12:40:54 PM PDT 24 |
9808191514 ps |
| T437 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1928114027 |
|
|
Apr 04 12:39:26 PM PDT 24 |
Apr 04 12:45:37 PM PDT 24 |
780906293 ps |
| T438 |
/workspace/coverage/default/25.sram_ctrl_partial_access.1651596144 |
|
|
Apr 04 12:37:10 PM PDT 24 |
Apr 04 12:38:55 PM PDT 24 |
2774431203 ps |
| T439 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3686841867 |
|
|
Apr 04 12:37:27 PM PDT 24 |
Apr 04 12:37:42 PM PDT 24 |
1864105253 ps |
| T440 |
/workspace/coverage/default/49.sram_ctrl_regwen.2509964055 |
|
|
Apr 04 12:39:37 PM PDT 24 |
Apr 04 12:47:15 PM PDT 24 |
7423502546 ps |
| T441 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.3343331178 |
|
|
Apr 04 12:36:44 PM PDT 24 |
Apr 04 12:36:48 PM PDT 24 |
452983149 ps |
| T442 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.618385017 |
|
|
Apr 04 12:37:17 PM PDT 24 |
Apr 04 12:38:52 PM PDT 24 |
412129631 ps |
| T443 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.4057759858 |
|
|
Apr 04 12:39:36 PM PDT 24 |
Apr 04 12:39:39 PM PDT 24 |
1655188211 ps |
| T444 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.3137979428 |
|
|
Apr 04 12:36:00 PM PDT 24 |
Apr 04 01:03:46 PM PDT 24 |
15819611708 ps |
| T445 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2286977076 |
|
|
Apr 04 12:39:13 PM PDT 24 |
Apr 04 12:39:16 PM PDT 24 |
92528845 ps |
| T446 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.698546793 |
|
|
Apr 04 12:36:05 PM PDT 24 |
Apr 04 12:36:10 PM PDT 24 |
283503953 ps |
| T447 |
/workspace/coverage/default/41.sram_ctrl_regwen.2434526501 |
|
|
Apr 04 12:38:43 PM PDT 24 |
Apr 04 12:46:35 PM PDT 24 |
73401129032 ps |
| T448 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.1764693111 |
|
|
Apr 04 12:37:33 PM PDT 24 |
Apr 04 12:43:02 PM PDT 24 |
32575199228 ps |
| T449 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.768787075 |
|
|
Apr 04 12:35:59 PM PDT 24 |
Apr 04 12:36:02 PM PDT 24 |
93538325 ps |
| T450 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2884076404 |
|
|
Apr 04 12:37:45 PM PDT 24 |
Apr 04 12:42:01 PM PDT 24 |
5369561666 ps |
| T451 |
/workspace/coverage/default/20.sram_ctrl_executable.16396759 |
|
|
Apr 04 12:37:04 PM PDT 24 |
Apr 04 12:41:50 PM PDT 24 |
17090408761 ps |
| T452 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.462047101 |
|
|
Apr 04 12:36:42 PM PDT 24 |
Apr 04 12:41:23 PM PDT 24 |
15305575594 ps |
| T453 |
/workspace/coverage/default/44.sram_ctrl_regwen.776717041 |
|
|
Apr 04 12:39:06 PM PDT 24 |
Apr 04 01:00:51 PM PDT 24 |
16190883932 ps |
| T454 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.3297499037 |
|
|
Apr 04 12:36:37 PM PDT 24 |
Apr 04 12:36:47 PM PDT 24 |
2847034379 ps |
| T455 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.213708582 |
|
|
Apr 04 12:37:23 PM PDT 24 |
Apr 04 12:37:30 PM PDT 24 |
942713465 ps |
| T456 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1924325355 |
|
|
Apr 04 12:36:27 PM PDT 24 |
Apr 04 12:37:45 PM PDT 24 |
125894630 ps |
| T457 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1437848583 |
|
|
Apr 04 12:39:21 PM PDT 24 |
Apr 04 12:39:22 PM PDT 24 |
28050634 ps |
| T458 |
/workspace/coverage/default/12.sram_ctrl_partial_access.714780846 |
|
|
Apr 04 12:36:24 PM PDT 24 |
Apr 04 12:36:25 PM PDT 24 |
202441724 ps |
| T459 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1562068517 |
|
|
Apr 04 12:39:22 PM PDT 24 |
Apr 04 12:39:29 PM PDT 24 |
592581681 ps |
| T460 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.614672993 |
|
|
Apr 04 12:36:44 PM PDT 24 |
Apr 04 12:36:50 PM PDT 24 |
334641303 ps |
| T461 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.574497510 |
|
|
Apr 04 12:36:58 PM PDT 24 |
Apr 04 12:37:00 PM PDT 24 |
48614186 ps |
| T462 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.131117634 |
|
|
Apr 04 12:36:03 PM PDT 24 |
Apr 04 12:36:05 PM PDT 24 |
164435229 ps |
| T463 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.1348511061 |
|
|
Apr 04 12:37:09 PM PDT 24 |
Apr 04 12:37:55 PM PDT 24 |
111333454 ps |
| T464 |
/workspace/coverage/default/26.sram_ctrl_regwen.1205179784 |
|
|
Apr 04 12:37:20 PM PDT 24 |
Apr 04 12:52:39 PM PDT 24 |
2234374101 ps |
| T465 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.2406778082 |
|
|
Apr 04 12:35:58 PM PDT 24 |
Apr 04 12:39:32 PM PDT 24 |
41327005911 ps |
| T466 |
/workspace/coverage/default/25.sram_ctrl_smoke.342315536 |
|
|
Apr 04 12:37:30 PM PDT 24 |
Apr 04 12:37:32 PM PDT 24 |
369738847 ps |
| T467 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.2608871387 |
|
|
Apr 04 12:36:30 PM PDT 24 |
Apr 04 12:58:59 PM PDT 24 |
14691245837 ps |
| T468 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.2879937478 |
|
|
Apr 04 12:38:56 PM PDT 24 |
Apr 04 12:39:03 PM PDT 24 |
1132072941 ps |
| T469 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.2196347801 |
|
|
Apr 04 12:36:41 PM PDT 24 |
Apr 04 12:36:47 PM PDT 24 |
444683313 ps |
| T470 |
/workspace/coverage/default/40.sram_ctrl_bijection.2203324701 |
|
|
Apr 04 12:38:36 PM PDT 24 |
Apr 04 12:39:15 PM PDT 24 |
1743635375 ps |
| T471 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2764763987 |
|
|
Apr 04 12:39:20 PM PDT 24 |
Apr 04 12:39:23 PM PDT 24 |
94707031 ps |
| T472 |
/workspace/coverage/default/14.sram_ctrl_bijection.2259637033 |
|
|
Apr 04 12:36:27 PM PDT 24 |
Apr 04 12:37:08 PM PDT 24 |
5405743235 ps |
| T473 |
/workspace/coverage/default/12.sram_ctrl_smoke.3699999881 |
|
|
Apr 04 12:36:50 PM PDT 24 |
Apr 04 12:36:56 PM PDT 24 |
685855613 ps |
| T474 |
/workspace/coverage/default/38.sram_ctrl_partial_access.3805168926 |
|
|
Apr 04 12:38:28 PM PDT 24 |
Apr 04 12:38:39 PM PDT 24 |
1256455959 ps |
| T475 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.3509020997 |
|
|
Apr 04 12:35:50 PM PDT 24 |
Apr 04 12:35:58 PM PDT 24 |
759497438 ps |
| T476 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1485701814 |
|
|
Apr 04 12:39:30 PM PDT 24 |
Apr 04 12:41:42 PM PDT 24 |
1230528192 ps |
| T477 |
/workspace/coverage/default/4.sram_ctrl_executable.2828801199 |
|
|
Apr 04 12:35:59 PM PDT 24 |
Apr 04 12:36:11 PM PDT 24 |
1661207050 ps |
| T478 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.3860027067 |
|
|
Apr 04 12:37:42 PM PDT 24 |
Apr 04 12:37:43 PM PDT 24 |
46710591 ps |
| T479 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.524869393 |
|
|
Apr 04 12:37:27 PM PDT 24 |
Apr 04 01:13:35 PM PDT 24 |
8191563391 ps |
| T480 |
/workspace/coverage/default/12.sram_ctrl_regwen.1726352204 |
|
|
Apr 04 12:36:34 PM PDT 24 |
Apr 04 12:59:14 PM PDT 24 |
15773132190 ps |
| T481 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.509445961 |
|
|
Apr 04 12:37:02 PM PDT 24 |
Apr 04 12:37:03 PM PDT 24 |
159163404 ps |
| T482 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1465738598 |
|
|
Apr 04 12:38:09 PM PDT 24 |
Apr 04 12:46:54 PM PDT 24 |
133514698367 ps |
| T483 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.3077162127 |
|
|
Apr 04 12:38:47 PM PDT 24 |
Apr 04 12:43:18 PM PDT 24 |
4515536617 ps |
| T484 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.1299322109 |
|
|
Apr 04 12:36:40 PM PDT 24 |
Apr 04 12:36:50 PM PDT 24 |
881470297 ps |
| T485 |
/workspace/coverage/default/31.sram_ctrl_stress_all.3971904707 |
|
|
Apr 04 12:37:45 PM PDT 24 |
Apr 04 01:35:05 PM PDT 24 |
37483770301 ps |
| T486 |
/workspace/coverage/default/32.sram_ctrl_smoke.3861919271 |
|
|
Apr 04 12:37:43 PM PDT 24 |
Apr 04 12:37:51 PM PDT 24 |
140663149 ps |
| T487 |
/workspace/coverage/default/21.sram_ctrl_stress_all.3464413742 |
|
|
Apr 04 12:37:00 PM PDT 24 |
Apr 04 01:22:38 PM PDT 24 |
49055091425 ps |
| T488 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.1008432381 |
|
|
Apr 04 12:36:36 PM PDT 24 |
Apr 04 12:41:11 PM PDT 24 |
2754440184 ps |
| T489 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.3204929388 |
|
|
Apr 04 12:36:55 PM PDT 24 |
Apr 04 12:37:01 PM PDT 24 |
261147783 ps |
| T490 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.2219559958 |
|
|
Apr 04 12:36:54 PM PDT 24 |
Apr 04 12:41:33 PM PDT 24 |
2982057834 ps |
| T491 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.1525340742 |
|
|
Apr 04 12:37:56 PM PDT 24 |
Apr 04 12:38:04 PM PDT 24 |
140560314 ps |
| T492 |
/workspace/coverage/default/8.sram_ctrl_stress_all.1698371897 |
|
|
Apr 04 12:36:14 PM PDT 24 |
Apr 04 01:10:19 PM PDT 24 |
34323031441 ps |
| T493 |
/workspace/coverage/default/12.sram_ctrl_executable.38597114 |
|
|
Apr 04 12:36:20 PM PDT 24 |
Apr 04 12:45:27 PM PDT 24 |
8838836540 ps |
| T494 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1867157261 |
|
|
Apr 04 12:39:29 PM PDT 24 |
Apr 04 12:39:44 PM PDT 24 |
828075586 ps |
| T495 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.3488693277 |
|
|
Apr 04 12:38:53 PM PDT 24 |
Apr 04 12:48:31 PM PDT 24 |
4281094138 ps |
| T496 |
/workspace/coverage/default/8.sram_ctrl_partial_access.315866603 |
|
|
Apr 04 12:36:32 PM PDT 24 |
Apr 04 12:36:36 PM PDT 24 |
48009971 ps |
| T497 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.4220943752 |
|
|
Apr 04 12:37:55 PM PDT 24 |
Apr 04 12:47:02 PM PDT 24 |
42412423667 ps |
| T498 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.2870856301 |
|
|
Apr 04 12:37:06 PM PDT 24 |
Apr 04 12:40:15 PM PDT 24 |
5599866487 ps |
| T499 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.2865688870 |
|
|
Apr 04 12:38:11 PM PDT 24 |
Apr 04 12:38:16 PM PDT 24 |
74662416 ps |
| T500 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.2467614640 |
|
|
Apr 04 12:36:28 PM PDT 24 |
Apr 04 12:36:32 PM PDT 24 |
181527401 ps |
| T501 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.198602944 |
|
|
Apr 04 12:38:44 PM PDT 24 |
Apr 04 12:39:08 PM PDT 24 |
935185002 ps |
| T502 |
/workspace/coverage/default/16.sram_ctrl_bijection.208465576 |
|
|
Apr 04 12:36:31 PM PDT 24 |
Apr 04 12:36:54 PM PDT 24 |
1458603112 ps |
| T503 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.773526204 |
|
|
Apr 04 12:37:32 PM PDT 24 |
Apr 04 12:37:42 PM PDT 24 |
889212006 ps |
| T504 |
/workspace/coverage/default/24.sram_ctrl_bijection.4144370269 |
|
|
Apr 04 12:37:02 PM PDT 24 |
Apr 04 12:37:29 PM PDT 24 |
2202612579 ps |
| T505 |
/workspace/coverage/default/9.sram_ctrl_bijection.1326216145 |
|
|
Apr 04 12:36:22 PM PDT 24 |
Apr 04 12:36:55 PM PDT 24 |
524836689 ps |
| T506 |
/workspace/coverage/default/14.sram_ctrl_regwen.1691283590 |
|
|
Apr 04 12:36:33 PM PDT 24 |
Apr 04 12:56:02 PM PDT 24 |
16332310078 ps |
| T507 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.1606511772 |
|
|
Apr 04 12:37:19 PM PDT 24 |
Apr 04 12:37:24 PM PDT 24 |
692535409 ps |
| T508 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.378934695 |
|
|
Apr 04 12:37:26 PM PDT 24 |
Apr 04 12:50:05 PM PDT 24 |
16123005735 ps |
| T509 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1640069974 |
|
|
Apr 04 12:39:06 PM PDT 24 |
Apr 04 12:42:34 PM PDT 24 |
66794026025 ps |
| T510 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1931841374 |
|
|
Apr 04 12:39:28 PM PDT 24 |
Apr 04 12:45:15 PM PDT 24 |
13348776248 ps |
| T511 |
/workspace/coverage/default/4.sram_ctrl_partial_access.49045500 |
|
|
Apr 04 12:35:56 PM PDT 24 |
Apr 04 12:36:06 PM PDT 24 |
1186182507 ps |
| T512 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.1873718352 |
|
|
Apr 04 12:36:33 PM PDT 24 |
Apr 04 12:36:41 PM PDT 24 |
136574419 ps |
| T513 |
/workspace/coverage/default/15.sram_ctrl_smoke.2325891497 |
|
|
Apr 04 12:36:36 PM PDT 24 |
Apr 04 12:36:55 PM PDT 24 |
4479041763 ps |
| T514 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.373788634 |
|
|
Apr 04 12:36:44 PM PDT 24 |
Apr 04 12:50:04 PM PDT 24 |
67318446546 ps |
| T515 |
/workspace/coverage/default/3.sram_ctrl_partial_access.210663455 |
|
|
Apr 04 12:35:53 PM PDT 24 |
Apr 04 12:38:25 PM PDT 24 |
771219073 ps |
| T516 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.1823376434 |
|
|
Apr 04 12:38:48 PM PDT 24 |
Apr 04 12:44:53 PM PDT 24 |
16061979325 ps |
| T517 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.3332328314 |
|
|
Apr 04 12:36:05 PM PDT 24 |
Apr 04 12:36:22 PM PDT 24 |
216998301 ps |
| T518 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.4127657833 |
|
|
Apr 04 12:36:45 PM PDT 24 |
Apr 04 12:39:40 PM PDT 24 |
7569741427 ps |
| T519 |
/workspace/coverage/default/23.sram_ctrl_regwen.554887142 |
|
|
Apr 04 12:37:02 PM PDT 24 |
Apr 04 12:57:26 PM PDT 24 |
11985975374 ps |
| T520 |
/workspace/coverage/default/19.sram_ctrl_bijection.4238251130 |
|
|
Apr 04 12:36:47 PM PDT 24 |
Apr 04 12:37:22 PM PDT 24 |
8157805976 ps |
| T521 |
/workspace/coverage/default/5.sram_ctrl_regwen.3497107634 |
|
|
Apr 04 12:36:07 PM PDT 24 |
Apr 04 01:03:18 PM PDT 24 |
30037883439 ps |
| T522 |
/workspace/coverage/default/17.sram_ctrl_partial_access.1429454515 |
|
|
Apr 04 12:36:43 PM PDT 24 |
Apr 04 12:39:04 PM PDT 24 |
2269553600 ps |
| T523 |
/workspace/coverage/default/10.sram_ctrl_smoke.3746006239 |
|
|
Apr 04 12:36:30 PM PDT 24 |
Apr 04 12:36:41 PM PDT 24 |
497042029 ps |
| T524 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.2757162463 |
|
|
Apr 04 12:38:04 PM PDT 24 |
Apr 04 12:39:14 PM PDT 24 |
395164765 ps |
| T525 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3363680939 |
|
|
Apr 04 12:36:41 PM PDT 24 |
Apr 04 12:41:42 PM PDT 24 |
52336860372 ps |
| T526 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1414526071 |
|
|
Apr 04 12:36:10 PM PDT 24 |
Apr 04 12:36:10 PM PDT 24 |
55398232 ps |
| T527 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.927272136 |
|
|
Apr 04 12:39:20 PM PDT 24 |
Apr 04 12:39:26 PM PDT 24 |
1125217114 ps |
| T528 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1512025106 |
|
|
Apr 04 12:39:20 PM PDT 24 |
Apr 04 12:39:25 PM PDT 24 |
615133324 ps |
| T529 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.892554669 |
|
|
Apr 04 12:35:59 PM PDT 24 |
Apr 04 12:36:02 PM PDT 24 |
348012643 ps |
| T530 |
/workspace/coverage/default/27.sram_ctrl_alert_test.3635235274 |
|
|
Apr 04 12:37:28 PM PDT 24 |
Apr 04 12:37:29 PM PDT 24 |
23407204 ps |
| T531 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.1867782240 |
|
|
Apr 04 12:36:40 PM PDT 24 |
Apr 04 12:36:48 PM PDT 24 |
399126054 ps |
| T532 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.2383062184 |
|
|
Apr 04 12:35:54 PM PDT 24 |
Apr 04 12:36:01 PM PDT 24 |
1774318129 ps |
| T533 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3524262531 |
|
|
Apr 04 12:36:47 PM PDT 24 |
Apr 04 12:44:35 PM PDT 24 |
42586605221 ps |
| T534 |
/workspace/coverage/default/20.sram_ctrl_smoke.767560868 |
|
|
Apr 04 12:36:43 PM PDT 24 |
Apr 04 12:36:48 PM PDT 24 |
109257783 ps |
| T535 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.614434298 |
|
|
Apr 04 12:35:52 PM PDT 24 |
Apr 04 01:00:13 PM PDT 24 |
6754419720 ps |
| T536 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.2932539930 |
|
|
Apr 04 12:37:41 PM PDT 24 |
Apr 04 01:00:09 PM PDT 24 |
5567399178 ps |
| T537 |
/workspace/coverage/default/3.sram_ctrl_regwen.4177658255 |
|
|
Apr 04 12:35:57 PM PDT 24 |
Apr 04 12:55:56 PM PDT 24 |
99220505443 ps |
| T538 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.26886217 |
|
|
Apr 04 12:38:56 PM PDT 24 |
Apr 04 12:41:42 PM PDT 24 |
1729214801 ps |
| T101 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2777870525 |
|
|
Apr 04 12:37:53 PM PDT 24 |
Apr 04 12:38:29 PM PDT 24 |
3213174906 ps |
| T539 |
/workspace/coverage/default/40.sram_ctrl_regwen.2347603314 |
|
|
Apr 04 12:38:42 PM PDT 24 |
Apr 04 01:00:28 PM PDT 24 |
11786232212 ps |
| T540 |
/workspace/coverage/default/11.sram_ctrl_alert_test.704477933 |
|
|
Apr 04 12:36:54 PM PDT 24 |
Apr 04 12:36:56 PM PDT 24 |
34216218 ps |
| T541 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1284308780 |
|
|
Apr 04 12:35:59 PM PDT 24 |
Apr 04 12:45:45 PM PDT 24 |
8005968371 ps |
| T542 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.481712328 |
|
|
Apr 04 12:37:08 PM PDT 24 |
Apr 04 12:38:52 PM PDT 24 |
5224661167 ps |
| T102 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.1783618514 |
|
|
Apr 04 12:36:36 PM PDT 24 |
Apr 04 12:37:10 PM PDT 24 |
10099614210 ps |
| T543 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.2873247939 |
|
|
Apr 04 12:38:46 PM PDT 24 |
Apr 04 12:38:52 PM PDT 24 |
616159243 ps |
| T544 |
/workspace/coverage/default/48.sram_ctrl_alert_test.1594964174 |
|
|
Apr 04 12:39:29 PM PDT 24 |
Apr 04 12:39:30 PM PDT 24 |
25598281 ps |
| T545 |
/workspace/coverage/default/11.sram_ctrl_smoke.3316569206 |
|
|
Apr 04 12:36:14 PM PDT 24 |
Apr 04 12:36:16 PM PDT 24 |
67123748 ps |
| T546 |
/workspace/coverage/default/39.sram_ctrl_partial_access.467012595 |
|
|
Apr 04 12:38:30 PM PDT 24 |
Apr 04 12:38:40 PM PDT 24 |
815446903 ps |
| T547 |
/workspace/coverage/default/49.sram_ctrl_stress_all.1195663403 |
|
|
Apr 04 12:39:41 PM PDT 24 |
Apr 04 01:22:50 PM PDT 24 |
31682274552 ps |
| T548 |
/workspace/coverage/default/24.sram_ctrl_smoke.3126055586 |
|
|
Apr 04 12:37:04 PM PDT 24 |
Apr 04 12:37:22 PM PDT 24 |
1108021896 ps |