| T549 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.244097806 |
|
|
Apr 04 12:36:27 PM PDT 24 |
Apr 04 12:38:40 PM PDT 24 |
1583679957 ps |
| T23 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.3987162567 |
|
|
Apr 04 12:35:53 PM PDT 24 |
Apr 04 12:35:56 PM PDT 24 |
1283036842 ps |
| T550 |
/workspace/coverage/default/49.sram_ctrl_bijection.1216444836 |
|
|
Apr 04 12:39:29 PM PDT 24 |
Apr 04 12:40:16 PM PDT 24 |
2240040410 ps |
| T551 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.4287825967 |
|
|
Apr 04 12:37:53 PM PDT 24 |
Apr 04 12:37:54 PM PDT 24 |
70732635 ps |
| T552 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1745109380 |
|
|
Apr 04 12:39:12 PM PDT 24 |
Apr 04 12:39:26 PM PDT 24 |
301283084 ps |
| T553 |
/workspace/coverage/default/46.sram_ctrl_alert_test.561050750 |
|
|
Apr 04 12:39:22 PM PDT 24 |
Apr 04 12:39:23 PM PDT 24 |
17092358 ps |
| T554 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.2005298413 |
|
|
Apr 04 12:38:17 PM PDT 24 |
Apr 04 12:38:52 PM PDT 24 |
502711446 ps |
| T555 |
/workspace/coverage/default/4.sram_ctrl_alert_test.1059521304 |
|
|
Apr 04 12:36:03 PM PDT 24 |
Apr 04 12:36:03 PM PDT 24 |
31098384 ps |
| T556 |
/workspace/coverage/default/11.sram_ctrl_bijection.1221331156 |
|
|
Apr 04 12:36:15 PM PDT 24 |
Apr 04 12:37:10 PM PDT 24 |
1014769634 ps |
| T557 |
/workspace/coverage/default/35.sram_ctrl_stress_all.3375868829 |
|
|
Apr 04 12:38:08 PM PDT 24 |
Apr 04 01:39:28 PM PDT 24 |
37380833783 ps |
| T558 |
/workspace/coverage/default/47.sram_ctrl_partial_access.706951748 |
|
|
Apr 04 12:39:21 PM PDT 24 |
Apr 04 12:39:35 PM PDT 24 |
5686536622 ps |
| T559 |
/workspace/coverage/default/46.sram_ctrl_bijection.807296528 |
|
|
Apr 04 12:39:13 PM PDT 24 |
Apr 04 12:40:19 PM PDT 24 |
18077951008 ps |
| T560 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1189406063 |
|
|
Apr 04 12:36:24 PM PDT 24 |
Apr 04 12:37:25 PM PDT 24 |
14768269138 ps |
| T561 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.3806280102 |
|
|
Apr 04 12:36:25 PM PDT 24 |
Apr 04 12:36:30 PM PDT 24 |
333857521 ps |
| T562 |
/workspace/coverage/default/12.sram_ctrl_bijection.203318125 |
|
|
Apr 04 12:36:31 PM PDT 24 |
Apr 04 12:37:09 PM PDT 24 |
6670069827 ps |
| T563 |
/workspace/coverage/default/1.sram_ctrl_bijection.2991172565 |
|
|
Apr 04 12:35:51 PM PDT 24 |
Apr 04 12:37:05 PM PDT 24 |
3485774192 ps |
| T564 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.2336713516 |
|
|
Apr 04 12:37:17 PM PDT 24 |
Apr 04 12:40:12 PM PDT 24 |
4312820487 ps |
| T565 |
/workspace/coverage/default/18.sram_ctrl_alert_test.1708659636 |
|
|
Apr 04 12:36:42 PM PDT 24 |
Apr 04 12:36:43 PM PDT 24 |
49936869 ps |
| T566 |
/workspace/coverage/default/26.sram_ctrl_smoke.3243638292 |
|
|
Apr 04 12:37:14 PM PDT 24 |
Apr 04 12:37:59 PM PDT 24 |
857698214 ps |
| T567 |
/workspace/coverage/default/47.sram_ctrl_bijection.2746002522 |
|
|
Apr 04 12:39:20 PM PDT 24 |
Apr 04 12:40:27 PM PDT 24 |
4246703998 ps |
| T568 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.626677058 |
|
|
Apr 04 12:39:17 PM PDT 24 |
Apr 04 12:52:30 PM PDT 24 |
30864798497 ps |
| T569 |
/workspace/coverage/default/12.sram_ctrl_alert_test.1168014206 |
|
|
Apr 04 12:36:23 PM PDT 24 |
Apr 04 12:36:24 PM PDT 24 |
15292329 ps |
| T570 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.2917655215 |
|
|
Apr 04 12:37:52 PM PDT 24 |
Apr 04 12:39:27 PM PDT 24 |
121285605 ps |
| T571 |
/workspace/coverage/default/37.sram_ctrl_regwen.1286333887 |
|
|
Apr 04 12:38:29 PM PDT 24 |
Apr 04 01:00:36 PM PDT 24 |
52686352253 ps |
| T572 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.687289101 |
|
|
Apr 04 12:36:43 PM PDT 24 |
Apr 04 12:36:52 PM PDT 24 |
658212773 ps |
| T573 |
/workspace/coverage/default/20.sram_ctrl_partial_access.1636025087 |
|
|
Apr 04 12:36:47 PM PDT 24 |
Apr 04 12:36:59 PM PDT 24 |
241375388 ps |
| T574 |
/workspace/coverage/default/22.sram_ctrl_regwen.2579022432 |
|
|
Apr 04 12:36:53 PM PDT 24 |
Apr 04 12:40:00 PM PDT 24 |
3648756610 ps |
| T575 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1659090440 |
|
|
Apr 04 12:38:55 PM PDT 24 |
Apr 04 12:39:22 PM PDT 24 |
841531281 ps |
| T576 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.1876447924 |
|
|
Apr 04 12:36:35 PM PDT 24 |
Apr 04 12:54:59 PM PDT 24 |
6978391539 ps |
| T577 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2961860712 |
|
|
Apr 04 12:36:18 PM PDT 24 |
Apr 04 01:05:06 PM PDT 24 |
5103548261 ps |
| T578 |
/workspace/coverage/default/39.sram_ctrl_stress_all.4088216064 |
|
|
Apr 04 12:38:35 PM PDT 24 |
Apr 04 01:02:46 PM PDT 24 |
4876102851 ps |
| T579 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.3447748515 |
|
|
Apr 04 12:37:08 PM PDT 24 |
Apr 04 12:37:15 PM PDT 24 |
58789017 ps |
| T580 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.4032739899 |
|
|
Apr 04 12:39:12 PM PDT 24 |
Apr 04 12:43:31 PM PDT 24 |
27005333303 ps |
| T581 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.1249393811 |
|
|
Apr 04 12:39:29 PM PDT 24 |
Apr 04 12:39:38 PM PDT 24 |
548143461 ps |
| T582 |
/workspace/coverage/default/36.sram_ctrl_regwen.1349321700 |
|
|
Apr 04 12:38:07 PM PDT 24 |
Apr 04 12:50:28 PM PDT 24 |
10566218642 ps |
| T583 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2543227159 |
|
|
Apr 04 12:37:53 PM PDT 24 |
Apr 04 12:40:27 PM PDT 24 |
155301514 ps |
| T584 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.1200819259 |
|
|
Apr 04 12:39:03 PM PDT 24 |
Apr 04 12:39:22 PM PDT 24 |
338398080 ps |
| T585 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.3362534824 |
|
|
Apr 04 12:38:45 PM PDT 24 |
Apr 04 12:38:46 PM PDT 24 |
139098070 ps |
| T586 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.1067514567 |
|
|
Apr 04 12:38:09 PM PDT 24 |
Apr 04 12:41:24 PM PDT 24 |
5410948179 ps |
| T587 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.3749161475 |
|
|
Apr 04 12:35:49 PM PDT 24 |
Apr 04 01:00:32 PM PDT 24 |
17639128994 ps |
| T588 |
/workspace/coverage/default/9.sram_ctrl_partial_access.3199961618 |
|
|
Apr 04 12:36:28 PM PDT 24 |
Apr 04 12:36:48 PM PDT 24 |
4122797609 ps |
| T589 |
/workspace/coverage/default/17.sram_ctrl_executable.4085731987 |
|
|
Apr 04 12:36:45 PM PDT 24 |
Apr 04 12:38:44 PM PDT 24 |
10660331204 ps |
| T590 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.3098081203 |
|
|
Apr 04 12:37:53 PM PDT 24 |
Apr 04 12:54:41 PM PDT 24 |
2406204975 ps |
| T591 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.4291465247 |
|
|
Apr 04 12:35:53 PM PDT 24 |
Apr 04 12:40:05 PM PDT 24 |
880204561 ps |
| T592 |
/workspace/coverage/default/19.sram_ctrl_alert_test.3237001635 |
|
|
Apr 04 12:36:48 PM PDT 24 |
Apr 04 12:36:49 PM PDT 24 |
15967345 ps |
| T593 |
/workspace/coverage/default/7.sram_ctrl_alert_test.370049338 |
|
|
Apr 04 12:36:09 PM PDT 24 |
Apr 04 12:36:09 PM PDT 24 |
23460402 ps |
| T594 |
/workspace/coverage/default/42.sram_ctrl_partial_access.2860103781 |
|
|
Apr 04 12:38:52 PM PDT 24 |
Apr 04 12:39:31 PM PDT 24 |
939337711 ps |
| T595 |
/workspace/coverage/default/10.sram_ctrl_stress_all.3935827239 |
|
|
Apr 04 12:36:34 PM PDT 24 |
Apr 04 12:36:59 PM PDT 24 |
817517797 ps |
| T596 |
/workspace/coverage/default/46.sram_ctrl_executable.4264665700 |
|
|
Apr 04 12:39:21 PM PDT 24 |
Apr 04 12:44:59 PM PDT 24 |
17029318596 ps |
| T597 |
/workspace/coverage/default/44.sram_ctrl_partial_access.2718273168 |
|
|
Apr 04 12:39:05 PM PDT 24 |
Apr 04 12:39:55 PM PDT 24 |
138090678 ps |
| T598 |
/workspace/coverage/default/45.sram_ctrl_regwen.4076510542 |
|
|
Apr 04 12:39:11 PM PDT 24 |
Apr 04 12:53:30 PM PDT 24 |
34912588129 ps |
| T599 |
/workspace/coverage/default/10.sram_ctrl_executable.2040922700 |
|
|
Apr 04 12:36:36 PM PDT 24 |
Apr 04 12:54:50 PM PDT 24 |
10049642737 ps |
| T600 |
/workspace/coverage/default/41.sram_ctrl_alert_test.3094526245 |
|
|
Apr 04 12:38:45 PM PDT 24 |
Apr 04 12:38:47 PM PDT 24 |
14578584 ps |
| T601 |
/workspace/coverage/default/45.sram_ctrl_smoke.2339810299 |
|
|
Apr 04 12:39:12 PM PDT 24 |
Apr 04 12:39:27 PM PDT 24 |
238867865 ps |
| T602 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.1445404546 |
|
|
Apr 04 12:37:51 PM PDT 24 |
Apr 04 12:37:52 PM PDT 24 |
30855286 ps |
| T603 |
/workspace/coverage/default/30.sram_ctrl_smoke.4174657063 |
|
|
Apr 04 12:37:40 PM PDT 24 |
Apr 04 12:38:20 PM PDT 24 |
463418184 ps |
| T604 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.4248652195 |
|
|
Apr 04 12:37:59 PM PDT 24 |
Apr 04 12:40:29 PM PDT 24 |
1699499591 ps |
| T32 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.1431189721 |
|
|
Apr 04 12:36:22 PM PDT 24 |
Apr 04 12:36:24 PM PDT 24 |
309713297 ps |
| T605 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.3431950239 |
|
|
Apr 04 12:37:06 PM PDT 24 |
Apr 04 12:37:12 PM PDT 24 |
200352695 ps |
| T606 |
/workspace/coverage/default/28.sram_ctrl_regwen.3508023528 |
|
|
Apr 04 12:37:31 PM PDT 24 |
Apr 04 12:54:58 PM PDT 24 |
88787516717 ps |
| T607 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.271932957 |
|
|
Apr 04 12:36:54 PM PDT 24 |
Apr 04 12:40:44 PM PDT 24 |
3316512473 ps |
| T103 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.3523138816 |
|
|
Apr 04 12:37:46 PM PDT 24 |
Apr 04 12:39:15 PM PDT 24 |
2943361101 ps |
| T608 |
/workspace/coverage/default/47.sram_ctrl_regwen.3848999169 |
|
|
Apr 04 12:39:21 PM PDT 24 |
Apr 04 12:53:39 PM PDT 24 |
15896531316 ps |
| T609 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.3146446055 |
|
|
Apr 04 12:37:03 PM PDT 24 |
Apr 04 12:43:44 PM PDT 24 |
41560501745 ps |
| T610 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.601708699 |
|
|
Apr 04 12:37:18 PM PDT 24 |
Apr 04 12:37:19 PM PDT 24 |
227655862 ps |
| T611 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.2615849478 |
|
|
Apr 04 12:37:13 PM PDT 24 |
Apr 04 12:42:19 PM PDT 24 |
3307403878 ps |
| T612 |
/workspace/coverage/default/8.sram_ctrl_regwen.2074504925 |
|
|
Apr 04 12:36:20 PM PDT 24 |
Apr 04 12:51:15 PM PDT 24 |
17769562733 ps |
| T613 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.1426094128 |
|
|
Apr 04 12:36:52 PM PDT 24 |
Apr 04 12:36:57 PM PDT 24 |
63730881 ps |
| T614 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.2874784617 |
|
|
Apr 04 12:37:29 PM PDT 24 |
Apr 04 12:37:37 PM PDT 24 |
266940035 ps |
| T615 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3341740887 |
|
|
Apr 04 12:36:01 PM PDT 24 |
Apr 04 12:42:29 PM PDT 24 |
39932332315 ps |
| T616 |
/workspace/coverage/default/49.sram_ctrl_executable.3348596957 |
|
|
Apr 04 12:39:37 PM PDT 24 |
Apr 04 12:52:53 PM PDT 24 |
15808098505 ps |
| T617 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1089997231 |
|
|
Apr 04 12:36:16 PM PDT 24 |
Apr 04 12:41:22 PM PDT 24 |
23281053662 ps |
| T618 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2894148927 |
|
|
Apr 04 12:36:10 PM PDT 24 |
Apr 04 12:36:15 PM PDT 24 |
628293820 ps |
| T619 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.744710910 |
|
|
Apr 04 12:36:47 PM PDT 24 |
Apr 04 12:39:55 PM PDT 24 |
5718036354 ps |
| T620 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.2720380329 |
|
|
Apr 04 12:35:58 PM PDT 24 |
Apr 04 12:36:19 PM PDT 24 |
318774628 ps |
| T621 |
/workspace/coverage/default/32.sram_ctrl_partial_access.2553522156 |
|
|
Apr 04 12:37:42 PM PDT 24 |
Apr 04 12:38:04 PM PDT 24 |
12456571528 ps |
| T622 |
/workspace/coverage/default/45.sram_ctrl_executable.3643581794 |
|
|
Apr 04 12:39:13 PM PDT 24 |
Apr 04 12:42:02 PM PDT 24 |
1066674817 ps |
| T623 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.143947638 |
|
|
Apr 04 12:36:11 PM PDT 24 |
Apr 04 12:36:21 PM PDT 24 |
467966848 ps |
| T624 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3044146128 |
|
|
Apr 04 12:35:54 PM PDT 24 |
Apr 04 12:35:55 PM PDT 24 |
33538058 ps |
| T625 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2727752701 |
|
|
Apr 04 12:38:00 PM PDT 24 |
Apr 04 12:47:38 PM PDT 24 |
8898305721 ps |
| T626 |
/workspace/coverage/default/43.sram_ctrl_partial_access.1080370552 |
|
|
Apr 04 12:38:54 PM PDT 24 |
Apr 04 12:40:22 PM PDT 24 |
1274921729 ps |
| T627 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.4248331970 |
|
|
Apr 04 12:35:51 PM PDT 24 |
Apr 04 12:38:00 PM PDT 24 |
382887343 ps |
| T628 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1841446307 |
|
|
Apr 04 12:36:15 PM PDT 24 |
Apr 04 12:46:05 PM PDT 24 |
4586223493 ps |
| T629 |
/workspace/coverage/default/11.sram_ctrl_stress_all.4293676267 |
|
|
Apr 04 12:36:16 PM PDT 24 |
Apr 04 01:19:20 PM PDT 24 |
17341173293 ps |
| T630 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.2309968942 |
|
|
Apr 04 12:37:51 PM PDT 24 |
Apr 04 12:42:36 PM PDT 24 |
11462945417 ps |
| T631 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.3943214641 |
|
|
Apr 04 12:38:44 PM PDT 24 |
Apr 04 12:38:53 PM PDT 24 |
626983988 ps |
| T632 |
/workspace/coverage/default/7.sram_ctrl_partial_access.3539266528 |
|
|
Apr 04 12:36:21 PM PDT 24 |
Apr 04 12:36:24 PM PDT 24 |
253321574 ps |
| T633 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.2299225153 |
|
|
Apr 04 12:37:56 PM PDT 24 |
Apr 04 12:38:05 PM PDT 24 |
1647357489 ps |
| T634 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2424256053 |
|
|
Apr 04 12:36:33 PM PDT 24 |
Apr 04 12:38:13 PM PDT 24 |
148012942 ps |
| T635 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.2697965696 |
|
|
Apr 04 12:36:40 PM PDT 24 |
Apr 04 12:38:55 PM PDT 24 |
314047963 ps |
| T636 |
/workspace/coverage/default/39.sram_ctrl_smoke.201142418 |
|
|
Apr 04 12:38:28 PM PDT 24 |
Apr 04 12:38:51 PM PDT 24 |
387270949 ps |
| T637 |
/workspace/coverage/default/45.sram_ctrl_partial_access.3481557209 |
|
|
Apr 04 12:39:14 PM PDT 24 |
Apr 04 12:39:15 PM PDT 24 |
186458226 ps |
| T638 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.3106065648 |
|
|
Apr 04 12:36:00 PM PDT 24 |
Apr 04 12:39:38 PM PDT 24 |
8150524007 ps |
| T639 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.908333217 |
|
|
Apr 04 12:36:36 PM PDT 24 |
Apr 04 12:36:43 PM PDT 24 |
2138845240 ps |
| T640 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3705016811 |
|
|
Apr 04 12:39:13 PM PDT 24 |
Apr 04 12:51:52 PM PDT 24 |
16637997383 ps |
| T641 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1320236591 |
|
|
Apr 04 12:36:11 PM PDT 24 |
Apr 04 12:36:12 PM PDT 24 |
73792804 ps |
| T642 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.4070789862 |
|
|
Apr 04 12:36:03 PM PDT 24 |
Apr 04 12:44:36 PM PDT 24 |
8926018572 ps |
| T643 |
/workspace/coverage/default/23.sram_ctrl_partial_access.894955818 |
|
|
Apr 04 12:37:04 PM PDT 24 |
Apr 04 12:39:36 PM PDT 24 |
1346975389 ps |
| T644 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.465149705 |
|
|
Apr 04 12:36:03 PM PDT 24 |
Apr 04 12:58:02 PM PDT 24 |
30848991912 ps |
| T645 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.5109154 |
|
|
Apr 04 12:36:36 PM PDT 24 |
Apr 04 12:36:38 PM PDT 24 |
76469391 ps |
| T646 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.2952507378 |
|
|
Apr 04 12:38:52 PM PDT 24 |
Apr 04 12:39:01 PM PDT 24 |
7254537077 ps |
| T647 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3064243424 |
|
|
Apr 04 12:35:52 PM PDT 24 |
Apr 04 12:37:46 PM PDT 24 |
1200019268 ps |
| T648 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.4162652881 |
|
|
Apr 04 12:36:16 PM PDT 24 |
Apr 04 12:36:34 PM PDT 24 |
2553964027 ps |
| T649 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.1643235148 |
|
|
Apr 04 12:38:28 PM PDT 24 |
Apr 04 12:38:29 PM PDT 24 |
43605576 ps |
| T650 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1681195962 |
|
|
Apr 04 12:39:04 PM PDT 24 |
Apr 04 12:50:01 PM PDT 24 |
88614210073 ps |
| T651 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.2637677140 |
|
|
Apr 04 12:37:35 PM PDT 24 |
Apr 04 12:37:40 PM PDT 24 |
463886555 ps |
| T652 |
/workspace/coverage/default/44.sram_ctrl_bijection.1747101744 |
|
|
Apr 04 12:39:07 PM PDT 24 |
Apr 04 12:39:52 PM PDT 24 |
2035920476 ps |
| T653 |
/workspace/coverage/default/2.sram_ctrl_bijection.1006374714 |
|
|
Apr 04 12:35:49 PM PDT 24 |
Apr 04 12:36:56 PM PDT 24 |
3069180753 ps |
| T654 |
/workspace/coverage/default/4.sram_ctrl_regwen.1137049422 |
|
|
Apr 04 12:36:00 PM PDT 24 |
Apr 04 12:43:38 PM PDT 24 |
2696889405 ps |
| T655 |
/workspace/coverage/default/9.sram_ctrl_regwen.760404466 |
|
|
Apr 04 12:36:06 PM PDT 24 |
Apr 04 12:50:34 PM PDT 24 |
48226543462 ps |
| T656 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.1784368728 |
|
|
Apr 04 12:38:35 PM PDT 24 |
Apr 04 12:38:36 PM PDT 24 |
77076534 ps |
| T657 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1416724887 |
|
|
Apr 04 12:39:27 PM PDT 24 |
Apr 04 12:39:38 PM PDT 24 |
2189154345 ps |
| T658 |
/workspace/coverage/default/16.sram_ctrl_alert_test.252638439 |
|
|
Apr 04 12:36:39 PM PDT 24 |
Apr 04 12:36:41 PM PDT 24 |
21621045 ps |
| T659 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.921627390 |
|
|
Apr 04 12:37:11 PM PDT 24 |
Apr 04 12:37:15 PM PDT 24 |
177272571 ps |
| T660 |
/workspace/coverage/default/6.sram_ctrl_alert_test.3397703083 |
|
|
Apr 04 12:36:08 PM PDT 24 |
Apr 04 12:36:09 PM PDT 24 |
23510347 ps |
| T661 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.3193536054 |
|
|
Apr 04 12:37:43 PM PDT 24 |
Apr 04 12:40:19 PM PDT 24 |
1701511462 ps |
| T662 |
/workspace/coverage/default/39.sram_ctrl_alert_test.3748855190 |
|
|
Apr 04 12:38:36 PM PDT 24 |
Apr 04 12:38:36 PM PDT 24 |
36319166 ps |
| T663 |
/workspace/coverage/default/33.sram_ctrl_alert_test.779221038 |
|
|
Apr 04 12:37:55 PM PDT 24 |
Apr 04 12:37:56 PM PDT 24 |
40056398 ps |
| T664 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.3011420443 |
|
|
Apr 04 12:36:47 PM PDT 24 |
Apr 04 12:36:50 PM PDT 24 |
89813348 ps |
| T665 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.1152714081 |
|
|
Apr 04 12:36:28 PM PDT 24 |
Apr 04 12:36:44 PM PDT 24 |
334405455 ps |
| T666 |
/workspace/coverage/default/45.sram_ctrl_alert_test.1956339374 |
|
|
Apr 04 12:39:13 PM PDT 24 |
Apr 04 12:39:13 PM PDT 24 |
23719430 ps |
| T667 |
/workspace/coverage/default/19.sram_ctrl_regwen.3118384151 |
|
|
Apr 04 12:36:45 PM PDT 24 |
Apr 04 12:45:24 PM PDT 24 |
5230522165 ps |
| T668 |
/workspace/coverage/default/6.sram_ctrl_smoke.2435107385 |
|
|
Apr 04 12:36:01 PM PDT 24 |
Apr 04 12:36:04 PM PDT 24 |
476271501 ps |
| T669 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.958339919 |
|
|
Apr 04 12:37:59 PM PDT 24 |
Apr 04 12:38:33 PM PDT 24 |
2230466269 ps |
| T670 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.528537937 |
|
|
Apr 04 12:36:31 PM PDT 24 |
Apr 04 12:36:36 PM PDT 24 |
188796444 ps |
| T671 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.4060656331 |
|
|
Apr 04 12:36:46 PM PDT 24 |
Apr 04 12:39:13 PM PDT 24 |
5988953980 ps |
| T672 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.98500013 |
|
|
Apr 04 12:39:06 PM PDT 24 |
Apr 04 12:39:08 PM PDT 24 |
147201212 ps |
| T673 |
/workspace/coverage/default/21.sram_ctrl_bijection.4072144755 |
|
|
Apr 04 12:36:51 PM PDT 24 |
Apr 04 12:37:15 PM PDT 24 |
1763863276 ps |
| T674 |
/workspace/coverage/default/6.sram_ctrl_stress_all.519286672 |
|
|
Apr 04 12:36:04 PM PDT 24 |
Apr 04 12:59:28 PM PDT 24 |
57717628946 ps |
| T675 |
/workspace/coverage/default/17.sram_ctrl_stress_all.486717320 |
|
|
Apr 04 12:36:42 PM PDT 24 |
Apr 04 01:34:58 PM PDT 24 |
118223967282 ps |
| T676 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1819160796 |
|
|
Apr 04 12:36:05 PM PDT 24 |
Apr 04 12:36:06 PM PDT 24 |
52043437 ps |
| T677 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.888617713 |
|
|
Apr 04 12:36:31 PM PDT 24 |
Apr 04 12:38:42 PM PDT 24 |
592306992 ps |
| T678 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1874399726 |
|
|
Apr 04 12:39:14 PM PDT 24 |
Apr 04 12:43:23 PM PDT 24 |
2715459961 ps |
| T679 |
/workspace/coverage/default/40.sram_ctrl_smoke.1299363931 |
|
|
Apr 04 12:38:36 PM PDT 24 |
Apr 04 12:38:37 PM PDT 24 |
55863163 ps |
| T680 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2654632337 |
|
|
Apr 04 12:36:54 PM PDT 24 |
Apr 04 12:36:57 PM PDT 24 |
75307433 ps |
| T681 |
/workspace/coverage/default/4.sram_ctrl_bijection.340300931 |
|
|
Apr 04 12:35:56 PM PDT 24 |
Apr 04 12:36:44 PM PDT 24 |
1515106387 ps |
| T682 |
/workspace/coverage/default/28.sram_ctrl_smoke.735891417 |
|
|
Apr 04 12:37:28 PM PDT 24 |
Apr 04 12:37:35 PM PDT 24 |
1222508434 ps |
| T683 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2912411597 |
|
|
Apr 04 12:35:53 PM PDT 24 |
Apr 04 12:39:11 PM PDT 24 |
9909366269 ps |
| T684 |
/workspace/coverage/default/31.sram_ctrl_executable.3280297071 |
|
|
Apr 04 12:37:44 PM PDT 24 |
Apr 04 12:49:00 PM PDT 24 |
22963300743 ps |
| T685 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.1896483215 |
|
|
Apr 04 12:37:10 PM PDT 24 |
Apr 04 12:41:47 PM PDT 24 |
7823660110 ps |
| T686 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.486060423 |
|
|
Apr 04 12:35:57 PM PDT 24 |
Apr 04 12:42:08 PM PDT 24 |
16798257466 ps |
| T687 |
/workspace/coverage/default/34.sram_ctrl_bijection.290279281 |
|
|
Apr 04 12:37:55 PM PDT 24 |
Apr 04 12:38:55 PM PDT 24 |
13457624610 ps |
| T688 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.706105044 |
|
|
Apr 04 12:37:01 PM PDT 24 |
Apr 04 01:01:38 PM PDT 24 |
5561352246 ps |
| T689 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1630805603 |
|
|
Apr 04 12:36:14 PM PDT 24 |
Apr 04 12:44:25 PM PDT 24 |
22554371609 ps |
| T690 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.3284149343 |
|
|
Apr 04 12:36:47 PM PDT 24 |
Apr 04 12:40:05 PM PDT 24 |
15470035043 ps |
| T691 |
/workspace/coverage/default/46.sram_ctrl_stress_all.3609428642 |
|
|
Apr 04 12:39:21 PM PDT 24 |
Apr 04 01:19:55 PM PDT 24 |
185587155798 ps |
| T692 |
/workspace/coverage/default/37.sram_ctrl_alert_test.2225585049 |
|
|
Apr 04 12:38:28 PM PDT 24 |
Apr 04 12:38:29 PM PDT 24 |
11365925 ps |
| T693 |
/workspace/coverage/default/42.sram_ctrl_alert_test.1254364649 |
|
|
Apr 04 12:38:52 PM PDT 24 |
Apr 04 12:38:53 PM PDT 24 |
13788043 ps |
| T694 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.2767748275 |
|
|
Apr 04 12:37:28 PM PDT 24 |
Apr 04 12:37:33 PM PDT 24 |
285264291 ps |
| T695 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.1533431298 |
|
|
Apr 04 12:36:53 PM PDT 24 |
Apr 04 01:03:15 PM PDT 24 |
37798953194 ps |
| T696 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3822720653 |
|
|
Apr 04 12:36:27 PM PDT 24 |
Apr 04 12:36:29 PM PDT 24 |
153543812 ps |
| T697 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.456840722 |
|
|
Apr 04 12:36:04 PM PDT 24 |
Apr 04 12:45:19 PM PDT 24 |
1945156667 ps |
| T698 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.397008594 |
|
|
Apr 04 12:36:40 PM PDT 24 |
Apr 04 12:39:08 PM PDT 24 |
3371972348 ps |
| T699 |
/workspace/coverage/default/21.sram_ctrl_executable.2320905911 |
|
|
Apr 04 12:36:54 PM PDT 24 |
Apr 04 12:37:47 PM PDT 24 |
6405251303 ps |
| T700 |
/workspace/coverage/default/34.sram_ctrl_partial_access.3471127549 |
|
|
Apr 04 12:38:10 PM PDT 24 |
Apr 04 12:38:14 PM PDT 24 |
622990229 ps |
| T701 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.560169113 |
|
|
Apr 04 12:37:44 PM PDT 24 |
Apr 04 12:38:29 PM PDT 24 |
109803875 ps |
| T702 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.169267660 |
|
|
Apr 04 12:37:26 PM PDT 24 |
Apr 04 12:52:58 PM PDT 24 |
11183321209 ps |
| T703 |
/workspace/coverage/default/15.sram_ctrl_partial_access.2511547157 |
|
|
Apr 04 12:36:35 PM PDT 24 |
Apr 04 12:36:47 PM PDT 24 |
478963835 ps |
| T704 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.1744332460 |
|
|
Apr 04 12:36:44 PM PDT 24 |
Apr 04 12:36:52 PM PDT 24 |
648100565 ps |
| T33 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.4293861947 |
|
|
Apr 04 12:35:59 PM PDT 24 |
Apr 04 12:36:02 PM PDT 24 |
1153762759 ps |
| T705 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.212214959 |
|
|
Apr 04 12:35:49 PM PDT 24 |
Apr 04 12:36:00 PM PDT 24 |
657685586 ps |
| T706 |
/workspace/coverage/default/17.sram_ctrl_bijection.292871 |
|
|
Apr 04 12:36:36 PM PDT 24 |
Apr 04 12:37:40 PM PDT 24 |
4278803705 ps |
| T707 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1259576974 |
|
|
Apr 04 12:39:13 PM PDT 24 |
Apr 04 12:39:14 PM PDT 24 |
110673148 ps |
| T708 |
/workspace/coverage/default/8.sram_ctrl_bijection.204772653 |
|
|
Apr 04 12:36:18 PM PDT 24 |
Apr 04 12:37:16 PM PDT 24 |
8082174792 ps |
| T709 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.568655364 |
|
|
Apr 04 12:37:24 PM PDT 24 |
Apr 04 12:37:49 PM PDT 24 |
98029131 ps |
| T710 |
/workspace/coverage/default/15.sram_ctrl_regwen.2278255484 |
|
|
Apr 04 12:36:40 PM PDT 24 |
Apr 04 12:48:06 PM PDT 24 |
2634806509 ps |
| T711 |
/workspace/coverage/default/36.sram_ctrl_executable.1014281999 |
|
|
Apr 04 12:38:08 PM PDT 24 |
Apr 04 12:55:46 PM PDT 24 |
33577547585 ps |
| T712 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.3844571344 |
|
|
Apr 04 12:38:38 PM PDT 24 |
Apr 04 12:42:23 PM PDT 24 |
7869776073 ps |
| T713 |
/workspace/coverage/default/38.sram_ctrl_smoke.2243152808 |
|
|
Apr 04 12:38:17 PM PDT 24 |
Apr 04 12:38:19 PM PDT 24 |
129266405 ps |
| T714 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.2061911170 |
|
|
Apr 04 12:37:55 PM PDT 24 |
Apr 04 12:55:49 PM PDT 24 |
3241925826 ps |
| T715 |
/workspace/coverage/default/35.sram_ctrl_bijection.2904572762 |
|
|
Apr 04 12:38:00 PM PDT 24 |
Apr 04 12:39:23 PM PDT 24 |
5214803084 ps |
| T716 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.3449310752 |
|
|
Apr 04 12:39:04 PM PDT 24 |
Apr 04 12:39:10 PM PDT 24 |
646788353 ps |
| T717 |
/workspace/coverage/default/38.sram_ctrl_alert_test.1285789051 |
|
|
Apr 04 12:38:30 PM PDT 24 |
Apr 04 12:38:31 PM PDT 24 |
41029105 ps |
| T718 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.2320837328 |
|
|
Apr 04 12:37:34 PM PDT 24 |
Apr 04 12:39:07 PM PDT 24 |
275100127 ps |
| T719 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.917293121 |
|
|
Apr 04 12:36:53 PM PDT 24 |
Apr 04 12:40:23 PM PDT 24 |
2283183520 ps |
| T720 |
/workspace/coverage/default/27.sram_ctrl_stress_all.810605031 |
|
|
Apr 04 12:37:28 PM PDT 24 |
Apr 04 01:08:15 PM PDT 24 |
7885081673 ps |
| T721 |
/workspace/coverage/default/43.sram_ctrl_stress_all.312448129 |
|
|
Apr 04 12:39:05 PM PDT 24 |
Apr 04 12:54:00 PM PDT 24 |
3127184285 ps |
| T722 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1306727130 |
|
|
Apr 04 12:35:49 PM PDT 24 |
Apr 04 12:41:20 PM PDT 24 |
3472683806 ps |
| T723 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2637647700 |
|
|
Apr 04 12:36:13 PM PDT 24 |
Apr 04 12:36:17 PM PDT 24 |
2004296102 ps |
| T724 |
/workspace/coverage/default/38.sram_ctrl_bijection.3023118928 |
|
|
Apr 04 12:38:18 PM PDT 24 |
Apr 04 12:38:38 PM PDT 24 |
1302186492 ps |
| T725 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.3045270548 |
|
|
Apr 04 12:38:48 PM PDT 24 |
Apr 04 12:38:59 PM PDT 24 |
2612314356 ps |
| T726 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.3827442382 |
|
|
Apr 04 12:35:48 PM PDT 24 |
Apr 04 12:35:53 PM PDT 24 |
304158295 ps |
| T727 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.4273806710 |
|
|
Apr 04 12:37:26 PM PDT 24 |
Apr 04 12:37:32 PM PDT 24 |
1859156770 ps |
| T728 |
/workspace/coverage/default/28.sram_ctrl_alert_test.2292805074 |
|
|
Apr 04 12:37:32 PM PDT 24 |
Apr 04 12:37:32 PM PDT 24 |
15389166 ps |
| T729 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2987365278 |
|
|
Apr 04 12:38:54 PM PDT 24 |
Apr 04 12:39:21 PM PDT 24 |
92365045 ps |
| T730 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.2869412939 |
|
|
Apr 04 12:38:30 PM PDT 24 |
Apr 04 12:42:27 PM PDT 24 |
10373205359 ps |
| T731 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.1996944206 |
|
|
Apr 04 12:38:04 PM PDT 24 |
Apr 04 12:43:05 PM PDT 24 |
6703563151 ps |
| T732 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.825014384 |
|
|
Apr 04 12:39:05 PM PDT 24 |
Apr 04 12:51:48 PM PDT 24 |
2691742886 ps |
| T733 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.670512441 |
|
|
Apr 04 12:36:08 PM PDT 24 |
Apr 04 12:36:09 PM PDT 24 |
25557151 ps |
| T734 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.1330120543 |
|
|
Apr 04 12:37:54 PM PDT 24 |
Apr 04 12:38:04 PM PDT 24 |
1904495488 ps |
| T735 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3803958397 |
|
|
Apr 04 12:36:15 PM PDT 24 |
Apr 04 12:36:16 PM PDT 24 |
29964785 ps |
| T736 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.945319709 |
|
|
Apr 04 12:39:14 PM PDT 24 |
Apr 04 12:57:55 PM PDT 24 |
9749520024 ps |
| T737 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.3990482698 |
|
|
Apr 04 12:38:37 PM PDT 24 |
Apr 04 12:39:21 PM PDT 24 |
105435820 ps |
| T738 |
/workspace/coverage/default/30.sram_ctrl_stress_all.717239277 |
|
|
Apr 04 12:37:39 PM PDT 24 |
Apr 04 12:56:21 PM PDT 24 |
185634117173 ps |
| T739 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.1312387079 |
|
|
Apr 04 12:37:00 PM PDT 24 |
Apr 04 12:39:52 PM PDT 24 |
8720092566 ps |
| T740 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.921821719 |
|
|
Apr 04 12:36:10 PM PDT 24 |
Apr 04 12:36:15 PM PDT 24 |
1716056134 ps |
| T741 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.415628579 |
|
|
Apr 04 12:37:24 PM PDT 24 |
Apr 04 12:37:32 PM PDT 24 |
2817836321 ps |
| T742 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2086673372 |
|
|
Apr 04 12:36:31 PM PDT 24 |
Apr 04 12:36:36 PM PDT 24 |
341138482 ps |
| T743 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.2936587707 |
|
|
Apr 04 12:38:37 PM PDT 24 |
Apr 04 12:38:43 PM PDT 24 |
173988103 ps |
| T744 |
/workspace/coverage/default/44.sram_ctrl_executable.3626071725 |
|
|
Apr 04 12:39:07 PM PDT 24 |
Apr 04 01:02:11 PM PDT 24 |
3919486353 ps |
| T745 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.4121203135 |
|
|
Apr 04 12:39:06 PM PDT 24 |
Apr 04 12:39:07 PM PDT 24 |
58428027 ps |
| T746 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.2433040731 |
|
|
Apr 04 12:36:45 PM PDT 24 |
Apr 04 12:36:59 PM PDT 24 |
72488617 ps |
| T747 |
/workspace/coverage/default/18.sram_ctrl_bijection.2503741776 |
|
|
Apr 04 12:36:45 PM PDT 24 |
Apr 04 12:37:46 PM PDT 24 |
4896605341 ps |
| T748 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.1387927256 |
|
|
Apr 04 12:36:01 PM PDT 24 |
Apr 04 12:37:34 PM PDT 24 |
892020691 ps |
| T749 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.100235718 |
|
|
Apr 04 12:36:14 PM PDT 24 |
Apr 04 12:36:22 PM PDT 24 |
974479074 ps |
| T750 |
/workspace/coverage/default/40.sram_ctrl_executable.664308772 |
|
|
Apr 04 12:38:39 PM PDT 24 |
Apr 04 01:00:17 PM PDT 24 |
12528520937 ps |
| T751 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.49589687 |
|
|
Apr 04 12:36:36 PM PDT 24 |
Apr 04 12:39:04 PM PDT 24 |
5969356348 ps |
| T752 |
/workspace/coverage/default/31.sram_ctrl_smoke.1824839847 |
|
|
Apr 04 12:37:43 PM PDT 24 |
Apr 04 12:38:00 PM PDT 24 |
273944263 ps |
| T753 |
/workspace/coverage/default/27.sram_ctrl_smoke.2317373213 |
|
|
Apr 04 12:37:19 PM PDT 24 |
Apr 04 12:37:27 PM PDT 24 |
59511657 ps |
| T754 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.3857741391 |
|
|
Apr 04 12:38:22 PM PDT 24 |
Apr 04 12:38:27 PM PDT 24 |
250556730 ps |
| T755 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.544259481 |
|
|
Apr 04 12:36:19 PM PDT 24 |
Apr 04 12:43:01 PM PDT 24 |
4359446416 ps |
| T756 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.508726556 |
|
|
Apr 04 12:38:56 PM PDT 24 |
Apr 04 12:39:02 PM PDT 24 |
832570061 ps |
| T757 |
/workspace/coverage/default/5.sram_ctrl_partial_access.2383709387 |
|
|
Apr 04 12:35:55 PM PDT 24 |
Apr 04 12:37:13 PM PDT 24 |
330045432 ps |
| T758 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.1533372790 |
|
|
Apr 04 12:37:19 PM PDT 24 |
Apr 04 12:52:42 PM PDT 24 |
34464463902 ps |
| T759 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.623875002 |
|
|
Apr 04 12:38:27 PM PDT 24 |
Apr 04 12:42:04 PM PDT 24 |
6367086389 ps |
| T760 |
/workspace/coverage/default/33.sram_ctrl_stress_all.2341300773 |
|
|
Apr 04 12:37:58 PM PDT 24 |
Apr 04 01:23:45 PM PDT 24 |
61835520746 ps |
| T761 |
/workspace/coverage/default/27.sram_ctrl_regwen.2484631517 |
|
|
Apr 04 12:37:24 PM PDT 24 |
Apr 04 12:52:24 PM PDT 24 |
32453580914 ps |
| T762 |
/workspace/coverage/default/29.sram_ctrl_executable.2265767476 |
|
|
Apr 04 12:37:33 PM PDT 24 |
Apr 04 12:45:14 PM PDT 24 |
5665310495 ps |
| T763 |
/workspace/coverage/default/40.sram_ctrl_stress_all.2313777928 |
|
|
Apr 04 12:38:47 PM PDT 24 |
Apr 04 01:47:15 PM PDT 24 |
47984006637 ps |
| T764 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.121826739 |
|
|
Apr 04 12:36:25 PM PDT 24 |
Apr 04 12:36:38 PM PDT 24 |
125844201 ps |
| T765 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.1277559363 |
|
|
Apr 04 12:36:41 PM PDT 24 |
Apr 04 12:36:42 PM PDT 24 |
30145584 ps |
| T766 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2128628842 |
|
|
Apr 04 12:37:27 PM PDT 24 |
Apr 04 12:37:29 PM PDT 24 |
166137248 ps |
| T767 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.2774430699 |
|
|
Apr 04 12:37:56 PM PDT 24 |
Apr 04 12:38:42 PM PDT 24 |
422942040 ps |
| T768 |
/workspace/coverage/default/42.sram_ctrl_regwen.838689911 |
|
|
Apr 04 12:38:54 PM PDT 24 |
Apr 04 12:49:05 PM PDT 24 |
20758075725 ps |
| T769 |
/workspace/coverage/default/32.sram_ctrl_bijection.78641564 |
|
|
Apr 04 12:37:46 PM PDT 24 |
Apr 04 12:38:51 PM PDT 24 |
5591787693 ps |
| T770 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3948996814 |
|
|
Apr 04 12:38:19 PM PDT 24 |
Apr 04 12:41:11 PM PDT 24 |
20262638258 ps |
| T771 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.1461464310 |
|
|
Apr 04 12:36:33 PM PDT 24 |
Apr 04 12:56:40 PM PDT 24 |
17464812729 ps |
| T772 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.2805113210 |
|
|
Apr 04 12:36:51 PM PDT 24 |
Apr 04 12:56:41 PM PDT 24 |
12377818736 ps |
| T773 |
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1283025977 |
|
|
Apr 04 12:38:54 PM PDT 24 |
Apr 04 12:44:10 PM PDT 24 |
44091782011 ps |
| T774 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.3849551555 |
|
|
Apr 04 12:37:34 PM PDT 24 |
Apr 04 12:37:39 PM PDT 24 |
48933045 ps |
| T775 |
/workspace/coverage/default/11.sram_ctrl_executable.3598838113 |
|
|
Apr 04 12:36:16 PM PDT 24 |
Apr 04 01:03:00 PM PDT 24 |
2080285463 ps |
| T776 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.3730621018 |
|
|
Apr 04 12:37:10 PM PDT 24 |
Apr 04 12:37:16 PM PDT 24 |
167907758 ps |
| T777 |
/workspace/coverage/default/20.sram_ctrl_stress_all.4008937845 |
|
|
Apr 04 12:36:57 PM PDT 24 |
Apr 04 01:29:47 PM PDT 24 |
265889346390 ps |
| T778 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.656506641 |
|
|
Apr 04 12:36:25 PM PDT 24 |
Apr 04 12:40:21 PM PDT 24 |
13738511185 ps |
| T779 |
/workspace/coverage/default/40.sram_ctrl_partial_access.2593798620 |
|
|
Apr 04 12:38:35 PM PDT 24 |
Apr 04 12:38:37 PM PDT 24 |
67737095 ps |
| T780 |
/workspace/coverage/default/47.sram_ctrl_smoke.3186202168 |
|
|
Apr 04 12:39:22 PM PDT 24 |
Apr 04 12:40:24 PM PDT 24 |
412595095 ps |
| T781 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.590863177 |
|
|
Apr 04 12:37:35 PM PDT 24 |
Apr 04 12:52:34 PM PDT 24 |
3718117481 ps |
| T782 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.4011261260 |
|
|
Apr 04 12:37:18 PM PDT 24 |
Apr 04 12:43:48 PM PDT 24 |
33851552848 ps |
| T783 |
/workspace/coverage/default/16.sram_ctrl_regwen.3736013695 |
|
|
Apr 04 12:36:41 PM PDT 24 |
Apr 04 12:40:07 PM PDT 24 |
404528833 ps |
| T784 |
/workspace/coverage/default/20.sram_ctrl_regwen.1834681308 |
|
|
Apr 04 12:36:55 PM PDT 24 |
Apr 04 01:08:26 PM PDT 24 |
8251755715 ps |
| T785 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3379543577 |
|
|
Apr 04 12:37:34 PM PDT 24 |
Apr 04 12:42:12 PM PDT 24 |
4017745323 ps |
| T786 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.4024324975 |
|
|
Apr 04 12:37:01 PM PDT 24 |
Apr 04 12:37:05 PM PDT 24 |
143516955 ps |
| T787 |
/workspace/coverage/default/14.sram_ctrl_executable.3683117794 |
|
|
Apr 04 12:36:28 PM PDT 24 |
Apr 04 12:55:33 PM PDT 24 |
2610502625 ps |
| T788 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.184746476 |
|
|
Apr 04 12:36:35 PM PDT 24 |
Apr 04 12:37:12 PM PDT 24 |
92441957 ps |
| T789 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.1866629005 |
|
|
Apr 04 12:39:13 PM PDT 24 |
Apr 04 12:39:22 PM PDT 24 |
118539991 ps |
| T790 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1254474551 |
|
|
Apr 04 12:39:28 PM PDT 24 |
Apr 04 12:39:29 PM PDT 24 |
82896574 ps |
| T791 |
/workspace/coverage/default/1.sram_ctrl_partial_access.886876183 |
|
|
Apr 04 12:35:50 PM PDT 24 |
Apr 04 12:35:58 PM PDT 24 |
328913166 ps |
| T792 |
/workspace/coverage/default/6.sram_ctrl_bijection.2504788353 |
|
|
Apr 04 12:36:28 PM PDT 24 |
Apr 04 12:37:37 PM PDT 24 |
4532709760 ps |
| T793 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.912609625 |
|
|
Apr 04 12:36:27 PM PDT 24 |
Apr 04 12:47:55 PM PDT 24 |
2050709323 ps |
| T794 |
/workspace/coverage/default/14.sram_ctrl_alert_test.2589366621 |
|
|
Apr 04 12:36:32 PM PDT 24 |
Apr 04 12:36:34 PM PDT 24 |
18249250 ps |