T305 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.4137277184 |
|
|
Apr 15 02:31:41 PM PDT 24 |
Apr 15 02:37:14 PM PDT 24 |
52154004313 ps |
T306 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.10987224 |
|
|
Apr 15 02:30:13 PM PDT 24 |
Apr 15 02:30:24 PM PDT 24 |
2991050404 ps |
T307 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2054498155 |
|
|
Apr 15 02:30:26 PM PDT 24 |
Apr 15 02:32:04 PM PDT 24 |
163412969 ps |
T308 |
/workspace/coverage/default/30.sram_ctrl_alert_test.3102634884 |
|
|
Apr 15 02:32:16 PM PDT 24 |
Apr 15 02:32:17 PM PDT 24 |
36211684 ps |
T309 |
/workspace/coverage/default/2.sram_ctrl_smoke.2801326535 |
|
|
Apr 15 02:29:52 PM PDT 24 |
Apr 15 02:32:03 PM PDT 24 |
1242857205 ps |
T310 |
/workspace/coverage/default/42.sram_ctrl_bijection.2443296686 |
|
|
Apr 15 02:33:54 PM PDT 24 |
Apr 15 02:35:18 PM PDT 24 |
5414452229 ps |
T311 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.1115367814 |
|
|
Apr 15 02:30:21 PM PDT 24 |
Apr 15 02:30:23 PM PDT 24 |
110670830 ps |
T312 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.830581660 |
|
|
Apr 15 02:30:57 PM PDT 24 |
Apr 15 02:30:58 PM PDT 24 |
77185806 ps |
T313 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.1174740094 |
|
|
Apr 15 02:29:51 PM PDT 24 |
Apr 15 02:30:01 PM PDT 24 |
1104857416 ps |
T314 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.2485936299 |
|
|
Apr 15 02:31:22 PM PDT 24 |
Apr 15 02:42:25 PM PDT 24 |
4969241349 ps |
T315 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.636035534 |
|
|
Apr 15 02:31:01 PM PDT 24 |
Apr 15 02:43:59 PM PDT 24 |
9531565422 ps |
T109 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2143287231 |
|
|
Apr 15 02:32:01 PM PDT 24 |
Apr 15 02:32:38 PM PDT 24 |
2778447863 ps |
T316 |
/workspace/coverage/default/9.sram_ctrl_regwen.2895450667 |
|
|
Apr 15 02:30:21 PM PDT 24 |
Apr 15 02:53:24 PM PDT 24 |
5786583777 ps |
T317 |
/workspace/coverage/default/4.sram_ctrl_smoke.738072622 |
|
|
Apr 15 02:29:56 PM PDT 24 |
Apr 15 02:30:22 PM PDT 24 |
354990353 ps |
T318 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3227104626 |
|
|
Apr 15 02:30:13 PM PDT 24 |
Apr 15 02:30:19 PM PDT 24 |
298862747 ps |
T319 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3927584411 |
|
|
Apr 15 02:34:38 PM PDT 24 |
Apr 15 02:35:46 PM PDT 24 |
151786470 ps |
T320 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.279570926 |
|
|
Apr 15 02:29:58 PM PDT 24 |
Apr 15 02:30:00 PM PDT 24 |
92423945 ps |
T321 |
/workspace/coverage/default/48.sram_ctrl_executable.2183335976 |
|
|
Apr 15 02:34:57 PM PDT 24 |
Apr 15 02:46:08 PM PDT 24 |
11276764995 ps |
T322 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.2436865881 |
|
|
Apr 15 02:29:43 PM PDT 24 |
Apr 15 02:30:57 PM PDT 24 |
485285799 ps |
T323 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.1827667965 |
|
|
Apr 15 02:30:31 PM PDT 24 |
Apr 15 02:32:01 PM PDT 24 |
672639328 ps |
T324 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3754736764 |
|
|
Apr 15 02:34:00 PM PDT 24 |
Apr 15 02:37:24 PM PDT 24 |
2112181841 ps |
T325 |
/workspace/coverage/default/42.sram_ctrl_executable.1361980256 |
|
|
Apr 15 02:33:59 PM PDT 24 |
Apr 15 02:42:13 PM PDT 24 |
1496408411 ps |
T326 |
/workspace/coverage/default/16.sram_ctrl_bijection.2547171650 |
|
|
Apr 15 02:30:41 PM PDT 24 |
Apr 15 02:31:41 PM PDT 24 |
2940969524 ps |
T327 |
/workspace/coverage/default/34.sram_ctrl_bijection.1523180503 |
|
|
Apr 15 02:32:37 PM PDT 24 |
Apr 15 02:33:40 PM PDT 24 |
1861497846 ps |
T328 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3020295257 |
|
|
Apr 15 02:31:52 PM PDT 24 |
Apr 15 02:34:58 PM PDT 24 |
3785161188 ps |
T329 |
/workspace/coverage/default/15.sram_ctrl_stress_all.724960124 |
|
|
Apr 15 02:30:44 PM PDT 24 |
Apr 15 04:30:52 PM PDT 24 |
483753639309 ps |
T330 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.1971531693 |
|
|
Apr 15 02:33:00 PM PDT 24 |
Apr 15 02:39:55 PM PDT 24 |
36799780528 ps |
T331 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1951667186 |
|
|
Apr 15 02:30:13 PM PDT 24 |
Apr 15 02:34:09 PM PDT 24 |
9610991757 ps |
T332 |
/workspace/coverage/default/13.sram_ctrl_regwen.1262017361 |
|
|
Apr 15 02:30:25 PM PDT 24 |
Apr 15 02:50:52 PM PDT 24 |
101069546336 ps |
T333 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.4100547021 |
|
|
Apr 15 02:29:58 PM PDT 24 |
Apr 15 02:30:08 PM PDT 24 |
70893011 ps |
T334 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.1600565249 |
|
|
Apr 15 02:31:50 PM PDT 24 |
Apr 15 02:31:59 PM PDT 24 |
264341962 ps |
T335 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.1555151701 |
|
|
Apr 15 02:29:57 PM PDT 24 |
Apr 15 02:34:37 PM PDT 24 |
5204072734 ps |
T336 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.2104802790 |
|
|
Apr 15 02:30:58 PM PDT 24 |
Apr 15 02:31:06 PM PDT 24 |
1282015475 ps |
T337 |
/workspace/coverage/default/4.sram_ctrl_partial_access.576821059 |
|
|
Apr 15 02:29:58 PM PDT 24 |
Apr 15 02:30:37 PM PDT 24 |
528582082 ps |
T338 |
/workspace/coverage/default/33.sram_ctrl_stress_all.3116317007 |
|
|
Apr 15 02:32:37 PM PDT 24 |
Apr 15 03:10:41 PM PDT 24 |
48246337498 ps |
T339 |
/workspace/coverage/default/3.sram_ctrl_stress_all.1504210401 |
|
|
Apr 15 02:29:56 PM PDT 24 |
Apr 15 02:52:26 PM PDT 24 |
29523489735 ps |
T340 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.3811574209 |
|
|
Apr 15 02:30:28 PM PDT 24 |
Apr 15 02:42:25 PM PDT 24 |
6326623019 ps |
T341 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.508029626 |
|
|
Apr 15 02:34:47 PM PDT 24 |
Apr 15 02:46:40 PM PDT 24 |
6839834764 ps |
T342 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.2154485461 |
|
|
Apr 15 02:32:07 PM PDT 24 |
Apr 15 02:32:17 PM PDT 24 |
979520492 ps |
T343 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.1568021963 |
|
|
Apr 15 02:33:20 PM PDT 24 |
Apr 15 02:37:44 PM PDT 24 |
43861184661 ps |
T344 |
/workspace/coverage/default/24.sram_ctrl_executable.973623598 |
|
|
Apr 15 02:31:25 PM PDT 24 |
Apr 15 02:50:46 PM PDT 24 |
2571288115 ps |
T345 |
/workspace/coverage/default/22.sram_ctrl_smoke.37535884 |
|
|
Apr 15 02:31:05 PM PDT 24 |
Apr 15 02:31:10 PM PDT 24 |
243202529 ps |
T346 |
/workspace/coverage/default/32.sram_ctrl_regwen.2335263912 |
|
|
Apr 15 02:32:28 PM PDT 24 |
Apr 15 02:49:19 PM PDT 24 |
45725981513 ps |
T347 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1938553142 |
|
|
Apr 15 02:30:03 PM PDT 24 |
Apr 15 02:37:39 PM PDT 24 |
8321602630 ps |
T348 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.3283449869 |
|
|
Apr 15 02:30:43 PM PDT 24 |
Apr 15 02:50:42 PM PDT 24 |
5662211688 ps |
T349 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3410204138 |
|
|
Apr 15 02:33:24 PM PDT 24 |
Apr 15 02:40:07 PM PDT 24 |
26873959450 ps |
T350 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.3140826443 |
|
|
Apr 15 02:30:36 PM PDT 24 |
Apr 15 02:33:28 PM PDT 24 |
3652378118 ps |
T351 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.446174212 |
|
|
Apr 15 02:33:44 PM PDT 24 |
Apr 15 02:36:41 PM PDT 24 |
1910899899 ps |
T352 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.863045579 |
|
|
Apr 15 02:33:29 PM PDT 24 |
Apr 15 02:33:32 PM PDT 24 |
93242875 ps |
T353 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1305043595 |
|
|
Apr 15 02:29:49 PM PDT 24 |
Apr 15 02:39:54 PM PDT 24 |
14388014075 ps |
T354 |
/workspace/coverage/default/27.sram_ctrl_regwen.2198594932 |
|
|
Apr 15 02:31:41 PM PDT 24 |
Apr 15 02:55:35 PM PDT 24 |
7430872688 ps |
T355 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.2515834073 |
|
|
Apr 15 02:32:56 PM PDT 24 |
Apr 15 02:47:09 PM PDT 24 |
5248754540 ps |
T356 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.3077136715 |
|
|
Apr 15 02:33:37 PM PDT 24 |
Apr 15 02:35:56 PM PDT 24 |
2655915307 ps |
T357 |
/workspace/coverage/default/37.sram_ctrl_stress_all.735053670 |
|
|
Apr 15 02:33:13 PM PDT 24 |
Apr 15 04:02:06 PM PDT 24 |
193343627194 ps |
T358 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1634906380 |
|
|
Apr 15 02:30:44 PM PDT 24 |
Apr 15 02:34:29 PM PDT 24 |
33181124770 ps |
T359 |
/workspace/coverage/default/43.sram_ctrl_stress_all.936023086 |
|
|
Apr 15 02:34:11 PM PDT 24 |
Apr 15 02:46:14 PM PDT 24 |
19124560930 ps |
T360 |
/workspace/coverage/default/18.sram_ctrl_alert_test.680882326 |
|
|
Apr 15 02:30:53 PM PDT 24 |
Apr 15 02:30:54 PM PDT 24 |
28252764 ps |
T361 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3325629888 |
|
|
Apr 15 02:30:01 PM PDT 24 |
Apr 15 02:30:19 PM PDT 24 |
195451907 ps |
T362 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.2008906893 |
|
|
Apr 15 02:29:53 PM PDT 24 |
Apr 15 02:34:33 PM PDT 24 |
5344978238 ps |
T21 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.1929051194 |
|
|
Apr 15 02:30:00 PM PDT 24 |
Apr 15 02:30:03 PM PDT 24 |
134278411 ps |
T363 |
/workspace/coverage/default/32.sram_ctrl_bijection.4213084365 |
|
|
Apr 15 02:32:25 PM PDT 24 |
Apr 15 02:33:25 PM PDT 24 |
2919980841 ps |
T364 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.684368820 |
|
|
Apr 15 02:31:25 PM PDT 24 |
Apr 15 02:35:46 PM PDT 24 |
691790910 ps |
T365 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.3590351550 |
|
|
Apr 15 02:34:49 PM PDT 24 |
Apr 15 02:34:55 PM PDT 24 |
449493483 ps |
T366 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.947915499 |
|
|
Apr 15 02:33:07 PM PDT 24 |
Apr 15 02:40:18 PM PDT 24 |
2245733054 ps |
T367 |
/workspace/coverage/default/25.sram_ctrl_executable.3427803783 |
|
|
Apr 15 02:31:27 PM PDT 24 |
Apr 15 02:35:24 PM PDT 24 |
20320821666 ps |
T368 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3206981627 |
|
|
Apr 15 02:34:01 PM PDT 24 |
Apr 15 02:44:29 PM PDT 24 |
6539120578 ps |
T369 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1752087209 |
|
|
Apr 15 02:30:29 PM PDT 24 |
Apr 15 02:38:12 PM PDT 24 |
4699531793 ps |
T370 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.2957180168 |
|
|
Apr 15 02:32:37 PM PDT 24 |
Apr 15 02:40:37 PM PDT 24 |
30914506341 ps |
T371 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.513588007 |
|
|
Apr 15 02:31:14 PM PDT 24 |
Apr 15 02:42:15 PM PDT 24 |
13358654287 ps |
T372 |
/workspace/coverage/default/13.sram_ctrl_executable.2611636885 |
|
|
Apr 15 02:30:27 PM PDT 24 |
Apr 15 02:45:55 PM PDT 24 |
48394289573 ps |
T373 |
/workspace/coverage/default/33.sram_ctrl_executable.1717212475 |
|
|
Apr 15 02:32:33 PM PDT 24 |
Apr 15 02:34:32 PM PDT 24 |
1013006026 ps |
T374 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.4162077756 |
|
|
Apr 15 02:30:40 PM PDT 24 |
Apr 15 02:30:49 PM PDT 24 |
140426020 ps |
T375 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2595055534 |
|
|
Apr 15 02:30:06 PM PDT 24 |
Apr 15 02:30:07 PM PDT 24 |
28420987 ps |
T376 |
/workspace/coverage/default/5.sram_ctrl_smoke.2018204939 |
|
|
Apr 15 02:30:04 PM PDT 24 |
Apr 15 02:32:42 PM PDT 24 |
644372180 ps |
T377 |
/workspace/coverage/default/18.sram_ctrl_stress_all.1837614828 |
|
|
Apr 15 02:30:54 PM PDT 24 |
Apr 15 03:19:39 PM PDT 24 |
103350100283 ps |
T378 |
/workspace/coverage/default/5.sram_ctrl_regwen.1081488593 |
|
|
Apr 15 02:30:02 PM PDT 24 |
Apr 15 02:51:25 PM PDT 24 |
98989340506 ps |
T379 |
/workspace/coverage/default/5.sram_ctrl_alert_test.1350647634 |
|
|
Apr 15 02:29:59 PM PDT 24 |
Apr 15 02:30:01 PM PDT 24 |
19613658 ps |
T380 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.2512752420 |
|
|
Apr 15 02:33:28 PM PDT 24 |
Apr 15 02:33:30 PM PDT 24 |
452234792 ps |
T381 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.566343842 |
|
|
Apr 15 02:34:44 PM PDT 24 |
Apr 15 02:34:52 PM PDT 24 |
799156786 ps |
T382 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.3227430081 |
|
|
Apr 15 02:31:51 PM PDT 24 |
Apr 15 02:45:37 PM PDT 24 |
13640326291 ps |
T383 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.943728760 |
|
|
Apr 15 02:30:54 PM PDT 24 |
Apr 15 02:48:11 PM PDT 24 |
14932827490 ps |
T384 |
/workspace/coverage/default/15.sram_ctrl_alert_test.3126586328 |
|
|
Apr 15 02:30:40 PM PDT 24 |
Apr 15 02:30:41 PM PDT 24 |
183467652 ps |
T385 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1567044625 |
|
|
Apr 15 02:30:18 PM PDT 24 |
Apr 15 02:32:47 PM PDT 24 |
151268382 ps |
T386 |
/workspace/coverage/default/6.sram_ctrl_executable.618917699 |
|
|
Apr 15 02:30:10 PM PDT 24 |
Apr 15 02:49:54 PM PDT 24 |
72475561677 ps |
T387 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2036402911 |
|
|
Apr 15 02:29:46 PM PDT 24 |
Apr 15 02:32:01 PM PDT 24 |
1610643360 ps |
T388 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.1242973679 |
|
|
Apr 15 02:31:34 PM PDT 24 |
Apr 15 02:31:37 PM PDT 24 |
137749659 ps |
T389 |
/workspace/coverage/default/10.sram_ctrl_stress_all.3442766035 |
|
|
Apr 15 02:30:15 PM PDT 24 |
Apr 15 02:50:37 PM PDT 24 |
21685392818 ps |
T390 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2630920286 |
|
|
Apr 15 02:30:14 PM PDT 24 |
Apr 15 02:30:42 PM PDT 24 |
93653395 ps |
T391 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3238105465 |
|
|
Apr 15 02:29:54 PM PDT 24 |
Apr 15 02:36:31 PM PDT 24 |
31153791373 ps |
T392 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.238739125 |
|
|
Apr 15 02:34:34 PM PDT 24 |
Apr 15 02:40:34 PM PDT 24 |
107403088603 ps |
T393 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.2192025186 |
|
|
Apr 15 02:32:56 PM PDT 24 |
Apr 15 02:34:02 PM PDT 24 |
226528548 ps |
T394 |
/workspace/coverage/default/41.sram_ctrl_partial_access.3612363128 |
|
|
Apr 15 02:33:49 PM PDT 24 |
Apr 15 02:34:06 PM PDT 24 |
1321966654 ps |
T395 |
/workspace/coverage/default/22.sram_ctrl_alert_test.951932576 |
|
|
Apr 15 02:31:11 PM PDT 24 |
Apr 15 02:31:12 PM PDT 24 |
40129247 ps |
T396 |
/workspace/coverage/default/2.sram_ctrl_alert_test.1161658779 |
|
|
Apr 15 02:29:51 PM PDT 24 |
Apr 15 02:29:52 PM PDT 24 |
34893010 ps |
T397 |
/workspace/coverage/default/4.sram_ctrl_alert_test.886126121 |
|
|
Apr 15 02:29:57 PM PDT 24 |
Apr 15 02:29:59 PM PDT 24 |
11256927 ps |
T398 |
/workspace/coverage/default/37.sram_ctrl_smoke.2415672313 |
|
|
Apr 15 02:33:09 PM PDT 24 |
Apr 15 02:33:10 PM PDT 24 |
38691119 ps |
T399 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.2816540571 |
|
|
Apr 15 02:33:59 PM PDT 24 |
Apr 15 02:34:18 PM PDT 24 |
74363049 ps |
T400 |
/workspace/coverage/default/0.sram_ctrl_executable.3445224996 |
|
|
Apr 15 02:29:43 PM PDT 24 |
Apr 15 02:48:12 PM PDT 24 |
5950647194 ps |
T401 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.758372808 |
|
|
Apr 15 02:33:59 PM PDT 24 |
Apr 15 02:34:00 PM PDT 24 |
73971838 ps |
T402 |
/workspace/coverage/default/21.sram_ctrl_regwen.2812269210 |
|
|
Apr 15 02:31:05 PM PDT 24 |
Apr 15 02:32:47 PM PDT 24 |
640842767 ps |
T403 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.2677591158 |
|
|
Apr 15 02:34:22 PM PDT 24 |
Apr 15 02:34:31 PM PDT 24 |
2195188994 ps |
T404 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.749475424 |
|
|
Apr 15 02:34:23 PM PDT 24 |
Apr 15 02:34:28 PM PDT 24 |
146572908 ps |
T405 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.1980263314 |
|
|
Apr 15 02:33:07 PM PDT 24 |
Apr 15 02:37:58 PM PDT 24 |
69941360396 ps |
T406 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.1896704172 |
|
|
Apr 15 02:32:32 PM PDT 24 |
Apr 15 02:33:23 PM PDT 24 |
386090725 ps |
T407 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.541847534 |
|
|
Apr 15 02:31:25 PM PDT 24 |
Apr 15 02:32:00 PM PDT 24 |
117644453 ps |
T408 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.4205520328 |
|
|
Apr 15 02:29:56 PM PDT 24 |
Apr 15 02:29:58 PM PDT 24 |
42285523 ps |
T409 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.3043982894 |
|
|
Apr 15 02:31:18 PM PDT 24 |
Apr 15 02:31:24 PM PDT 24 |
338323621 ps |
T410 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2806875665 |
|
|
Apr 15 02:31:44 PM PDT 24 |
Apr 15 02:32:04 PM PDT 24 |
347338974 ps |
T411 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.474656171 |
|
|
Apr 15 02:34:26 PM PDT 24 |
Apr 15 02:35:53 PM PDT 24 |
266800004 ps |
T412 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3694681092 |
|
|
Apr 15 02:32:24 PM PDT 24 |
Apr 15 02:34:15 PM PDT 24 |
1138942187 ps |
T413 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.336659989 |
|
|
Apr 15 02:32:37 PM PDT 24 |
Apr 15 02:35:54 PM PDT 24 |
4129207518 ps |
T414 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.332601025 |
|
|
Apr 15 02:30:16 PM PDT 24 |
Apr 15 02:30:21 PM PDT 24 |
282691656 ps |
T415 |
/workspace/coverage/default/28.sram_ctrl_bijection.2527708015 |
|
|
Apr 15 02:31:45 PM PDT 24 |
Apr 15 02:32:35 PM PDT 24 |
9666588870 ps |
T416 |
/workspace/coverage/default/11.sram_ctrl_alert_test.4244492896 |
|
|
Apr 15 02:30:19 PM PDT 24 |
Apr 15 02:30:20 PM PDT 24 |
29665666 ps |
T417 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.157583393 |
|
|
Apr 15 02:32:01 PM PDT 24 |
Apr 15 02:50:46 PM PDT 24 |
13116064195 ps |
T418 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.2856462672 |
|
|
Apr 15 02:29:51 PM PDT 24 |
Apr 15 02:33:32 PM PDT 24 |
4743834617 ps |
T419 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.3424975374 |
|
|
Apr 15 02:30:44 PM PDT 24 |
Apr 15 02:30:48 PM PDT 24 |
71199379 ps |
T420 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.458525433 |
|
|
Apr 15 02:34:07 PM PDT 24 |
Apr 15 02:34:14 PM PDT 24 |
2018090433 ps |
T421 |
/workspace/coverage/default/44.sram_ctrl_bijection.959711487 |
|
|
Apr 15 02:34:13 PM PDT 24 |
Apr 15 02:34:36 PM PDT 24 |
1428075431 ps |
T422 |
/workspace/coverage/default/18.sram_ctrl_regwen.4189575340 |
|
|
Apr 15 02:30:53 PM PDT 24 |
Apr 15 02:54:24 PM PDT 24 |
15205266659 ps |
T423 |
/workspace/coverage/default/7.sram_ctrl_bijection.797226479 |
|
|
Apr 15 02:30:05 PM PDT 24 |
Apr 15 02:30:54 PM PDT 24 |
8426493064 ps |
T424 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3187155693 |
|
|
Apr 15 02:30:05 PM PDT 24 |
Apr 15 02:30:10 PM PDT 24 |
175796293 ps |
T425 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.726512449 |
|
|
Apr 15 02:33:51 PM PDT 24 |
Apr 15 02:33:56 PM PDT 24 |
233039194 ps |
T426 |
/workspace/coverage/default/26.sram_ctrl_alert_test.2639931112 |
|
|
Apr 15 02:31:36 PM PDT 24 |
Apr 15 02:31:38 PM PDT 24 |
12681720 ps |
T427 |
/workspace/coverage/default/13.sram_ctrl_bijection.3549709611 |
|
|
Apr 15 02:30:23 PM PDT 24 |
Apr 15 02:31:27 PM PDT 24 |
5158886252 ps |
T428 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.331289362 |
|
|
Apr 15 02:30:14 PM PDT 24 |
Apr 15 02:52:37 PM PDT 24 |
27266806105 ps |
T429 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1603817818 |
|
|
Apr 15 02:34:54 PM PDT 24 |
Apr 15 02:41:19 PM PDT 24 |
15476182739 ps |
T430 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.283499645 |
|
|
Apr 15 02:31:25 PM PDT 24 |
Apr 15 02:33:15 PM PDT 24 |
538204833 ps |
T431 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.1560231411 |
|
|
Apr 15 02:29:59 PM PDT 24 |
Apr 15 02:30:03 PM PDT 24 |
47468658 ps |
T432 |
/workspace/coverage/default/2.sram_ctrl_bijection.2486616606 |
|
|
Apr 15 02:29:48 PM PDT 24 |
Apr 15 02:30:15 PM PDT 24 |
5092028850 ps |
T433 |
/workspace/coverage/default/0.sram_ctrl_smoke.540488073 |
|
|
Apr 15 02:29:43 PM PDT 24 |
Apr 15 02:29:55 PM PDT 24 |
1059483180 ps |
T434 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.870323528 |
|
|
Apr 15 02:30:21 PM PDT 24 |
Apr 15 02:49:12 PM PDT 24 |
9319778093 ps |
T435 |
/workspace/coverage/default/28.sram_ctrl_executable.357740993 |
|
|
Apr 15 02:31:49 PM PDT 24 |
Apr 15 02:53:51 PM PDT 24 |
19393163313 ps |
T436 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.3807030984 |
|
|
Apr 15 02:29:54 PM PDT 24 |
Apr 15 02:47:39 PM PDT 24 |
18451624841 ps |
T437 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.389688295 |
|
|
Apr 15 02:30:17 PM PDT 24 |
Apr 15 02:43:10 PM PDT 24 |
2742485789 ps |
T438 |
/workspace/coverage/default/6.sram_ctrl_regwen.2226702386 |
|
|
Apr 15 02:30:13 PM PDT 24 |
Apr 15 02:49:08 PM PDT 24 |
38625486995 ps |
T439 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.3361646020 |
|
|
Apr 15 02:31:23 PM PDT 24 |
Apr 15 02:31:26 PM PDT 24 |
148666579 ps |
T440 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3331105454 |
|
|
Apr 15 02:31:43 PM PDT 24 |
Apr 15 02:32:21 PM PDT 24 |
115412747 ps |
T441 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.2020030362 |
|
|
Apr 15 02:31:29 PM PDT 24 |
Apr 15 02:31:40 PM PDT 24 |
949800379 ps |
T442 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.925729492 |
|
|
Apr 15 02:33:48 PM PDT 24 |
Apr 15 02:37:06 PM PDT 24 |
14126225402 ps |
T110 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.976344189 |
|
|
Apr 15 02:34:24 PM PDT 24 |
Apr 15 02:34:44 PM PDT 24 |
1321855331 ps |
T443 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.1708262947 |
|
|
Apr 15 02:32:39 PM PDT 24 |
Apr 15 02:56:20 PM PDT 24 |
77405172568 ps |
T444 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.556879372 |
|
|
Apr 15 02:29:48 PM PDT 24 |
Apr 15 02:29:57 PM PDT 24 |
263747971 ps |
T445 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2722528833 |
|
|
Apr 15 02:34:45 PM PDT 24 |
Apr 15 02:46:51 PM PDT 24 |
16234597577 ps |
T446 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.2077263799 |
|
|
Apr 15 02:29:56 PM PDT 24 |
Apr 15 02:42:02 PM PDT 24 |
2255644307 ps |
T447 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.322235111 |
|
|
Apr 15 02:29:58 PM PDT 24 |
Apr 15 02:30:10 PM PDT 24 |
63770176 ps |
T448 |
/workspace/coverage/default/48.sram_ctrl_alert_test.484592196 |
|
|
Apr 15 02:35:02 PM PDT 24 |
Apr 15 02:35:03 PM PDT 24 |
103062427 ps |
T449 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3396001939 |
|
|
Apr 15 02:30:10 PM PDT 24 |
Apr 15 02:39:47 PM PDT 24 |
115130656840 ps |
T450 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.3109847999 |
|
|
Apr 15 02:31:00 PM PDT 24 |
Apr 15 02:31:06 PM PDT 24 |
954321135 ps |
T451 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.672625196 |
|
|
Apr 15 02:31:49 PM PDT 24 |
Apr 15 02:31:51 PM PDT 24 |
51728819 ps |
T452 |
/workspace/coverage/default/8.sram_ctrl_regwen.2296070447 |
|
|
Apr 15 02:30:08 PM PDT 24 |
Apr 15 02:53:10 PM PDT 24 |
74516515788 ps |
T453 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.4075588440 |
|
|
Apr 15 02:31:13 PM PDT 24 |
Apr 15 02:48:54 PM PDT 24 |
17134911838 ps |
T454 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.560282928 |
|
|
Apr 15 02:30:02 PM PDT 24 |
Apr 15 02:32:09 PM PDT 24 |
2339623850 ps |
T455 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3864832965 |
|
|
Apr 15 02:34:24 PM PDT 24 |
Apr 15 02:39:44 PM PDT 24 |
7097136097 ps |
T456 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.4013345578 |
|
|
Apr 15 02:30:00 PM PDT 24 |
Apr 15 02:30:06 PM PDT 24 |
236781997 ps |
T457 |
/workspace/coverage/default/44.sram_ctrl_alert_test.3052428481 |
|
|
Apr 15 02:34:22 PM PDT 24 |
Apr 15 02:34:23 PM PDT 24 |
13577375 ps |
T458 |
/workspace/coverage/default/8.sram_ctrl_partial_access.3670026558 |
|
|
Apr 15 02:30:11 PM PDT 24 |
Apr 15 02:30:22 PM PDT 24 |
1051303738 ps |
T459 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.156076601 |
|
|
Apr 15 02:32:28 PM PDT 24 |
Apr 15 02:32:31 PM PDT 24 |
57899739 ps |
T460 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.170550957 |
|
|
Apr 15 02:32:52 PM PDT 24 |
Apr 15 02:32:54 PM PDT 24 |
98548951 ps |
T461 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.1821282935 |
|
|
Apr 15 02:31:05 PM PDT 24 |
Apr 15 02:41:14 PM PDT 24 |
3804583406 ps |
T462 |
/workspace/coverage/default/13.sram_ctrl_stress_all.887274435 |
|
|
Apr 15 02:30:27 PM PDT 24 |
Apr 15 03:07:02 PM PDT 24 |
53499133297 ps |
T463 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.714605874 |
|
|
Apr 15 02:31:40 PM PDT 24 |
Apr 15 02:31:41 PM PDT 24 |
194477286 ps |
T464 |
/workspace/coverage/default/47.sram_ctrl_partial_access.2862041599 |
|
|
Apr 15 02:34:45 PM PDT 24 |
Apr 15 02:35:03 PM PDT 24 |
4263607907 ps |
T465 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.77472768 |
|
|
Apr 15 02:30:13 PM PDT 24 |
Apr 15 02:30:31 PM PDT 24 |
1171951737 ps |
T466 |
/workspace/coverage/default/43.sram_ctrl_smoke.3135140923 |
|
|
Apr 15 02:34:04 PM PDT 24 |
Apr 15 02:34:08 PM PDT 24 |
67172329 ps |
T467 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.2503051358 |
|
|
Apr 15 02:30:27 PM PDT 24 |
Apr 15 02:48:08 PM PDT 24 |
45753236051 ps |
T468 |
/workspace/coverage/default/2.sram_ctrl_executable.3743098572 |
|
|
Apr 15 02:29:54 PM PDT 24 |
Apr 15 02:41:34 PM PDT 24 |
15537431534 ps |
T469 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.4179605767 |
|
|
Apr 15 02:33:07 PM PDT 24 |
Apr 15 02:46:49 PM PDT 24 |
8835121965 ps |
T470 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.3415452160 |
|
|
Apr 15 02:32:02 PM PDT 24 |
Apr 15 02:50:15 PM PDT 24 |
5148795741 ps |
T471 |
/workspace/coverage/default/12.sram_ctrl_alert_test.175168034 |
|
|
Apr 15 02:30:23 PM PDT 24 |
Apr 15 02:30:25 PM PDT 24 |
19940188 ps |
T472 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.3853112360 |
|
|
Apr 15 02:31:34 PM PDT 24 |
Apr 15 02:32:56 PM PDT 24 |
791366128 ps |
T473 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.3255295102 |
|
|
Apr 15 02:30:25 PM PDT 24 |
Apr 15 02:52:04 PM PDT 24 |
74077625767 ps |
T474 |
/workspace/coverage/default/25.sram_ctrl_alert_test.2046944390 |
|
|
Apr 15 02:31:30 PM PDT 24 |
Apr 15 02:31:31 PM PDT 24 |
22347346 ps |
T475 |
/workspace/coverage/default/11.sram_ctrl_regwen.958554418 |
|
|
Apr 15 02:30:19 PM PDT 24 |
Apr 15 02:57:15 PM PDT 24 |
3670662612 ps |
T476 |
/workspace/coverage/default/17.sram_ctrl_alert_test.3185987737 |
|
|
Apr 15 02:30:49 PM PDT 24 |
Apr 15 02:30:51 PM PDT 24 |
17919941 ps |
T477 |
/workspace/coverage/default/49.sram_ctrl_bijection.949593885 |
|
|
Apr 15 02:35:07 PM PDT 24 |
Apr 15 02:36:26 PM PDT 24 |
13895810079 ps |
T478 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.2686114274 |
|
|
Apr 15 02:31:25 PM PDT 24 |
Apr 15 02:31:27 PM PDT 24 |
28899747 ps |
T479 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.3227497375 |
|
|
Apr 15 02:32:29 PM PDT 24 |
Apr 15 02:52:21 PM PDT 24 |
16429456511 ps |
T480 |
/workspace/coverage/default/28.sram_ctrl_partial_access.3946027581 |
|
|
Apr 15 02:31:46 PM PDT 24 |
Apr 15 02:32:01 PM PDT 24 |
691779569 ps |
T481 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.2891921964 |
|
|
Apr 15 02:31:59 PM PDT 24 |
Apr 15 02:32:56 PM PDT 24 |
361992933 ps |
T482 |
/workspace/coverage/default/9.sram_ctrl_partial_access.4052514138 |
|
|
Apr 15 02:30:13 PM PDT 24 |
Apr 15 02:30:28 PM PDT 24 |
995821956 ps |
T483 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.200254889 |
|
|
Apr 15 02:29:50 PM PDT 24 |
Apr 15 02:29:52 PM PDT 24 |
63337392 ps |
T484 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.4292631168 |
|
|
Apr 15 02:30:00 PM PDT 24 |
Apr 15 02:30:12 PM PDT 24 |
2608865035 ps |
T485 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.4108578487 |
|
|
Apr 15 02:31:36 PM PDT 24 |
Apr 15 02:31:42 PM PDT 24 |
342726552 ps |
T486 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.780778040 |
|
|
Apr 15 02:32:17 PM PDT 24 |
Apr 15 02:37:32 PM PDT 24 |
10778433313 ps |
T487 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.2544901017 |
|
|
Apr 15 02:32:57 PM PDT 24 |
Apr 15 02:40:57 PM PDT 24 |
5900107818 ps |
T488 |
/workspace/coverage/default/40.sram_ctrl_executable.1986832026 |
|
|
Apr 15 02:33:40 PM PDT 24 |
Apr 15 02:54:22 PM PDT 24 |
4395907317 ps |
T489 |
/workspace/coverage/default/47.sram_ctrl_regwen.119406713 |
|
|
Apr 15 02:34:50 PM PDT 24 |
Apr 15 02:36:49 PM PDT 24 |
6986860899 ps |
T490 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.2357084207 |
|
|
Apr 15 02:30:53 PM PDT 24 |
Apr 15 02:30:54 PM PDT 24 |
33689797 ps |
T491 |
/workspace/coverage/default/26.sram_ctrl_regwen.2794290826 |
|
|
Apr 15 02:31:40 PM PDT 24 |
Apr 15 02:49:08 PM PDT 24 |
74830203418 ps |
T492 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.4031648614 |
|
|
Apr 15 02:30:21 PM PDT 24 |
Apr 15 02:31:59 PM PDT 24 |
11326385512 ps |
T493 |
/workspace/coverage/default/20.sram_ctrl_smoke.2683028992 |
|
|
Apr 15 02:30:55 PM PDT 24 |
Apr 15 02:33:35 PM PDT 24 |
893932615 ps |
T494 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.447495727 |
|
|
Apr 15 02:31:04 PM PDT 24 |
Apr 15 02:31:18 PM PDT 24 |
200340084 ps |
T495 |
/workspace/coverage/default/26.sram_ctrl_partial_access.688471185 |
|
|
Apr 15 02:31:31 PM PDT 24 |
Apr 15 02:32:09 PM PDT 24 |
175089421 ps |
T496 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1353994489 |
|
|
Apr 15 02:34:55 PM PDT 24 |
Apr 15 02:40:06 PM PDT 24 |
10391585264 ps |
T497 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.1179971662 |
|
|
Apr 15 02:31:35 PM PDT 24 |
Apr 15 02:34:20 PM PDT 24 |
452603580 ps |
T498 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2080888777 |
|
|
Apr 15 02:35:10 PM PDT 24 |
Apr 15 02:40:44 PM PDT 24 |
4768968473 ps |
T499 |
/workspace/coverage/default/32.sram_ctrl_executable.2500753764 |
|
|
Apr 15 02:32:29 PM PDT 24 |
Apr 15 02:44:14 PM PDT 24 |
11103980915 ps |
T500 |
/workspace/coverage/default/49.sram_ctrl_partial_access.805756226 |
|
|
Apr 15 02:35:07 PM PDT 24 |
Apr 15 02:35:15 PM PDT 24 |
122471125 ps |
T501 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.2146420508 |
|
|
Apr 15 02:32:27 PM PDT 24 |
Apr 15 02:36:40 PM PDT 24 |
13840381781 ps |
T502 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.1603174415 |
|
|
Apr 15 02:32:11 PM PDT 24 |
Apr 15 02:32:17 PM PDT 24 |
666096004 ps |
T503 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.416062401 |
|
|
Apr 15 02:34:37 PM PDT 24 |
Apr 15 02:36:13 PM PDT 24 |
476821618 ps |
T504 |
/workspace/coverage/default/33.sram_ctrl_partial_access.1751482559 |
|
|
Apr 15 02:32:36 PM PDT 24 |
Apr 15 02:32:46 PM PDT 24 |
516326564 ps |
T505 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.3566729102 |
|
|
Apr 15 02:32:52 PM PDT 24 |
Apr 15 02:32:55 PM PDT 24 |
1172638445 ps |
T506 |
/workspace/coverage/default/11.sram_ctrl_bijection.1320567147 |
|
|
Apr 15 02:30:18 PM PDT 24 |
Apr 15 02:31:33 PM PDT 24 |
11452542539 ps |
T507 |
/workspace/coverage/default/47.sram_ctrl_stress_all.1613650444 |
|
|
Apr 15 02:34:49 PM PDT 24 |
Apr 15 02:53:04 PM PDT 24 |
21843266879 ps |
T508 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.2507794696 |
|
|
Apr 15 02:32:20 PM PDT 24 |
Apr 15 02:36:33 PM PDT 24 |
2820424429 ps |
T509 |
/workspace/coverage/default/22.sram_ctrl_regwen.1110077447 |
|
|
Apr 15 02:31:11 PM PDT 24 |
Apr 15 02:50:01 PM PDT 24 |
14721663991 ps |
T510 |
/workspace/coverage/default/5.sram_ctrl_partial_access.4078468623 |
|
|
Apr 15 02:30:00 PM PDT 24 |
Apr 15 02:30:09 PM PDT 24 |
453084162 ps |
T511 |
/workspace/coverage/default/9.sram_ctrl_smoke.3008653004 |
|
|
Apr 15 02:30:18 PM PDT 24 |
Apr 15 02:30:34 PM PDT 24 |
743637394 ps |
T512 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.1997869631 |
|
|
Apr 15 02:34:38 PM PDT 24 |
Apr 15 02:34:45 PM PDT 24 |
2575743370 ps |
T513 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1772404197 |
|
|
Apr 15 02:34:22 PM PDT 24 |
Apr 15 02:53:29 PM PDT 24 |
14484137528 ps |
T514 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1629458963 |
|
|
Apr 15 02:29:49 PM PDT 24 |
Apr 15 02:34:41 PM PDT 24 |
1015459942 ps |
T515 |
/workspace/coverage/default/24.sram_ctrl_regwen.3556905782 |
|
|
Apr 15 02:31:19 PM PDT 24 |
Apr 15 02:54:34 PM PDT 24 |
23344456965 ps |
T516 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.3946668628 |
|
|
Apr 15 02:33:00 PM PDT 24 |
Apr 15 02:34:09 PM PDT 24 |
369783940 ps |
T517 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.2705501496 |
|
|
Apr 15 02:31:46 PM PDT 24 |
Apr 15 02:31:52 PM PDT 24 |
226001315 ps |
T518 |
/workspace/coverage/default/40.sram_ctrl_partial_access.1207670109 |
|
|
Apr 15 02:33:37 PM PDT 24 |
Apr 15 02:33:39 PM PDT 24 |
47969036 ps |
T519 |
/workspace/coverage/default/34.sram_ctrl_alert_test.4129676756 |
|
|
Apr 15 02:32:47 PM PDT 24 |
Apr 15 02:32:48 PM PDT 24 |
15710793 ps |
T520 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.1792690393 |
|
|
Apr 15 02:30:54 PM PDT 24 |
Apr 15 02:30:59 PM PDT 24 |
49018197 ps |
T521 |
/workspace/coverage/default/26.sram_ctrl_executable.2240757457 |
|
|
Apr 15 02:31:32 PM PDT 24 |
Apr 15 02:51:03 PM PDT 24 |
11479874768 ps |
T522 |
/workspace/coverage/default/45.sram_ctrl_alert_test.278381556 |
|
|
Apr 15 02:34:33 PM PDT 24 |
Apr 15 02:34:35 PM PDT 24 |
37359566 ps |
T523 |
/workspace/coverage/default/30.sram_ctrl_partial_access.1316600905 |
|
|
Apr 15 02:32:06 PM PDT 24 |
Apr 15 02:32:13 PM PDT 24 |
1480638520 ps |
T524 |
/workspace/coverage/default/26.sram_ctrl_bijection.307224853 |
|
|
Apr 15 02:31:32 PM PDT 24 |
Apr 15 02:32:32 PM PDT 24 |
893587078 ps |
T525 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.770150552 |
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|
Apr 15 02:35:07 PM PDT 24 |
Apr 15 02:37:47 PM PDT 24 |
1075392852 ps |
T526 |
/workspace/coverage/default/20.sram_ctrl_alert_test.153913392 |
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|
Apr 15 02:31:00 PM PDT 24 |
Apr 15 02:31:01 PM PDT 24 |
14634347 ps |
T527 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.1251986962 |
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|
Apr 15 02:29:53 PM PDT 24 |
Apr 15 02:34:24 PM PDT 24 |
2032629643 ps |
T528 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2956543879 |
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|
Apr 15 02:34:05 PM PDT 24 |
Apr 15 02:34:06 PM PDT 24 |
76551601 ps |
T529 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.1131877816 |
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|
Apr 15 02:33:57 PM PDT 24 |
Apr 15 02:47:42 PM PDT 24 |
19952592192 ps |
T530 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.3851926090 |
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|
Apr 15 02:33:40 PM PDT 24 |
Apr 15 02:49:45 PM PDT 24 |
11406829783 ps |
T531 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.352801133 |
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|
Apr 15 02:30:39 PM PDT 24 |
Apr 15 02:30:40 PM PDT 24 |
50794710 ps |
T532 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.1758998516 |
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|
Apr 15 02:33:27 PM PDT 24 |
Apr 15 02:33:29 PM PDT 24 |
85977882 ps |
T533 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.2489741422 |
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|
Apr 15 02:33:52 PM PDT 24 |
Apr 15 02:41:49 PM PDT 24 |
5369544926 ps |
T534 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.3497780618 |
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|
Apr 15 02:33:47 PM PDT 24 |
Apr 15 02:33:49 PM PDT 24 |
29145889 ps |
T535 |
/workspace/coverage/default/13.sram_ctrl_smoke.2499372743 |
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|
Apr 15 02:30:25 PM PDT 24 |
Apr 15 02:30:32 PM PDT 24 |
435183321 ps |
T536 |
/workspace/coverage/default/10.sram_ctrl_partial_access.3172268799 |
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|
Apr 15 02:30:16 PM PDT 24 |
Apr 15 02:30:18 PM PDT 24 |
468881407 ps |
T537 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.2013283155 |
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|
Apr 15 02:30:44 PM PDT 24 |
Apr 15 02:39:23 PM PDT 24 |
19499000734 ps |
T538 |
/workspace/coverage/default/24.sram_ctrl_stress_all.1854095822 |
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|
Apr 15 02:31:23 PM PDT 24 |
Apr 15 03:17:03 PM PDT 24 |
9923525829 ps |
T539 |
/workspace/coverage/default/20.sram_ctrl_stress_all.2029655766 |
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|
Apr 15 02:31:01 PM PDT 24 |
Apr 15 02:59:06 PM PDT 24 |
27372857413 ps |
T540 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.4145771458 |
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|
Apr 15 02:32:38 PM PDT 24 |
Apr 15 02:32:50 PM PDT 24 |
678230898 ps |
T541 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1510316215 |
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|
Apr 15 02:34:23 PM PDT 24 |
Apr 15 02:37:28 PM PDT 24 |
1883954954 ps |
T542 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.16946917 |
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|
Apr 15 02:30:23 PM PDT 24 |
Apr 15 02:30:34 PM PDT 24 |
281345239 ps |
T543 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2013584949 |
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|
Apr 15 02:30:10 PM PDT 24 |
Apr 15 02:47:08 PM PDT 24 |
16406065748 ps |
T544 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.4094040631 |
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|
Apr 15 02:31:17 PM PDT 24 |
Apr 15 02:31:49 PM PDT 24 |
5522097286 ps |
T545 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.3743642155 |
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|
Apr 15 02:30:40 PM PDT 24 |
Apr 15 02:30:44 PM PDT 24 |
98075370 ps |
T546 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1109861224 |
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|
Apr 15 02:30:53 PM PDT 24 |
Apr 15 02:36:14 PM PDT 24 |
18234308402 ps |
T547 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.2431643855 |
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|
Apr 15 02:31:04 PM PDT 24 |
Apr 15 02:31:10 PM PDT 24 |
626525914 ps |
T548 |
/workspace/coverage/default/39.sram_ctrl_executable.2660270355 |
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|
Apr 15 02:33:28 PM PDT 24 |
Apr 15 02:46:30 PM PDT 24 |
4529440998 ps |
T549 |
/workspace/coverage/default/33.sram_ctrl_smoke.1910959906 |
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|
Apr 15 02:32:35 PM PDT 24 |
Apr 15 02:33:57 PM PDT 24 |
1087496484 ps |
T550 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.878657412 |
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|
Apr 15 02:31:27 PM PDT 24 |
Apr 15 02:36:34 PM PDT 24 |
8924484614 ps |
T551 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.3728547605 |
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Apr 15 02:30:59 PM PDT 24 |
Apr 15 02:32:13 PM PDT 24 |
1861832714 ps |