| T552 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.1902025347 |
|
|
Apr 15 02:33:09 PM PDT 24 |
Apr 15 02:36:29 PM PDT 24 |
2146313674 ps |
| T553 |
/workspace/coverage/default/48.sram_ctrl_partial_access.677954299 |
|
|
Apr 15 02:34:53 PM PDT 24 |
Apr 15 02:35:47 PM PDT 24 |
1741911381 ps |
| T554 |
/workspace/coverage/default/0.sram_ctrl_bijection.2843544569 |
|
|
Apr 15 02:29:48 PM PDT 24 |
Apr 15 02:30:49 PM PDT 24 |
2814390125 ps |
| T555 |
/workspace/coverage/default/46.sram_ctrl_smoke.344003311 |
|
|
Apr 15 02:34:34 PM PDT 24 |
Apr 15 02:34:54 PM PDT 24 |
967021476 ps |
| T556 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.1602162656 |
|
|
Apr 15 02:33:49 PM PDT 24 |
Apr 15 02:33:59 PM PDT 24 |
2371779716 ps |
| T557 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.1820199540 |
|
|
Apr 15 02:33:22 PM PDT 24 |
Apr 15 02:33:23 PM PDT 24 |
72979212 ps |
| T558 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3513971977 |
|
|
Apr 15 02:30:31 PM PDT 24 |
Apr 15 02:35:43 PM PDT 24 |
4285775125 ps |
| T559 |
/workspace/coverage/default/38.sram_ctrl_smoke.1800674314 |
|
|
Apr 15 02:33:11 PM PDT 24 |
Apr 15 02:33:27 PM PDT 24 |
3612210795 ps |
| T560 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1510775737 |
|
|
Apr 15 02:30:09 PM PDT 24 |
Apr 15 03:13:15 PM PDT 24 |
127019681637 ps |
| T561 |
/workspace/coverage/default/13.sram_ctrl_partial_access.4060835197 |
|
|
Apr 15 02:30:21 PM PDT 24 |
Apr 15 02:30:32 PM PDT 24 |
200559788 ps |
| T562 |
/workspace/coverage/default/19.sram_ctrl_smoke.3912122329 |
|
|
Apr 15 02:30:58 PM PDT 24 |
Apr 15 02:31:08 PM PDT 24 |
281146321 ps |
| T563 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.3050447288 |
|
|
Apr 15 02:31:43 PM PDT 24 |
Apr 15 02:32:03 PM PDT 24 |
251092701 ps |
| T564 |
/workspace/coverage/default/42.sram_ctrl_alert_test.2719844311 |
|
|
Apr 15 02:34:02 PM PDT 24 |
Apr 15 02:34:03 PM PDT 24 |
15779417 ps |
| T565 |
/workspace/coverage/default/23.sram_ctrl_regwen.825930746 |
|
|
Apr 15 02:31:23 PM PDT 24 |
Apr 15 02:56:03 PM PDT 24 |
31931303659 ps |
| T566 |
/workspace/coverage/default/22.sram_ctrl_bijection.2569498178 |
|
|
Apr 15 02:31:10 PM PDT 24 |
Apr 15 02:32:04 PM PDT 24 |
12079302446 ps |
| T567 |
/workspace/coverage/default/34.sram_ctrl_smoke.3026056647 |
|
|
Apr 15 02:32:38 PM PDT 24 |
Apr 15 02:32:44 PM PDT 24 |
96726119 ps |
| T568 |
/workspace/coverage/default/6.sram_ctrl_partial_access.1029909335 |
|
|
Apr 15 02:30:02 PM PDT 24 |
Apr 15 02:30:06 PM PDT 24 |
333648842 ps |
| T569 |
/workspace/coverage/default/43.sram_ctrl_bijection.45383604 |
|
|
Apr 15 02:34:04 PM PDT 24 |
Apr 15 02:34:51 PM PDT 24 |
9072957004 ps |
| T570 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.2927012455 |
|
|
Apr 15 02:32:23 PM PDT 24 |
Apr 15 02:32:24 PM PDT 24 |
44907476 ps |
| T571 |
/workspace/coverage/default/39.sram_ctrl_alert_test.3213789169 |
|
|
Apr 15 02:33:40 PM PDT 24 |
Apr 15 02:33:41 PM PDT 24 |
57589290 ps |
| T572 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2784589787 |
|
|
Apr 15 02:34:11 PM PDT 24 |
Apr 15 02:42:54 PM PDT 24 |
25451099235 ps |
| T573 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3116640220 |
|
|
Apr 15 02:30:02 PM PDT 24 |
Apr 15 02:42:56 PM PDT 24 |
2623215189 ps |
| T574 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.1742961660 |
|
|
Apr 15 02:31:06 PM PDT 24 |
Apr 15 02:31:11 PM PDT 24 |
2518413279 ps |
| T575 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.1603845872 |
|
|
Apr 15 02:30:19 PM PDT 24 |
Apr 15 02:30:29 PM PDT 24 |
248695196 ps |
| T576 |
/workspace/coverage/default/28.sram_ctrl_smoke.2243406962 |
|
|
Apr 15 02:31:43 PM PDT 24 |
Apr 15 02:31:58 PM PDT 24 |
68368749 ps |
| T577 |
/workspace/coverage/default/21.sram_ctrl_smoke.1513990549 |
|
|
Apr 15 02:31:04 PM PDT 24 |
Apr 15 02:31:07 PM PDT 24 |
100247475 ps |
| T578 |
/workspace/coverage/default/7.sram_ctrl_partial_access.3183454867 |
|
|
Apr 15 02:30:06 PM PDT 24 |
Apr 15 02:30:23 PM PDT 24 |
314098393 ps |
| T579 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.1909903527 |
|
|
Apr 15 02:33:59 PM PDT 24 |
Apr 15 02:41:40 PM PDT 24 |
26233731051 ps |
| T580 |
/workspace/coverage/default/22.sram_ctrl_partial_access.3707132466 |
|
|
Apr 15 02:31:09 PM PDT 24 |
Apr 15 02:32:30 PM PDT 24 |
2584343677 ps |
| T581 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.1196201141 |
|
|
Apr 15 02:30:58 PM PDT 24 |
Apr 15 02:31:41 PM PDT 24 |
1697383869 ps |
| T582 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.370831551 |
|
|
Apr 15 02:31:39 PM PDT 24 |
Apr 15 02:40:06 PM PDT 24 |
4095851937 ps |
| T583 |
/workspace/coverage/default/39.sram_ctrl_bijection.580193973 |
|
|
Apr 15 02:33:25 PM PDT 24 |
Apr 15 02:34:10 PM PDT 24 |
3112629463 ps |
| T584 |
/workspace/coverage/default/45.sram_ctrl_bijection.2067311334 |
|
|
Apr 15 02:34:22 PM PDT 24 |
Apr 15 02:35:28 PM PDT 24 |
12052454256 ps |
| T585 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3360441532 |
|
|
Apr 15 02:29:55 PM PDT 24 |
Apr 15 02:30:53 PM PDT 24 |
379827829 ps |
| T586 |
/workspace/coverage/default/18.sram_ctrl_executable.1902384943 |
|
|
Apr 15 02:30:50 PM PDT 24 |
Apr 15 02:43:07 PM PDT 24 |
14921798737 ps |
| T587 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.926319292 |
|
|
Apr 15 02:30:36 PM PDT 24 |
Apr 15 02:30:44 PM PDT 24 |
1864717057 ps |
| T588 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1170673801 |
|
|
Apr 15 02:33:56 PM PDT 24 |
Apr 15 02:38:03 PM PDT 24 |
2526994737 ps |
| T589 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.2300067794 |
|
|
Apr 15 02:30:49 PM PDT 24 |
Apr 15 02:52:01 PM PDT 24 |
5231101745 ps |
| T590 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2196241427 |
|
|
Apr 15 02:30:17 PM PDT 24 |
Apr 15 02:30:23 PM PDT 24 |
431530655 ps |
| T591 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.3703343230 |
|
|
Apr 15 02:30:59 PM PDT 24 |
Apr 15 02:31:08 PM PDT 24 |
249542582 ps |
| T592 |
/workspace/coverage/default/18.sram_ctrl_bijection.3017240475 |
|
|
Apr 15 02:30:50 PM PDT 24 |
Apr 15 02:32:13 PM PDT 24 |
48328943282 ps |
| T593 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.2477202756 |
|
|
Apr 15 02:34:00 PM PDT 24 |
Apr 15 02:34:06 PM PDT 24 |
800297830 ps |
| T594 |
/workspace/coverage/default/10.sram_ctrl_regwen.111211003 |
|
|
Apr 15 02:30:13 PM PDT 24 |
Apr 15 02:50:40 PM PDT 24 |
25876406535 ps |
| T595 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.4209938103 |
|
|
Apr 15 02:30:58 PM PDT 24 |
Apr 15 02:31:07 PM PDT 24 |
139514937 ps |
| T596 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.777429929 |
|
|
Apr 15 02:29:45 PM PDT 24 |
Apr 15 02:29:52 PM PDT 24 |
63082539 ps |
| T597 |
/workspace/coverage/default/41.sram_ctrl_smoke.3632566607 |
|
|
Apr 15 02:33:52 PM PDT 24 |
Apr 15 02:33:55 PM PDT 24 |
112113399 ps |
| T598 |
/workspace/coverage/default/0.sram_ctrl_partial_access.1528334050 |
|
|
Apr 15 02:29:45 PM PDT 24 |
Apr 15 02:29:51 PM PDT 24 |
1243538176 ps |
| T599 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.4119101086 |
|
|
Apr 15 02:31:56 PM PDT 24 |
Apr 15 02:38:33 PM PDT 24 |
16552532557 ps |
| T600 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.2214770209 |
|
|
Apr 15 02:31:46 PM PDT 24 |
Apr 15 02:33:34 PM PDT 24 |
1151705142 ps |
| T601 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2148158373 |
|
|
Apr 15 02:30:07 PM PDT 24 |
Apr 15 02:36:01 PM PDT 24 |
16529920477 ps |
| T602 |
/workspace/coverage/default/2.sram_ctrl_partial_access.2149222661 |
|
|
Apr 15 02:29:49 PM PDT 24 |
Apr 15 02:29:51 PM PDT 24 |
32507333 ps |
| T603 |
/workspace/coverage/default/26.sram_ctrl_smoke.3239302751 |
|
|
Apr 15 02:31:31 PM PDT 24 |
Apr 15 02:31:42 PM PDT 24 |
403493915 ps |
| T604 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.2464775528 |
|
|
Apr 15 02:34:58 PM PDT 24 |
Apr 15 02:35:07 PM PDT 24 |
446008943 ps |
| T605 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3495824960 |
|
|
Apr 15 02:33:57 PM PDT 24 |
Apr 15 02:34:03 PM PDT 24 |
57056195 ps |
| T606 |
/workspace/coverage/default/16.sram_ctrl_regwen.1994281562 |
|
|
Apr 15 02:30:49 PM PDT 24 |
Apr 15 02:35:01 PM PDT 24 |
5571441571 ps |
| T607 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.4111905415 |
|
|
Apr 15 02:32:07 PM PDT 24 |
Apr 15 02:37:54 PM PDT 24 |
4840440374 ps |
| T111 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.3155171115 |
|
|
Apr 15 02:31:36 PM PDT 24 |
Apr 15 02:31:46 PM PDT 24 |
563918032 ps |
| T608 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3093722949 |
|
|
Apr 15 02:34:43 PM PDT 24 |
Apr 15 02:34:47 PM PDT 24 |
993589267 ps |
| T609 |
/workspace/coverage/default/6.sram_ctrl_bijection.295051832 |
|
|
Apr 15 02:30:02 PM PDT 24 |
Apr 15 02:30:31 PM PDT 24 |
433851508 ps |
| T610 |
/workspace/coverage/default/9.sram_ctrl_executable.1722470733 |
|
|
Apr 15 02:30:16 PM PDT 24 |
Apr 15 02:41:09 PM PDT 24 |
30877879188 ps |
| T611 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.4251586481 |
|
|
Apr 15 02:33:58 PM PDT 24 |
Apr 15 02:34:04 PM PDT 24 |
477222175 ps |
| T612 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.4009645709 |
|
|
Apr 15 02:34:33 PM PDT 24 |
Apr 15 02:37:20 PM PDT 24 |
2278282995 ps |
| T613 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.53103154 |
|
|
Apr 15 02:33:47 PM PDT 24 |
Apr 15 02:39:19 PM PDT 24 |
1244180811 ps |
| T614 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.1022438396 |
|
|
Apr 15 02:32:28 PM PDT 24 |
Apr 15 02:32:33 PM PDT 24 |
231809554 ps |
| T615 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.3758645437 |
|
|
Apr 15 02:31:10 PM PDT 24 |
Apr 15 02:36:08 PM PDT 24 |
5764659128 ps |
| T616 |
/workspace/coverage/default/25.sram_ctrl_regwen.3988545818 |
|
|
Apr 15 02:31:27 PM PDT 24 |
Apr 15 02:43:03 PM PDT 24 |
13492433175 ps |
| T617 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.114756097 |
|
|
Apr 15 02:33:12 PM PDT 24 |
Apr 15 02:33:18 PM PDT 24 |
239029280 ps |
| T618 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2464503686 |
|
|
Apr 15 02:32:48 PM PDT 24 |
Apr 15 02:37:38 PM PDT 24 |
11650451038 ps |
| T619 |
/workspace/coverage/default/41.sram_ctrl_regwen.2272729928 |
|
|
Apr 15 02:33:49 PM PDT 24 |
Apr 15 02:42:22 PM PDT 24 |
3572202488 ps |
| T620 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.4166953973 |
|
|
Apr 15 02:33:13 PM PDT 24 |
Apr 15 02:33:35 PM PDT 24 |
1192411487 ps |
| T621 |
/workspace/coverage/default/19.sram_ctrl_bijection.2910354746 |
|
|
Apr 15 02:30:55 PM PDT 24 |
Apr 15 02:32:18 PM PDT 24 |
5346694081 ps |
| T622 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.1379789955 |
|
|
Apr 15 02:30:40 PM PDT 24 |
Apr 15 02:33:23 PM PDT 24 |
2925423336 ps |
| T623 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.505557591 |
|
|
Apr 15 02:29:57 PM PDT 24 |
Apr 15 02:40:31 PM PDT 24 |
4496753591 ps |
| T624 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.469573644 |
|
|
Apr 15 02:34:25 PM PDT 24 |
Apr 15 02:35:06 PM PDT 24 |
462547881 ps |
| T625 |
/workspace/coverage/default/23.sram_ctrl_partial_access.4062965738 |
|
|
Apr 15 02:31:14 PM PDT 24 |
Apr 15 02:32:31 PM PDT 24 |
2852308193 ps |
| T626 |
/workspace/coverage/default/24.sram_ctrl_bijection.2964286077 |
|
|
Apr 15 02:31:22 PM PDT 24 |
Apr 15 02:31:50 PM PDT 24 |
6306763008 ps |
| T627 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2904421429 |
|
|
Apr 15 02:29:47 PM PDT 24 |
Apr 15 02:29:49 PM PDT 24 |
63426669 ps |
| T628 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.708206484 |
|
|
Apr 15 02:30:48 PM PDT 24 |
Apr 15 02:50:54 PM PDT 24 |
12842833936 ps |
| T629 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.829915318 |
|
|
Apr 15 02:30:20 PM PDT 24 |
Apr 15 02:34:56 PM PDT 24 |
41356325172 ps |
| T630 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1776521810 |
|
|
Apr 15 02:29:48 PM PDT 24 |
Apr 15 02:34:25 PM PDT 24 |
21332378566 ps |
| T631 |
/workspace/coverage/default/39.sram_ctrl_regwen.3387304171 |
|
|
Apr 15 02:33:27 PM PDT 24 |
Apr 15 02:38:22 PM PDT 24 |
5696482000 ps |
| T632 |
/workspace/coverage/default/22.sram_ctrl_stress_all.1313035186 |
|
|
Apr 15 02:31:11 PM PDT 24 |
Apr 15 03:34:06 PM PDT 24 |
9424426825 ps |
| T633 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.480030923 |
|
|
Apr 15 02:30:10 PM PDT 24 |
Apr 15 02:30:14 PM PDT 24 |
97418102 ps |
| T634 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.3582289233 |
|
|
Apr 15 02:31:38 PM PDT 24 |
Apr 15 02:31:41 PM PDT 24 |
45419479 ps |
| T635 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3022046740 |
|
|
Apr 15 02:30:13 PM PDT 24 |
Apr 15 02:30:14 PM PDT 24 |
28761318 ps |
| T636 |
/workspace/coverage/default/48.sram_ctrl_bijection.2932547812 |
|
|
Apr 15 02:34:53 PM PDT 24 |
Apr 15 02:35:13 PM PDT 24 |
290069037 ps |
| T637 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.1025467259 |
|
|
Apr 15 02:30:36 PM PDT 24 |
Apr 15 02:32:54 PM PDT 24 |
614537023 ps |
| T638 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1897305880 |
|
|
Apr 15 02:34:37 PM PDT 24 |
Apr 15 02:36:24 PM PDT 24 |
213850205 ps |
| T639 |
/workspace/coverage/default/4.sram_ctrl_executable.3323898838 |
|
|
Apr 15 02:29:58 PM PDT 24 |
Apr 15 02:34:34 PM PDT 24 |
1927875109 ps |
| T640 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.554962117 |
|
|
Apr 15 02:33:22 PM PDT 24 |
Apr 15 02:33:53 PM PDT 24 |
89809970 ps |
| T641 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.2404791630 |
|
|
Apr 15 02:31:09 PM PDT 24 |
Apr 15 02:31:13 PM PDT 24 |
45043617 ps |
| T642 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2601446945 |
|
|
Apr 15 02:34:13 PM PDT 24 |
Apr 15 02:34:17 PM PDT 24 |
63556918 ps |
| T643 |
/workspace/coverage/default/11.sram_ctrl_partial_access.1711818706 |
|
|
Apr 15 02:30:20 PM PDT 24 |
Apr 15 02:30:26 PM PDT 24 |
209596578 ps |
| T644 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3254132447 |
|
|
Apr 15 02:34:45 PM PDT 24 |
Apr 15 02:35:37 PM PDT 24 |
115011213 ps |
| T645 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2861084115 |
|
|
Apr 15 02:34:11 PM PDT 24 |
Apr 15 02:34:47 PM PDT 24 |
4419938167 ps |
| T646 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.3404834562 |
|
|
Apr 15 02:30:40 PM PDT 24 |
Apr 15 02:36:04 PM PDT 24 |
10097795887 ps |
| T647 |
/workspace/coverage/default/3.sram_ctrl_alert_test.1100074008 |
|
|
Apr 15 02:30:01 PM PDT 24 |
Apr 15 02:30:03 PM PDT 24 |
13726146 ps |
| T648 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3881573948 |
|
|
Apr 15 02:34:58 PM PDT 24 |
Apr 15 02:34:59 PM PDT 24 |
87202185 ps |
| T649 |
/workspace/coverage/default/46.sram_ctrl_bijection.1632299147 |
|
|
Apr 15 02:34:32 PM PDT 24 |
Apr 15 02:35:28 PM PDT 24 |
7278018657 ps |
| T650 |
/workspace/coverage/default/48.sram_ctrl_stress_all.818700542 |
|
|
Apr 15 02:35:03 PM PDT 24 |
Apr 15 03:04:23 PM PDT 24 |
150069333503 ps |
| T651 |
/workspace/coverage/default/1.sram_ctrl_bijection.1412792952 |
|
|
Apr 15 02:29:51 PM PDT 24 |
Apr 15 02:31:02 PM PDT 24 |
4518060219 ps |
| T652 |
/workspace/coverage/default/18.sram_ctrl_partial_access.3691999281 |
|
|
Apr 15 02:30:48 PM PDT 24 |
Apr 15 02:31:01 PM PDT 24 |
3566026742 ps |
| T653 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.3017159927 |
|
|
Apr 15 02:33:35 PM PDT 24 |
Apr 15 02:52:44 PM PDT 24 |
2100586844 ps |
| T654 |
/workspace/coverage/default/1.sram_ctrl_regwen.1890574009 |
|
|
Apr 15 02:29:51 PM PDT 24 |
Apr 15 02:48:50 PM PDT 24 |
10450045322 ps |
| T655 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3574719666 |
|
|
Apr 15 02:29:59 PM PDT 24 |
Apr 15 02:30:01 PM PDT 24 |
86700624 ps |
| T656 |
/workspace/coverage/default/25.sram_ctrl_stress_all.125169759 |
|
|
Apr 15 02:31:34 PM PDT 24 |
Apr 15 03:21:29 PM PDT 24 |
12805204406 ps |
| T657 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.3410201674 |
|
|
Apr 15 02:31:27 PM PDT 24 |
Apr 15 02:35:49 PM PDT 24 |
10549503220 ps |
| T658 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3253344330 |
|
|
Apr 15 02:29:44 PM PDT 24 |
Apr 15 02:34:10 PM PDT 24 |
96725323938 ps |
| T659 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.3820257905 |
|
|
Apr 15 02:33:24 PM PDT 24 |
Apr 15 02:36:19 PM PDT 24 |
3784422515 ps |
| T660 |
/workspace/coverage/default/34.sram_ctrl_regwen.1510899382 |
|
|
Apr 15 02:32:42 PM PDT 24 |
Apr 15 02:44:55 PM PDT 24 |
12474913010 ps |
| T661 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2496547819 |
|
|
Apr 15 02:35:02 PM PDT 24 |
Apr 15 02:38:25 PM PDT 24 |
5302242653 ps |
| T662 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.318582695 |
|
|
Apr 15 02:32:56 PM PDT 24 |
Apr 15 02:33:02 PM PDT 24 |
2353074783 ps |
| T663 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3849306539 |
|
|
Apr 15 02:34:28 PM PDT 24 |
Apr 15 02:34:32 PM PDT 24 |
182988643 ps |
| T664 |
/workspace/coverage/default/9.sram_ctrl_alert_test.3164482335 |
|
|
Apr 15 02:30:22 PM PDT 24 |
Apr 15 02:30:24 PM PDT 24 |
119956220 ps |
| T665 |
/workspace/coverage/default/42.sram_ctrl_partial_access.3097146560 |
|
|
Apr 15 02:34:00 PM PDT 24 |
Apr 15 02:35:47 PM PDT 24 |
195029796 ps |
| T666 |
/workspace/coverage/default/19.sram_ctrl_partial_access.2662789380 |
|
|
Apr 15 02:30:54 PM PDT 24 |
Apr 15 02:30:59 PM PDT 24 |
494530794 ps |
| T667 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.2571274912 |
|
|
Apr 15 02:30:54 PM PDT 24 |
Apr 15 02:31:27 PM PDT 24 |
567046477 ps |
| T668 |
/workspace/coverage/default/13.sram_ctrl_alert_test.2859931332 |
|
|
Apr 15 02:30:26 PM PDT 24 |
Apr 15 02:30:28 PM PDT 24 |
18371936 ps |
| T22 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.3291586587 |
|
|
Apr 15 02:29:51 PM PDT 24 |
Apr 15 02:29:54 PM PDT 24 |
863061337 ps |
| T669 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.741921936 |
|
|
Apr 15 02:34:14 PM PDT 24 |
Apr 15 02:34:18 PM PDT 24 |
274716114 ps |
| T670 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3272330965 |
|
|
Apr 15 02:30:52 PM PDT 24 |
Apr 15 02:32:07 PM PDT 24 |
8314466744 ps |
| T671 |
/workspace/coverage/default/20.sram_ctrl_executable.3594968492 |
|
|
Apr 15 02:30:58 PM PDT 24 |
Apr 15 02:34:57 PM PDT 24 |
42999247629 ps |
| T672 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2913077229 |
|
|
Apr 15 02:29:44 PM PDT 24 |
Apr 15 03:25:47 PM PDT 24 |
221019884408 ps |
| T673 |
/workspace/coverage/default/7.sram_ctrl_executable.3882068164 |
|
|
Apr 15 02:30:07 PM PDT 24 |
Apr 15 02:34:35 PM PDT 24 |
13809709009 ps |
| T674 |
/workspace/coverage/default/26.sram_ctrl_stress_all.2088469087 |
|
|
Apr 15 02:31:36 PM PDT 24 |
Apr 15 02:53:29 PM PDT 24 |
16713009854 ps |
| T675 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.4156328110 |
|
|
Apr 15 02:30:19 PM PDT 24 |
Apr 15 02:34:47 PM PDT 24 |
2873584697 ps |
| T676 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.1506646228 |
|
|
Apr 15 02:33:52 PM PDT 24 |
Apr 15 02:34:31 PM PDT 24 |
948760502 ps |
| T677 |
/workspace/coverage/default/41.sram_ctrl_alert_test.4169637709 |
|
|
Apr 15 02:33:55 PM PDT 24 |
Apr 15 02:33:56 PM PDT 24 |
174031510 ps |
| T678 |
/workspace/coverage/default/23.sram_ctrl_smoke.642131870 |
|
|
Apr 15 02:31:15 PM PDT 24 |
Apr 15 02:31:28 PM PDT 24 |
561252969 ps |
| T679 |
/workspace/coverage/default/35.sram_ctrl_executable.3461038008 |
|
|
Apr 15 02:32:52 PM PDT 24 |
Apr 15 02:40:27 PM PDT 24 |
5848814593 ps |
| T680 |
/workspace/coverage/default/46.sram_ctrl_executable.3801477807 |
|
|
Apr 15 02:34:37 PM PDT 24 |
Apr 15 02:49:20 PM PDT 24 |
11609648986 ps |
| T681 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.1223140457 |
|
|
Apr 15 02:32:21 PM PDT 24 |
Apr 15 02:32:26 PM PDT 24 |
280073391 ps |
| T682 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.3182239122 |
|
|
Apr 15 02:33:00 PM PDT 24 |
Apr 15 02:33:01 PM PDT 24 |
131713094 ps |
| T683 |
/workspace/coverage/default/12.sram_ctrl_executable.1345432722 |
|
|
Apr 15 02:30:23 PM PDT 24 |
Apr 15 02:40:27 PM PDT 24 |
18453411956 ps |
| T684 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.3870510006 |
|
|
Apr 15 02:31:24 PM PDT 24 |
Apr 15 02:31:30 PM PDT 24 |
653201681 ps |
| T685 |
/workspace/coverage/default/31.sram_ctrl_bijection.2425658561 |
|
|
Apr 15 02:32:14 PM PDT 24 |
Apr 15 02:32:51 PM PDT 24 |
3363440715 ps |
| T686 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4100100758 |
|
|
Apr 15 02:30:01 PM PDT 24 |
Apr 15 02:30:07 PM PDT 24 |
71259727 ps |
| T687 |
/workspace/coverage/default/14.sram_ctrl_alert_test.3409157814 |
|
|
Apr 15 02:30:37 PM PDT 24 |
Apr 15 02:30:38 PM PDT 24 |
27031518 ps |
| T688 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3880636806 |
|
|
Apr 15 02:34:44 PM PDT 24 |
Apr 15 02:34:52 PM PDT 24 |
180639591 ps |
| T689 |
/workspace/coverage/default/39.sram_ctrl_partial_access.1745572245 |
|
|
Apr 15 02:33:24 PM PDT 24 |
Apr 15 02:33:35 PM PDT 24 |
2161572541 ps |
| T690 |
/workspace/coverage/default/1.sram_ctrl_smoke.3126326717 |
|
|
Apr 15 02:29:44 PM PDT 24 |
Apr 15 02:31:48 PM PDT 24 |
648305060 ps |
| T691 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1967725725 |
|
|
Apr 15 02:29:48 PM PDT 24 |
Apr 15 02:29:54 PM PDT 24 |
349226634 ps |
| T692 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.1001735453 |
|
|
Apr 15 02:29:57 PM PDT 24 |
Apr 15 02:30:02 PM PDT 24 |
370501116 ps |
| T693 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.839352591 |
|
|
Apr 15 02:32:36 PM PDT 24 |
Apr 15 02:38:18 PM PDT 24 |
29217411792 ps |
| T694 |
/workspace/coverage/default/19.sram_ctrl_regwen.2313188196 |
|
|
Apr 15 02:30:59 PM PDT 24 |
Apr 15 02:33:27 PM PDT 24 |
7968786260 ps |
| T695 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2004059864 |
|
|
Apr 15 02:30:01 PM PDT 24 |
Apr 15 02:30:07 PM PDT 24 |
256523356 ps |
| T696 |
/workspace/coverage/default/40.sram_ctrl_alert_test.1289075856 |
|
|
Apr 15 02:33:47 PM PDT 24 |
Apr 15 02:33:49 PM PDT 24 |
20680718 ps |
| T697 |
/workspace/coverage/default/31.sram_ctrl_stress_all.692471738 |
|
|
Apr 15 02:32:19 PM PDT 24 |
Apr 15 02:57:42 PM PDT 24 |
145437628727 ps |
| T698 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.86604537 |
|
|
Apr 15 02:30:47 PM PDT 24 |
Apr 15 02:30:55 PM PDT 24 |
522403474 ps |
| T699 |
/workspace/coverage/default/29.sram_ctrl_alert_test.647739910 |
|
|
Apr 15 02:32:02 PM PDT 24 |
Apr 15 02:32:04 PM PDT 24 |
37038490 ps |
| T700 |
/workspace/coverage/default/44.sram_ctrl_regwen.2674102486 |
|
|
Apr 15 02:34:18 PM PDT 24 |
Apr 15 02:44:33 PM PDT 24 |
55271287093 ps |
| T701 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3482690661 |
|
|
Apr 15 02:30:22 PM PDT 24 |
Apr 15 02:43:36 PM PDT 24 |
21084086346 ps |
| T702 |
/workspace/coverage/default/45.sram_ctrl_partial_access.3061993087 |
|
|
Apr 15 02:34:27 PM PDT 24 |
Apr 15 02:36:07 PM PDT 24 |
1213682430 ps |
| T703 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.2884169578 |
|
|
Apr 15 02:30:57 PM PDT 24 |
Apr 15 02:31:03 PM PDT 24 |
1631571453 ps |
| T112 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.64067269 |
|
|
Apr 15 02:31:06 PM PDT 24 |
Apr 15 02:34:19 PM PDT 24 |
55232651935 ps |
| T704 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.4241602834 |
|
|
Apr 15 02:30:49 PM PDT 24 |
Apr 15 02:30:51 PM PDT 24 |
27727893 ps |
| T705 |
/workspace/coverage/default/36.sram_ctrl_smoke.1626790037 |
|
|
Apr 15 02:33:00 PM PDT 24 |
Apr 15 02:33:01 PM PDT 24 |
47850679 ps |
| T706 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.858109673 |
|
|
Apr 15 02:31:33 PM PDT 24 |
Apr 15 02:37:25 PM PDT 24 |
53612849135 ps |
| T707 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.58718301 |
|
|
Apr 15 02:29:47 PM PDT 24 |
Apr 15 02:29:51 PM PDT 24 |
186490170 ps |
| T708 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.2534021023 |
|
|
Apr 15 02:31:25 PM PDT 24 |
Apr 15 03:01:56 PM PDT 24 |
13480911891 ps |
| T709 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.923943747 |
|
|
Apr 15 02:30:13 PM PDT 24 |
Apr 15 02:34:01 PM PDT 24 |
9626281211 ps |
| T710 |
/workspace/coverage/default/35.sram_ctrl_regwen.1372391347 |
|
|
Apr 15 02:32:53 PM PDT 24 |
Apr 15 02:56:00 PM PDT 24 |
22530119206 ps |
| T711 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3284407414 |
|
|
Apr 15 02:34:37 PM PDT 24 |
Apr 15 02:34:40 PM PDT 24 |
1015208081 ps |
| T712 |
/workspace/coverage/default/27.sram_ctrl_smoke.2032884542 |
|
|
Apr 15 02:31:35 PM PDT 24 |
Apr 15 02:33:21 PM PDT 24 |
577108662 ps |
| T713 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.3569039995 |
|
|
Apr 15 02:30:00 PM PDT 24 |
Apr 15 02:30:06 PM PDT 24 |
1096488584 ps |
| T714 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.3005357098 |
|
|
Apr 15 02:31:44 PM PDT 24 |
Apr 15 02:48:38 PM PDT 24 |
4869659194 ps |
| T715 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.43255444 |
|
|
Apr 15 02:30:09 PM PDT 24 |
Apr 15 02:31:51 PM PDT 24 |
644447139 ps |
| T716 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.3405315529 |
|
|
Apr 15 02:30:09 PM PDT 24 |
Apr 15 02:30:14 PM PDT 24 |
74846028 ps |
| T717 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.1085020525 |
|
|
Apr 15 02:30:38 PM PDT 24 |
Apr 15 02:46:57 PM PDT 24 |
36190271379 ps |
| T718 |
/workspace/coverage/default/23.sram_ctrl_stress_all.606312303 |
|
|
Apr 15 02:31:19 PM PDT 24 |
Apr 15 03:35:19 PM PDT 24 |
31523336083 ps |
| T719 |
/workspace/coverage/default/17.sram_ctrl_regwen.1043636410 |
|
|
Apr 15 02:30:44 PM PDT 24 |
Apr 15 02:46:15 PM PDT 24 |
4980302273 ps |
| T720 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.4074883938 |
|
|
Apr 15 02:30:16 PM PDT 24 |
Apr 15 02:35:28 PM PDT 24 |
858251083 ps |
| T721 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.1782068831 |
|
|
Apr 15 02:35:06 PM PDT 24 |
Apr 15 02:35:12 PM PDT 24 |
346816123 ps |
| T722 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.1481746773 |
|
|
Apr 15 02:32:48 PM PDT 24 |
Apr 15 02:53:00 PM PDT 24 |
35981033889 ps |
| T723 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.952160938 |
|
|
Apr 15 02:34:14 PM PDT 24 |
Apr 15 02:34:20 PM PDT 24 |
425784397 ps |
| T724 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.876663931 |
|
|
Apr 15 02:31:09 PM PDT 24 |
Apr 15 02:31:12 PM PDT 24 |
171587379 ps |
| T725 |
/workspace/coverage/default/33.sram_ctrl_bijection.1511763467 |
|
|
Apr 15 02:32:32 PM PDT 24 |
Apr 15 02:33:23 PM PDT 24 |
3471136169 ps |
| T726 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.78740643 |
|
|
Apr 15 02:31:16 PM PDT 24 |
Apr 15 02:35:08 PM PDT 24 |
5404313365 ps |
| T727 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2414371695 |
|
|
Apr 15 02:35:10 PM PDT 24 |
Apr 15 02:35:14 PM PDT 24 |
352360537 ps |
| T728 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3688784197 |
|
|
Apr 15 02:30:34 PM PDT 24 |
Apr 15 02:30:48 PM PDT 24 |
314695019 ps |
| T729 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.307847589 |
|
|
Apr 15 02:31:01 PM PDT 24 |
Apr 15 02:37:13 PM PDT 24 |
39352767336 ps |
| T730 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.591422415 |
|
|
Apr 15 02:30:59 PM PDT 24 |
Apr 15 02:37:09 PM PDT 24 |
11034724737 ps |
| T731 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3576309262 |
|
|
Apr 15 02:30:11 PM PDT 24 |
Apr 15 02:30:13 PM PDT 24 |
81379686 ps |
| T732 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.2897037277 |
|
|
Apr 15 02:32:02 PM PDT 24 |
Apr 15 02:32:05 PM PDT 24 |
160625852 ps |
| T733 |
/workspace/coverage/default/25.sram_ctrl_bijection.3346003845 |
|
|
Apr 15 02:31:25 PM PDT 24 |
Apr 15 02:31:59 PM PDT 24 |
3920998917 ps |
| T734 |
/workspace/coverage/default/9.sram_ctrl_stress_all.1274695467 |
|
|
Apr 15 02:30:14 PM PDT 24 |
Apr 15 02:53:50 PM PDT 24 |
18300992421 ps |
| T735 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2436019939 |
|
|
Apr 15 02:30:07 PM PDT 24 |
Apr 15 02:30:11 PM PDT 24 |
904920870 ps |
| T736 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2179695717 |
|
|
Apr 15 02:30:06 PM PDT 24 |
Apr 15 02:37:51 PM PDT 24 |
7679688669 ps |
| T737 |
/workspace/coverage/default/17.sram_ctrl_bijection.2598595738 |
|
|
Apr 15 02:30:49 PM PDT 24 |
Apr 15 02:31:10 PM PDT 24 |
1844243600 ps |
| T738 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.3068658614 |
|
|
Apr 15 02:32:08 PM PDT 24 |
Apr 15 02:37:20 PM PDT 24 |
6513791320 ps |
| T739 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.347456875 |
|
|
Apr 15 02:33:38 PM PDT 24 |
Apr 15 02:33:43 PM PDT 24 |
173084102 ps |
| T740 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.2934269615 |
|
|
Apr 15 02:30:09 PM PDT 24 |
Apr 15 02:30:20 PM PDT 24 |
1123710337 ps |
| T741 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.381939187 |
|
|
Apr 15 02:34:57 PM PDT 24 |
Apr 15 02:41:59 PM PDT 24 |
5439596011 ps |
| T742 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.192712126 |
|
|
Apr 15 02:30:18 PM PDT 24 |
Apr 15 02:35:12 PM PDT 24 |
12468792771 ps |
| T743 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.450198367 |
|
|
Apr 15 02:33:19 PM PDT 24 |
Apr 15 02:33:24 PM PDT 24 |
232365155 ps |
| T744 |
/workspace/coverage/default/16.sram_ctrl_alert_test.2074776078 |
|
|
Apr 15 02:30:51 PM PDT 24 |
Apr 15 02:30:52 PM PDT 24 |
11608427 ps |
| T745 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.444284080 |
|
|
Apr 15 02:30:26 PM PDT 24 |
Apr 15 02:30:33 PM PDT 24 |
2196950659 ps |
| T746 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.1199857460 |
|
|
Apr 15 02:31:16 PM PDT 24 |
Apr 15 02:31:17 PM PDT 24 |
28022331 ps |
| T747 |
/workspace/coverage/default/40.sram_ctrl_smoke.849755742 |
|
|
Apr 15 02:33:36 PM PDT 24 |
Apr 15 02:33:49 PM PDT 24 |
1807249278 ps |
| T748 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2814756183 |
|
|
Apr 15 02:34:51 PM PDT 24 |
Apr 15 02:34:56 PM PDT 24 |
65048862 ps |
| T749 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.4103691318 |
|
|
Apr 15 02:34:29 PM PDT 24 |
Apr 15 02:34:53 PM PDT 24 |
3097137479 ps |
| T750 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.1536827595 |
|
|
Apr 15 02:32:11 PM PDT 24 |
Apr 15 02:32:13 PM PDT 24 |
146851783 ps |
| T751 |
/workspace/coverage/default/47.sram_ctrl_smoke.499043391 |
|
|
Apr 15 02:34:42 PM PDT 24 |
Apr 15 02:34:59 PM PDT 24 |
4023874413 ps |
| T752 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2542770963 |
|
|
Apr 15 02:30:18 PM PDT 24 |
Apr 15 02:46:17 PM PDT 24 |
2803176939 ps |
| T753 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.1431758858 |
|
|
Apr 15 02:31:18 PM PDT 24 |
Apr 15 02:53:55 PM PDT 24 |
4127424691 ps |
| T754 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2419852773 |
|
|
Apr 15 02:30:22 PM PDT 24 |
Apr 15 02:43:49 PM PDT 24 |
2513200267 ps |
| T755 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.3255002357 |
|
|
Apr 15 02:30:14 PM PDT 24 |
Apr 15 02:30:18 PM PDT 24 |
157864973 ps |
| T756 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.741499069 |
|
|
Apr 15 02:30:40 PM PDT 24 |
Apr 15 02:32:51 PM PDT 24 |
131732578 ps |
| T757 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.3190743930 |
|
|
Apr 15 02:31:01 PM PDT 24 |
Apr 15 02:33:55 PM PDT 24 |
7282968649 ps |
| T758 |
/workspace/coverage/default/3.sram_ctrl_partial_access.2738682553 |
|
|
Apr 15 02:29:52 PM PDT 24 |
Apr 15 02:32:16 PM PDT 24 |
215006284 ps |
| T759 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.1402327550 |
|
|
Apr 15 02:32:21 PM PDT 24 |
Apr 15 02:32:32 PM PDT 24 |
2241992704 ps |
| T760 |
/workspace/coverage/default/33.sram_ctrl_alert_test.1669712961 |
|
|
Apr 15 02:32:38 PM PDT 24 |
Apr 15 02:32:39 PM PDT 24 |
15429974 ps |
| T761 |
/workspace/coverage/default/43.sram_ctrl_alert_test.1850838956 |
|
|
Apr 15 02:34:10 PM PDT 24 |
Apr 15 02:34:11 PM PDT 24 |
17661219 ps |
| T762 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.3847571723 |
|
|
Apr 15 02:29:49 PM PDT 24 |
Apr 15 02:30:05 PM PDT 24 |
267568750 ps |
| T763 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2695570256 |
|
|
Apr 15 02:34:45 PM PDT 24 |
Apr 15 02:40:22 PM PDT 24 |
26060869124 ps |
| T764 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1748573713 |
|
|
Apr 15 02:30:16 PM PDT 24 |
Apr 15 02:30:18 PM PDT 24 |
81362113 ps |
| T765 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.2111854092 |
|
|
Apr 15 02:32:34 PM PDT 24 |
Apr 15 02:41:15 PM PDT 24 |
2052134238 ps |
| T766 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.2535732557 |
|
|
Apr 15 02:30:48 PM PDT 24 |
Apr 15 02:37:22 PM PDT 24 |
16577102923 ps |
| T767 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3385707856 |
|
|
Apr 15 02:30:19 PM PDT 24 |
Apr 15 02:30:23 PM PDT 24 |
99189103 ps |
| T768 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1893129765 |
|
|
Apr 15 02:29:47 PM PDT 24 |
Apr 15 02:34:20 PM PDT 24 |
37276036231 ps |
| T769 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.494969460 |
|
|
Apr 15 02:30:04 PM PDT 24 |
Apr 15 02:35:40 PM PDT 24 |
3490209941 ps |
| T770 |
/workspace/coverage/default/21.sram_ctrl_stress_all.1220870357 |
|
|
Apr 15 02:31:04 PM PDT 24 |
Apr 15 04:05:20 PM PDT 24 |
76284267281 ps |
| T771 |
/workspace/coverage/default/17.sram_ctrl_partial_access.2427115455 |
|
|
Apr 15 02:30:44 PM PDT 24 |
Apr 15 02:31:42 PM PDT 24 |
1054901942 ps |
| T772 |
/workspace/coverage/default/23.sram_ctrl_alert_test.50067025 |
|
|
Apr 15 02:31:18 PM PDT 24 |
Apr 15 02:31:20 PM PDT 24 |
26062631 ps |
| T773 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.4271363034 |
|
|
Apr 15 02:29:49 PM PDT 24 |
Apr 15 02:35:03 PM PDT 24 |
3618307989 ps |
| T774 |
/workspace/coverage/default/23.sram_ctrl_bijection.1384623948 |
|
|
Apr 15 02:31:14 PM PDT 24 |
Apr 15 02:31:50 PM PDT 24 |
7978319382 ps |
| T775 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.3901903501 |
|
|
Apr 15 02:33:07 PM PDT 24 |
Apr 15 02:34:58 PM PDT 24 |
133536193 ps |
| T776 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1655994760 |
|
|
Apr 15 02:30:16 PM PDT 24 |
Apr 15 02:30:18 PM PDT 24 |
76844573 ps |
| T777 |
/workspace/coverage/default/37.sram_ctrl_bijection.1853337145 |
|
|
Apr 15 02:33:06 PM PDT 24 |
Apr 15 02:33:58 PM PDT 24 |
2418728346 ps |
| T778 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.2160381939 |
|
|
Apr 15 02:32:20 PM PDT 24 |
Apr 15 02:32:24 PM PDT 24 |
167267827 ps |
| T779 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.93978326 |
|
|
Apr 15 02:30:44 PM PDT 24 |
Apr 15 02:30:46 PM PDT 24 |
133761053 ps |
| T780 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.2990223592 |
|
|
Apr 15 02:32:58 PM PDT 24 |
Apr 15 02:36:59 PM PDT 24 |
8690038739 ps |
| T781 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.1986048282 |
|
|
Apr 15 02:31:28 PM PDT 24 |
Apr 15 02:31:33 PM PDT 24 |
516696108 ps |
| T782 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3217705426 |
|
|
Apr 15 02:31:56 PM PDT 24 |
Apr 15 02:32:02 PM PDT 24 |
115700427 ps |
| T783 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.106021848 |
|
|
Apr 15 02:33:27 PM PDT 24 |
Apr 15 02:33:35 PM PDT 24 |
285600450 ps |
| T784 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3810123411 |
|
|
Apr 15 02:34:16 PM PDT 24 |
Apr 15 02:35:59 PM PDT 24 |
564587507 ps |
| T785 |
/workspace/coverage/default/4.sram_ctrl_stress_all.1280128159 |
|
|
Apr 15 02:30:01 PM PDT 24 |
Apr 15 03:02:33 PM PDT 24 |
32015469600 ps |
| T786 |
/workspace/coverage/default/24.sram_ctrl_smoke.2625012167 |
|
|
Apr 15 02:31:16 PM PDT 24 |
Apr 15 02:31:26 PM PDT 24 |
180545652 ps |
| T787 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1530253479 |
|
|
Apr 15 02:30:04 PM PDT 24 |
Apr 15 02:30:50 PM PDT 24 |
418759196 ps |
| T788 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.395406252 |
|
|
Apr 15 02:30:57 PM PDT 24 |
Apr 15 02:36:40 PM PDT 24 |
7170927210 ps |
| T789 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.1860385524 |
|
|
Apr 15 02:30:49 PM PDT 24 |
Apr 15 02:30:55 PM PDT 24 |
67391168 ps |
| T790 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.2895215994 |
|
|
Apr 15 02:32:22 PM PDT 24 |
Apr 15 02:44:58 PM PDT 24 |
18238866027 ps |
| T791 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.3479465550 |
|
|
Apr 15 02:30:37 PM PDT 24 |
Apr 15 02:30:46 PM PDT 24 |
267284288 ps |
| T792 |
/workspace/coverage/default/27.sram_ctrl_alert_test.1659825890 |
|
|
Apr 15 02:31:43 PM PDT 24 |
Apr 15 02:31:45 PM PDT 24 |
14584966 ps |
| T793 |
/workspace/coverage/default/15.sram_ctrl_bijection.4161903035 |
|
|
Apr 15 02:30:36 PM PDT 24 |
Apr 15 02:31:28 PM PDT 24 |
3407735372 ps |
| T794 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1325987641 |
|
|
Apr 15 02:29:46 PM PDT 24 |
Apr 15 02:31:35 PM PDT 24 |
346775862 ps |
| T795 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.1482146715 |
|
|
Apr 15 02:32:18 PM PDT 24 |
Apr 15 02:37:46 PM PDT 24 |
53122996815 ps |
| T796 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1054038865 |
|
|
Apr 15 02:34:04 PM PDT 24 |
Apr 15 02:36:11 PM PDT 24 |
163951128 ps |
| T797 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.1738338846 |
|
|
Apr 15 02:31:07 PM PDT 24 |
Apr 15 02:31:08 PM PDT 24 |
376293530 ps |
| T798 |
/workspace/coverage/default/8.sram_ctrl_executable.398860302 |
|
|
Apr 15 02:30:13 PM PDT 24 |
Apr 15 02:38:49 PM PDT 24 |
52691621679 ps |