| T312 |
/workspace/coverage/default/30.sram_ctrl_alert_test.3284209342 |
|
|
Apr 25 01:28:31 PM PDT 24 |
Apr 25 01:28:32 PM PDT 24 |
14453498 ps |
| T313 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.657661770 |
|
|
Apr 25 01:30:08 PM PDT 24 |
Apr 25 01:31:45 PM PDT 24 |
927302009 ps |
| T117 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2301428445 |
|
|
Apr 25 01:24:12 PM PDT 24 |
Apr 25 01:25:02 PM PDT 24 |
1711532130 ps |
| T314 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.3193715681 |
|
|
Apr 25 01:28:54 PM PDT 24 |
Apr 25 01:34:38 PM PDT 24 |
28865666351 ps |
| T315 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.2192211036 |
|
|
Apr 25 01:29:06 PM PDT 24 |
Apr 25 01:29:07 PM PDT 24 |
72362503 ps |
| T118 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3251460346 |
|
|
Apr 25 01:32:09 PM PDT 24 |
Apr 25 01:32:33 PM PDT 24 |
1549140542 ps |
| T316 |
/workspace/coverage/default/4.sram_ctrl_regwen.2922265267 |
|
|
Apr 25 01:23:14 PM PDT 24 |
Apr 25 01:30:33 PM PDT 24 |
40483477936 ps |
| T317 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.823266357 |
|
|
Apr 25 01:28:52 PM PDT 24 |
Apr 25 01:29:20 PM PDT 24 |
624405627 ps |
| T318 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.325830660 |
|
|
Apr 25 01:32:20 PM PDT 24 |
Apr 25 01:32:30 PM PDT 24 |
293158803 ps |
| T319 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.2742184271 |
|
|
Apr 25 01:30:40 PM PDT 24 |
Apr 25 01:52:09 PM PDT 24 |
32591192692 ps |
| T320 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.2926088638 |
|
|
Apr 25 01:26:59 PM PDT 24 |
Apr 25 01:28:22 PM PDT 24 |
551942185 ps |
| T321 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.3271824639 |
|
|
Apr 25 01:23:06 PM PDT 24 |
Apr 25 01:23:11 PM PDT 24 |
122280236 ps |
| T322 |
/workspace/coverage/default/9.sram_ctrl_stress_all.1204667515 |
|
|
Apr 25 01:24:18 PM PDT 24 |
Apr 25 01:53:30 PM PDT 24 |
75532353106 ps |
| T22 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.4065211180 |
|
|
Apr 25 01:22:43 PM PDT 24 |
Apr 25 01:22:46 PM PDT 24 |
416877041 ps |
| T323 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.1673497435 |
|
|
Apr 25 01:28:24 PM PDT 24 |
Apr 25 01:28:36 PM PDT 24 |
177106809 ps |
| T324 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.2448865167 |
|
|
Apr 25 01:30:40 PM PDT 24 |
Apr 25 01:30:46 PM PDT 24 |
1846103466 ps |
| T325 |
/workspace/coverage/default/35.sram_ctrl_executable.252218400 |
|
|
Apr 25 01:29:23 PM PDT 24 |
Apr 25 01:40:12 PM PDT 24 |
10422569150 ps |
| T326 |
/workspace/coverage/default/36.sram_ctrl_regwen.3587208778 |
|
|
Apr 25 01:29:35 PM PDT 24 |
Apr 25 01:46:54 PM PDT 24 |
52839771712 ps |
| T327 |
/workspace/coverage/default/34.sram_ctrl_smoke.3902381906 |
|
|
Apr 25 01:29:04 PM PDT 24 |
Apr 25 01:31:32 PM PDT 24 |
8875352879 ps |
| T328 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.3548880901 |
|
|
Apr 25 01:23:08 PM PDT 24 |
Apr 25 01:33:08 PM PDT 24 |
27669079101 ps |
| T329 |
/workspace/coverage/default/35.sram_ctrl_bijection.2129943977 |
|
|
Apr 25 01:29:16 PM PDT 24 |
Apr 25 01:30:09 PM PDT 24 |
7066590335 ps |
| T330 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.1276143232 |
|
|
Apr 25 01:27:49 PM PDT 24 |
Apr 25 01:27:54 PM PDT 24 |
167583136 ps |
| T331 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.918235931 |
|
|
Apr 25 01:31:19 PM PDT 24 |
Apr 25 01:34:17 PM PDT 24 |
5070841553 ps |
| T332 |
/workspace/coverage/default/46.sram_ctrl_bijection.2438950770 |
|
|
Apr 25 01:31:38 PM PDT 24 |
Apr 25 01:31:55 PM PDT 24 |
281255835 ps |
| T333 |
/workspace/coverage/default/31.sram_ctrl_regwen.2059284721 |
|
|
Apr 25 01:28:36 PM PDT 24 |
Apr 25 01:35:17 PM PDT 24 |
28067043550 ps |
| T334 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.4231231161 |
|
|
Apr 25 01:30:26 PM PDT 24 |
Apr 25 01:46:06 PM PDT 24 |
13498308090 ps |
| T335 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.957903725 |
|
|
Apr 25 01:22:59 PM PDT 24 |
Apr 25 01:30:26 PM PDT 24 |
7035902314 ps |
| T336 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.2873961182 |
|
|
Apr 25 01:27:21 PM PDT 24 |
Apr 25 01:27:26 PM PDT 24 |
63890418 ps |
| T337 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.523145517 |
|
|
Apr 25 01:29:20 PM PDT 24 |
Apr 25 01:29:27 PM PDT 24 |
491963567 ps |
| T338 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.748585023 |
|
|
Apr 25 01:29:30 PM PDT 24 |
Apr 25 01:33:46 PM PDT 24 |
2740443228 ps |
| T339 |
/workspace/coverage/default/31.sram_ctrl_stress_all.2870356469 |
|
|
Apr 25 01:28:43 PM PDT 24 |
Apr 25 02:19:38 PM PDT 24 |
43985640834 ps |
| T340 |
/workspace/coverage/default/46.sram_ctrl_alert_test.2778544191 |
|
|
Apr 25 01:31:57 PM PDT 24 |
Apr 25 01:31:58 PM PDT 24 |
15312595 ps |
| T341 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.1113830328 |
|
|
Apr 25 01:30:47 PM PDT 24 |
Apr 25 01:30:52 PM PDT 24 |
69106303 ps |
| T342 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.312590577 |
|
|
Apr 25 01:23:07 PM PDT 24 |
Apr 25 01:23:12 PM PDT 24 |
563803495 ps |
| T343 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1343684685 |
|
|
Apr 25 01:32:19 PM PDT 24 |
Apr 25 01:32:25 PM PDT 24 |
1369552091 ps |
| T344 |
/workspace/coverage/default/1.sram_ctrl_smoke.4254600006 |
|
|
Apr 25 01:22:20 PM PDT 24 |
Apr 25 01:22:27 PM PDT 24 |
654405985 ps |
| T345 |
/workspace/coverage/default/49.sram_ctrl_regwen.1323745318 |
|
|
Apr 25 01:32:21 PM PDT 24 |
Apr 25 01:52:03 PM PDT 24 |
30963723473 ps |
| T346 |
/workspace/coverage/default/20.sram_ctrl_smoke.88674439 |
|
|
Apr 25 01:26:31 PM PDT 24 |
Apr 25 01:26:55 PM PDT 24 |
186934102 ps |
| T347 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.2674702116 |
|
|
Apr 25 01:26:51 PM PDT 24 |
Apr 25 01:26:56 PM PDT 24 |
66520087 ps |
| T348 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.3146198786 |
|
|
Apr 25 01:30:08 PM PDT 24 |
Apr 25 01:34:56 PM PDT 24 |
18769261101 ps |
| T349 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.3641662016 |
|
|
Apr 25 01:22:58 PM PDT 24 |
Apr 25 01:23:06 PM PDT 24 |
552039600 ps |
| T350 |
/workspace/coverage/default/8.sram_ctrl_bijection.78862298 |
|
|
Apr 25 01:23:59 PM PDT 24 |
Apr 25 01:25:18 PM PDT 24 |
13846874971 ps |
| T351 |
/workspace/coverage/default/47.sram_ctrl_executable.2706132427 |
|
|
Apr 25 01:32:01 PM PDT 24 |
Apr 25 01:39:46 PM PDT 24 |
5127718804 ps |
| T352 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.383140266 |
|
|
Apr 25 01:29:28 PM PDT 24 |
Apr 25 01:30:13 PM PDT 24 |
11828174981 ps |
| T353 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1393473309 |
|
|
Apr 25 01:23:47 PM PDT 24 |
Apr 25 01:35:00 PM PDT 24 |
21170721489 ps |
| T354 |
/workspace/coverage/default/10.sram_ctrl_smoke.3670849686 |
|
|
Apr 25 01:24:25 PM PDT 24 |
Apr 25 01:24:28 PM PDT 24 |
50040494 ps |
| T355 |
/workspace/coverage/default/22.sram_ctrl_stress_all.2052177466 |
|
|
Apr 25 01:27:01 PM PDT 24 |
Apr 25 02:14:10 PM PDT 24 |
28779672880 ps |
| T356 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.3317853605 |
|
|
Apr 25 01:26:29 PM PDT 24 |
Apr 25 01:26:35 PM PDT 24 |
155378567 ps |
| T357 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.3400194466 |
|
|
Apr 25 01:28:31 PM PDT 24 |
Apr 25 01:29:57 PM PDT 24 |
119504885 ps |
| T358 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.3257313546 |
|
|
Apr 25 01:28:02 PM PDT 24 |
Apr 25 01:28:03 PM PDT 24 |
87410856 ps |
| T359 |
/workspace/coverage/default/37.sram_ctrl_smoke.3766486266 |
|
|
Apr 25 01:29:43 PM PDT 24 |
Apr 25 01:29:45 PM PDT 24 |
42721833 ps |
| T360 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.3396564691 |
|
|
Apr 25 01:29:54 PM PDT 24 |
Apr 25 01:35:04 PM PDT 24 |
3371011725 ps |
| T361 |
/workspace/coverage/default/2.sram_ctrl_alert_test.1173137859 |
|
|
Apr 25 01:22:59 PM PDT 24 |
Apr 25 01:23:02 PM PDT 24 |
18384242 ps |
| T362 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.4137787764 |
|
|
Apr 25 01:29:03 PM PDT 24 |
Apr 25 01:35:03 PM PDT 24 |
22647632941 ps |
| T363 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1840529789 |
|
|
Apr 25 01:26:16 PM PDT 24 |
Apr 25 01:31:41 PM PDT 24 |
14010923586 ps |
| T364 |
/workspace/coverage/default/45.sram_ctrl_executable.3850354434 |
|
|
Apr 25 01:31:38 PM PDT 24 |
Apr 25 01:34:17 PM PDT 24 |
18698354638 ps |
| T365 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.3283524410 |
|
|
Apr 25 01:30:55 PM PDT 24 |
Apr 25 01:32:58 PM PDT 24 |
3127160404 ps |
| T366 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2717787980 |
|
|
Apr 25 01:22:09 PM PDT 24 |
Apr 25 01:28:04 PM PDT 24 |
20061538876 ps |
| T367 |
/workspace/coverage/default/35.sram_ctrl_smoke.465197213 |
|
|
Apr 25 01:29:09 PM PDT 24 |
Apr 25 01:31:24 PM PDT 24 |
2504573811 ps |
| T368 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.3241826732 |
|
|
Apr 25 01:26:35 PM PDT 24 |
Apr 25 01:26:37 PM PDT 24 |
143188725 ps |
| T369 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1676095191 |
|
|
Apr 25 01:29:28 PM PDT 24 |
Apr 25 01:30:56 PM PDT 24 |
145032368 ps |
| T370 |
/workspace/coverage/default/39.sram_ctrl_regwen.3804260711 |
|
|
Apr 25 01:30:40 PM PDT 24 |
Apr 25 01:35:15 PM PDT 24 |
2348342152 ps |
| T371 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3267925564 |
|
|
Apr 25 01:30:52 PM PDT 24 |
Apr 25 01:36:23 PM PDT 24 |
2022816706 ps |
| T372 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.4021016069 |
|
|
Apr 25 01:25:14 PM PDT 24 |
Apr 25 01:25:18 PM PDT 24 |
183348807 ps |
| T373 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.1830824972 |
|
|
Apr 25 01:28:02 PM PDT 24 |
Apr 25 01:28:06 PM PDT 24 |
254637291 ps |
| T374 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.3543699318 |
|
|
Apr 25 01:27:29 PM PDT 24 |
Apr 25 01:27:35 PM PDT 24 |
174077416 ps |
| T375 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.888330571 |
|
|
Apr 25 01:31:39 PM PDT 24 |
Apr 25 01:42:26 PM PDT 24 |
6579439310 ps |
| T376 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1740714203 |
|
|
Apr 25 01:24:06 PM PDT 24 |
Apr 25 01:24:30 PM PDT 24 |
372973793 ps |
| T377 |
/workspace/coverage/default/19.sram_ctrl_alert_test.3988437808 |
|
|
Apr 25 01:26:31 PM PDT 24 |
Apr 25 01:26:32 PM PDT 24 |
14890097 ps |
| T378 |
/workspace/coverage/default/16.sram_ctrl_regwen.3943300802 |
|
|
Apr 25 01:25:49 PM PDT 24 |
Apr 25 01:39:26 PM PDT 24 |
38326236364 ps |
| T379 |
/workspace/coverage/default/0.sram_ctrl_alert_test.652161745 |
|
|
Apr 25 01:22:20 PM PDT 24 |
Apr 25 01:22:22 PM PDT 24 |
17849867 ps |
| T380 |
/workspace/coverage/default/12.sram_ctrl_executable.2497525248 |
|
|
Apr 25 01:25:07 PM PDT 24 |
Apr 25 01:37:44 PM PDT 24 |
13549098961 ps |
| T381 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3685454227 |
|
|
Apr 25 01:24:19 PM PDT 24 |
Apr 25 01:24:26 PM PDT 24 |
2183229319 ps |
| T382 |
/workspace/coverage/default/40.sram_ctrl_alert_test.1893960889 |
|
|
Apr 25 01:30:32 PM PDT 24 |
Apr 25 01:30:33 PM PDT 24 |
35466133 ps |
| T383 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.4132480642 |
|
|
Apr 25 01:24:52 PM PDT 24 |
Apr 25 01:32:36 PM PDT 24 |
2759927360 ps |
| T384 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.1879412753 |
|
|
Apr 25 01:26:43 PM PDT 24 |
Apr 25 01:44:13 PM PDT 24 |
19075499743 ps |
| T385 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.1603875545 |
|
|
Apr 25 01:23:37 PM PDT 24 |
Apr 25 01:23:55 PM PDT 24 |
153248423 ps |
| T386 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2216170108 |
|
|
Apr 25 01:32:20 PM PDT 24 |
Apr 25 01:36:07 PM PDT 24 |
20581494454 ps |
| T387 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3640531130 |
|
|
Apr 25 01:32:09 PM PDT 24 |
Apr 25 01:32:16 PM PDT 24 |
1196773707 ps |
| T388 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1681262197 |
|
|
Apr 25 01:32:17 PM PDT 24 |
Apr 25 01:36:06 PM PDT 24 |
3101268254 ps |
| T389 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1767852325 |
|
|
Apr 25 01:23:34 PM PDT 24 |
Apr 25 01:42:24 PM PDT 24 |
7856688686 ps |
| T390 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2231280198 |
|
|
Apr 25 01:32:02 PM PDT 24 |
Apr 25 01:32:03 PM PDT 24 |
90629878 ps |
| T23 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.3361990591 |
|
|
Apr 25 01:23:18 PM PDT 24 |
Apr 25 01:23:22 PM PDT 24 |
493851103 ps |
| T391 |
/workspace/coverage/default/3.sram_ctrl_regwen.1916662448 |
|
|
Apr 25 01:23:13 PM PDT 24 |
Apr 25 01:36:13 PM PDT 24 |
1878691394 ps |
| T392 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.707517117 |
|
|
Apr 25 01:31:36 PM PDT 24 |
Apr 25 01:32:01 PM PDT 24 |
172100844 ps |
| T393 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.1335595909 |
|
|
Apr 25 01:26:44 PM PDT 24 |
Apr 25 01:26:45 PM PDT 24 |
32497178 ps |
| T394 |
/workspace/coverage/default/10.sram_ctrl_executable.2737346120 |
|
|
Apr 25 01:24:33 PM PDT 24 |
Apr 25 01:33:41 PM PDT 24 |
13358225021 ps |
| T395 |
/workspace/coverage/default/30.sram_ctrl_stress_all.2473572801 |
|
|
Apr 25 01:28:24 PM PDT 24 |
Apr 25 01:49:22 PM PDT 24 |
135921802812 ps |
| T396 |
/workspace/coverage/default/10.sram_ctrl_alert_test.193413972 |
|
|
Apr 25 01:24:35 PM PDT 24 |
Apr 25 01:24:36 PM PDT 24 |
17157278 ps |
| T397 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1427271044 |
|
|
Apr 25 01:31:20 PM PDT 24 |
Apr 25 01:31:25 PM PDT 24 |
116294059 ps |
| T398 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.1718460824 |
|
|
Apr 25 01:26:30 PM PDT 24 |
Apr 25 01:26:35 PM PDT 24 |
146006044 ps |
| T399 |
/workspace/coverage/default/39.sram_ctrl_partial_access.3316455469 |
|
|
Apr 25 01:30:07 PM PDT 24 |
Apr 25 01:30:27 PM PDT 24 |
4132622057 ps |
| T400 |
/workspace/coverage/default/24.sram_ctrl_bijection.3626790173 |
|
|
Apr 25 01:27:13 PM PDT 24 |
Apr 25 01:27:34 PM PDT 24 |
315926650 ps |
| T401 |
/workspace/coverage/default/29.sram_ctrl_bijection.2604102925 |
|
|
Apr 25 01:28:08 PM PDT 24 |
Apr 25 01:28:23 PM PDT 24 |
240417870 ps |
| T402 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.1017549085 |
|
|
Apr 25 01:31:33 PM PDT 24 |
Apr 25 01:31:35 PM PDT 24 |
191155361 ps |
| T403 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2475109005 |
|
|
Apr 25 01:24:24 PM PDT 24 |
Apr 25 01:34:16 PM PDT 24 |
11658751243 ps |
| T404 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.708816317 |
|
|
Apr 25 01:24:22 PM PDT 24 |
Apr 25 01:29:42 PM PDT 24 |
4609062035 ps |
| T405 |
/workspace/coverage/default/38.sram_ctrl_partial_access.1537782511 |
|
|
Apr 25 01:29:55 PM PDT 24 |
Apr 25 01:29:59 PM PDT 24 |
456773873 ps |
| T406 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.4129888932 |
|
|
Apr 25 01:24:13 PM PDT 24 |
Apr 25 01:29:35 PM PDT 24 |
13374580406 ps |
| T407 |
/workspace/coverage/default/41.sram_ctrl_alert_test.1185041114 |
|
|
Apr 25 01:30:48 PM PDT 24 |
Apr 25 01:30:49 PM PDT 24 |
84501732 ps |
| T408 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.320947675 |
|
|
Apr 25 01:28:03 PM PDT 24 |
Apr 25 01:28:08 PM PDT 24 |
50532154 ps |
| T409 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.2877413625 |
|
|
Apr 25 01:29:27 PM PDT 24 |
Apr 25 01:39:51 PM PDT 24 |
5100693481 ps |
| T410 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.1478406814 |
|
|
Apr 25 01:31:26 PM PDT 24 |
Apr 25 01:31:32 PM PDT 24 |
230560078 ps |
| T411 |
/workspace/coverage/default/6.sram_ctrl_executable.125880755 |
|
|
Apr 25 01:23:43 PM PDT 24 |
Apr 25 01:32:48 PM PDT 24 |
9447574136 ps |
| T412 |
/workspace/coverage/default/23.sram_ctrl_regwen.3554402773 |
|
|
Apr 25 01:27:06 PM PDT 24 |
Apr 25 01:38:08 PM PDT 24 |
7032682161 ps |
| T413 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.1182205691 |
|
|
Apr 25 01:26:31 PM PDT 24 |
Apr 25 01:26:33 PM PDT 24 |
80642768 ps |
| T414 |
/workspace/coverage/default/28.sram_ctrl_executable.1245278603 |
|
|
Apr 25 01:28:02 PM PDT 24 |
Apr 25 01:38:35 PM PDT 24 |
14922167770 ps |
| T415 |
/workspace/coverage/default/41.sram_ctrl_partial_access.3467979357 |
|
|
Apr 25 01:30:35 PM PDT 24 |
Apr 25 01:31:08 PM PDT 24 |
529519690 ps |
| T416 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.1785772666 |
|
|
Apr 25 01:27:12 PM PDT 24 |
Apr 25 01:34:05 PM PDT 24 |
4036918446 ps |
| T417 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.1379811696 |
|
|
Apr 25 01:29:09 PM PDT 24 |
Apr 25 01:29:18 PM PDT 24 |
1095344366 ps |
| T418 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.3223550957 |
|
|
Apr 25 01:30:03 PM PDT 24 |
Apr 25 01:41:59 PM PDT 24 |
3079913757 ps |
| T419 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.2578633379 |
|
|
Apr 25 01:30:21 PM PDT 24 |
Apr 25 01:30:29 PM PDT 24 |
641958395 ps |
| T420 |
/workspace/coverage/default/22.sram_ctrl_partial_access.3434303889 |
|
|
Apr 25 01:26:59 PM PDT 24 |
Apr 25 01:27:08 PM PDT 24 |
821138930 ps |
| T421 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.453281235 |
|
|
Apr 25 01:26:27 PM PDT 24 |
Apr 25 01:26:31 PM PDT 24 |
77566727 ps |
| T422 |
/workspace/coverage/default/15.sram_ctrl_partial_access.818886690 |
|
|
Apr 25 01:25:28 PM PDT 24 |
Apr 25 01:25:38 PM PDT 24 |
3280070920 ps |
| T423 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.1122558324 |
|
|
Apr 25 01:29:09 PM PDT 24 |
Apr 25 01:29:11 PM PDT 24 |
35609819 ps |
| T424 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.1008638919 |
|
|
Apr 25 01:27:15 PM PDT 24 |
Apr 25 01:27:21 PM PDT 24 |
194005727 ps |
| T425 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.2614076091 |
|
|
Apr 25 01:24:12 PM PDT 24 |
Apr 25 01:24:53 PM PDT 24 |
132494825 ps |
| T426 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.3393834743 |
|
|
Apr 25 01:22:48 PM PDT 24 |
Apr 25 01:22:51 PM PDT 24 |
43524037 ps |
| T427 |
/workspace/coverage/default/42.sram_ctrl_regwen.2075879869 |
|
|
Apr 25 01:30:54 PM PDT 24 |
Apr 25 01:34:03 PM PDT 24 |
1306458321 ps |
| T428 |
/workspace/coverage/default/40.sram_ctrl_bijection.1644584720 |
|
|
Apr 25 01:30:23 PM PDT 24 |
Apr 25 01:31:00 PM PDT 24 |
1135954738 ps |
| T429 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3641443154 |
|
|
Apr 25 01:28:02 PM PDT 24 |
Apr 25 01:28:55 PM PDT 24 |
711384032 ps |
| T430 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.155227067 |
|
|
Apr 25 01:24:51 PM PDT 24 |
Apr 25 01:29:03 PM PDT 24 |
14105414281 ps |
| T431 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.2865036061 |
|
|
Apr 25 01:30:03 PM PDT 24 |
Apr 25 01:30:07 PM PDT 24 |
575328742 ps |
| T432 |
/workspace/coverage/default/22.sram_ctrl_regwen.694886287 |
|
|
Apr 25 01:27:00 PM PDT 24 |
Apr 25 01:42:32 PM PDT 24 |
10643718945 ps |
| T433 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.1009437797 |
|
|
Apr 25 01:31:07 PM PDT 24 |
Apr 25 01:31:16 PM PDT 24 |
615693391 ps |
| T434 |
/workspace/coverage/default/2.sram_ctrl_stress_all.865048636 |
|
|
Apr 25 01:22:59 PM PDT 24 |
Apr 25 01:52:43 PM PDT 24 |
87706054335 ps |
| T435 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.3064971637 |
|
|
Apr 25 01:26:32 PM PDT 24 |
Apr 25 01:32:50 PM PDT 24 |
5374250858 ps |
| T436 |
/workspace/coverage/default/11.sram_ctrl_alert_test.40565020 |
|
|
Apr 25 01:24:51 PM PDT 24 |
Apr 25 01:24:53 PM PDT 24 |
13503461 ps |
| T437 |
/workspace/coverage/default/28.sram_ctrl_stress_all.3481105276 |
|
|
Apr 25 01:28:03 PM PDT 24 |
Apr 25 01:34:54 PM PDT 24 |
7028592858 ps |
| T438 |
/workspace/coverage/default/26.sram_ctrl_executable.2518733603 |
|
|
Apr 25 01:27:38 PM PDT 24 |
Apr 25 01:48:36 PM PDT 24 |
23245831876 ps |
| T439 |
/workspace/coverage/default/3.sram_ctrl_partial_access.1442484794 |
|
|
Apr 25 01:23:00 PM PDT 24 |
Apr 25 01:23:09 PM PDT 24 |
828475331 ps |
| T440 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.3580336187 |
|
|
Apr 25 01:28:55 PM PDT 24 |
Apr 25 01:37:57 PM PDT 24 |
7849148169 ps |
| T441 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.1599556814 |
|
|
Apr 25 01:27:55 PM PDT 24 |
Apr 25 01:32:09 PM PDT 24 |
15841526523 ps |
| T442 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.940513849 |
|
|
Apr 25 01:25:46 PM PDT 24 |
Apr 25 01:25:50 PM PDT 24 |
94204856 ps |
| T443 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.3325339995 |
|
|
Apr 25 01:26:29 PM PDT 24 |
Apr 25 01:27:00 PM PDT 24 |
227187698 ps |
| T444 |
/workspace/coverage/default/24.sram_ctrl_smoke.2943203943 |
|
|
Apr 25 01:27:13 PM PDT 24 |
Apr 25 01:27:25 PM PDT 24 |
352898357 ps |
| T445 |
/workspace/coverage/default/19.sram_ctrl_smoke.1993469948 |
|
|
Apr 25 01:26:24 PM PDT 24 |
Apr 25 01:26:26 PM PDT 24 |
31923145 ps |
| T446 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.97754825 |
|
|
Apr 25 01:31:50 PM PDT 24 |
Apr 25 01:31:51 PM PDT 24 |
34823282 ps |
| T447 |
/workspace/coverage/default/12.sram_ctrl_smoke.3734028259 |
|
|
Apr 25 01:24:53 PM PDT 24 |
Apr 25 01:24:58 PM PDT 24 |
851636982 ps |
| T448 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.171392138 |
|
|
Apr 25 01:27:13 PM PDT 24 |
Apr 25 01:33:09 PM PDT 24 |
41085829328 ps |
| T449 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.243631025 |
|
|
Apr 25 01:30:35 PM PDT 24 |
Apr 25 01:32:14 PM PDT 24 |
479117041 ps |
| T450 |
/workspace/coverage/default/12.sram_ctrl_partial_access.4205771864 |
|
|
Apr 25 01:24:55 PM PDT 24 |
Apr 25 01:25:38 PM PDT 24 |
289352560 ps |
| T451 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1307326273 |
|
|
Apr 25 01:32:26 PM PDT 24 |
Apr 25 01:32:27 PM PDT 24 |
50981707 ps |
| T452 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.1501192629 |
|
|
Apr 25 01:30:20 PM PDT 24 |
Apr 25 01:32:33 PM PDT 24 |
524819316 ps |
| T453 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.3540178871 |
|
|
Apr 25 01:30:47 PM PDT 24 |
Apr 25 01:37:14 PM PDT 24 |
33644309051 ps |
| T454 |
/workspace/coverage/default/33.sram_ctrl_stress_all.2497787390 |
|
|
Apr 25 01:29:04 PM PDT 24 |
Apr 25 02:14:49 PM PDT 24 |
38653052584 ps |
| T455 |
/workspace/coverage/default/42.sram_ctrl_bijection.2878576188 |
|
|
Apr 25 01:30:54 PM PDT 24 |
Apr 25 01:31:18 PM PDT 24 |
1579067677 ps |
| T456 |
/workspace/coverage/default/30.sram_ctrl_regwen.3282096772 |
|
|
Apr 25 01:28:24 PM PDT 24 |
Apr 25 01:34:07 PM PDT 24 |
6384089946 ps |
| T457 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.2240340064 |
|
|
Apr 25 01:28:51 PM PDT 24 |
Apr 25 01:47:33 PM PDT 24 |
8564415294 ps |
| T458 |
/workspace/coverage/default/5.sram_ctrl_alert_test.3205867690 |
|
|
Apr 25 01:23:30 PM PDT 24 |
Apr 25 01:23:31 PM PDT 24 |
14712446 ps |
| T459 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.2058085170 |
|
|
Apr 25 01:23:14 PM PDT 24 |
Apr 25 01:24:05 PM PDT 24 |
470064032 ps |
| T460 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.4238482959 |
|
|
Apr 25 01:28:51 PM PDT 24 |
Apr 25 01:29:02 PM PDT 24 |
596715619 ps |
| T461 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.2606344001 |
|
|
Apr 25 01:24:57 PM PDT 24 |
Apr 25 01:25:01 PM PDT 24 |
283806894 ps |
| T462 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.247023785 |
|
|
Apr 25 01:32:02 PM PDT 24 |
Apr 25 01:32:08 PM PDT 24 |
177871017 ps |
| T463 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2274583912 |
|
|
Apr 25 01:29:48 PM PDT 24 |
Apr 25 01:29:53 PM PDT 24 |
71229059 ps |
| T464 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1827688392 |
|
|
Apr 25 01:32:08 PM PDT 24 |
Apr 25 01:32:17 PM PDT 24 |
1742197188 ps |
| T465 |
/workspace/coverage/default/43.sram_ctrl_smoke.1136041684 |
|
|
Apr 25 01:30:59 PM PDT 24 |
Apr 25 01:31:07 PM PDT 24 |
1440977491 ps |
| T466 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.3335402807 |
|
|
Apr 25 01:29:34 PM PDT 24 |
Apr 25 01:29:40 PM PDT 24 |
228608162 ps |
| T467 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3073190859 |
|
|
Apr 25 01:31:39 PM PDT 24 |
Apr 25 01:36:09 PM PDT 24 |
19468115853 ps |
| T468 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.3947904629 |
|
|
Apr 25 01:28:38 PM PDT 24 |
Apr 25 01:28:42 PM PDT 24 |
484421370 ps |
| T469 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.3727919061 |
|
|
Apr 25 01:26:38 PM PDT 24 |
Apr 25 01:30:46 PM PDT 24 |
3754012287 ps |
| T470 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.592322605 |
|
|
Apr 25 01:25:39 PM PDT 24 |
Apr 25 01:26:44 PM PDT 24 |
121071681 ps |
| T471 |
/workspace/coverage/default/41.sram_ctrl_bijection.3905534966 |
|
|
Apr 25 01:30:37 PM PDT 24 |
Apr 25 01:30:54 PM PDT 24 |
1106261624 ps |
| T472 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2258788529 |
|
|
Apr 25 01:31:36 PM PDT 24 |
Apr 25 01:32:04 PM PDT 24 |
742324955 ps |
| T473 |
/workspace/coverage/default/42.sram_ctrl_smoke.3407710729 |
|
|
Apr 25 01:30:50 PM PDT 24 |
Apr 25 01:31:01 PM PDT 24 |
451018150 ps |
| T474 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.777215416 |
|
|
Apr 25 01:27:06 PM PDT 24 |
Apr 25 01:43:51 PM PDT 24 |
2484234366 ps |
| T475 |
/workspace/coverage/default/13.sram_ctrl_smoke.1028711560 |
|
|
Apr 25 01:25:07 PM PDT 24 |
Apr 25 01:25:12 PM PDT 24 |
76662512 ps |
| T476 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2066146432 |
|
|
Apr 25 01:31:40 PM PDT 24 |
Apr 25 01:45:14 PM PDT 24 |
11376179206 ps |
| T477 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.1734672991 |
|
|
Apr 25 01:26:28 PM PDT 24 |
Apr 25 01:39:37 PM PDT 24 |
11138821695 ps |
| T478 |
/workspace/coverage/default/19.sram_ctrl_bijection.1878696077 |
|
|
Apr 25 01:26:25 PM PDT 24 |
Apr 25 01:26:50 PM PDT 24 |
1215930062 ps |
| T479 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4118847542 |
|
|
Apr 25 01:23:41 PM PDT 24 |
Apr 25 01:23:52 PM PDT 24 |
293466562 ps |
| T480 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.2406010563 |
|
|
Apr 25 01:28:17 PM PDT 24 |
Apr 25 01:28:18 PM PDT 24 |
51628233 ps |
| T481 |
/workspace/coverage/default/28.sram_ctrl_alert_test.1484303591 |
|
|
Apr 25 01:28:10 PM PDT 24 |
Apr 25 01:28:11 PM PDT 24 |
14815964 ps |
| T482 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.4004196051 |
|
|
Apr 25 01:26:23 PM PDT 24 |
Apr 25 01:27:36 PM PDT 24 |
296729372 ps |
| T483 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1175619919 |
|
|
Apr 25 01:30:54 PM PDT 24 |
Apr 25 01:30:58 PM PDT 24 |
52140895 ps |
| T484 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.4051338953 |
|
|
Apr 25 01:22:13 PM PDT 24 |
Apr 25 01:23:04 PM PDT 24 |
335103524 ps |
| T485 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.3116926511 |
|
|
Apr 25 01:23:14 PM PDT 24 |
Apr 25 01:32:34 PM PDT 24 |
2216754271 ps |
| T486 |
/workspace/coverage/default/48.sram_ctrl_alert_test.2593473564 |
|
|
Apr 25 01:32:14 PM PDT 24 |
Apr 25 01:32:16 PM PDT 24 |
56215430 ps |
| T487 |
/workspace/coverage/default/8.sram_ctrl_smoke.1310425807 |
|
|
Apr 25 01:23:59 PM PDT 24 |
Apr 25 01:24:44 PM PDT 24 |
517052612 ps |
| T488 |
/workspace/coverage/default/36.sram_ctrl_bijection.2974531443 |
|
|
Apr 25 01:29:28 PM PDT 24 |
Apr 25 01:30:13 PM PDT 24 |
1934350264 ps |
| T489 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1398959556 |
|
|
Apr 25 01:24:06 PM PDT 24 |
Apr 25 01:39:29 PM PDT 24 |
4107599077 ps |
| T490 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.3848977183 |
|
|
Apr 25 01:22:42 PM PDT 24 |
Apr 25 01:34:14 PM PDT 24 |
14695351865 ps |
| T491 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.929102412 |
|
|
Apr 25 01:23:08 PM PDT 24 |
Apr 25 01:26:49 PM PDT 24 |
9492258708 ps |
| T492 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.3701747306 |
|
|
Apr 25 01:31:39 PM PDT 24 |
Apr 25 01:31:42 PM PDT 24 |
138462712 ps |
| T493 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.1868002963 |
|
|
Apr 25 01:23:07 PM PDT 24 |
Apr 25 01:26:24 PM PDT 24 |
5656635035 ps |
| T494 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.3083226019 |
|
|
Apr 25 01:27:23 PM PDT 24 |
Apr 25 01:32:11 PM PDT 24 |
5981630090 ps |
| T495 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.4098777694 |
|
|
Apr 25 01:25:39 PM PDT 24 |
Apr 25 01:30:11 PM PDT 24 |
11529590810 ps |
| T496 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2674744998 |
|
|
Apr 25 01:32:25 PM PDT 24 |
Apr 25 01:32:30 PM PDT 24 |
63096789 ps |
| T497 |
/workspace/coverage/default/32.sram_ctrl_bijection.2652959467 |
|
|
Apr 25 01:28:44 PM PDT 24 |
Apr 25 01:29:06 PM PDT 24 |
16166823403 ps |
| T498 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.2965105643 |
|
|
Apr 25 01:31:56 PM PDT 24 |
Apr 25 01:32:21 PM PDT 24 |
352780554 ps |
| T499 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.1892978395 |
|
|
Apr 25 01:26:23 PM PDT 24 |
Apr 25 01:26:33 PM PDT 24 |
924681389 ps |
| T500 |
/workspace/coverage/default/39.sram_ctrl_executable.3922195561 |
|
|
Apr 25 01:30:14 PM PDT 24 |
Apr 25 01:32:50 PM PDT 24 |
564170592 ps |
| T501 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.3265650993 |
|
|
Apr 25 01:25:03 PM PDT 24 |
Apr 25 01:25:06 PM PDT 24 |
123885603 ps |
| T502 |
/workspace/coverage/default/7.sram_ctrl_alert_test.2349034699 |
|
|
Apr 25 01:24:00 PM PDT 24 |
Apr 25 01:24:01 PM PDT 24 |
44089806 ps |
| T503 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.16779534 |
|
|
Apr 25 01:30:29 PM PDT 24 |
Apr 25 01:30:31 PM PDT 24 |
72996386 ps |
| T504 |
/workspace/coverage/default/34.sram_ctrl_partial_access.3944211158 |
|
|
Apr 25 01:29:05 PM PDT 24 |
Apr 25 01:29:15 PM PDT 24 |
207463915 ps |
| T505 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2015677026 |
|
|
Apr 25 01:32:08 PM PDT 24 |
Apr 25 01:38:49 PM PDT 24 |
35205470501 ps |
| T119 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.2029233120 |
|
|
Apr 25 01:30:02 PM PDT 24 |
Apr 25 01:31:08 PM PDT 24 |
1296888869 ps |
| T506 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.3702642660 |
|
|
Apr 25 01:25:40 PM PDT 24 |
Apr 25 01:26:18 PM PDT 24 |
430090363 ps |
| T507 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.1948146811 |
|
|
Apr 25 01:27:46 PM PDT 24 |
Apr 25 01:27:56 PM PDT 24 |
757404711 ps |
| T508 |
/workspace/coverage/default/45.sram_ctrl_stress_all.363779022 |
|
|
Apr 25 01:31:36 PM PDT 24 |
Apr 25 01:49:40 PM PDT 24 |
73185180581 ps |
| T509 |
/workspace/coverage/default/21.sram_ctrl_smoke.4025078480 |
|
|
Apr 25 01:26:44 PM PDT 24 |
Apr 25 01:26:46 PM PDT 24 |
48519906 ps |
| T510 |
/workspace/coverage/default/1.sram_ctrl_alert_test.3958503851 |
|
|
Apr 25 01:22:44 PM PDT 24 |
Apr 25 01:22:47 PM PDT 24 |
38992660 ps |
| T511 |
/workspace/coverage/default/16.sram_ctrl_alert_test.2938640488 |
|
|
Apr 25 01:26:18 PM PDT 24 |
Apr 25 01:26:19 PM PDT 24 |
28603534 ps |
| T512 |
/workspace/coverage/default/2.sram_ctrl_regwen.53284488 |
|
|
Apr 25 01:22:49 PM PDT 24 |
Apr 25 01:38:35 PM PDT 24 |
12683450108 ps |
| T513 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.1757857720 |
|
|
Apr 25 01:26:20 PM PDT 24 |
Apr 25 01:30:13 PM PDT 24 |
979083834 ps |
| T514 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.2777331549 |
|
|
Apr 25 01:30:54 PM PDT 24 |
Apr 25 01:31:00 PM PDT 24 |
1320526978 ps |
| T515 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.3838194807 |
|
|
Apr 25 01:29:50 PM PDT 24 |
Apr 25 01:29:52 PM PDT 24 |
84005663 ps |
| T516 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2764611225 |
|
|
Apr 25 01:23:00 PM PDT 24 |
Apr 25 01:23:49 PM PDT 24 |
447541814 ps |
| T517 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.2446638491 |
|
|
Apr 25 01:26:30 PM PDT 24 |
Apr 25 01:29:53 PM PDT 24 |
8524325763 ps |
| T518 |
/workspace/coverage/default/4.sram_ctrl_partial_access.2054615821 |
|
|
Apr 25 01:23:07 PM PDT 24 |
Apr 25 01:23:19 PM PDT 24 |
239837568 ps |
| T519 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3523356484 |
|
|
Apr 25 01:24:57 PM PDT 24 |
Apr 25 01:29:41 PM PDT 24 |
48485155767 ps |
| T520 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.1944431874 |
|
|
Apr 25 01:26:19 PM PDT 24 |
Apr 25 01:37:15 PM PDT 24 |
15240496814 ps |
| T521 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.2102285913 |
|
|
Apr 25 01:25:47 PM PDT 24 |
Apr 25 01:25:57 PM PDT 24 |
463480419 ps |
| T522 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.4170692879 |
|
|
Apr 25 01:27:49 PM PDT 24 |
Apr 25 01:28:14 PM PDT 24 |
87529606 ps |
| T523 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.3107366425 |
|
|
Apr 25 01:28:29 PM PDT 24 |
Apr 25 01:39:54 PM PDT 24 |
6430935321 ps |
| T524 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.120038661 |
|
|
Apr 25 01:25:35 PM PDT 24 |
Apr 25 01:26:19 PM PDT 24 |
379219671 ps |
| T525 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.824684545 |
|
|
Apr 25 01:28:58 PM PDT 24 |
Apr 25 01:32:47 PM PDT 24 |
3336396034 ps |
| T526 |
/workspace/coverage/default/45.sram_ctrl_partial_access.2603728861 |
|
|
Apr 25 01:31:26 PM PDT 24 |
Apr 25 01:31:42 PM PDT 24 |
3190947768 ps |
| T527 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3607173082 |
|
|
Apr 25 01:23:35 PM PDT 24 |
Apr 25 01:23:43 PM PDT 24 |
5300293661 ps |
| T528 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.992549157 |
|
|
Apr 25 01:23:43 PM PDT 24 |
Apr 25 01:49:34 PM PDT 24 |
5097221360 ps |
| T529 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1515079868 |
|
|
Apr 25 01:23:26 PM PDT 24 |
Apr 25 01:26:03 PM PDT 24 |
21322442486 ps |
| T89 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1680860378 |
|
|
Apr 25 01:25:05 PM PDT 24 |
Apr 25 01:25:12 PM PDT 24 |
662523796 ps |
| T530 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.1384943606 |
|
|
Apr 25 01:30:09 PM PDT 24 |
Apr 25 01:34:46 PM PDT 24 |
6355713236 ps |
| T531 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.1048571640 |
|
|
Apr 25 01:31:06 PM PDT 24 |
Apr 25 01:31:07 PM PDT 24 |
37622688 ps |
| T532 |
/workspace/coverage/default/27.sram_ctrl_alert_test.136336232 |
|
|
Apr 25 01:27:55 PM PDT 24 |
Apr 25 01:27:56 PM PDT 24 |
21349761 ps |
| T533 |
/workspace/coverage/default/43.sram_ctrl_partial_access.697564117 |
|
|
Apr 25 01:31:02 PM PDT 24 |
Apr 25 01:33:00 PM PDT 24 |
241769512 ps |
| T534 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.548346898 |
|
|
Apr 25 01:27:33 PM PDT 24 |
Apr 25 01:29:13 PM PDT 24 |
260724566 ps |
| T535 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.3254324982 |
|
|
Apr 25 01:26:22 PM PDT 24 |
Apr 25 01:26:23 PM PDT 24 |
80258118 ps |
| T536 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1911058045 |
|
|
Apr 25 01:25:35 PM PDT 24 |
Apr 25 01:30:13 PM PDT 24 |
25291805259 ps |
| T537 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.2516271906 |
|
|
Apr 25 01:30:53 PM PDT 24 |
Apr 25 01:31:52 PM PDT 24 |
112799968 ps |
| T538 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.958862409 |
|
|
Apr 25 01:30:47 PM PDT 24 |
Apr 25 01:34:39 PM PDT 24 |
8043826064 ps |
| T539 |
/workspace/coverage/default/14.sram_ctrl_regwen.1935133686 |
|
|
Apr 25 01:25:20 PM PDT 24 |
Apr 25 01:29:23 PM PDT 24 |
4678064616 ps |
| T540 |
/workspace/coverage/default/33.sram_ctrl_executable.57986455 |
|
|
Apr 25 01:28:57 PM PDT 24 |
Apr 25 01:46:07 PM PDT 24 |
46998773982 ps |
| T541 |
/workspace/coverage/default/32.sram_ctrl_regwen.4262868801 |
|
|
Apr 25 01:28:49 PM PDT 24 |
Apr 25 01:39:46 PM PDT 24 |
6177693986 ps |
| T542 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.4231547459 |
|
|
Apr 25 01:27:06 PM PDT 24 |
Apr 25 01:27:12 PM PDT 24 |
284820747 ps |
| T543 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.1890927410 |
|
|
Apr 25 01:24:58 PM PDT 24 |
Apr 25 01:25:59 PM PDT 24 |
167871764 ps |
| T544 |
/workspace/coverage/default/40.sram_ctrl_smoke.736761743 |
|
|
Apr 25 01:30:25 PM PDT 24 |
Apr 25 01:30:35 PM PDT 24 |
162963233 ps |
| T37 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.88470666 |
|
|
Apr 25 01:22:20 PM PDT 24 |
Apr 25 01:22:23 PM PDT 24 |
175954506 ps |
| T545 |
/workspace/coverage/default/32.sram_ctrl_executable.2932312144 |
|
|
Apr 25 01:28:52 PM PDT 24 |
Apr 25 01:31:02 PM PDT 24 |
2537971991 ps |
| T546 |
/workspace/coverage/default/30.sram_ctrl_bijection.2729328949 |
|
|
Apr 25 01:28:16 PM PDT 24 |
Apr 25 01:28:37 PM PDT 24 |
1417574269 ps |
| T547 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2537141823 |
|
|
Apr 25 01:31:55 PM PDT 24 |
Apr 25 01:38:13 PM PDT 24 |
1547731398 ps |
| T548 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1767373779 |
|
|
Apr 25 01:28:58 PM PDT 24 |
Apr 25 01:29:40 PM PDT 24 |
1229258134 ps |
| T549 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.128601365 |
|
|
Apr 25 01:25:20 PM PDT 24 |
Apr 25 01:30:14 PM PDT 24 |
21390027853 ps |
| T550 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.768815302 |
|
|
Apr 25 01:26:27 PM PDT 24 |
Apr 25 01:31:08 PM PDT 24 |
16633285593 ps |
| T551 |
/workspace/coverage/default/32.sram_ctrl_stress_all.2842929140 |
|
|
Apr 25 01:28:50 PM PDT 24 |
Apr 25 01:48:13 PM PDT 24 |
87809323319 ps |
| T552 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.394740616 |
|
|
Apr 25 01:28:09 PM PDT 24 |
Apr 25 01:34:39 PM PDT 24 |
35580906647 ps |
| T553 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2917187070 |
|
|
Apr 25 01:22:25 PM PDT 24 |
Apr 25 01:27:13 PM PDT 24 |
22279448847 ps |
| T554 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.3335079647 |
|
|
Apr 25 01:27:05 PM PDT 24 |
Apr 25 01:27:07 PM PDT 24 |
85363797 ps |