Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.08 99.81 96.99 100.00 100.00 98.57 99.70 98.52


Total tests in report: 1019
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
79.12 79.12 96.30 96.30 73.64 73.64 90.45 90.45 71.43 71.43 86.74 86.74 94.45 94.45 40.82 40.82 /workspace/coverage/default/12.sram_ctrl_multiple_keys.3751292809
88.35 9.23 98.64 2.34 81.43 7.79 93.17 2.72 100.00 28.57 93.08 6.34 94.60 0.15 57.51 16.70 /workspace/coverage/default/20.sram_ctrl_stress_all.287919271
93.63 5.28 99.03 0.39 86.36 4.94 97.21 4.04 100.00 0.00 94.52 1.44 96.10 1.50 82.19 24.68 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3557299794
95.62 1.99 99.32 0.29 90.39 4.03 98.21 1.00 100.00 0.00 96.83 2.31 96.25 0.15 88.31 6.12 /workspace/coverage/default/37.sram_ctrl_stress_all.2484764044
96.61 0.99 99.51 0.19 91.04 0.65 98.43 0.21 100.00 0.00 97.69 0.86 96.25 0.00 93.32 5.01 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2593931441
97.36 0.75 99.71 0.19 92.99 1.95 99.14 0.72 100.00 0.00 98.56 0.86 96.85 0.60 94.25 0.93 /workspace/coverage/default/3.sram_ctrl_sec_cm.250932382
97.71 0.35 99.71 0.00 92.99 0.00 99.14 0.00 100.00 0.00 98.85 0.29 97.00 0.15 96.29 2.04 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3509217008
97.98 0.27 99.71 0.00 93.25 0.26 99.21 0.07 100.00 0.00 98.85 0.00 98.20 1.20 96.66 0.37 /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1969584498
98.13 0.15 99.71 0.00 93.38 0.13 99.21 0.00 100.00 0.00 98.85 0.00 99.10 0.90 96.66 0.00 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.1341361567
98.25 0.12 99.81 0.10 93.38 0.00 99.93 0.72 100.00 0.00 98.85 0.00 99.10 0.00 96.66 0.00 /workspace/coverage/default/0.sram_ctrl_ram_cfg.1847913339
98.35 0.11 99.81 0.00 93.38 0.00 99.93 0.00 100.00 0.00 98.85 0.00 99.10 0.00 97.40 0.74 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.195666095
98.45 0.10 99.81 0.00 93.51 0.13 99.93 0.00 100.00 0.00 98.85 0.00 99.10 0.00 97.96 0.56 /workspace/coverage/default/6.sram_ctrl_stress_all.2304872246
98.52 0.07 99.81 0.00 93.90 0.39 100.00 0.07 100.00 0.00 98.85 0.00 99.10 0.00 97.96 0.00 /workspace/coverage/default/13.sram_ctrl_alert_test.3872876412
98.58 0.06 99.81 0.00 93.90 0.00 100.00 0.00 100.00 0.00 98.85 0.00 99.55 0.45 97.96 0.00 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3591569317
98.62 0.04 99.81 0.00 94.16 0.26 100.00 0.00 100.00 0.00 98.85 0.00 99.55 0.00 97.96 0.00 /workspace/coverage/default/1.sram_ctrl_sec_cm.4065211180
98.64 0.03 99.81 0.00 94.16 0.00 100.00 0.00 100.00 0.00 98.85 0.00 99.55 0.00 98.14 0.19 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2173394944
98.67 0.03 99.81 0.00 94.16 0.00 100.00 0.00 100.00 0.00 98.85 0.00 99.55 0.00 98.33 0.19 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.371320092
98.70 0.03 99.81 0.00 94.16 0.00 100.00 0.00 100.00 0.00 98.85 0.00 99.55 0.00 98.52 0.19 /workspace/coverage/default/0.sram_ctrl_stress_all.1024974539
98.72 0.02 99.81 0.00 94.16 0.00 100.00 0.00 100.00 0.00 98.85 0.00 99.70 0.15 98.52 0.00 /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.493234596

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3200514434
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3203206923
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2174842186
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1765091871
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1009234105
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2595836818
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2063885882
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.592567014
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.712050131
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1037691358
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.297564604
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.360748282
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.999613745
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1154580801
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2489558872
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.718903489
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2450389741
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2190828486
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3238575304
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1406276186
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2216599796
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1932338250
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3967316546
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.4224379661
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3234804555
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.16643758
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.4063485387
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2512861633
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2225274119
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3258171597
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.891517860
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.133195220
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.501066948
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3457151951
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2170472316
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.256913669
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.4048400426
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2281081633
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.305690777
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.995746609
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1969764671
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3934216119
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1921579866
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3269119803
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3998195507
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3068019420
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1545146964
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.457247722
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2168393235
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3710600753
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2891040529
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.3716825359
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3361385874
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2753437822
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2380109617
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2497235754
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1186473385
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2218627689
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.133008565
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.242369300
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1674362827
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2160025519
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2011611855
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1516635716
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2298177285
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.4022792452
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3434243822
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.573073623
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3739238530
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3818769708
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.907022141
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3865212933
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.4170221441
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.472979483
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1421939832
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3714740218
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3775287400
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1463703300
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1012373710
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.527284677
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3732482807
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2450964889
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1882469388
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2331696772
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.4252302570
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3255946241
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2226970590
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1570117057
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2906957779
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.4132955561
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.4205937651
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1322920906
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1036205884
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3724735102
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3584728266
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.4135366116
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.322508328
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.668297018
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1441195493
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2886701082
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.581129778
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2908953246
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3908750302
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2726105773
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.4152287489
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2819542806
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1417510093
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.4081925489
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3887068260
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3247091175
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2234472356
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2006494381
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1654294437
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1894547151
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2918145191
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3566811962
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3881538627
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.4214304939
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3285733599
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1565792370
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1165353878
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1931719932
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.652518426
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2479094847
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1512147134
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1959145793
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.4247042200
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.4203936958
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.4051338953
/workspace/coverage/default/0.sram_ctrl_alert_test.652161745
/workspace/coverage/default/0.sram_ctrl_bijection.3742681987
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2401036664
/workspace/coverage/default/0.sram_ctrl_max_throughput.951895262
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3488016136
/workspace/coverage/default/0.sram_ctrl_mem_walk.2384206039
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2036494737
/workspace/coverage/default/0.sram_ctrl_partial_access.3383350939
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2717787980
/workspace/coverage/default/0.sram_ctrl_regwen.1901813520
/workspace/coverage/default/0.sram_ctrl_sec_cm.88470666
/workspace/coverage/default/0.sram_ctrl_smoke.2028470511
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1169793552
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4000125944
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1230802132
/workspace/coverage/default/1.sram_ctrl_alert_test.3958503851
/workspace/coverage/default/1.sram_ctrl_bijection.4080779022
/workspace/coverage/default/1.sram_ctrl_executable.2743454218
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3138191814
/workspace/coverage/default/1.sram_ctrl_max_throughput.1268015531
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1773027542
/workspace/coverage/default/1.sram_ctrl_mem_walk.2486833979
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2044466205
/workspace/coverage/default/1.sram_ctrl_partial_access.3465220241
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2917187070
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3025617667
/workspace/coverage/default/1.sram_ctrl_regwen.1433866929
/workspace/coverage/default/1.sram_ctrl_smoke.4254600006
/workspace/coverage/default/1.sram_ctrl_stress_all.935925153
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.76858002
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.274050632
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2788155911
/workspace/coverage/default/10.sram_ctrl_alert_test.193413972
/workspace/coverage/default/10.sram_ctrl_bijection.1092144838
/workspace/coverage/default/10.sram_ctrl_executable.2737346120
/workspace/coverage/default/10.sram_ctrl_lc_escalation.320253708
/workspace/coverage/default/10.sram_ctrl_max_throughput.3985375394
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.10036246
/workspace/coverage/default/10.sram_ctrl_mem_walk.2904342284
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2475109005
/workspace/coverage/default/10.sram_ctrl_partial_access.77519705
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.708816317
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2880970659
/workspace/coverage/default/10.sram_ctrl_regwen.4089705901
/workspace/coverage/default/10.sram_ctrl_smoke.3670849686
/workspace/coverage/default/10.sram_ctrl_stress_all.3950797135
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2954931085
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1847663843
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3589193991
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1461349819
/workspace/coverage/default/11.sram_ctrl_alert_test.40565020
/workspace/coverage/default/11.sram_ctrl_bijection.2899584636
/workspace/coverage/default/11.sram_ctrl_executable.2776872084
/workspace/coverage/default/11.sram_ctrl_lc_escalation.4126623980
/workspace/coverage/default/11.sram_ctrl_max_throughput.813803420
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3320510884
/workspace/coverage/default/11.sram_ctrl_mem_walk.2566046781
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2522822059
/workspace/coverage/default/11.sram_ctrl_partial_access.2384367709
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4013389063
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1441141865
/workspace/coverage/default/11.sram_ctrl_regwen.363876590
/workspace/coverage/default/11.sram_ctrl_smoke.2428599183
/workspace/coverage/default/11.sram_ctrl_stress_all.2610244771
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.4132480642
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.12022094
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2565137924
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.216439886
/workspace/coverage/default/12.sram_ctrl_alert_test.747230533
/workspace/coverage/default/12.sram_ctrl_bijection.1602392245
/workspace/coverage/default/12.sram_ctrl_executable.2497525248
/workspace/coverage/default/12.sram_ctrl_lc_escalation.889449328
/workspace/coverage/default/12.sram_ctrl_max_throughput.1890927410
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1680860378
/workspace/coverage/default/12.sram_ctrl_mem_walk.2606344001
/workspace/coverage/default/12.sram_ctrl_partial_access.4205771864
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3523356484
/workspace/coverage/default/12.sram_ctrl_ram_cfg.1134069687
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/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.242974293
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.304316182
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1592430236
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1842649011
/workspace/coverage/default/44.sram_ctrl_alert_test.1342778481
/workspace/coverage/default/44.sram_ctrl_bijection.2288762668
/workspace/coverage/default/44.sram_ctrl_executable.4196699999
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2215275629
/workspace/coverage/default/44.sram_ctrl_max_throughput.1017549085
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3838407760
/workspace/coverage/default/44.sram_ctrl_mem_walk.1478406814
/workspace/coverage/default/44.sram_ctrl_multiple_keys.4204754871
/workspace/coverage/default/44.sram_ctrl_partial_access.2494108920
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.918235931
/workspace/coverage/default/44.sram_ctrl_ram_cfg.4233570623
/workspace/coverage/default/44.sram_ctrl_regwen.4106735924
/workspace/coverage/default/44.sram_ctrl_smoke.2618283967
/workspace/coverage/default/44.sram_ctrl_stress_all.496063123
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.162989269
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1427271044
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.888330571
/workspace/coverage/default/45.sram_ctrl_alert_test.185845424
/workspace/coverage/default/45.sram_ctrl_bijection.2280394135
/workspace/coverage/default/45.sram_ctrl_executable.3850354434
/workspace/coverage/default/45.sram_ctrl_lc_escalation.278071084
/workspace/coverage/default/45.sram_ctrl_max_throughput.707517117
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.183556840
/workspace/coverage/default/45.sram_ctrl_mem_walk.2035335204
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3211269710
/workspace/coverage/default/45.sram_ctrl_partial_access.2603728861
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3499811373
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2243859904
/workspace/coverage/default/45.sram_ctrl_regwen.3058910732
/workspace/coverage/default/45.sram_ctrl_smoke.1985949533
/workspace/coverage/default/45.sram_ctrl_stress_all.363779022
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1042620468
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3388572908
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2258788529
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2066146432
/workspace/coverage/default/46.sram_ctrl_alert_test.2778544191
/workspace/coverage/default/46.sram_ctrl_bijection.2438950770
/workspace/coverage/default/46.sram_ctrl_executable.1324622004
/workspace/coverage/default/46.sram_ctrl_lc_escalation.518016415
/workspace/coverage/default/46.sram_ctrl_max_throughput.3701747306
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1831352222
/workspace/coverage/default/46.sram_ctrl_mem_walk.1048231124
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3974183413
/workspace/coverage/default/46.sram_ctrl_partial_access.3736957953
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3073190859
/workspace/coverage/default/46.sram_ctrl_ram_cfg.97754825
/workspace/coverage/default/46.sram_ctrl_regwen.206914289
/workspace/coverage/default/46.sram_ctrl_smoke.2258824812
/workspace/coverage/default/46.sram_ctrl_stress_all.1721134229
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3657528152
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.4032984825
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3083081399
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2537141823
/workspace/coverage/default/47.sram_ctrl_alert_test.2847831650
/workspace/coverage/default/47.sram_ctrl_bijection.970686276
/workspace/coverage/default/47.sram_ctrl_executable.2706132427
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2441197255
/workspace/coverage/default/47.sram_ctrl_max_throughput.2965105643
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.247023785
/workspace/coverage/default/47.sram_ctrl_mem_walk.2161298700
/workspace/coverage/default/47.sram_ctrl_multiple_keys.327303773
/workspace/coverage/default/47.sram_ctrl_partial_access.2103780184
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1457833062
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2231280198
/workspace/coverage/default/47.sram_ctrl_regwen.2767260756
/workspace/coverage/default/47.sram_ctrl_smoke.238036942
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3251460346
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1532144511
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1548979588
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1681262197
/workspace/coverage/default/48.sram_ctrl_alert_test.2593473564
/workspace/coverage/default/48.sram_ctrl_bijection.2341558144
/workspace/coverage/default/48.sram_ctrl_executable.4052585512
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3640531130
/workspace/coverage/default/48.sram_ctrl_max_throughput.1724477431
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.904604332
/workspace/coverage/default/48.sram_ctrl_mem_walk.597441832
/workspace/coverage/default/48.sram_ctrl_multiple_keys.975143326
/workspace/coverage/default/48.sram_ctrl_partial_access.1827688392
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2015677026
/workspace/coverage/default/48.sram_ctrl_ram_cfg.4123423614
/workspace/coverage/default/48.sram_ctrl_regwen.4279876646
/workspace/coverage/default/48.sram_ctrl_smoke.1416307158
/workspace/coverage/default/48.sram_ctrl_stress_all.208161259
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.841327831
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2617541748
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.939524499
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1869534522
/workspace/coverage/default/49.sram_ctrl_alert_test.1701045619
/workspace/coverage/default/49.sram_ctrl_bijection.3978405697
/workspace/coverage/default/49.sram_ctrl_executable.4136399726
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1343684685
/workspace/coverage/default/49.sram_ctrl_max_throughput.3496808355
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2674744998
/workspace/coverage/default/49.sram_ctrl_mem_walk.895315267
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3391583153
/workspace/coverage/default/49.sram_ctrl_partial_access.2363658401
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2216170108
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1307326273
/workspace/coverage/default/49.sram_ctrl_regwen.1323745318
/workspace/coverage/default/49.sram_ctrl_smoke.2117615280
/workspace/coverage/default/49.sram_ctrl_stress_all.3474593919
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2321528142
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.325830660
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1767852325
/workspace/coverage/default/5.sram_ctrl_alert_test.3205867690
/workspace/coverage/default/5.sram_ctrl_bijection.923598472
/workspace/coverage/default/5.sram_ctrl_executable.1038410784
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3607173082
/workspace/coverage/default/5.sram_ctrl_max_throughput.1610624037
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3669563859
/workspace/coverage/default/5.sram_ctrl_mem_walk.2897456789
/workspace/coverage/default/5.sram_ctrl_multiple_keys.471410416
/workspace/coverage/default/5.sram_ctrl_partial_access.618523977
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3913702538
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1002478967
/workspace/coverage/default/5.sram_ctrl_regwen.1644718583
/workspace/coverage/default/5.sram_ctrl_smoke.2050610525
/workspace/coverage/default/5.sram_ctrl_stress_all.3973944461
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.10264988
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1515079868
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.4218699070
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.992549157
/workspace/coverage/default/6.sram_ctrl_alert_test.3859884452
/workspace/coverage/default/6.sram_ctrl_bijection.3398140728
/workspace/coverage/default/6.sram_ctrl_executable.125880755
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2932987085
/workspace/coverage/default/6.sram_ctrl_max_throughput.1603875545
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.4081648173
/workspace/coverage/default/6.sram_ctrl_mem_walk.3121090540
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2406871034
/workspace/coverage/default/6.sram_ctrl_partial_access.1292722183
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.929397882
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1959140070
/workspace/coverage/default/6.sram_ctrl_regwen.52460091
/workspace/coverage/default/6.sram_ctrl_smoke.2403665995
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.434771365
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4118847542
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.4193946099
/workspace/coverage/default/7.sram_ctrl_alert_test.2349034699
/workspace/coverage/default/7.sram_ctrl_bijection.307354084
/workspace/coverage/default/7.sram_ctrl_executable.3476983462
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1244717006
/workspace/coverage/default/7.sram_ctrl_max_throughput.3492219079
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.873532554
/workspace/coverage/default/7.sram_ctrl_mem_walk.754356714
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1393473309
/workspace/coverage/default/7.sram_ctrl_partial_access.3955397551
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2583340171
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3033959684
/workspace/coverage/default/7.sram_ctrl_regwen.4279326060
/workspace/coverage/default/7.sram_ctrl_smoke.2972056370
/workspace/coverage/default/7.sram_ctrl_stress_all.1413536831
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.171733709
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.955524248
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.236194629
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1398959556
/workspace/coverage/default/8.sram_ctrl_alert_test.932469663
/workspace/coverage/default/8.sram_ctrl_bijection.78862298
/workspace/coverage/default/8.sram_ctrl_executable.391743717
/workspace/coverage/default/8.sram_ctrl_lc_escalation.4153424957
/workspace/coverage/default/8.sram_ctrl_max_throughput.2614076091
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3469785088
/workspace/coverage/default/8.sram_ctrl_mem_walk.21511753
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3437590386
/workspace/coverage/default/8.sram_ctrl_partial_access.188718083
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2501834779
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2531486357
/workspace/coverage/default/8.sram_ctrl_regwen.3826188311
/workspace/coverage/default/8.sram_ctrl_smoke.1310425807
/workspace/coverage/default/8.sram_ctrl_stress_all.445930611
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2301428445
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.390828767
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1740714203
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.809525356
/workspace/coverage/default/9.sram_ctrl_alert_test.1422510705
/workspace/coverage/default/9.sram_ctrl_bijection.3479127696
/workspace/coverage/default/9.sram_ctrl_executable.923464456
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3685454227
/workspace/coverage/default/9.sram_ctrl_max_throughput.3610092395
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2601070649
/workspace/coverage/default/9.sram_ctrl_mem_walk.4113135419
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3672870346
/workspace/coverage/default/9.sram_ctrl_partial_access.1638670828
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.55444535
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1405308816
/workspace/coverage/default/9.sram_ctrl_regwen.1115941273
/workspace/coverage/default/9.sram_ctrl_smoke.2742857972
/workspace/coverage/default/9.sram_ctrl_stress_all.1204667515
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3953413191
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.4129888932
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2703984432



Total test records in report: 1019
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/49.sram_ctrl_max_throughput.3496808355 Apr 25 01:32:20 PM PDT 24 Apr 25 01:32:32 PM PDT 24 139383506 ps
T2 /workspace/coverage/default/48.sram_ctrl_bijection.2341558144 Apr 25 01:32:09 PM PDT 24 Apr 25 01:33:11 PM PDT 24 3860357318 ps
T3 /workspace/coverage/default/3.sram_ctrl_smoke.1826052307 Apr 25 01:22:59 PM PDT 24 Apr 25 01:24:22 PM PDT 24 605031810 ps
T10 /workspace/coverage/default/47.sram_ctrl_mem_walk.2161298700 Apr 25 01:32:02 PM PDT 24 Apr 25 01:32:07 PM PDT 24 139581180 ps
T6 /workspace/coverage/default/37.sram_ctrl_bijection.3101864829 Apr 25 01:29:44 PM PDT 24 Apr 25 01:30:47 PM PDT 24 3104577076 ps
T4 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3509217008 Apr 25 01:29:42 PM PDT 24 Apr 25 01:33:50 PM PDT 24 11247034454 ps
T5 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.1773027542 Apr 25 01:22:30 PM PDT 24 Apr 25 01:22:33 PM PDT 24 134568709 ps
T11 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.12022094 Apr 25 01:24:42 PM PDT 24 Apr 25 01:27:39 PM PDT 24 5476196064 ps
T12 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.844643203 Apr 25 01:24:59 PM PDT 24 Apr 25 01:25:14 PM PDT 24 99306256 ps
T13 /workspace/coverage/default/12.sram_ctrl_multiple_keys.3751292809 Apr 25 01:24:53 PM PDT 24 Apr 25 01:41:16 PM PDT 24 13335252573 ps
T16 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.3320510884 Apr 25 01:24:51 PM PDT 24 Apr 25 01:24:54 PM PDT 24 324898584 ps
T17 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.2715667856 Apr 25 01:27:02 PM PDT 24 Apr 25 01:27:08 PM PDT 24 297874475 ps
T14 /workspace/coverage/default/15.sram_ctrl_multiple_keys.723699356 Apr 25 01:25:28 PM PDT 24 Apr 25 01:33:38 PM PDT 24 23701151667 ps
T18 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.1437730095 Apr 25 01:26:55 PM PDT 24 Apr 25 01:28:11 PM PDT 24 167724964 ps
T34 /workspace/coverage/default/4.sram_ctrl_ram_cfg.2531376751 Apr 25 01:23:14 PM PDT 24 Apr 25 01:23:18 PM PDT 24 96622201 ps
T19 /workspace/coverage/default/25.sram_ctrl_regwen.654800586 Apr 25 01:27:27 PM PDT 24 Apr 25 01:37:32 PM PDT 24 34714210320 ps
T65 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.2678105531 Apr 25 01:28:52 PM PDT 24 Apr 25 01:28:55 PM PDT 24 86818084 ps
T15 /workspace/coverage/default/37.sram_ctrl_stress_all.2484764044 Apr 25 01:29:54 PM PDT 24 Apr 25 02:15:06 PM PDT 24 120478319444 ps
T66 /workspace/coverage/default/38.sram_ctrl_multiple_keys.1175077434 Apr 25 01:29:48 PM PDT 24 Apr 25 01:44:24 PM PDT 24 14775280382 ps
T67 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.1169793552 Apr 25 01:22:08 PM PDT 24 Apr 25 01:26:28 PM PDT 24 3028431205 ps
T68 /workspace/coverage/default/6.sram_ctrl_smoke.2403665995 Apr 25 01:23:34 PM PDT 24 Apr 25 01:24:17 PM PDT 24 1728499199 ps
T69 /workspace/coverage/default/7.sram_ctrl_smoke.2972056370 Apr 25 01:23:47 PM PDT 24 Apr 25 01:24:36 PM PDT 24 3904672149 ps
T24 /workspace/coverage/default/24.sram_ctrl_alert_test.777720401 Apr 25 01:27:20 PM PDT 24 Apr 25 01:27:21 PM PDT 24 44004622 ps
T70 /workspace/coverage/default/17.sram_ctrl_smoke.3124709305 Apr 25 01:26:17 PM PDT 24 Apr 25 01:26:23 PM PDT 24 1121703068 ps
T35 /workspace/coverage/default/13.sram_ctrl_ram_cfg.1576322152 Apr 25 01:25:10 PM PDT 24 Apr 25 01:25:11 PM PDT 24 26581297 ps
T104 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.2309602019 Apr 25 01:27:38 PM PDT 24 Apr 25 01:32:02 PM PDT 24 5742937449 ps
T157 /workspace/coverage/default/31.sram_ctrl_mem_walk.288939992 Apr 25 01:28:38 PM PDT 24 Apr 25 01:28:43 PM PDT 24 453436163 ps
T155 /workspace/coverage/default/7.sram_ctrl_partial_access.3955397551 Apr 25 01:23:49 PM PDT 24 Apr 25 01:24:07 PM PDT 24 1035709567 ps
T20 /workspace/coverage/default/18.sram_ctrl_regwen.261432083 Apr 25 01:26:23 PM PDT 24 Apr 25 01:36:46 PM PDT 24 5530743531 ps
T158 /workspace/coverage/default/32.sram_ctrl_smoke.2936245017 Apr 25 01:28:50 PM PDT 24 Apr 25 01:29:04 PM PDT 24 246873270 ps
T81 /workspace/coverage/default/22.sram_ctrl_multiple_keys.3091463479 Apr 25 01:26:53 PM PDT 24 Apr 25 01:32:59 PM PDT 24 10858666951 ps
T82 /workspace/coverage/default/45.sram_ctrl_multiple_keys.3211269710 Apr 25 01:31:27 PM PDT 24 Apr 25 01:48:10 PM PDT 24 108558927101 ps
T31 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.652176834 Apr 25 01:28:23 PM PDT 24 Apr 25 01:29:33 PM PDT 24 1706189640 ps
T58 /workspace/coverage/default/48.sram_ctrl_multiple_keys.975143326 Apr 25 01:32:09 PM PDT 24 Apr 25 01:41:49 PM PDT 24 53793062765 ps
T59 /workspace/coverage/default/42.sram_ctrl_executable.4041729218 Apr 25 01:30:54 PM PDT 24 Apr 25 01:32:58 PM PDT 24 2538889627 ps
T60 /workspace/coverage/default/40.sram_ctrl_regwen.386078037 Apr 25 01:30:32 PM PDT 24 Apr 25 01:42:34 PM PDT 24 2543139010 ps
T61 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.2469439462 Apr 25 01:25:28 PM PDT 24 Apr 25 01:29:05 PM PDT 24 2451693845 ps
T7 /workspace/coverage/default/7.sram_ctrl_lc_escalation.1244717006 Apr 25 01:23:53 PM PDT 24 Apr 25 01:23:56 PM PDT 24 479856861 ps
T8 /workspace/coverage/default/19.sram_ctrl_lc_escalation.2925393761 Apr 25 01:26:26 PM PDT 24 Apr 25 01:26:35 PM PDT 24 4756264121 ps
T62 /workspace/coverage/default/5.sram_ctrl_partial_access.618523977 Apr 25 01:23:27 PM PDT 24 Apr 25 01:23:44 PM PDT 24 335189778 ps
T32 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3557299794 Apr 25 01:23:45 PM PDT 24 Apr 25 01:28:23 PM PDT 24 3057025466 ps
T63 /workspace/coverage/default/36.sram_ctrl_partial_access.901453229 Apr 25 01:29:34 PM PDT 24 Apr 25 01:29:56 PM PDT 24 1017648326 ps
T149 /workspace/coverage/default/38.sram_ctrl_executable.3956061988 Apr 25 01:30:07 PM PDT 24 Apr 25 01:45:30 PM PDT 24 12793628512 ps
T36 /workspace/coverage/default/38.sram_ctrl_ram_cfg.2152366502 Apr 25 01:30:03 PM PDT 24 Apr 25 01:30:04 PM PDT 24 114483977 ps
T159 /workspace/coverage/default/47.sram_ctrl_bijection.970686276 Apr 25 01:31:54 PM PDT 24 Apr 25 01:32:44 PM PDT 24 9062722112 ps
T9 /workspace/coverage/default/39.sram_ctrl_lc_escalation.3301365982 Apr 25 01:30:08 PM PDT 24 Apr 25 01:30:14 PM PDT 24 330421432 ps
T25 /workspace/coverage/default/25.sram_ctrl_alert_test.1406815842 Apr 25 01:27:28 PM PDT 24 Apr 25 01:27:29 PM PDT 24 36630012 ps
T160 /workspace/coverage/default/7.sram_ctrl_max_throughput.3492219079 Apr 25 01:23:48 PM PDT 24 Apr 25 01:25:46 PM PDT 24 145351352 ps
T26 /workspace/coverage/default/23.sram_ctrl_alert_test.545943934 Apr 25 01:27:13 PM PDT 24 Apr 25 01:27:15 PM PDT 24 28253312 ps
T105 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.156957904 Apr 25 01:30:20 PM PDT 24 Apr 25 01:35:33 PM PDT 24 5934566771 ps
T29 /workspace/coverage/default/25.sram_ctrl_stress_all.2544370336 Apr 25 01:27:27 PM PDT 24 Apr 25 02:05:33 PM PDT 24 8412525403 ps
T161 /workspace/coverage/default/0.sram_ctrl_ram_cfg.1847913339 Apr 25 01:22:42 PM PDT 24 Apr 25 01:22:44 PM PDT 24 42641963 ps
T64 /workspace/coverage/default/20.sram_ctrl_stress_all.287919271 Apr 25 01:26:43 PM PDT 24 Apr 25 02:27:24 PM PDT 24 42287924044 ps
T48 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.100260492 Apr 25 01:28:57 PM PDT 24 Apr 25 01:43:03 PM PDT 24 23917111183 ps
T162 /workspace/coverage/default/0.sram_ctrl_partial_access.3383350939 Apr 25 01:22:10 PM PDT 24 Apr 25 01:22:27 PM PDT 24 261634479 ps
T163 /workspace/coverage/default/32.sram_ctrl_ram_cfg.2941281441 Apr 25 01:28:50 PM PDT 24 Apr 25 01:28:52 PM PDT 24 76732932 ps
T30 /workspace/coverage/default/33.sram_ctrl_lc_escalation.3451082805 Apr 25 01:28:56 PM PDT 24 Apr 25 01:29:02 PM PDT 24 1692768426 ps
T164 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.274050632 Apr 25 01:22:25 PM PDT 24 Apr 25 01:23:26 PM PDT 24 145308929 ps
T165 /workspace/coverage/default/17.sram_ctrl_max_throughput.1145353551 Apr 25 01:26:16 PM PDT 24 Apr 25 01:26:22 PM PDT 24 57196232 ps
T166 /workspace/coverage/default/44.sram_ctrl_ram_cfg.4233570623 Apr 25 01:31:19 PM PDT 24 Apr 25 01:31:21 PM PDT 24 107376858 ps
T33 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.841327831 Apr 25 01:32:27 PM PDT 24 Apr 25 01:34:59 PM PDT 24 1383440938 ps
T156 /workspace/coverage/default/44.sram_ctrl_lc_escalation.2215275629 Apr 25 01:31:20 PM PDT 24 Apr 25 01:31:28 PM PDT 24 1959751916 ps
T167 /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.1639300486 Apr 25 01:29:54 PM PDT 24 Apr 25 01:30:11 PM PDT 24 84731606 ps
T168 /workspace/coverage/default/13.sram_ctrl_alert_test.3872876412 Apr 25 01:25:15 PM PDT 24 Apr 25 01:25:17 PM PDT 24 52490628 ps
T169 /workspace/coverage/default/35.sram_ctrl_alert_test.2056648114 Apr 25 01:29:29 PM PDT 24 Apr 25 01:29:30 PM PDT 24 40362830 ps
T170 /workspace/coverage/default/9.sram_ctrl_executable.923464456 Apr 25 01:24:17 PM PDT 24 Apr 25 01:31:25 PM PDT 24 2338168446 ps
T52 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1915559922 Apr 25 01:26:20 PM PDT 24 Apr 25 01:27:35 PM PDT 24 496459066 ps
T171 /workspace/coverage/default/15.sram_ctrl_smoke.1355064312 Apr 25 01:25:29 PM PDT 24 Apr 25 01:25:34 PM PDT 24 357621119 ps
T172 /workspace/coverage/default/39.sram_ctrl_multiple_keys.3274956000 Apr 25 01:30:10 PM PDT 24 Apr 25 01:38:16 PM PDT 24 15568053177 ps
T173 /workspace/coverage/default/42.sram_ctrl_ram_cfg.4203174823 Apr 25 01:30:54 PM PDT 24 Apr 25 01:30:55 PM PDT 24 155014829 ps
T132 /workspace/coverage/default/10.sram_ctrl_lc_escalation.320253708 Apr 25 01:24:29 PM PDT 24 Apr 25 01:24:34 PM PDT 24 1007366611 ps
T27 /workspace/coverage/default/39.sram_ctrl_stress_all.2420427600 Apr 25 01:30:17 PM PDT 24 Apr 25 01:52:35 PM PDT 24 15924978238 ps
T174 /workspace/coverage/default/15.sram_ctrl_mem_walk.994795392 Apr 25 01:25:32 PM PDT 24 Apr 25 01:25:43 PM PDT 24 1255060753 ps
T106 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2501834779 Apr 25 01:23:59 PM PDT 24 Apr 25 01:29:53 PM PDT 24 116722837579 ps
T151 /workspace/coverage/default/45.sram_ctrl_regwen.3058910732 Apr 25 01:31:35 PM PDT 24 Apr 25 01:38:39 PM PDT 24 2345144191 ps
T107 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.926254420 Apr 25 01:28:30 PM PDT 24 Apr 25 01:36:00 PM PDT 24 35668154409 ps
T175 /workspace/coverage/default/17.sram_ctrl_lc_escalation.4003749638 Apr 25 01:26:16 PM PDT 24 Apr 25 01:26:22 PM PDT 24 1334080087 ps
T176 /workspace/coverage/default/31.sram_ctrl_partial_access.832574070 Apr 25 01:28:30 PM PDT 24 Apr 25 01:28:33 PM PDT 24 182412248 ps
T108 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.820442451 Apr 25 01:25:05 PM PDT 24 Apr 25 01:28:38 PM PDT 24 4787148222 ps
T177 /workspace/coverage/default/49.sram_ctrl_bijection.3978405697 Apr 25 01:32:19 PM PDT 24 Apr 25 01:32:53 PM PDT 24 6429067090 ps
T86 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.665181315 Apr 25 01:26:26 PM PDT 24 Apr 25 01:26:31 PM PDT 24 230211181 ps
T178 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3589193991 Apr 25 01:24:25 PM PDT 24 Apr 25 01:24:58 PM PDT 24 437350289 ps
T179 /workspace/coverage/default/33.sram_ctrl_alert_test.1124978968 Apr 25 01:29:04 PM PDT 24 Apr 25 01:29:05 PM PDT 24 24190108 ps
T180 /workspace/coverage/default/38.sram_ctrl_mem_walk.2249901481 Apr 25 01:30:03 PM PDT 24 Apr 25 01:30:14 PM PDT 24 8724150434 ps
T181 /workspace/coverage/default/36.sram_ctrl_ram_cfg.290616147 Apr 25 01:29:35 PM PDT 24 Apr 25 01:29:36 PM PDT 24 26917608 ps
T28 /workspace/coverage/default/11.sram_ctrl_regwen.363876590 Apr 25 01:24:48 PM PDT 24 Apr 25 01:41:16 PM PDT 24 63505834558 ps
T182 /workspace/coverage/default/36.sram_ctrl_lc_escalation.1762183618 Apr 25 01:29:37 PM PDT 24 Apr 25 01:29:44 PM PDT 24 1282197512 ps
T183 /workspace/coverage/default/1.sram_ctrl_ram_cfg.3025617667 Apr 25 01:22:26 PM PDT 24 Apr 25 01:22:28 PM PDT 24 26892339 ps
T184 /workspace/coverage/default/25.sram_ctrl_bijection.729436604 Apr 25 01:27:21 PM PDT 24 Apr 25 01:28:10 PM PDT 24 2347042445 ps
T51 /workspace/coverage/default/3.sram_ctrl_executable.1118980702 Apr 25 01:23:00 PM PDT 24 Apr 25 01:35:48 PM PDT 24 98990629424 ps
T49 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.1341361567 Apr 25 01:25:19 PM PDT 24 Apr 25 01:38:24 PM PDT 24 3088236073 ps
T185 /workspace/coverage/default/29.sram_ctrl_smoke.1906744947 Apr 25 01:28:11 PM PDT 24 Apr 25 01:28:22 PM PDT 24 624524320 ps
T50 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.3165389277 Apr 25 01:29:12 PM PDT 24 Apr 25 01:44:46 PM PDT 24 3337359779 ps
T152 /workspace/coverage/default/14.sram_ctrl_stress_all.3641047887 Apr 25 01:25:29 PM PDT 24 Apr 25 01:47:15 PM PDT 24 24818801454 ps
T186 /workspace/coverage/default/20.sram_ctrl_executable.1784089781 Apr 25 01:26:35 PM PDT 24 Apr 25 01:28:08 PM PDT 24 7788290118 ps
T87 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.13207686 Apr 25 01:25:34 PM PDT 24 Apr 25 01:25:39 PM PDT 24 70610063 ps
T187 /workspace/coverage/default/22.sram_ctrl_alert_test.3676487346 Apr 25 01:26:58 PM PDT 24 Apr 25 01:27:00 PM PDT 24 33696727 ps
T188 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.4147165526 Apr 25 01:23:00 PM PDT 24 Apr 25 01:26:59 PM PDT 24 15102629043 ps
T189 /workspace/coverage/default/34.sram_ctrl_lc_escalation.2021646618 Apr 25 01:29:09 PM PDT 24 Apr 25 01:29:15 PM PDT 24 1761534214 ps
T190 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.1079939136 Apr 25 01:28:12 PM PDT 24 Apr 25 01:28:55 PM PDT 24 554898407 ps
T191 /workspace/coverage/default/1.sram_ctrl_mem_walk.2486833979 Apr 25 01:22:30 PM PDT 24 Apr 25 01:22:35 PM PDT 24 74345455 ps
T192 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2180863421 Apr 25 01:27:08 PM PDT 24 Apr 25 01:27:45 PM PDT 24 106558511 ps
T193 /workspace/coverage/default/27.sram_ctrl_ram_cfg.3373075909 Apr 25 01:27:48 PM PDT 24 Apr 25 01:27:50 PM PDT 24 26630258 ps
T194 /workspace/coverage/default/25.sram_ctrl_multiple_keys.824929326 Apr 25 01:27:19 PM PDT 24 Apr 25 01:48:17 PM PDT 24 94535666341 ps
T53 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.102049472 Apr 25 01:25:15 PM PDT 24 Apr 25 01:25:47 PM PDT 24 6014338823 ps
T88 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.1833854255 Apr 25 01:28:26 PM PDT 24 Apr 25 01:28:31 PM PDT 24 143080021 ps
T124 /workspace/coverage/default/42.sram_ctrl_alert_test.2263206971 Apr 25 01:30:58 PM PDT 24 Apr 25 01:30:59 PM PDT 24 137342183 ps
T125 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1592430236 Apr 25 01:31:09 PM PDT 24 Apr 25 01:31:11 PM PDT 24 37814079 ps
T126 /workspace/coverage/default/44.sram_ctrl_multiple_keys.4204754871 Apr 25 01:31:14 PM PDT 24 Apr 25 01:47:30 PM PDT 24 13024710372 ps
T127 /workspace/coverage/default/38.sram_ctrl_smoke.2665282492 Apr 25 01:30:02 PM PDT 24 Apr 25 01:30:04 PM PDT 24 106886239 ps
T128 /workspace/coverage/default/16.sram_ctrl_multiple_keys.1671120593 Apr 25 01:25:40 PM PDT 24 Apr 25 01:29:29 PM PDT 24 3557215182 ps
T129 /workspace/coverage/default/33.sram_ctrl_max_throughput.1428586199 Apr 25 01:28:56 PM PDT 24 Apr 25 01:30:24 PM PDT 24 122314703 ps
T130 /workspace/coverage/default/24.sram_ctrl_lc_escalation.1080773809 Apr 25 01:27:17 PM PDT 24 Apr 25 01:27:22 PM PDT 24 1049201223 ps
T131 /workspace/coverage/default/30.sram_ctrl_executable.1950797244 Apr 25 01:28:23 PM PDT 24 Apr 25 01:33:29 PM PDT 24 2010827780 ps
T195 /workspace/coverage/default/9.sram_ctrl_mem_walk.4113135419 Apr 25 01:24:18 PM PDT 24 Apr 25 01:24:27 PM PDT 24 139052323 ps
T21 /workspace/coverage/default/3.sram_ctrl_sec_cm.250932382 Apr 25 01:23:06 PM PDT 24 Apr 25 01:23:09 PM PDT 24 381115228 ps
T39 /workspace/coverage/default/44.sram_ctrl_alert_test.1342778481 Apr 25 01:31:27 PM PDT 24 Apr 25 01:31:28 PM PDT 24 20032469 ps
T40 /workspace/coverage/default/21.sram_ctrl_stress_all.2789970883 Apr 25 01:26:48 PM PDT 24 Apr 25 01:31:30 PM PDT 24 6862190925 ps
T41 /workspace/coverage/default/5.sram_ctrl_multiple_keys.471410416 Apr 25 01:23:18 PM PDT 24 Apr 25 01:42:35 PM PDT 24 20175356886 ps
T42 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.3313840625 Apr 25 01:29:51 PM PDT 24 Apr 25 01:30:35 PM PDT 24 2576858040 ps
T43 /workspace/coverage/default/1.sram_ctrl_regwen.1433866929 Apr 25 01:22:27 PM PDT 24 Apr 25 01:29:48 PM PDT 24 3308625546 ps
T44 /workspace/coverage/default/16.sram_ctrl_executable.1250509030 Apr 25 01:25:46 PM PDT 24 Apr 25 01:31:52 PM PDT 24 1882425875 ps
T45 /workspace/coverage/default/24.sram_ctrl_multiple_keys.3328155419 Apr 25 01:27:14 PM PDT 24 Apr 25 01:45:30 PM PDT 24 16359457640 ps
T46 /workspace/coverage/default/2.sram_ctrl_mem_walk.2499590440 Apr 25 01:22:54 PM PDT 24 Apr 25 01:23:01 PM PDT 24 487277759 ps
T47 /workspace/coverage/default/33.sram_ctrl_regwen.603677630 Apr 25 01:28:56 PM PDT 24 Apr 25 01:36:59 PM PDT 24 19803413784 ps
T196 /workspace/coverage/default/47.sram_ctrl_multiple_keys.327303773 Apr 25 01:31:56 PM PDT 24 Apr 25 01:40:53 PM PDT 24 39401674697 ps
T197 /workspace/coverage/default/37.sram_ctrl_alert_test.2556200265 Apr 25 01:29:51 PM PDT 24 Apr 25 01:29:52 PM PDT 24 13792959 ps
T198 /workspace/coverage/default/11.sram_ctrl_executable.2776872084 Apr 25 01:24:47 PM PDT 24 Apr 25 01:33:58 PM PDT 24 8316093788 ps
T199 /workspace/coverage/default/8.sram_ctrl_partial_access.188718083 Apr 25 01:24:01 PM PDT 24 Apr 25 01:24:15 PM PDT 24 818526249 ps
T54 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3591569317 Apr 25 01:22:38 PM PDT 24 Apr 25 01:23:43 PM PDT 24 5707157240 ps
T133 /workspace/coverage/default/11.sram_ctrl_lc_escalation.4126623980 Apr 25 01:24:45 PM PDT 24 Apr 25 01:24:49 PM PDT 24 320773765 ps
T200 /workspace/coverage/default/44.sram_ctrl_bijection.2288762668 Apr 25 01:31:14 PM PDT 24 Apr 25 01:32:29 PM PDT 24 5012137183 ps
T201 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.1230802132 Apr 25 01:22:25 PM PDT 24 Apr 25 01:35:32 PM PDT 24 48229749707 ps
T202 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.93527558 Apr 25 01:28:56 PM PDT 24 Apr 25 01:34:27 PM PDT 24 14013385037 ps
T150 /workspace/coverage/default/6.sram_ctrl_stress_all.2304872246 Apr 25 01:23:43 PM PDT 24 Apr 25 01:51:28 PM PDT 24 13413647344 ps
T203 /workspace/coverage/default/21.sram_ctrl_alert_test.2626750126 Apr 25 01:26:54 PM PDT 24 Apr 25 01:26:55 PM PDT 24 21166077 ps
T204 /workspace/coverage/default/45.sram_ctrl_mem_walk.2035335204 Apr 25 01:31:36 PM PDT 24 Apr 25 01:31:45 PM PDT 24 819459417 ps
T205 /workspace/coverage/default/0.sram_ctrl_mem_walk.2384206039 Apr 25 01:22:12 PM PDT 24 Apr 25 01:22:20 PM PDT 24 971014060 ps
T55 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.171733709 Apr 25 01:23:53 PM PDT 24 Apr 25 01:36:37 PM PDT 24 2425656999 ps
T206 /workspace/coverage/default/23.sram_ctrl_multiple_keys.1892254569 Apr 25 01:27:01 PM PDT 24 Apr 25 01:35:03 PM PDT 24 14560165748 ps
T207 /workspace/coverage/default/19.sram_ctrl_multiple_keys.241415550 Apr 25 01:26:27 PM PDT 24 Apr 25 01:38:16 PM PDT 24 4490628290 ps
T208 /workspace/coverage/default/47.sram_ctrl_smoke.238036942 Apr 25 01:31:57 PM PDT 24 Apr 25 01:33:52 PM PDT 24 210961146 ps
T209 /workspace/coverage/default/37.sram_ctrl_mem_walk.446325189 Apr 25 01:29:47 PM PDT 24 Apr 25 01:29:53 PM PDT 24 353397415 ps
T153 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.929397882 Apr 25 01:23:37 PM PDT 24 Apr 25 01:28:20 PM PDT 24 48305183716 ps
T210 /workspace/coverage/default/2.sram_ctrl_max_throughput.2772431518 Apr 25 01:22:46 PM PDT 24 Apr 25 01:24:02 PM PDT 24 242331067 ps
T56 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2515824258 Apr 25 01:27:08 PM PDT 24 Apr 25 01:31:17 PM PDT 24 2199069349 ps
T211 /workspace/coverage/default/41.sram_ctrl_mem_walk.146684315 Apr 25 01:30:42 PM PDT 24 Apr 25 01:30:47 PM PDT 24 242895002 ps
T212 /workspace/coverage/default/8.sram_ctrl_regwen.3826188311 Apr 25 01:24:05 PM PDT 24 Apr 25 01:30:04 PM PDT 24 1913550148 ps
T213 /workspace/coverage/default/46.sram_ctrl_partial_access.3736957953 Apr 25 01:31:40 PM PDT 24 Apr 25 01:31:45 PM PDT 24 365433923 ps
T214 /workspace/coverage/default/40.sram_ctrl_executable.1970439161 Apr 25 01:30:28 PM PDT 24 Apr 25 01:48:10 PM PDT 24 18254944463 ps
T215 /workspace/coverage/default/4.sram_ctrl_executable.3694073995 Apr 25 01:23:12 PM PDT 24 Apr 25 01:26:03 PM PDT 24 152356225850 ps
T216 /workspace/coverage/default/26.sram_ctrl_alert_test.3273782401 Apr 25 01:27:38 PM PDT 24 Apr 25 01:27:39 PM PDT 24 31354868 ps
T217 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1548979588 Apr 25 01:31:55 PM PDT 24 Apr 25 01:32:46 PM PDT 24 300636129 ps
T218 /workspace/coverage/default/37.sram_ctrl_partial_access.3007469125 Apr 25 01:29:42 PM PDT 24 Apr 25 01:29:53 PM PDT 24 1920897188 ps
T219 /workspace/coverage/default/37.sram_ctrl_lc_escalation.4291177472 Apr 25 01:29:49 PM PDT 24 Apr 25 01:29:55 PM PDT 24 801679479 ps
T220 /workspace/coverage/default/14.sram_ctrl_mem_walk.1071343337 Apr 25 01:25:27 PM PDT 24 Apr 25 01:25:33 PM PDT 24 311845796 ps
T221 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.216439886 Apr 25 01:24:57 PM PDT 24 Apr 25 01:30:57 PM PDT 24 5904345793 ps
T222 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.710548856 Apr 25 01:29:05 PM PDT 24 Apr 25 01:35:20 PM PDT 24 4104430716 ps
T223 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.1447711077 Apr 25 01:26:23 PM PDT 24 Apr 25 01:27:34 PM PDT 24 1311744691 ps
T224 /workspace/coverage/default/43.sram_ctrl_executable.277085984 Apr 25 01:31:06 PM PDT 24 Apr 25 01:55:13 PM PDT 24 258419577916 ps
T225 /workspace/coverage/default/32.sram_ctrl_max_throughput.1616820411 Apr 25 01:28:50 PM PDT 24 Apr 25 01:28:52 PM PDT 24 67429935 ps
T57 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.3617436930 Apr 25 01:30:50 PM PDT 24 Apr 25 01:31:58 PM PDT 24 4093424962 ps
T226 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.753731060 Apr 25 01:29:56 PM PDT 24 Apr 25 01:30:00 PM PDT 24 213875945 ps
T227 /workspace/coverage/default/3.sram_ctrl_max_throughput.123002824 Apr 25 01:23:00 PM PDT 24 Apr 25 01:23:06 PM PDT 24 618139818 ps
T228 /workspace/coverage/default/33.sram_ctrl_bijection.3305824476 Apr 25 01:28:57 PM PDT 24 Apr 25 01:30:04 PM PDT 24 4813326171 ps
T229 /workspace/coverage/default/43.sram_ctrl_max_throughput.1256400150 Apr 25 01:31:04 PM PDT 24 Apr 25 01:32:24 PM PDT 24 128063809 ps
T230 /workspace/coverage/default/27.sram_ctrl_partial_access.3117771120 Apr 25 01:27:47 PM PDT 24 Apr 25 01:27:50 PM PDT 24 47749902 ps
T231 /workspace/coverage/default/32.sram_ctrl_lc_escalation.326326808 Apr 25 01:29:03 PM PDT 24 Apr 25 01:29:06 PM PDT 24 245222281 ps
T232 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.953131038 Apr 25 01:29:21 PM PDT 24 Apr 25 01:31:32 PM PDT 24 976942836 ps
T233 /workspace/coverage/default/34.sram_ctrl_regwen.1453706757 Apr 25 01:29:09 PM PDT 24 Apr 25 01:40:52 PM PDT 24 47366249098 ps
T234 /workspace/coverage/default/31.sram_ctrl_executable.3998961435 Apr 25 01:28:42 PM PDT 24 Apr 25 01:30:42 PM PDT 24 1969329510 ps
T235 /workspace/coverage/default/3.sram_ctrl_alert_test.1146583345 Apr 25 01:23:06 PM PDT 24 Apr 25 01:23:08 PM PDT 24 14433989 ps
T236 /workspace/coverage/default/25.sram_ctrl_executable.3950035437 Apr 25 01:27:28 PM PDT 24 Apr 25 01:45:59 PM PDT 24 7534258007 ps
T237 /workspace/coverage/default/8.sram_ctrl_alert_test.932469663 Apr 25 01:24:11 PM PDT 24 Apr 25 01:24:12 PM PDT 24 35888805 ps
T238 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.434771365 Apr 25 01:23:39 PM PDT 24 Apr 25 01:26:10 PM PDT 24 6948074992 ps
T239 /workspace/coverage/default/18.sram_ctrl_alert_test.2509882068 Apr 25 01:26:23 PM PDT 24 Apr 25 01:26:25 PM PDT 24 40612692 ps
T240 /workspace/coverage/default/16.sram_ctrl_stress_all.4194456755 Apr 25 01:25:48 PM PDT 24 Apr 25 01:41:49 PM PDT 24 67618851393 ps
T241 /workspace/coverage/default/10.sram_ctrl_bijection.1092144838 Apr 25 01:24:23 PM PDT 24 Apr 25 01:24:46 PM PDT 24 825194578 ps
T242 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.2179107326 Apr 25 01:29:16 PM PDT 24 Apr 25 01:30:24 PM PDT 24 138751671 ps
T243 /workspace/coverage/default/24.sram_ctrl_stress_all.2910355976 Apr 25 01:27:21 PM PDT 24 Apr 25 01:42:32 PM PDT 24 39650418554 ps
T244 /workspace/coverage/default/27.sram_ctrl_bijection.1691385284 Apr 25 01:27:40 PM PDT 24 Apr 25 01:28:30 PM PDT 24 26900952585 ps
T245 /workspace/coverage/default/1.sram_ctrl_lc_escalation.3138191814 Apr 25 01:22:27 PM PDT 24 Apr 25 01:22:33 PM PDT 24 498391850 ps
T246 /workspace/coverage/default/46.sram_ctrl_regwen.206914289 Apr 25 01:31:50 PM PDT 24 Apr 25 01:38:35 PM PDT 24 48940442869 ps
T247 /workspace/coverage/default/9.sram_ctrl_alert_test.1422510705 Apr 25 01:24:18 PM PDT 24 Apr 25 01:24:19 PM PDT 24 37056755 ps
T248 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.2590349352 Apr 25 01:30:22 PM PDT 24 Apr 25 01:34:49 PM PDT 24 2879490065 ps
T249 /workspace/coverage/default/43.sram_ctrl_lc_escalation.1806706682 Apr 25 01:31:09 PM PDT 24 Apr 25 01:31:15 PM PDT 24 1194965358 ps
T250 /workspace/coverage/default/6.sram_ctrl_lc_escalation.2932987085 Apr 25 01:23:37 PM PDT 24 Apr 25 01:23:45 PM PDT 24 1267884464 ps
T251 /workspace/coverage/default/0.sram_ctrl_stress_all.1024974539 Apr 25 01:22:15 PM PDT 24 Apr 25 01:53:01 PM PDT 24 120688158577 ps
T252 /workspace/coverage/default/24.sram_ctrl_executable.1621458559 Apr 25 01:27:15 PM PDT 24 Apr 25 01:41:02 PM PDT 24 10199154131 ps
T253 /workspace/coverage/default/1.sram_ctrl_partial_access.3465220241 Apr 25 01:22:24 PM PDT 24 Apr 25 01:22:42 PM PDT 24 150119197 ps
T254 /workspace/coverage/default/35.sram_ctrl_mem_walk.3713505714 Apr 25 01:29:23 PM PDT 24 Apr 25 01:29:29 PM PDT 24 1564557558 ps
T255 /workspace/coverage/default/10.sram_ctrl_regwen.4089705901 Apr 25 01:24:34 PM PDT 24 Apr 25 01:30:31 PM PDT 24 2315441493 ps
T256 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.905310259 Apr 25 01:28:15 PM PDT 24 Apr 25 01:28:33 PM PDT 24 924689717 ps
T257 /workspace/coverage/default/13.sram_ctrl_multiple_keys.119386973 Apr 25 01:25:02 PM PDT 24 Apr 25 01:41:29 PM PDT 24 12631626361 ps
T258 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.2693634916 Apr 25 01:27:35 PM PDT 24 Apr 25 01:28:14 PM PDT 24 277615338 ps
T259 /workspace/coverage/default/41.sram_ctrl_smoke.422631792 Apr 25 01:30:28 PM PDT 24 Apr 25 01:31:51 PM PDT 24 640206636 ps
T260 /workspace/coverage/default/23.sram_ctrl_partial_access.2917729741 Apr 25 01:27:09 PM PDT 24 Apr 25 01:28:31 PM PDT 24 2301173955 ps
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T263 /workspace/coverage/default/29.sram_ctrl_max_throughput.613996369 Apr 25 01:28:08 PM PDT 24 Apr 25 01:28:16 PM PDT 24 403861359 ps
T264 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.1869534522 Apr 25 01:32:19 PM PDT 24 Apr 25 01:45:07 PM PDT 24 11192737546 ps
T265 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.2788155911 Apr 25 01:24:34 PM PDT 24 Apr 25 01:33:48 PM PDT 24 10142795379 ps
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T267 /workspace/coverage/default/15.sram_ctrl_regwen.3384195616 Apr 25 01:25:34 PM PDT 24 Apr 25 01:41:13 PM PDT 24 26503956346 ps
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T276 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.390828767 Apr 25 01:24:01 PM PDT 24 Apr 25 01:27:56 PM PDT 24 2659624589 ps
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T299 /workspace/coverage/default/11.sram_ctrl_partial_access.2384367709 Apr 25 01:24:42 PM PDT 24 Apr 25 01:24:59 PM PDT 24 1509415982 ps
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T304 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.547820431 Apr 25 01:27:41 PM PDT 24 Apr 25 01:29:36 PM PDT 24 1754198250 ps
T305 /workspace/coverage/default/40.sram_ctrl_mem_walk.3762638288 Apr 25 01:30:27 PM PDT 24 Apr 25 01:30:37 PM PDT 24 1829024940 ps
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T308 /workspace/coverage/default/39.sram_ctrl_bijection.1457886528 Apr 25 01:30:11 PM PDT 24 Apr 25 01:31:17 PM PDT 24 3223301808 ps
T309 /workspace/coverage/default/17.sram_ctrl_alert_test.3229375345 Apr 25 01:26:19 PM PDT 24 Apr 25 01:26:21 PM PDT 24 39460029 ps
T310 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.17912566 Apr 25 01:30:54 PM PDT 24 Apr 25 01:30:58 PM PDT 24 63020766 ps
T311 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.638647468 Apr 25 01:29:11 PM PDT 24 Apr 25 01:30:08 PM PDT 24 135225173 ps
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