T552 |
/workspace/coverage/default/40.sram_ctrl_executable.3856139752 |
|
|
May 05 02:04:47 PM PDT 24 |
May 05 02:06:41 PM PDT 24 |
1356433495 ps |
T553 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1305113305 |
|
|
May 05 02:05:23 PM PDT 24 |
May 05 02:08:21 PM PDT 24 |
5800348956 ps |
T554 |
/workspace/coverage/default/32.sram_ctrl_alert_test.712168507 |
|
|
May 05 02:03:09 PM PDT 24 |
May 05 02:03:10 PM PDT 24 |
20572085 ps |
T555 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3414927499 |
|
|
May 05 01:58:47 PM PDT 24 |
May 05 01:58:51 PM PDT 24 |
293449185 ps |
T556 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.3655877046 |
|
|
May 05 02:01:38 PM PDT 24 |
May 05 02:02:58 PM PDT 24 |
133603158 ps |
T557 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.3309931688 |
|
|
May 05 02:04:30 PM PDT 24 |
May 05 02:05:32 PM PDT 24 |
120292525 ps |
T558 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.726877642 |
|
|
May 05 02:01:48 PM PDT 24 |
May 05 02:04:23 PM PDT 24 |
6645000995 ps |
T559 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.4223773535 |
|
|
May 05 01:59:50 PM PDT 24 |
May 05 02:03:55 PM PDT 24 |
50651274879 ps |
T560 |
/workspace/coverage/default/32.sram_ctrl_stress_all.1496632959 |
|
|
May 05 02:03:11 PM PDT 24 |
May 05 02:36:18 PM PDT 24 |
413654464605 ps |
T561 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.2202044713 |
|
|
May 05 02:05:01 PM PDT 24 |
May 05 02:18:19 PM PDT 24 |
10100704619 ps |
T562 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.2947212394 |
|
|
May 05 01:59:29 PM PDT 24 |
May 05 02:03:02 PM PDT 24 |
9278100517 ps |
T563 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.2649387968 |
|
|
May 05 01:58:35 PM PDT 24 |
May 05 01:58:36 PM PDT 24 |
30181685 ps |
T564 |
/workspace/coverage/default/23.sram_ctrl_regwen.3143366398 |
|
|
May 05 02:01:01 PM PDT 24 |
May 05 02:18:48 PM PDT 24 |
78068552633 ps |
T565 |
/workspace/coverage/default/20.sram_ctrl_partial_access.1730957928 |
|
|
May 05 02:00:27 PM PDT 24 |
May 05 02:00:34 PM PDT 24 |
127962531 ps |
T566 |
/workspace/coverage/default/31.sram_ctrl_bijection.874158267 |
|
|
May 05 02:02:42 PM PDT 24 |
May 05 02:03:04 PM PDT 24 |
358328922 ps |
T567 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3306606299 |
|
|
May 05 02:06:44 PM PDT 24 |
May 05 02:15:44 PM PDT 24 |
20473136815 ps |
T568 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.3904819457 |
|
|
May 05 01:59:38 PM PDT 24 |
May 05 02:00:43 PM PDT 24 |
653455208 ps |
T569 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.3854290837 |
|
|
May 05 02:01:29 PM PDT 24 |
May 05 02:02:20 PM PDT 24 |
887850573 ps |
T570 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1374611702 |
|
|
May 05 01:59:13 PM PDT 24 |
May 05 02:12:45 PM PDT 24 |
11719864351 ps |
T571 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.66393274 |
|
|
May 05 01:58:50 PM PDT 24 |
May 05 02:04:45 PM PDT 24 |
58710183928 ps |
T572 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.2353343903 |
|
|
May 05 01:58:30 PM PDT 24 |
May 05 01:58:36 PM PDT 24 |
1727422070 ps |
T573 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.513979763 |
|
|
May 05 01:59:28 PM PDT 24 |
May 05 01:59:29 PM PDT 24 |
212759340 ps |
T574 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.147436084 |
|
|
May 05 02:04:06 PM PDT 24 |
May 05 02:18:45 PM PDT 24 |
14859177803 ps |
T575 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3243484013 |
|
|
May 05 01:59:08 PM PDT 24 |
May 05 01:59:20 PM PDT 24 |
1322523936 ps |
T576 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.2595092222 |
|
|
May 05 02:00:19 PM PDT 24 |
May 05 02:04:15 PM PDT 24 |
2679825690 ps |
T577 |
/workspace/coverage/default/19.sram_ctrl_executable.3248799647 |
|
|
May 05 02:00:18 PM PDT 24 |
May 05 02:21:25 PM PDT 24 |
24482272147 ps |
T578 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.370904738 |
|
|
May 05 02:03:23 PM PDT 24 |
May 05 02:12:46 PM PDT 24 |
99403163161 ps |
T579 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2122139266 |
|
|
May 05 02:03:53 PM PDT 24 |
May 05 02:07:46 PM PDT 24 |
3508283867 ps |
T580 |
/workspace/coverage/default/20.sram_ctrl_stress_all.1761695051 |
|
|
May 05 02:00:32 PM PDT 24 |
May 05 02:15:10 PM PDT 24 |
9205263051 ps |
T581 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.343764108 |
|
|
May 05 02:01:28 PM PDT 24 |
May 05 02:08:24 PM PDT 24 |
1971925715 ps |
T582 |
/workspace/coverage/default/27.sram_ctrl_executable.1560497234 |
|
|
May 05 02:01:50 PM PDT 24 |
May 05 02:04:21 PM PDT 24 |
1228842479 ps |
T583 |
/workspace/coverage/default/36.sram_ctrl_alert_test.590722867 |
|
|
May 05 02:03:58 PM PDT 24 |
May 05 02:03:59 PM PDT 24 |
15708941 ps |
T584 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.222647928 |
|
|
May 05 02:06:39 PM PDT 24 |
May 05 02:07:58 PM PDT 24 |
1816306991 ps |
T585 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2050453016 |
|
|
May 05 02:06:21 PM PDT 24 |
May 05 02:10:47 PM PDT 24 |
10680832436 ps |
T586 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.4001026957 |
|
|
May 05 02:01:37 PM PDT 24 |
May 05 02:15:40 PM PDT 24 |
15473458237 ps |
T587 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.4151742518 |
|
|
May 05 01:58:40 PM PDT 24 |
May 05 01:59:04 PM PDT 24 |
94845664 ps |
T588 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.2602303161 |
|
|
May 05 01:59:37 PM PDT 24 |
May 05 01:59:42 PM PDT 24 |
362521978 ps |
T589 |
/workspace/coverage/default/42.sram_ctrl_regwen.295551339 |
|
|
May 05 02:05:14 PM PDT 24 |
May 05 02:12:18 PM PDT 24 |
3900310382 ps |
T590 |
/workspace/coverage/default/38.sram_ctrl_alert_test.3046457716 |
|
|
May 05 02:04:24 PM PDT 24 |
May 05 02:04:25 PM PDT 24 |
40464398 ps |
T591 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.1166191094 |
|
|
May 05 02:06:53 PM PDT 24 |
May 05 02:08:35 PM PDT 24 |
141551204 ps |
T592 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.3001700623 |
|
|
May 05 02:04:06 PM PDT 24 |
May 05 02:05:38 PM PDT 24 |
696944869 ps |
T32 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.897150482 |
|
|
May 05 01:58:27 PM PDT 24 |
May 05 01:58:30 PM PDT 24 |
224203965 ps |
T593 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.4133554629 |
|
|
May 05 02:04:30 PM PDT 24 |
May 05 02:11:25 PM PDT 24 |
25094393116 ps |
T594 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.4281967580 |
|
|
May 05 02:06:41 PM PDT 24 |
May 05 02:10:42 PM PDT 24 |
2807997439 ps |
T595 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.844304548 |
|
|
May 05 01:59:38 PM PDT 24 |
May 05 02:05:42 PM PDT 24 |
2048221548 ps |
T596 |
/workspace/coverage/default/36.sram_ctrl_stress_all.2393308350 |
|
|
May 05 02:04:03 PM PDT 24 |
May 05 02:36:07 PM PDT 24 |
9887659022 ps |
T597 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.3487298226 |
|
|
May 05 02:00:53 PM PDT 24 |
May 05 02:07:34 PM PDT 24 |
8604681039 ps |
T598 |
/workspace/coverage/default/25.sram_ctrl_partial_access.1153695370 |
|
|
May 05 02:01:21 PM PDT 24 |
May 05 02:01:27 PM PDT 24 |
295995270 ps |
T599 |
/workspace/coverage/default/24.sram_ctrl_executable.3682242835 |
|
|
May 05 02:01:13 PM PDT 24 |
May 05 02:19:37 PM PDT 24 |
34125491270 ps |
T600 |
/workspace/coverage/default/6.sram_ctrl_stress_all.2632574858 |
|
|
May 05 01:58:55 PM PDT 24 |
May 05 02:40:44 PM PDT 24 |
35789626383 ps |
T601 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.2460302842 |
|
|
May 05 02:04:10 PM PDT 24 |
May 05 02:04:11 PM PDT 24 |
129692008 ps |
T602 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1292436651 |
|
|
May 05 02:01:39 PM PDT 24 |
May 05 02:09:51 PM PDT 24 |
93789274879 ps |
T603 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.2508589902 |
|
|
May 05 02:01:33 PM PDT 24 |
May 05 02:01:38 PM PDT 24 |
237553321 ps |
T604 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3672306058 |
|
|
May 05 02:05:57 PM PDT 24 |
May 05 02:14:49 PM PDT 24 |
25935731287 ps |
T33 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.1119201638 |
|
|
May 05 01:58:46 PM PDT 24 |
May 05 01:58:49 PM PDT 24 |
1137773368 ps |
T605 |
/workspace/coverage/default/6.sram_ctrl_smoke.212823369 |
|
|
May 05 01:58:54 PM PDT 24 |
May 05 01:59:08 PM PDT 24 |
2381024860 ps |
T606 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.2046216227 |
|
|
May 05 01:59:43 PM PDT 24 |
May 05 01:59:51 PM PDT 24 |
268877567 ps |
T607 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.1734977153 |
|
|
May 05 02:00:15 PM PDT 24 |
May 05 02:00:21 PM PDT 24 |
75748261 ps |
T608 |
/workspace/coverage/default/24.sram_ctrl_bijection.3046012995 |
|
|
May 05 02:01:07 PM PDT 24 |
May 05 02:01:29 PM PDT 24 |
2889366549 ps |
T609 |
/workspace/coverage/default/4.sram_ctrl_bijection.1852600009 |
|
|
May 05 01:58:45 PM PDT 24 |
May 05 01:59:56 PM PDT 24 |
10292358614 ps |
T610 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.1945837423 |
|
|
May 05 01:58:38 PM PDT 24 |
May 05 01:58:39 PM PDT 24 |
51573551 ps |
T611 |
/workspace/coverage/default/40.sram_ctrl_partial_access.2189351291 |
|
|
May 05 02:04:43 PM PDT 24 |
May 05 02:04:50 PM PDT 24 |
1140952072 ps |
T612 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.3113604235 |
|
|
May 05 02:00:47 PM PDT 24 |
May 05 02:01:47 PM PDT 24 |
1037540099 ps |
T613 |
/workspace/coverage/default/38.sram_ctrl_regwen.3915274739 |
|
|
May 05 02:04:19 PM PDT 24 |
May 05 02:16:49 PM PDT 24 |
21366310089 ps |
T104 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2658550626 |
|
|
May 05 02:03:11 PM PDT 24 |
May 05 02:03:22 PM PDT 24 |
1316528943 ps |
T614 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.3281334449 |
|
|
May 05 02:05:35 PM PDT 24 |
May 05 02:05:40 PM PDT 24 |
457387600 ps |
T615 |
/workspace/coverage/default/31.sram_ctrl_smoke.1283312057 |
|
|
May 05 02:02:44 PM PDT 24 |
May 05 02:03:30 PM PDT 24 |
149835047 ps |
T616 |
/workspace/coverage/default/23.sram_ctrl_smoke.877571999 |
|
|
May 05 02:00:56 PM PDT 24 |
May 05 02:01:06 PM PDT 24 |
2008934204 ps |
T617 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.1128754838 |
|
|
May 05 01:59:48 PM PDT 24 |
May 05 01:59:58 PM PDT 24 |
1333302017 ps |
T618 |
/workspace/coverage/default/44.sram_ctrl_regwen.1299790123 |
|
|
May 05 02:05:53 PM PDT 24 |
May 05 02:10:07 PM PDT 24 |
6636386547 ps |
T619 |
/workspace/coverage/default/10.sram_ctrl_smoke.2802854282 |
|
|
May 05 01:59:13 PM PDT 24 |
May 05 02:00:01 PM PDT 24 |
118695717 ps |
T620 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.660489045 |
|
|
May 05 02:05:58 PM PDT 24 |
May 05 02:06:00 PM PDT 24 |
86335443 ps |
T621 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.1800920362 |
|
|
May 05 02:01:08 PM PDT 24 |
May 05 02:05:02 PM PDT 24 |
5030996830 ps |
T622 |
/workspace/coverage/default/17.sram_ctrl_partial_access.3199066964 |
|
|
May 05 01:59:54 PM PDT 24 |
May 05 02:00:53 PM PDT 24 |
206636303 ps |
T623 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.446889863 |
|
|
May 05 02:05:44 PM PDT 24 |
May 05 02:06:36 PM PDT 24 |
404835668 ps |
T624 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.450751260 |
|
|
May 05 01:58:45 PM PDT 24 |
May 05 01:58:47 PM PDT 24 |
214731799 ps |
T625 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.4231304978 |
|
|
May 05 02:05:43 PM PDT 24 |
May 05 02:09:04 PM PDT 24 |
2060832512 ps |
T626 |
/workspace/coverage/default/2.sram_ctrl_alert_test.47827774 |
|
|
May 05 01:58:38 PM PDT 24 |
May 05 01:58:39 PM PDT 24 |
25755559 ps |
T627 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.3652599178 |
|
|
May 05 02:00:00 PM PDT 24 |
May 05 02:00:10 PM PDT 24 |
1653596310 ps |
T628 |
/workspace/coverage/default/39.sram_ctrl_executable.1763534101 |
|
|
May 05 02:04:34 PM PDT 24 |
May 05 02:33:40 PM PDT 24 |
150248267971 ps |
T629 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1844240939 |
|
|
May 05 01:59:03 PM PDT 24 |
May 05 02:05:13 PM PDT 24 |
25028346523 ps |
T630 |
/workspace/coverage/default/36.sram_ctrl_regwen.1824175769 |
|
|
May 05 02:03:52 PM PDT 24 |
May 05 02:13:45 PM PDT 24 |
9177628597 ps |
T105 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3963604485 |
|
|
May 05 01:58:51 PM PDT 24 |
May 05 01:59:44 PM PDT 24 |
6241300472 ps |
T631 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.643811343 |
|
|
May 05 02:03:45 PM PDT 24 |
May 05 02:14:14 PM PDT 24 |
2176567256 ps |
T632 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.407846805 |
|
|
May 05 02:04:35 PM PDT 24 |
May 05 02:04:36 PM PDT 24 |
26984769 ps |
T633 |
/workspace/coverage/default/27.sram_ctrl_stress_all.3786416749 |
|
|
May 05 02:01:54 PM PDT 24 |
May 05 02:32:12 PM PDT 24 |
41716502190 ps |
T634 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1505459655 |
|
|
May 05 01:58:25 PM PDT 24 |
May 05 02:04:24 PM PDT 24 |
1204010745 ps |
T635 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.2165734121 |
|
|
May 05 01:59:07 PM PDT 24 |
May 05 01:59:17 PM PDT 24 |
131738062 ps |
T636 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.700000572 |
|
|
May 05 02:00:53 PM PDT 24 |
May 05 02:00:54 PM PDT 24 |
30509861 ps |
T637 |
/workspace/coverage/default/8.sram_ctrl_smoke.3808437329 |
|
|
May 05 01:58:57 PM PDT 24 |
May 05 01:59:06 PM PDT 24 |
417240332 ps |
T638 |
/workspace/coverage/default/30.sram_ctrl_executable.1241002500 |
|
|
May 05 02:02:33 PM PDT 24 |
May 05 02:17:26 PM PDT 24 |
2363870219 ps |
T639 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3466543545 |
|
|
May 05 02:06:26 PM PDT 24 |
May 05 02:06:37 PM PDT 24 |
3101133863 ps |
T640 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.2482001393 |
|
|
May 05 02:04:18 PM PDT 24 |
May 05 02:09:41 PM PDT 24 |
3808901736 ps |
T641 |
/workspace/coverage/default/29.sram_ctrl_bijection.560297103 |
|
|
May 05 02:02:11 PM PDT 24 |
May 05 02:02:48 PM PDT 24 |
2541515580 ps |
T642 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.301319415 |
|
|
May 05 01:58:40 PM PDT 24 |
May 05 02:00:51 PM PDT 24 |
13190429978 ps |
T643 |
/workspace/coverage/default/48.sram_ctrl_executable.3125501442 |
|
|
May 05 02:06:44 PM PDT 24 |
May 05 02:12:49 PM PDT 24 |
24848178301 ps |
T644 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.591199401 |
|
|
May 05 02:06:07 PM PDT 24 |
May 05 02:06:23 PM PDT 24 |
436995671 ps |
T645 |
/workspace/coverage/default/22.sram_ctrl_bijection.1664691185 |
|
|
May 05 02:00:46 PM PDT 24 |
May 05 02:01:09 PM PDT 24 |
5253380902 ps |
T646 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.4062856376 |
|
|
May 05 02:02:07 PM PDT 24 |
May 05 02:11:48 PM PDT 24 |
7988792141 ps |
T647 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3460470235 |
|
|
May 05 01:59:08 PM PDT 24 |
May 05 01:59:19 PM PDT 24 |
237999806 ps |
T648 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.1450242591 |
|
|
May 05 02:03:10 PM PDT 24 |
May 05 02:05:44 PM PDT 24 |
9978694130 ps |
T649 |
/workspace/coverage/default/9.sram_ctrl_executable.1584937794 |
|
|
May 05 01:59:07 PM PDT 24 |
May 05 02:00:45 PM PDT 24 |
4210887148 ps |
T650 |
/workspace/coverage/default/43.sram_ctrl_stress_all.2811610555 |
|
|
May 05 02:05:35 PM PDT 24 |
May 05 02:45:46 PM PDT 24 |
220902453788 ps |
T651 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.26998138 |
|
|
May 05 02:01:42 PM PDT 24 |
May 05 02:01:43 PM PDT 24 |
85498823 ps |
T652 |
/workspace/coverage/default/39.sram_ctrl_alert_test.2775563746 |
|
|
May 05 02:04:41 PM PDT 24 |
May 05 02:04:42 PM PDT 24 |
31958858 ps |
T653 |
/workspace/coverage/default/38.sram_ctrl_stress_all.4251901959 |
|
|
May 05 02:04:29 PM PDT 24 |
May 05 02:48:07 PM PDT 24 |
8516151034 ps |
T654 |
/workspace/coverage/default/7.sram_ctrl_executable.1423157943 |
|
|
May 05 01:58:58 PM PDT 24 |
May 05 02:14:28 PM PDT 24 |
2619009619 ps |
T655 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.2880300792 |
|
|
May 05 02:01:01 PM PDT 24 |
May 05 02:01:11 PM PDT 24 |
2230132247 ps |
T656 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.941950402 |
|
|
May 05 02:03:13 PM PDT 24 |
May 05 02:04:51 PM PDT 24 |
841605899 ps |
T657 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.2475609514 |
|
|
May 05 02:01:11 PM PDT 24 |
May 05 02:01:18 PM PDT 24 |
112356529 ps |
T658 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2412989709 |
|
|
May 05 01:59:36 PM PDT 24 |
May 05 02:03:36 PM PDT 24 |
10167419132 ps |
T659 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.65962530 |
|
|
May 05 02:01:27 PM PDT 24 |
May 05 02:01:34 PM PDT 24 |
1624766785 ps |
T660 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.129172685 |
|
|
May 05 01:59:41 PM PDT 24 |
May 05 02:15:41 PM PDT 24 |
11340663608 ps |
T661 |
/workspace/coverage/default/21.sram_ctrl_stress_all.4047012277 |
|
|
May 05 02:00:42 PM PDT 24 |
May 05 02:23:10 PM PDT 24 |
108529549788 ps |
T662 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2954158267 |
|
|
May 05 02:02:17 PM PDT 24 |
May 05 02:02:19 PM PDT 24 |
89335838 ps |
T663 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1205514959 |
|
|
May 05 02:00:10 PM PDT 24 |
May 05 02:03:24 PM PDT 24 |
50345930557 ps |
T664 |
/workspace/coverage/default/44.sram_ctrl_alert_test.1953168089 |
|
|
May 05 02:05:57 PM PDT 24 |
May 05 02:05:58 PM PDT 24 |
15755218 ps |
T665 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.435160215 |
|
|
May 05 02:02:04 PM PDT 24 |
May 05 02:02:05 PM PDT 24 |
118175063 ps |
T666 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.951126286 |
|
|
May 05 02:00:18 PM PDT 24 |
May 05 02:04:59 PM PDT 24 |
12108997909 ps |
T667 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.380959590 |
|
|
May 05 02:01:52 PM PDT 24 |
May 05 02:01:55 PM PDT 24 |
53985012 ps |
T106 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2430367546 |
|
|
May 05 02:06:18 PM PDT 24 |
May 05 02:06:26 PM PDT 24 |
242644760 ps |
T107 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.552495462 |
|
|
May 05 01:59:24 PM PDT 24 |
May 05 02:00:16 PM PDT 24 |
1064119021 ps |
T668 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.3226623098 |
|
|
May 05 02:05:03 PM PDT 24 |
May 05 02:05:07 PM PDT 24 |
2479877159 ps |
T669 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1310650331 |
|
|
May 05 02:05:44 PM PDT 24 |
May 05 02:08:54 PM PDT 24 |
2769729620 ps |
T670 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3210073578 |
|
|
May 05 01:59:03 PM PDT 24 |
May 05 02:03:08 PM PDT 24 |
1219033715 ps |
T671 |
/workspace/coverage/default/9.sram_ctrl_regwen.156139293 |
|
|
May 05 01:59:07 PM PDT 24 |
May 05 02:16:57 PM PDT 24 |
31469983355 ps |
T672 |
/workspace/coverage/default/5.sram_ctrl_smoke.1596783657 |
|
|
May 05 01:58:44 PM PDT 24 |
May 05 01:58:52 PM PDT 24 |
123776504 ps |
T673 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.611714536 |
|
|
May 05 02:00:56 PM PDT 24 |
May 05 02:04:06 PM PDT 24 |
8717593528 ps |
T674 |
/workspace/coverage/default/48.sram_ctrl_partial_access.3292776917 |
|
|
May 05 02:06:40 PM PDT 24 |
May 05 02:06:53 PM PDT 24 |
2417946641 ps |
T675 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.785623520 |
|
|
May 05 02:03:13 PM PDT 24 |
May 05 02:03:22 PM PDT 24 |
1675765722 ps |
T676 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2302905210 |
|
|
May 05 01:59:04 PM PDT 24 |
May 05 01:59:07 PM PDT 24 |
513458661 ps |
T677 |
/workspace/coverage/default/48.sram_ctrl_regwen.1013368003 |
|
|
May 05 02:06:44 PM PDT 24 |
May 05 02:30:03 PM PDT 24 |
17100301324 ps |
T678 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3380511420 |
|
|
May 05 02:07:00 PM PDT 24 |
May 05 02:07:06 PM PDT 24 |
152503035 ps |
T679 |
/workspace/coverage/default/21.sram_ctrl_alert_test.1491827730 |
|
|
May 05 02:00:42 PM PDT 24 |
May 05 02:00:43 PM PDT 24 |
41436757 ps |
T680 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.2229878851 |
|
|
May 05 02:02:46 PM PDT 24 |
May 05 02:06:12 PM PDT 24 |
2613860799 ps |
T681 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.84434302 |
|
|
May 05 01:58:56 PM PDT 24 |
May 05 02:09:50 PM PDT 24 |
7198051017 ps |
T682 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2023174269 |
|
|
May 05 01:59:09 PM PDT 24 |
May 05 01:59:13 PM PDT 24 |
287149420 ps |
T683 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2031569960 |
|
|
May 05 01:59:51 PM PDT 24 |
May 05 01:59:55 PM PDT 24 |
183789904 ps |
T684 |
/workspace/coverage/default/2.sram_ctrl_smoke.1413684308 |
|
|
May 05 01:58:29 PM PDT 24 |
May 05 01:58:39 PM PDT 24 |
5169942389 ps |
T685 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3397339907 |
|
|
May 05 01:59:08 PM PDT 24 |
May 05 01:59:09 PM PDT 24 |
29194184 ps |
T686 |
/workspace/coverage/default/18.sram_ctrl_smoke.1964053348 |
|
|
May 05 02:00:06 PM PDT 24 |
May 05 02:00:22 PM PDT 24 |
3120452670 ps |
T687 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2852918785 |
|
|
May 05 02:04:46 PM PDT 24 |
May 05 02:10:12 PM PDT 24 |
30246945773 ps |
T688 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.1494379106 |
|
|
May 05 02:00:00 PM PDT 24 |
May 05 02:00:01 PM PDT 24 |
53792980 ps |
T689 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.4007880170 |
|
|
May 05 02:04:48 PM PDT 24 |
May 05 02:04:58 PM PDT 24 |
5890105014 ps |
T690 |
/workspace/coverage/default/43.sram_ctrl_executable.1771292408 |
|
|
May 05 02:05:34 PM PDT 24 |
May 05 02:27:24 PM PDT 24 |
6428640464 ps |
T691 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.4027720539 |
|
|
May 05 02:00:01 PM PDT 24 |
May 05 02:01:29 PM PDT 24 |
2110749139 ps |
T692 |
/workspace/coverage/default/39.sram_ctrl_bijection.2928210821 |
|
|
May 05 02:04:29 PM PDT 24 |
May 05 02:05:36 PM PDT 24 |
7182159169 ps |
T693 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.4035423075 |
|
|
May 05 01:58:31 PM PDT 24 |
May 05 01:58:32 PM PDT 24 |
31362697 ps |
T694 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1843827487 |
|
|
May 05 02:04:48 PM PDT 24 |
May 05 02:06:10 PM PDT 24 |
623481094 ps |
T695 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.873035072 |
|
|
May 05 01:58:54 PM PDT 24 |
May 05 01:58:59 PM PDT 24 |
152684952 ps |
T696 |
/workspace/coverage/default/11.sram_ctrl_bijection.934974003 |
|
|
May 05 01:59:21 PM PDT 24 |
May 05 01:59:57 PM PDT 24 |
14509930510 ps |
T697 |
/workspace/coverage/default/30.sram_ctrl_stress_all.1104031990 |
|
|
May 05 02:02:37 PM PDT 24 |
May 05 02:22:13 PM PDT 24 |
9080222211 ps |
T698 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.876912392 |
|
|
May 05 01:58:49 PM PDT 24 |
May 05 02:01:40 PM PDT 24 |
28389843810 ps |
T699 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3769566921 |
|
|
May 05 01:59:23 PM PDT 24 |
May 05 01:59:30 PM PDT 24 |
2187507994 ps |
T700 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.4162845859 |
|
|
May 05 02:00:27 PM PDT 24 |
May 05 02:01:08 PM PDT 24 |
113119414 ps |
T701 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.774386857 |
|
|
May 05 01:59:45 PM PDT 24 |
May 05 01:59:49 PM PDT 24 |
364824099 ps |
T702 |
/workspace/coverage/default/17.sram_ctrl_smoke.487629132 |
|
|
May 05 01:59:55 PM PDT 24 |
May 05 02:00:02 PM PDT 24 |
318975934 ps |
T703 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2788284127 |
|
|
May 05 01:59:14 PM PDT 24 |
May 05 01:59:15 PM PDT 24 |
124544344 ps |
T704 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1322920186 |
|
|
May 05 01:58:23 PM PDT 24 |
May 05 02:01:45 PM PDT 24 |
2150372760 ps |
T705 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.479299402 |
|
|
May 05 01:58:34 PM PDT 24 |
May 05 01:58:40 PM PDT 24 |
517498990 ps |
T706 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.891984023 |
|
|
May 05 01:58:49 PM PDT 24 |
May 05 02:01:06 PM PDT 24 |
614214803 ps |
T707 |
/workspace/coverage/default/18.sram_ctrl_partial_access.2885444390 |
|
|
May 05 02:00:05 PM PDT 24 |
May 05 02:00:06 PM PDT 24 |
35307262 ps |
T708 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.371274664 |
|
|
May 05 02:02:23 PM PDT 24 |
May 05 02:02:28 PM PDT 24 |
293993641 ps |
T709 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.1680556450 |
|
|
May 05 02:00:26 PM PDT 24 |
May 05 02:05:03 PM PDT 24 |
50620472763 ps |
T710 |
/workspace/coverage/default/37.sram_ctrl_smoke.775272061 |
|
|
May 05 02:04:02 PM PDT 24 |
May 05 02:06:03 PM PDT 24 |
693244093 ps |
T711 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2184678869 |
|
|
May 05 02:06:17 PM PDT 24 |
May 05 02:25:51 PM PDT 24 |
28448478021 ps |
T712 |
/workspace/coverage/default/49.sram_ctrl_executable.3785316442 |
|
|
May 05 02:07:00 PM PDT 24 |
May 05 02:18:04 PM PDT 24 |
10896896419 ps |
T713 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.228329919 |
|
|
May 05 02:06:39 PM PDT 24 |
May 05 02:15:05 PM PDT 24 |
1461403316 ps |
T714 |
/workspace/coverage/default/44.sram_ctrl_smoke.3263877452 |
|
|
May 05 02:05:38 PM PDT 24 |
May 05 02:05:47 PM PDT 24 |
73876464 ps |
T715 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3972581431 |
|
|
May 05 02:06:30 PM PDT 24 |
May 05 02:19:20 PM PDT 24 |
26301864416 ps |
T716 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.3400558022 |
|
|
May 05 02:00:21 PM PDT 24 |
May 05 02:00:22 PM PDT 24 |
76033536 ps |
T717 |
/workspace/coverage/default/47.sram_ctrl_stress_all.4038121089 |
|
|
May 05 02:06:38 PM PDT 24 |
May 05 02:24:36 PM PDT 24 |
37273291273 ps |
T718 |
/workspace/coverage/default/39.sram_ctrl_stress_all.1297729449 |
|
|
May 05 02:04:41 PM PDT 24 |
May 05 02:19:44 PM PDT 24 |
100323071177 ps |
T719 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.2601578634 |
|
|
May 05 02:04:23 PM PDT 24 |
May 05 02:05:21 PM PDT 24 |
439563731 ps |
T720 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.3144095340 |
|
|
May 05 02:00:46 PM PDT 24 |
May 05 02:21:19 PM PDT 24 |
156692275268 ps |
T721 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2846823628 |
|
|
May 05 01:59:22 PM PDT 24 |
May 05 02:06:54 PM PDT 24 |
213065345975 ps |
T722 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3642235846 |
|
|
May 05 02:06:44 PM PDT 24 |
May 05 02:06:47 PM PDT 24 |
77419543 ps |
T723 |
/workspace/coverage/default/2.sram_ctrl_bijection.2206969271 |
|
|
May 05 01:58:29 PM PDT 24 |
May 05 01:58:50 PM PDT 24 |
626028036 ps |
T724 |
/workspace/coverage/default/38.sram_ctrl_smoke.887165186 |
|
|
May 05 02:04:14 PM PDT 24 |
May 05 02:04:32 PM PDT 24 |
2190903979 ps |
T725 |
/workspace/coverage/default/8.sram_ctrl_bijection.300954662 |
|
|
May 05 01:58:58 PM PDT 24 |
May 05 02:00:05 PM PDT 24 |
1111931056 ps |
T726 |
/workspace/coverage/default/17.sram_ctrl_stress_all.3695992387 |
|
|
May 05 01:59:59 PM PDT 24 |
May 05 02:37:14 PM PDT 24 |
87485851389 ps |
T727 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.93456485 |
|
|
May 05 02:02:44 PM PDT 24 |
May 05 02:14:04 PM PDT 24 |
51358886713 ps |
T728 |
/workspace/coverage/default/26.sram_ctrl_smoke.2575439483 |
|
|
May 05 02:01:33 PM PDT 24 |
May 05 02:01:50 PM PDT 24 |
1099033404 ps |
T729 |
/workspace/coverage/default/24.sram_ctrl_partial_access.1151946248 |
|
|
May 05 02:01:12 PM PDT 24 |
May 05 02:01:27 PM PDT 24 |
270943461 ps |
T730 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.458451004 |
|
|
May 05 02:03:43 PM PDT 24 |
May 05 02:17:55 PM PDT 24 |
9518863574 ps |
T731 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.2276883088 |
|
|
May 05 02:04:19 PM PDT 24 |
May 05 02:04:25 PM PDT 24 |
3030983035 ps |
T732 |
/workspace/coverage/default/41.sram_ctrl_regwen.2240740882 |
|
|
May 05 02:05:03 PM PDT 24 |
May 05 02:07:37 PM PDT 24 |
3635686015 ps |
T733 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.1761695946 |
|
|
May 05 02:00:17 PM PDT 24 |
May 05 02:01:10 PM PDT 24 |
551648542 ps |
T734 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.1136327417 |
|
|
May 05 02:00:46 PM PDT 24 |
May 05 02:01:05 PM PDT 24 |
335103375 ps |
T735 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.53843819 |
|
|
May 05 01:58:53 PM PDT 24 |
May 05 01:59:44 PM PDT 24 |
138477752 ps |
T736 |
/workspace/coverage/default/24.sram_ctrl_stress_all.183303072 |
|
|
May 05 02:01:19 PM PDT 24 |
May 05 03:03:27 PM PDT 24 |
224453920305 ps |
T737 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.3430492766 |
|
|
May 05 02:02:22 PM PDT 24 |
May 05 02:18:02 PM PDT 24 |
47467274086 ps |
T738 |
/workspace/coverage/default/16.sram_ctrl_regwen.2173822018 |
|
|
May 05 01:59:51 PM PDT 24 |
May 05 02:07:28 PM PDT 24 |
25206392568 ps |
T739 |
/workspace/coverage/default/25.sram_ctrl_bijection.2234451466 |
|
|
May 05 02:01:21 PM PDT 24 |
May 05 02:02:12 PM PDT 24 |
4627499969 ps |
T740 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.44173936 |
|
|
May 05 02:02:31 PM PDT 24 |
May 05 02:14:58 PM PDT 24 |
25406969883 ps |
T741 |
/workspace/coverage/default/17.sram_ctrl_alert_test.1022342577 |
|
|
May 05 02:00:04 PM PDT 24 |
May 05 02:00:05 PM PDT 24 |
49608185 ps |
T742 |
/workspace/coverage/default/42.sram_ctrl_stress_all.3341073676 |
|
|
May 05 02:05:20 PM PDT 24 |
May 05 02:28:01 PM PDT 24 |
29262893196 ps |
T743 |
/workspace/coverage/default/5.sram_ctrl_bijection.2149783525 |
|
|
May 05 01:58:45 PM PDT 24 |
May 05 01:59:13 PM PDT 24 |
1723364431 ps |
T744 |
/workspace/coverage/default/31.sram_ctrl_regwen.4135736607 |
|
|
May 05 02:02:46 PM PDT 24 |
May 05 02:24:43 PM PDT 24 |
16619776108 ps |
T745 |
/workspace/coverage/default/12.sram_ctrl_smoke.2859464205 |
|
|
May 05 01:59:22 PM PDT 24 |
May 05 01:59:37 PM PDT 24 |
147196893 ps |
T746 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2546072760 |
|
|
May 05 01:58:26 PM PDT 24 |
May 05 02:49:29 PM PDT 24 |
15526979675 ps |
T747 |
/workspace/coverage/default/46.sram_ctrl_stress_all.609903021 |
|
|
May 05 02:06:18 PM PDT 24 |
May 05 02:42:01 PM PDT 24 |
33204820861 ps |
T748 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.1401938025 |
|
|
May 05 02:05:36 PM PDT 24 |
May 05 02:05:39 PM PDT 24 |
182936250 ps |
T749 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.3376284857 |
|
|
May 05 02:02:26 PM PDT 24 |
May 05 02:02:35 PM PDT 24 |
334584922 ps |
T750 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.3297825581 |
|
|
May 05 01:59:37 PM PDT 24 |
May 05 02:02:58 PM PDT 24 |
19427327864 ps |
T751 |
/workspace/coverage/default/6.sram_ctrl_executable.2526009963 |
|
|
May 05 01:58:53 PM PDT 24 |
May 05 02:17:29 PM PDT 24 |
61892316521 ps |
T752 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.2284738837 |
|
|
May 05 02:00:41 PM PDT 24 |
May 05 02:00:44 PM PDT 24 |
415173473 ps |
T753 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.1118738617 |
|
|
May 05 02:02:57 PM PDT 24 |
May 05 02:35:16 PM PDT 24 |
38550002338 ps |
T754 |
/workspace/coverage/default/46.sram_ctrl_executable.1852420705 |
|
|
May 05 02:06:11 PM PDT 24 |
May 05 02:09:25 PM PDT 24 |
2582040278 ps |
T755 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.2927958809 |
|
|
May 05 01:58:44 PM PDT 24 |
May 05 02:03:53 PM PDT 24 |
8354321828 ps |
T756 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1392886418 |
|
|
May 05 01:59:12 PM PDT 24 |
May 05 02:01:50 PM PDT 24 |
22687543694 ps |
T757 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.3643520394 |
|
|
May 05 01:58:34 PM PDT 24 |
May 05 01:58:39 PM PDT 24 |
576937557 ps |
T758 |
/workspace/coverage/default/10.sram_ctrl_partial_access.909245795 |
|
|
May 05 01:59:15 PM PDT 24 |
May 05 01:59:30 PM PDT 24 |
3111246326 ps |
T759 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.871208310 |
|
|
May 05 01:59:26 PM PDT 24 |
May 05 01:59:35 PM PDT 24 |
1912305029 ps |
T760 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.4285440863 |
|
|
May 05 01:59:32 PM PDT 24 |
May 05 02:04:33 PM PDT 24 |
26111366214 ps |
T761 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.639606522 |
|
|
May 05 02:06:08 PM PDT 24 |
May 05 02:25:03 PM PDT 24 |
74167914943 ps |
T762 |
/workspace/coverage/default/6.sram_ctrl_bijection.1748957010 |
|
|
May 05 01:58:51 PM PDT 24 |
May 05 01:59:52 PM PDT 24 |
4129127539 ps |
T763 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1993033851 |
|
|
May 05 01:59:17 PM PDT 24 |
May 05 01:59:55 PM PDT 24 |
115960845 ps |
T764 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1073822336 |
|
|
May 05 02:06:00 PM PDT 24 |
May 05 02:11:38 PM PDT 24 |
3155579473 ps |
T765 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.1465498381 |
|
|
May 05 01:59:19 PM PDT 24 |
May 05 01:59:29 PM PDT 24 |
473268626 ps |
T766 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.4278159612 |
|
|
May 05 01:59:27 PM PDT 24 |
May 05 01:59:32 PM PDT 24 |
77036692 ps |
T767 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2573350968 |
|
|
May 05 01:58:54 PM PDT 24 |
May 05 01:58:56 PM PDT 24 |
50770706 ps |
T768 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.1003591973 |
|
|
May 05 02:00:53 PM PDT 24 |
May 05 02:00:59 PM PDT 24 |
943186323 ps |
T769 |
/workspace/coverage/default/45.sram_ctrl_executable.2305699720 |
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|
May 05 02:06:02 PM PDT 24 |
May 05 02:22:57 PM PDT 24 |
25600472796 ps |
T770 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.641703422 |
|
|
May 05 02:01:19 PM PDT 24 |
May 05 02:01:24 PM PDT 24 |
85118254 ps |
T771 |
/workspace/coverage/default/1.sram_ctrl_executable.2975670477 |
|
|
May 05 01:58:27 PM PDT 24 |
May 05 02:17:56 PM PDT 24 |
2698823573 ps |
T772 |
/workspace/coverage/default/30.sram_ctrl_partial_access.1432985701 |
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|
May 05 02:02:26 PM PDT 24 |
May 05 02:02:59 PM PDT 24 |
1403623970 ps |
T773 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.1141053436 |
|
|
May 05 02:00:37 PM PDT 24 |
May 05 02:00:41 PM PDT 24 |
1229129467 ps |
T774 |
/workspace/coverage/default/43.sram_ctrl_smoke.1766917616 |
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|
May 05 02:05:24 PM PDT 24 |
May 05 02:05:30 PM PDT 24 |
742529051 ps |
T775 |
/workspace/coverage/default/26.sram_ctrl_stress_all.748070409 |
|
|
May 05 02:01:42 PM PDT 24 |
May 05 02:56:25 PM PDT 24 |
63370896621 ps |
T776 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.1537910429 |
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|
May 05 02:05:19 PM PDT 24 |
May 05 02:05:21 PM PDT 24 |
78157717 ps |
T777 |
/workspace/coverage/default/34.sram_ctrl_executable.550071811 |
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|
May 05 02:03:26 PM PDT 24 |
May 05 02:20:52 PM PDT 24 |
15186777859 ps |
T778 |
/workspace/coverage/default/39.sram_ctrl_partial_access.1149316727 |
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|
May 05 02:04:34 PM PDT 24 |
May 05 02:04:46 PM PDT 24 |
1506301837 ps |
T779 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.1501916746 |
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|
May 05 02:03:59 PM PDT 24 |
May 05 02:06:07 PM PDT 24 |
1383517875 ps |
T780 |
/workspace/coverage/default/27.sram_ctrl_smoke.3560936195 |
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|
May 05 02:01:42 PM PDT 24 |
May 05 02:01:44 PM PDT 24 |
332500119 ps |
T781 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.1768349499 |
|
|
May 05 02:00:46 PM PDT 24 |
May 05 02:08:59 PM PDT 24 |
19018365014 ps |
T782 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.2343922326 |
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|
May 05 01:59:54 PM PDT 24 |
May 05 02:02:37 PM PDT 24 |
19902698714 ps |
T783 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.1457267681 |
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|
May 05 02:00:18 PM PDT 24 |
May 05 02:13:42 PM PDT 24 |
3633507998 ps |
T784 |
/workspace/coverage/default/28.sram_ctrl_executable.3642534374 |
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|
May 05 02:02:02 PM PDT 24 |
May 05 02:15:07 PM PDT 24 |
10470205056 ps |
T785 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.1409991529 |
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|
May 05 01:58:45 PM PDT 24 |
May 05 01:58:50 PM PDT 24 |
134795080 ps |
T786 |
/workspace/coverage/default/10.sram_ctrl_executable.4004434402 |
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|
May 05 01:59:15 PM PDT 24 |
May 05 02:10:26 PM PDT 24 |
10723391950 ps |
T787 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.1833170482 |
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|
May 05 02:02:16 PM PDT 24 |
May 05 02:02:22 PM PDT 24 |
1466952550 ps |
T788 |
/workspace/coverage/default/3.sram_ctrl_executable.3727680739 |
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|
May 05 01:58:40 PM PDT 24 |
May 05 02:28:24 PM PDT 24 |
20446666832 ps |
T789 |
/workspace/coverage/default/0.sram_ctrl_partial_access.425903308 |
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|
May 05 01:58:25 PM PDT 24 |
May 05 01:58:30 PM PDT 24 |
50079951 ps |
T790 |
/workspace/coverage/default/7.sram_ctrl_regwen.3812436743 |
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|
May 05 01:59:01 PM PDT 24 |
May 05 01:59:31 PM PDT 24 |
501931352 ps |
T791 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1701542638 |
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|
May 05 01:58:29 PM PDT 24 |
May 05 01:59:23 PM PDT 24 |
1073280452 ps |
T792 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3247448554 |
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|
May 05 01:58:52 PM PDT 24 |
May 05 02:00:45 PM PDT 24 |
4843406710 ps |
T793 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.1718752085 |
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|
May 05 02:03:23 PM PDT 24 |
May 05 02:03:38 PM PDT 24 |
242006840 ps |
T794 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.2278002867 |
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|
May 05 02:00:00 PM PDT 24 |
May 05 02:00:04 PM PDT 24 |
217637555 ps |
T795 |
/workspace/coverage/default/32.sram_ctrl_partial_access.2866978457 |
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|
May 05 02:02:57 PM PDT 24 |
May 05 02:03:13 PM PDT 24 |
940959417 ps |