| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.277407987 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3412301196 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.952751732 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2216706476 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3985577954 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2891210130 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.945893834 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3762729907 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.470933954 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1189687924 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1372218666 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1189403821 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3473643762 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3787241981 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3996620869 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3258351501 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2345505909 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2595511359 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1798629502 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3482284230 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1748546376 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.512627875 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1030701251 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1913697665 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3471982869 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1351089996 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2714066040 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1605175996 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.34383972 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2949102782 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3293915727 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3725120148 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3932423109 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1624203998 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1170303379 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2417457778 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.4009845229 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1688636131 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3387736368 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.71128020 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1216216976 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.861725327 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2945173765 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2749948824 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1739453288 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1181324415 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.308552180 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.163125260 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.286128212 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.280740544 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1497558673 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.756028851 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.293540425 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.210728136 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2114518194 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.91621171 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3831800365 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2378895132 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3668532947 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1424368473 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2645092641 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1651351100 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.938399454 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1711986291 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.396021061 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.564942151 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3322128872 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.810119119 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1811132005 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2590792385 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2559955846 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.835860103 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3830877876 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3463452107 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2216244649 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1721035796 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2686554237 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2698710043 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1722615384 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1569393067 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1841296469 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1072892643 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1668718294 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.4213131438 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.513721016 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3655072369 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2527923727 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.715534998 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1584351930 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3251710347 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1408523538 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2427580435 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1451050474 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2044337851 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.260217058 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.44960908 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2128102621 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.83010127 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3081622070 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2012750194 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3106053934 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2227842985 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2080763303 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3195060783 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2091664453 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.873698198 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3083219091 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.273207257 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3218144232 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.1944378434 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.148449765 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1033532017 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.4047471145 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1765326174 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2208879480 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.935323206 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1157444467 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2669101343 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.613180095 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3469085981 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2964560368 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2191011447 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3122405533 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3214570565 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2004343349 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.196095972 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2241334122 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2015336100 |
| /workspace/coverage/default/0.sram_ctrl_access_during_key_req.3508909913 |
| /workspace/coverage/default/0.sram_ctrl_alert_test.3877348690 |
| /workspace/coverage/default/0.sram_ctrl_bijection.3554454183 |
| /workspace/coverage/default/0.sram_ctrl_executable.2828568812 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.2660160588 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.2623473930 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.104265100 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.2224327520 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.3467210596 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.3654220728 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.577788643 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.2628105143 |
| /workspace/coverage/default/0.sram_ctrl_regwen.670053935 |
| /workspace/coverage/default/0.sram_ctrl_sec_cm.1570153065 |
| /workspace/coverage/default/0.sram_ctrl_smoke.363607273 |
| /workspace/coverage/default/0.sram_ctrl_stress_all.2262033380 |
| /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1065413257 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.1260127463 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.133592411 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.4214294244 |
| /workspace/coverage/default/1.sram_ctrl_alert_test.3180778656 |
| /workspace/coverage/default/1.sram_ctrl_bijection.1516147407 |
| /workspace/coverage/default/1.sram_ctrl_executable.1164818193 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.883760908 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.3341977211 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.2726372891 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.3836190930 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.979197465 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.2317129314 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1986615768 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.1260432208 |
| /workspace/coverage/default/1.sram_ctrl_regwen.2753546728 |
| /workspace/coverage/default/1.sram_ctrl_sec_cm.3965688283 |
| /workspace/coverage/default/1.sram_ctrl_smoke.1263378308 |
| /workspace/coverage/default/1.sram_ctrl_stress_all.2453369950 |
| /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1935544291 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.153208641 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3136942425 |
| /workspace/coverage/default/10.sram_ctrl_access_during_key_req.314387711 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.669203952 |
| /workspace/coverage/default/10.sram_ctrl_bijection.119202655 |
| /workspace/coverage/default/10.sram_ctrl_executable.2699379225 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.3223500699 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.137929003 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.2493035878 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.2953181652 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.2337826500 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.3686268619 |
| /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2921832905 |
| /workspace/coverage/default/10.sram_ctrl_regwen.1286876526 |
| /workspace/coverage/default/10.sram_ctrl_smoke.388970294 |
| /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2767098040 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.463285479 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3044630 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.456388597 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.3308193971 |
| /workspace/coverage/default/11.sram_ctrl_bijection.3821312574 |
| /workspace/coverage/default/11.sram_ctrl_executable.2640505861 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.2722875266 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.691916940 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.2424297065 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.3387870188 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.2910385751 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.3459862682 |
| /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3644568397 |
| /workspace/coverage/default/11.sram_ctrl_ram_cfg.823384119 |
| /workspace/coverage/default/11.sram_ctrl_regwen.3882684873 |
| /workspace/coverage/default/11.sram_ctrl_smoke.2741530241 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2627853088 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1814348007 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3988697569 |
| /workspace/coverage/default/12.sram_ctrl_access_during_key_req.2079100343 |
| /workspace/coverage/default/12.sram_ctrl_alert_test.1035594135 |
| /workspace/coverage/default/12.sram_ctrl_bijection.1521193878 |
| /workspace/coverage/default/12.sram_ctrl_executable.521358 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.2216410043 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.1026188479 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.1494177899 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.1650936931 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.739293490 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.3165624057 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3390663193 |
| /workspace/coverage/default/12.sram_ctrl_ram_cfg.3354122865 |
| /workspace/coverage/default/12.sram_ctrl_regwen.3310788383 |
| /workspace/coverage/default/12.sram_ctrl_smoke.2149028747 |
| /workspace/coverage/default/12.sram_ctrl_stress_all.92227918 |
| /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.487270359 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.1315113434 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.950662082 |
| /workspace/coverage/default/13.sram_ctrl_access_during_key_req.343657295 |
| /workspace/coverage/default/13.sram_ctrl_alert_test.1653418997 |
| /workspace/coverage/default/13.sram_ctrl_bijection.2158277371 |
| /workspace/coverage/default/13.sram_ctrl_executable.3229719348 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.2860644496 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.500232157 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.1295793563 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.2710097747 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.1271346678 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.3667393530 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.4214569067 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.736905324 |
| /workspace/coverage/default/13.sram_ctrl_regwen.4151186898 |
| /workspace/coverage/default/13.sram_ctrl_smoke.3226209379 |
| /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3178326970 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.2577569745 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.4195358399 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.2994740596 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.1537171557 |
| /workspace/coverage/default/14.sram_ctrl_bijection.2606704246 |
| /workspace/coverage/default/14.sram_ctrl_executable.2371532929 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.2551373474 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.1075525301 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.2157262971 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.811676710 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.819802164 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.261627602 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.1652293560 |
| /workspace/coverage/default/14.sram_ctrl_regwen.387064904 |
| /workspace/coverage/default/14.sram_ctrl_smoke.3495740703 |
| /workspace/coverage/default/14.sram_ctrl_stress_all.2935463008 |
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| /workspace/coverage/default/43.sram_ctrl_executable.2559862411 |
| /workspace/coverage/default/43.sram_ctrl_lc_escalation.1792722764 |
| /workspace/coverage/default/43.sram_ctrl_max_throughput.274682174 |
| /workspace/coverage/default/43.sram_ctrl_mem_partial_access.52551324 |
| /workspace/coverage/default/43.sram_ctrl_mem_walk.464887814 |
| /workspace/coverage/default/43.sram_ctrl_multiple_keys.4245912046 |
| /workspace/coverage/default/43.sram_ctrl_partial_access.4040044620 |
| /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3504651033 |
| /workspace/coverage/default/43.sram_ctrl_ram_cfg.874851683 |
| /workspace/coverage/default/43.sram_ctrl_regwen.206219583 |
| /workspace/coverage/default/43.sram_ctrl_smoke.1470870163 |
| /workspace/coverage/default/43.sram_ctrl_stress_all.2762550987 |
| /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1974941948 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.3945959782 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3756948268 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.455094586 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.4077605797 |
| /workspace/coverage/default/44.sram_ctrl_bijection.1460570430 |
| /workspace/coverage/default/44.sram_ctrl_executable.3425153392 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.3866322399 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.2913702874 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.1414490879 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.3312686588 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.208364112 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.1507451846 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3731057188 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.615721574 |
| /workspace/coverage/default/44.sram_ctrl_regwen.4091667635 |
| /workspace/coverage/default/44.sram_ctrl_smoke.3378755726 |
| /workspace/coverage/default/44.sram_ctrl_stress_all.378207855 |
| /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.4034617285 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.3608238722 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2302963562 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.798459133 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.2985206866 |
| /workspace/coverage/default/45.sram_ctrl_bijection.2999270567 |
| /workspace/coverage/default/45.sram_ctrl_executable.1014324506 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.3016422598 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.2560174830 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.3283593226 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.7857996 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.2100854140 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.639915255 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.69205275 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.238676079 |
| /workspace/coverage/default/45.sram_ctrl_regwen.4205189085 |
| /workspace/coverage/default/45.sram_ctrl_smoke.3867092254 |
| /workspace/coverage/default/45.sram_ctrl_stress_all.1427688413 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.1961614472 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2795612406 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.2499395654 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.91354048 |
| /workspace/coverage/default/46.sram_ctrl_bijection.2029718808 |
| /workspace/coverage/default/46.sram_ctrl_executable.659414413 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.867897490 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.3520449820 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.3569859480 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.2665710875 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.629172748 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.3443905001 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3240972810 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.417222642 |
| /workspace/coverage/default/46.sram_ctrl_regwen.1760820872 |
| /workspace/coverage/default/46.sram_ctrl_smoke.3260947293 |
| /workspace/coverage/default/46.sram_ctrl_stress_all.3736110835 |
| /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3785598852 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.74767318 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.4022184141 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.504707018 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.2404359518 |
| /workspace/coverage/default/47.sram_ctrl_bijection.1057121227 |
| /workspace/coverage/default/47.sram_ctrl_executable.476016838 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.3909822632 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.2700825570 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.3695434961 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.1244620281 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.3700704532 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.152284984 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3055572622 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.1385881586 |
| /workspace/coverage/default/47.sram_ctrl_regwen.3511399094 |
| /workspace/coverage/default/47.sram_ctrl_smoke.4147004001 |
| /workspace/coverage/default/47.sram_ctrl_stress_all.3063757142 |
| /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.622907565 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.302705866 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.677930092 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.2558680068 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.1673163084 |
| /workspace/coverage/default/48.sram_ctrl_bijection.3138883722 |
| /workspace/coverage/default/48.sram_ctrl_executable.872091678 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.2352732957 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.2132182337 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.2615432690 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.2107470550 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.3171912490 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.283442741 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.889413883 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.929818395 |
| /workspace/coverage/default/48.sram_ctrl_regwen.391561268 |
| /workspace/coverage/default/48.sram_ctrl_smoke.108306394 |
| /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3344825540 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.291505054 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1812207813 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.2840457098 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.3540355641 |
| /workspace/coverage/default/49.sram_ctrl_bijection.943046027 |
| /workspace/coverage/default/49.sram_ctrl_executable.1475772148 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.1750097262 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.3785886309 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.103358643 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.1135263226 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.3530834149 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.2414023160 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1931287981 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.364307859 |
| /workspace/coverage/default/49.sram_ctrl_regwen.4066942243 |
| /workspace/coverage/default/49.sram_ctrl_smoke.4140479484 |
| /workspace/coverage/default/49.sram_ctrl_stress_all.3463507569 |
| /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.239976351 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.512493054 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.4061567486 |
| /workspace/coverage/default/5.sram_ctrl_access_during_key_req.88871315 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.3268675379 |
| /workspace/coverage/default/5.sram_ctrl_bijection.1309389489 |
| /workspace/coverage/default/5.sram_ctrl_executable.1039503215 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.4038236549 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.206397730 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.2510156167 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.3522262379 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.2986177969 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.2326265555 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3234852369 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.2214260574 |
| /workspace/coverage/default/5.sram_ctrl_regwen.3654035984 |
| /workspace/coverage/default/5.sram_ctrl_smoke.4271450239 |
| /workspace/coverage/default/5.sram_ctrl_stress_all.4250038787 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2680115398 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.1510113755 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.4054189703 |
| /workspace/coverage/default/6.sram_ctrl_access_during_key_req.1821853020 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.982119649 |
| /workspace/coverage/default/6.sram_ctrl_bijection.1114672353 |
| /workspace/coverage/default/6.sram_ctrl_executable.4014975076 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.626065470 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.1462278310 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.3189814408 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.136839254 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.1001413381 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.1066057862 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1482423370 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.3624155314 |
| /workspace/coverage/default/6.sram_ctrl_regwen.1961322382 |
| /workspace/coverage/default/6.sram_ctrl_smoke.679145385 |
| /workspace/coverage/default/6.sram_ctrl_stress_all.1238431137 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.3627498809 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2596038732 |
| /workspace/coverage/default/7.sram_ctrl_access_during_key_req.2051417977 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.2852000758 |
| /workspace/coverage/default/7.sram_ctrl_bijection.1194086022 |
| /workspace/coverage/default/7.sram_ctrl_executable.3290309355 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.2338414695 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.366162432 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.1480360895 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.1730560223 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.4028295563 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.3630439707 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1209306029 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.482716336 |
| /workspace/coverage/default/7.sram_ctrl_regwen.3468411792 |
| /workspace/coverage/default/7.sram_ctrl_smoke.1098578626 |
| /workspace/coverage/default/7.sram_ctrl_stress_all.1288663276 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1355107521 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.1227688119 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3775155831 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.4222411293 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.4212352558 |
| /workspace/coverage/default/8.sram_ctrl_bijection.2239623943 |
| /workspace/coverage/default/8.sram_ctrl_executable.3079821138 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.2859705016 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.2290187800 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2501191427 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.547668763 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.3922586866 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.3285049037 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.4152698348 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.960690662 |
| /workspace/coverage/default/8.sram_ctrl_regwen.362932718 |
| /workspace/coverage/default/8.sram_ctrl_smoke.3176355636 |
| /workspace/coverage/default/8.sram_ctrl_stress_all.2774296151 |
| /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1605634926 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.2441942940 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3563683030 |
| /workspace/coverage/default/9.sram_ctrl_access_during_key_req.602240790 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.21686005 |
| /workspace/coverage/default/9.sram_ctrl_bijection.632580916 |
| /workspace/coverage/default/9.sram_ctrl_executable.101576692 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.905995505 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.2198825147 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.4102577717 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.1796052327 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.2314366732 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.1077626692 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2175664561 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.2257104726 |
| /workspace/coverage/default/9.sram_ctrl_regwen.2334741692 |
| /workspace/coverage/default/9.sram_ctrl_smoke.173391287 |
| /workspace/coverage/default/9.sram_ctrl_stress_all.3836157503 |
| /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.829736029 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.14359381 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2823652227 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/39.sram_ctrl_alert_test.725491894 |
|
|
May 14 02:50:08 PM PDT 24 |
May 14 02:50:10 PM PDT 24 |
33417318 ps |
| T2 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.4112199867 |
|
|
May 14 02:44:56 PM PDT 24 |
May 14 03:08:51 PM PDT 24 |
9944665361 ps |
| T3 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.206397730 |
|
|
May 14 02:29:39 PM PDT 24 |
May 14 02:30:59 PM PDT 24 |
456294908 ps |
| T4 |
/workspace/coverage/default/3.sram_ctrl_smoke.770959234 |
|
|
May 14 02:28:48 PM PDT 24 |
May 14 02:28:53 PM PDT 24 |
91963229 ps |
| T5 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.186545223 |
|
|
May 14 02:51:19 PM PDT 24 |
May 14 02:51:24 PM PDT 24 |
411646844 ps |
| T9 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.1162089527 |
|
|
May 14 02:34:06 PM PDT 24 |
May 14 02:44:30 PM PDT 24 |
11326941989 ps |
| T10 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.3120837365 |
|
|
May 14 02:51:29 PM PDT 24 |
May 14 02:55:02 PM PDT 24 |
21430128192 ps |
| T11 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.1644981472 |
|
|
May 14 02:48:39 PM PDT 24 |
May 14 02:48:45 PM PDT 24 |
140130248 ps |
| T12 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.512493054 |
|
|
May 14 02:56:10 PM PDT 24 |
May 14 02:59:18 PM PDT 24 |
2010558055 ps |
| T6 |
/workspace/coverage/default/34.sram_ctrl_stress_all.1958547190 |
|
|
May 14 02:46:49 PM PDT 24 |
May 14 03:17:16 PM PDT 24 |
31942793091 ps |
| T15 |
/workspace/coverage/default/16.sram_ctrl_bijection.1735037981 |
|
|
May 14 02:33:44 PM PDT 24 |
May 14 02:34:31 PM PDT 24 |
2118305954 ps |
| T62 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.2772092017 |
|
|
May 14 02:33:35 PM PDT 24 |
May 14 02:33:42 PM PDT 24 |
232489481 ps |
| T14 |
/workspace/coverage/default/12.sram_ctrl_smoke.2149028747 |
|
|
May 14 02:31:58 PM PDT 24 |
May 14 02:32:09 PM PDT 24 |
2625101392 ps |
| T7 |
/workspace/coverage/default/9.sram_ctrl_stress_all.3836157503 |
|
|
May 14 02:31:10 PM PDT 24 |
May 14 03:05:35 PM PDT 24 |
10221721180 ps |
| T63 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.136839254 |
|
|
May 14 02:29:52 PM PDT 24 |
May 14 02:30:04 PM PDT 24 |
670808519 ps |
| T13 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2970988725 |
|
|
May 14 02:33:07 PM PDT 24 |
May 14 02:38:28 PM PDT 24 |
149210220837 ps |
| T64 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.4059232403 |
|
|
May 14 02:35:35 PM PDT 24 |
May 14 02:39:36 PM PDT 24 |
2536876036 ps |
| T41 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.1570674166 |
|
|
May 14 02:49:50 PM PDT 24 |
May 14 03:04:46 PM PDT 24 |
13522678118 ps |
| T65 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.4195358399 |
|
|
May 14 02:32:39 PM PDT 24 |
May 14 02:33:46 PM PDT 24 |
124689742 ps |
| T42 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.455094586 |
|
|
May 14 02:52:53 PM PDT 24 |
May 14 03:13:09 PM PDT 24 |
11307368364 ps |
| T16 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1974941948 |
|
|
May 14 02:52:27 PM PDT 24 |
May 14 02:56:24 PM PDT 24 |
3455182858 ps |
| T52 |
/workspace/coverage/default/49.sram_ctrl_bijection.943046027 |
|
|
May 14 02:56:07 PM PDT 24 |
May 14 02:57:14 PM PDT 24 |
12056189131 ps |
| T8 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.3256499081 |
|
|
May 14 02:44:06 PM PDT 24 |
May 14 02:44:09 PM PDT 24 |
626937987 ps |
| T25 |
/workspace/coverage/default/39.sram_ctrl_regwen.2674319164 |
|
|
May 14 02:49:58 PM PDT 24 |
May 14 03:02:13 PM PDT 24 |
6941697104 ps |
| T53 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3922586866 |
|
|
May 14 02:30:22 PM PDT 24 |
May 14 02:42:21 PM PDT 24 |
19963773743 ps |
| T20 |
/workspace/coverage/default/32.sram_ctrl_alert_test.2728096340 |
|
|
May 14 02:45:33 PM PDT 24 |
May 14 02:45:35 PM PDT 24 |
82285246 ps |
| T54 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.1952920154 |
|
|
May 14 02:41:44 PM PDT 24 |
May 14 02:44:13 PM PDT 24 |
1802236923 ps |
| T55 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.3175584134 |
|
|
May 14 02:28:28 PM PDT 24 |
May 14 02:54:24 PM PDT 24 |
19508846455 ps |
| T56 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2157262971 |
|
|
May 14 02:33:15 PM PDT 24 |
May 14 02:33:22 PM PDT 24 |
533271335 ps |
| T57 |
/workspace/coverage/default/20.sram_ctrl_executable.2464404762 |
|
|
May 14 02:35:42 PM PDT 24 |
May 14 02:36:50 PM PDT 24 |
5660621603 ps |
| T135 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3530834149 |
|
|
May 14 02:56:09 PM PDT 24 |
May 14 03:19:33 PM PDT 24 |
13082216248 ps |
| T81 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3189814408 |
|
|
May 14 02:30:05 PM PDT 24 |
May 14 02:30:11 PM PDT 24 |
150945953 ps |
| T43 |
/workspace/coverage/default/4.sram_ctrl_executable.2137209450 |
|
|
May 14 02:29:13 PM PDT 24 |
May 14 02:55:18 PM PDT 24 |
67630891570 ps |
| T134 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.1096058751 |
|
|
May 14 02:42:40 PM PDT 24 |
May 14 02:50:22 PM PDT 24 |
1320643749 ps |
| T26 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.622907565 |
|
|
May 14 02:55:12 PM PDT 24 |
May 14 02:56:16 PM PDT 24 |
1026724784 ps |
| T136 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.556860059 |
|
|
May 14 02:43:09 PM PDT 24 |
May 14 02:43:15 PM PDT 24 |
285540093 ps |
| T58 |
/workspace/coverage/default/13.sram_ctrl_stress_all.2270640688 |
|
|
May 14 02:32:45 PM PDT 24 |
May 14 03:26:43 PM PDT 24 |
58359779281 ps |
| T28 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.615721574 |
|
|
May 14 02:53:03 PM PDT 24 |
May 14 02:53:06 PM PDT 24 |
72420365 ps |
| T82 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.61624774 |
|
|
May 14 02:42:11 PM PDT 24 |
May 14 02:42:17 PM PDT 24 |
154404937 ps |
| T27 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1727135931 |
|
|
May 14 02:33:14 PM PDT 24 |
May 14 02:34:04 PM PDT 24 |
4851231239 ps |
| T110 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.1476533723 |
|
|
May 14 02:34:46 PM PDT 24 |
May 14 02:37:02 PM PDT 24 |
564746232 ps |
| T111 |
/workspace/coverage/default/7.sram_ctrl_bijection.1194086022 |
|
|
May 14 02:30:00 PM PDT 24 |
May 14 02:31:07 PM PDT 24 |
6888151603 ps |
| T112 |
/workspace/coverage/default/46.sram_ctrl_partial_access.3443905001 |
|
|
May 14 02:53:59 PM PDT 24 |
May 14 02:55:55 PM PDT 24 |
857323756 ps |
| T113 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.2107470550 |
|
|
May 14 02:55:58 PM PDT 24 |
May 14 02:56:10 PM PDT 24 |
684358387 ps |
| T92 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.1317835233 |
|
|
May 14 02:44:01 PM PDT 24 |
May 14 02:48:21 PM PDT 24 |
3005302779 ps |
| T44 |
/workspace/coverage/default/42.sram_ctrl_executable.3405590037 |
|
|
May 14 02:51:38 PM PDT 24 |
May 14 03:11:14 PM PDT 24 |
16172989176 ps |
| T93 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.2494760296 |
|
|
May 14 02:43:02 PM PDT 24 |
May 14 02:47:13 PM PDT 24 |
12603409728 ps |
| T114 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2302963562 |
|
|
May 14 02:52:53 PM PDT 24 |
May 14 02:54:25 PM PDT 24 |
961604590 ps |
| T59 |
/workspace/coverage/default/36.sram_ctrl_regwen.1021725027 |
|
|
May 14 02:47:50 PM PDT 24 |
May 14 03:05:32 PM PDT 24 |
37092688931 ps |
| T138 |
/workspace/coverage/default/47.sram_ctrl_partial_access.152284984 |
|
|
May 14 02:54:52 PM PDT 24 |
May 14 02:55:12 PM PDT 24 |
1386863547 ps |
| T23 |
/workspace/coverage/default/39.sram_ctrl_stress_all.2334021835 |
|
|
May 14 02:50:09 PM PDT 24 |
May 14 03:22:12 PM PDT 24 |
9727994227 ps |
| T137 |
/workspace/coverage/default/26.sram_ctrl_bijection.863465361 |
|
|
May 14 02:42:45 PM PDT 24 |
May 14 02:43:24 PM PDT 24 |
2224478062 ps |
| T94 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.4214569067 |
|
|
May 14 02:32:39 PM PDT 24 |
May 14 02:39:50 PM PDT 24 |
19694102235 ps |
| T24 |
/workspace/coverage/default/10.sram_ctrl_stress_all.1831206505 |
|
|
May 14 02:31:43 PM PDT 24 |
May 14 03:20:46 PM PDT 24 |
11596795056 ps |
| T139 |
/workspace/coverage/default/35.sram_ctrl_stress_all.1964995862 |
|
|
May 14 02:47:28 PM PDT 24 |
May 14 02:58:39 PM PDT 24 |
26157027598 ps |
| T60 |
/workspace/coverage/default/42.sram_ctrl_stress_all.447894535 |
|
|
May 14 02:52:00 PM PDT 24 |
May 14 03:13:59 PM PDT 24 |
130264092298 ps |
| T95 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.1354015547 |
|
|
May 14 02:50:20 PM PDT 24 |
May 14 02:54:42 PM PDT 24 |
3671867728 ps |
| T140 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.2404551677 |
|
|
May 14 02:34:21 PM PDT 24 |
May 14 03:00:43 PM PDT 24 |
24590489605 ps |
| T21 |
/workspace/coverage/default/31.sram_ctrl_alert_test.2600574911 |
|
|
May 14 02:44:57 PM PDT 24 |
May 14 02:44:58 PM PDT 24 |
47843310 ps |
| T96 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1209306029 |
|
|
May 14 02:30:04 PM PDT 24 |
May 14 02:36:09 PM PDT 24 |
59382020683 ps |
| T61 |
/workspace/coverage/default/20.sram_ctrl_regwen.2259707376 |
|
|
May 14 02:35:44 PM PDT 24 |
May 14 02:48:39 PM PDT 24 |
19513675814 ps |
| T141 |
/workspace/coverage/default/33.sram_ctrl_partial_access.2616224424 |
|
|
May 14 02:45:40 PM PDT 24 |
May 14 02:45:44 PM PDT 24 |
199653577 ps |
| T45 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1935544291 |
|
|
May 14 02:28:29 PM PDT 24 |
May 14 02:28:35 PM PDT 24 |
579932203 ps |
| T142 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.340432962 |
|
|
May 14 02:42:11 PM PDT 24 |
May 14 03:14:11 PM PDT 24 |
53395224094 ps |
| T133 |
/workspace/coverage/default/27.sram_ctrl_stress_all.1761465759 |
|
|
May 14 02:43:03 PM PDT 24 |
May 14 02:58:13 PM PDT 24 |
4068878586 ps |
| T143 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.691916940 |
|
|
May 14 02:31:42 PM PDT 24 |
May 14 02:33:15 PM PDT 24 |
123963449 ps |
| T144 |
/workspace/coverage/default/26.sram_ctrl_smoke.2404854323 |
|
|
May 14 02:42:46 PM PDT 24 |
May 14 02:42:50 PM PDT 24 |
100911719 ps |
| T29 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2257104726 |
|
|
May 14 02:31:02 PM PDT 24 |
May 14 02:31:04 PM PDT 24 |
29331603 ps |
| T145 |
/workspace/coverage/default/32.sram_ctrl_partial_access.1411060458 |
|
|
May 14 02:45:08 PM PDT 24 |
May 14 02:45:14 PM PDT 24 |
136950898 ps |
| T22 |
/workspace/coverage/default/24.sram_ctrl_alert_test.826268747 |
|
|
May 14 02:42:16 PM PDT 24 |
May 14 02:42:18 PM PDT 24 |
43299969 ps |
| T146 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.366162432 |
|
|
May 14 02:30:02 PM PDT 24 |
May 14 02:30:14 PM PDT 24 |
67613949 ps |
| T83 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2051417977 |
|
|
May 14 02:30:14 PM PDT 24 |
May 14 02:36:46 PM PDT 24 |
4524027607 ps |
| T147 |
/workspace/coverage/default/29.sram_ctrl_smoke.2708004551 |
|
|
May 14 02:43:29 PM PDT 24 |
May 14 02:43:34 PM PDT 24 |
143175815 ps |
| T84 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.3888437604 |
|
|
May 14 02:43:39 PM PDT 24 |
May 14 02:43:46 PM PDT 24 |
177848481 ps |
| T129 |
/workspace/coverage/default/49.sram_ctrl_stress_all.3463507569 |
|
|
May 14 02:56:40 PM PDT 24 |
May 14 03:35:06 PM PDT 24 |
45386906315 ps |
| T148 |
/workspace/coverage/default/24.sram_ctrl_executable.286763396 |
|
|
May 14 02:42:14 PM PDT 24 |
May 14 02:49:23 PM PDT 24 |
16820687340 ps |
| T149 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3964386225 |
|
|
May 14 02:45:40 PM PDT 24 |
May 14 02:45:43 PM PDT 24 |
156967639 ps |
| T85 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1414490879 |
|
|
May 14 02:53:02 PM PDT 24 |
May 14 02:53:07 PM PDT 24 |
368408767 ps |
| T128 |
/workspace/coverage/default/4.sram_ctrl_stress_all.2341371949 |
|
|
May 14 02:29:11 PM PDT 24 |
May 14 02:43:21 PM PDT 24 |
41110237756 ps |
| T97 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.113055801 |
|
|
May 14 02:48:49 PM PDT 24 |
May 14 02:52:18 PM PDT 24 |
4175327516 ps |
| T30 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2214260574 |
|
|
May 14 02:29:38 PM PDT 24 |
May 14 02:29:40 PM PDT 24 |
79162172 ps |
| T150 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.4061567486 |
|
|
May 14 02:56:16 PM PDT 24 |
May 14 02:56:20 PM PDT 24 |
44513240 ps |
| T151 |
/workspace/coverage/default/28.sram_ctrl_bijection.3586196858 |
|
|
May 14 02:43:02 PM PDT 24 |
May 14 02:43:50 PM PDT 24 |
3520945705 ps |
| T152 |
/workspace/coverage/default/44.sram_ctrl_partial_access.1507451846 |
|
|
May 14 02:52:38 PM PDT 24 |
May 14 02:52:54 PM PDT 24 |
346580070 ps |
| T153 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1931287981 |
|
|
May 14 02:56:16 PM PDT 24 |
May 14 03:02:51 PM PDT 24 |
21153362185 ps |
| T154 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.878082435 |
|
|
May 14 02:42:37 PM PDT 24 |
May 14 02:43:33 PM PDT 24 |
112917322 ps |
| T155 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2314366732 |
|
|
May 14 02:30:41 PM PDT 24 |
May 14 02:46:36 PM PDT 24 |
14270167471 ps |
| T156 |
/workspace/coverage/default/32.sram_ctrl_bijection.3447198742 |
|
|
May 14 02:44:55 PM PDT 24 |
May 14 02:46:09 PM PDT 24 |
5257232566 ps |
| T88 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.1973253567 |
|
|
May 14 02:35:16 PM PDT 24 |
May 14 02:40:30 PM PDT 24 |
1555348613 ps |
| T157 |
/workspace/coverage/default/5.sram_ctrl_bijection.1309389489 |
|
|
May 14 02:29:23 PM PDT 24 |
May 14 02:29:41 PM PDT 24 |
579000163 ps |
| T158 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.1733029579 |
|
|
May 14 02:43:08 PM PDT 24 |
May 14 02:45:46 PM PDT 24 |
1594993718 ps |
| T131 |
/workspace/coverage/default/36.sram_ctrl_stress_all.2412808744 |
|
|
May 14 02:47:56 PM PDT 24 |
May 14 03:51:42 PM PDT 24 |
139749875612 ps |
| T159 |
/workspace/coverage/default/4.sram_ctrl_smoke.3387334185 |
|
|
May 14 02:29:04 PM PDT 24 |
May 14 02:29:17 PM PDT 24 |
2071748047 ps |
| T160 |
/workspace/coverage/default/27.sram_ctrl_smoke.101050560 |
|
|
May 14 02:42:38 PM PDT 24 |
May 14 02:42:59 PM PDT 24 |
4490061119 ps |
| T161 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.3154628605 |
|
|
May 14 02:33:15 PM PDT 24 |
May 14 02:37:32 PM PDT 24 |
11900729887 ps |
| T162 |
/workspace/coverage/default/46.sram_ctrl_stress_all.3736110835 |
|
|
May 14 02:54:25 PM PDT 24 |
May 14 03:06:10 PM PDT 24 |
15861860244 ps |
| T163 |
/workspace/coverage/default/48.sram_ctrl_alert_test.1673163084 |
|
|
May 14 02:55:59 PM PDT 24 |
May 14 02:56:01 PM PDT 24 |
23910105 ps |
| T164 |
/workspace/coverage/default/6.sram_ctrl_stress_all.1238431137 |
|
|
May 14 02:30:04 PM PDT 24 |
May 14 02:46:33 PM PDT 24 |
35026123084 ps |
| T165 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.4214294244 |
|
|
May 14 02:28:31 PM PDT 24 |
May 14 02:30:54 PM PDT 24 |
419871330 ps |
| T166 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.2855355864 |
|
|
May 14 02:42:42 PM PDT 24 |
May 14 02:42:50 PM PDT 24 |
351429216 ps |
| T167 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.1690132079 |
|
|
May 14 02:45:21 PM PDT 24 |
May 14 02:45:27 PM PDT 24 |
2249310663 ps |
| T168 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.3414479304 |
|
|
May 14 02:36:04 PM PDT 24 |
May 14 03:01:54 PM PDT 24 |
3888879691 ps |
| T169 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.2045573720 |
|
|
May 14 02:41:44 PM PDT 24 |
May 14 02:41:51 PM PDT 24 |
323078656 ps |
| T130 |
/workspace/coverage/default/29.sram_ctrl_regwen.3055261378 |
|
|
May 14 02:43:39 PM PDT 24 |
May 14 03:17:57 PM PDT 24 |
35782081183 ps |
| T170 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.3080978452 |
|
|
May 14 02:29:12 PM PDT 24 |
May 14 02:29:23 PM PDT 24 |
466027053 ps |
| T46 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.3923802134 |
|
|
May 14 02:35:52 PM PDT 24 |
May 14 02:36:07 PM PDT 24 |
444821816 ps |
| T171 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.557655370 |
|
|
May 14 02:43:29 PM PDT 24 |
May 14 02:43:37 PM PDT 24 |
769070960 ps |
| T172 |
/workspace/coverage/default/10.sram_ctrl_partial_access.3686268619 |
|
|
May 14 02:31:21 PM PDT 24 |
May 14 02:31:25 PM PDT 24 |
101314434 ps |
| T173 |
/workspace/coverage/default/11.sram_ctrl_bijection.3821312574 |
|
|
May 14 02:31:42 PM PDT 24 |
May 14 02:33:00 PM PDT 24 |
4516717288 ps |
| T174 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3234852369 |
|
|
May 14 02:29:38 PM PDT 24 |
May 14 02:35:18 PM PDT 24 |
49819089564 ps |
| T175 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.811676710 |
|
|
May 14 02:33:17 PM PDT 24 |
May 14 02:33:28 PM PDT 24 |
1051331542 ps |
| T47 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.2340829887 |
|
|
May 14 02:29:11 PM PDT 24 |
May 14 02:29:22 PM PDT 24 |
581222796 ps |
| T176 |
/workspace/coverage/default/28.sram_ctrl_executable.1410149586 |
|
|
May 14 02:43:09 PM PDT 24 |
May 14 02:44:53 PM PDT 24 |
1461684653 ps |
| T177 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.1824978334 |
|
|
May 14 02:43:19 PM PDT 24 |
May 14 02:43:24 PM PDT 24 |
1175962460 ps |
| T178 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.2918639310 |
|
|
May 14 02:44:37 PM PDT 24 |
May 14 02:49:34 PM PDT 24 |
3231832717 ps |
| T179 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.1175861262 |
|
|
May 14 02:45:48 PM PDT 24 |
May 14 02:45:52 PM PDT 24 |
1315624272 ps |
| T180 |
/workspace/coverage/default/47.sram_ctrl_bijection.1057121227 |
|
|
May 14 02:54:43 PM PDT 24 |
May 14 02:55:12 PM PDT 24 |
4663349132 ps |
| T181 |
/workspace/coverage/default/34.sram_ctrl_bijection.731245036 |
|
|
May 14 02:46:13 PM PDT 24 |
May 14 02:47:08 PM PDT 24 |
9722930911 ps |
| T182 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.2876393634 |
|
|
May 14 02:41:52 PM PDT 24 |
May 14 02:41:56 PM PDT 24 |
79622710 ps |
| T183 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.3341977211 |
|
|
May 14 02:28:30 PM PDT 24 |
May 14 02:29:11 PM PDT 24 |
355308770 ps |
| T184 |
/workspace/coverage/default/8.sram_ctrl_smoke.3176355636 |
|
|
May 14 02:30:23 PM PDT 24 |
May 14 02:30:29 PM PDT 24 |
224844131 ps |
| T185 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.4045544486 |
|
|
May 14 02:45:57 PM PDT 24 |
May 14 02:46:06 PM PDT 24 |
272403838 ps |
| T186 |
/workspace/coverage/default/2.sram_ctrl_smoke.3115062069 |
|
|
May 14 02:28:29 PM PDT 24 |
May 14 02:29:06 PM PDT 24 |
697496524 ps |
| T132 |
/workspace/coverage/default/40.sram_ctrl_stress_all.1417931163 |
|
|
May 14 02:50:45 PM PDT 24 |
May 14 03:33:16 PM PDT 24 |
8855574067 ps |
| T187 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2352732957 |
|
|
May 14 02:55:41 PM PDT 24 |
May 14 02:55:51 PM PDT 24 |
5389028304 ps |
| T188 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.1969534694 |
|
|
May 14 02:35:48 PM PDT 24 |
May 14 02:36:34 PM PDT 24 |
190605676 ps |
| T48 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2220408755 |
|
|
May 14 02:51:56 PM PDT 24 |
May 14 02:55:07 PM PDT 24 |
702934309 ps |
| T189 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.2173578790 |
|
|
May 14 02:42:52 PM PDT 24 |
May 14 02:43:04 PM PDT 24 |
1985971535 ps |
| T190 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.667511711 |
|
|
May 14 02:50:55 PM PDT 24 |
May 14 02:51:06 PM PDT 24 |
11758180368 ps |
| T191 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.3732680655 |
|
|
May 14 02:41:46 PM PDT 24 |
May 14 02:41:53 PM PDT 24 |
124565850 ps |
| T86 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.3156887400 |
|
|
May 14 02:45:58 PM PDT 24 |
May 14 02:46:02 PM PDT 24 |
91829333 ps |
| T192 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.88871315 |
|
|
May 14 02:29:38 PM PDT 24 |
May 14 02:49:50 PM PDT 24 |
5467236396 ps |
| T193 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2615432690 |
|
|
May 14 02:56:00 PM PDT 24 |
May 14 02:56:07 PM PDT 24 |
798516117 ps |
| T194 |
/workspace/coverage/default/19.sram_ctrl_executable.3936332781 |
|
|
May 14 02:35:16 PM PDT 24 |
May 14 03:00:38 PM PDT 24 |
12309364353 ps |
| T195 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.1693208156 |
|
|
May 14 02:46:06 PM PDT 24 |
May 14 03:03:53 PM PDT 24 |
11278716664 ps |
| T196 |
/workspace/coverage/default/48.sram_ctrl_smoke.108306394 |
|
|
May 14 02:55:24 PM PDT 24 |
May 14 02:57:12 PM PDT 24 |
1168676045 ps |
| T197 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.3903288288 |
|
|
May 14 02:34:56 PM PDT 24 |
May 14 02:43:23 PM PDT 24 |
2866337241 ps |
| T198 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.419065385 |
|
|
May 14 02:47:39 PM PDT 24 |
May 14 02:49:06 PM PDT 24 |
542995102 ps |
| T49 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.3820724277 |
|
|
May 14 02:51:21 PM PDT 24 |
May 14 02:59:45 PM PDT 24 |
7353171573 ps |
| T199 |
/workspace/coverage/default/1.sram_ctrl_regwen.2753546728 |
|
|
May 14 02:28:26 PM PDT 24 |
May 14 02:49:46 PM PDT 24 |
37773838136 ps |
| T200 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2216410043 |
|
|
May 14 02:32:18 PM PDT 24 |
May 14 02:32:28 PM PDT 24 |
8708411820 ps |
| T201 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.3302292793 |
|
|
May 14 02:34:57 PM PDT 24 |
May 14 02:34:59 PM PDT 24 |
75979318 ps |
| T202 |
/workspace/coverage/default/12.sram_ctrl_bijection.1521193878 |
|
|
May 14 02:32:09 PM PDT 24 |
May 14 02:32:25 PM PDT 24 |
229364797 ps |
| T203 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2729848614 |
|
|
May 14 02:33:25 PM PDT 24 |
May 14 02:34:07 PM PDT 24 |
228027544 ps |
| T204 |
/workspace/coverage/default/40.sram_ctrl_alert_test.494035440 |
|
|
May 14 02:50:43 PM PDT 24 |
May 14 02:50:44 PM PDT 24 |
24372203 ps |
| T205 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.3520449820 |
|
|
May 14 02:54:09 PM PDT 24 |
May 14 02:56:20 PM PDT 24 |
1419030972 ps |
| T206 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.2585591193 |
|
|
May 14 02:42:44 PM PDT 24 |
May 14 02:43:58 PM PDT 24 |
393741829 ps |
| T207 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.859734831 |
|
|
May 14 02:45:05 PM PDT 24 |
May 14 02:47:55 PM PDT 24 |
5069782358 ps |
| T208 |
/workspace/coverage/default/17.sram_ctrl_executable.1390402407 |
|
|
May 14 02:34:27 PM PDT 24 |
May 14 02:51:27 PM PDT 24 |
84281492365 ps |
| T209 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.3789640449 |
|
|
May 14 02:35:42 PM PDT 24 |
May 14 02:35:48 PM PDT 24 |
590887221 ps |
| T210 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1288663276 |
|
|
May 14 02:30:22 PM PDT 24 |
May 14 02:46:20 PM PDT 24 |
165987478529 ps |
| T211 |
/workspace/coverage/default/7.sram_ctrl_partial_access.3630439707 |
|
|
May 14 02:30:03 PM PDT 24 |
May 14 02:31:29 PM PDT 24 |
545183239 ps |
| T212 |
/workspace/coverage/default/38.sram_ctrl_alert_test.3486539223 |
|
|
May 14 02:49:34 PM PDT 24 |
May 14 02:49:36 PM PDT 24 |
19030430 ps |
| T213 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3909822632 |
|
|
May 14 02:55:03 PM PDT 24 |
May 14 02:55:11 PM PDT 24 |
1047671326 ps |
| T214 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.2418633236 |
|
|
May 14 02:36:03 PM PDT 24 |
May 14 02:41:26 PM PDT 24 |
14950142693 ps |
| T215 |
/workspace/coverage/default/28.sram_ctrl_stress_all.1302360033 |
|
|
May 14 02:43:19 PM PDT 24 |
May 14 02:56:02 PM PDT 24 |
4865136770 ps |
| T216 |
/workspace/coverage/default/11.sram_ctrl_partial_access.3459862682 |
|
|
May 14 02:31:40 PM PDT 24 |
May 14 02:33:00 PM PDT 24 |
1869461390 ps |
| T217 |
/workspace/coverage/default/46.sram_ctrl_bijection.2029718808 |
|
|
May 14 02:53:56 PM PDT 24 |
May 14 02:54:25 PM PDT 24 |
1370435418 ps |
| T218 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.904324877 |
|
|
May 14 02:35:15 PM PDT 24 |
May 14 02:35:20 PM PDT 24 |
2951813891 ps |
| T219 |
/workspace/coverage/default/16.sram_ctrl_alert_test.3526576885 |
|
|
May 14 02:34:09 PM PDT 24 |
May 14 02:34:12 PM PDT 24 |
35151789 ps |
| T220 |
/workspace/coverage/default/27.sram_ctrl_regwen.1891578188 |
|
|
May 14 02:42:52 PM PDT 24 |
May 14 02:43:58 PM PDT 24 |
3189033181 ps |
| T221 |
/workspace/coverage/default/33.sram_ctrl_smoke.4029016448 |
|
|
May 14 02:45:31 PM PDT 24 |
May 14 02:46:19 PM PDT 24 |
365726875 ps |
| T222 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.2953181652 |
|
|
May 14 02:31:33 PM PDT 24 |
May 14 02:31:45 PM PDT 24 |
3646836571 ps |
| T223 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.2667744131 |
|
|
May 14 02:28:59 PM PDT 24 |
May 14 02:29:00 PM PDT 24 |
76114048 ps |
| T224 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.483289438 |
|
|
May 14 02:28:36 PM PDT 24 |
May 14 02:31:11 PM PDT 24 |
8788144883 ps |
| T225 |
/workspace/coverage/default/15.sram_ctrl_regwen.126778873 |
|
|
May 14 02:33:34 PM PDT 24 |
May 14 02:56:21 PM PDT 24 |
46892973202 ps |
| T226 |
/workspace/coverage/default/3.sram_ctrl_regwen.1031241348 |
|
|
May 14 02:28:54 PM PDT 24 |
May 14 02:42:45 PM PDT 24 |
61546416174 ps |
| T227 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.456388597 |
|
|
May 14 02:31:56 PM PDT 24 |
May 14 02:45:38 PM PDT 24 |
4171386429 ps |
| T228 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.4078440838 |
|
|
May 14 02:42:43 PM PDT 24 |
May 14 02:43:47 PM PDT 24 |
452816721 ps |
| T229 |
/workspace/coverage/default/5.sram_ctrl_executable.1039503215 |
|
|
May 14 02:29:38 PM PDT 24 |
May 14 02:49:02 PM PDT 24 |
7615527044 ps |
| T230 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1315113434 |
|
|
May 14 02:32:07 PM PDT 24 |
May 14 02:34:20 PM PDT 24 |
5990279449 ps |
| T231 |
/workspace/coverage/default/48.sram_ctrl_executable.872091678 |
|
|
May 14 02:55:50 PM PDT 24 |
May 14 03:02:43 PM PDT 24 |
1325854832 ps |
| T232 |
/workspace/coverage/default/26.sram_ctrl_regwen.249584492 |
|
|
May 14 02:42:35 PM PDT 24 |
May 14 02:55:32 PM PDT 24 |
7316310823 ps |
| T233 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2056796695 |
|
|
May 14 02:33:45 PM PDT 24 |
May 14 02:37:45 PM PDT 24 |
8959869162 ps |
| T234 |
/workspace/coverage/default/24.sram_ctrl_stress_all.1112238603 |
|
|
May 14 02:42:14 PM PDT 24 |
May 14 04:03:31 PM PDT 24 |
12610186399 ps |
| T235 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.586205421 |
|
|
May 14 02:33:06 PM PDT 24 |
May 14 02:33:59 PM PDT 24 |
2105903636 ps |
| T236 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.3966782513 |
|
|
May 14 02:33:34 PM PDT 24 |
May 14 02:33:41 PM PDT 24 |
220112951 ps |
| T237 |
/workspace/coverage/default/8.sram_ctrl_executable.3079821138 |
|
|
May 14 02:30:32 PM PDT 24 |
May 14 02:39:37 PM PDT 24 |
52466598573 ps |
| T238 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.191702397 |
|
|
May 14 02:42:36 PM PDT 24 |
May 14 02:42:43 PM PDT 24 |
599235763 ps |
| T239 |
/workspace/coverage/default/23.sram_ctrl_partial_access.1547709794 |
|
|
May 14 02:42:10 PM PDT 24 |
May 14 02:42:19 PM PDT 24 |
64143491 ps |
| T240 |
/workspace/coverage/default/23.sram_ctrl_bijection.1484179881 |
|
|
May 14 02:41:53 PM PDT 24 |
May 14 02:42:16 PM PDT 24 |
4577975947 ps |
| T241 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.368672546 |
|
|
May 14 02:42:25 PM PDT 24 |
May 14 02:42:28 PM PDT 24 |
233869032 ps |
| T242 |
/workspace/coverage/default/46.sram_ctrl_alert_test.91354048 |
|
|
May 14 02:54:28 PM PDT 24 |
May 14 02:54:29 PM PDT 24 |
42497693 ps |
| T243 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.819802164 |
|
|
May 14 02:32:58 PM PDT 24 |
May 14 03:01:32 PM PDT 24 |
74316902835 ps |
| T244 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.2094426416 |
|
|
May 14 02:42:09 PM PDT 24 |
May 14 02:45:03 PM PDT 24 |
6795257399 ps |
| T245 |
/workspace/coverage/default/46.sram_ctrl_executable.659414413 |
|
|
May 14 02:54:17 PM PDT 24 |
May 14 02:54:33 PM PDT 24 |
1078388446 ps |
| T246 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.3388188212 |
|
|
May 14 02:35:43 PM PDT 24 |
May 14 02:51:44 PM PDT 24 |
15668270973 ps |
| T247 |
/workspace/coverage/default/40.sram_ctrl_smoke.4249243091 |
|
|
May 14 02:50:18 PM PDT 24 |
May 14 02:53:24 PM PDT 24 |
3582212458 ps |
| T248 |
/workspace/coverage/default/18.sram_ctrl_bijection.477522235 |
|
|
May 14 02:34:45 PM PDT 24 |
May 14 02:35:49 PM PDT 24 |
4904299852 ps |
| T249 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3283593226 |
|
|
May 14 02:53:40 PM PDT 24 |
May 14 02:53:45 PM PDT 24 |
196216004 ps |
| T250 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.4260901742 |
|
|
May 14 02:45:22 PM PDT 24 |
May 14 02:45:23 PM PDT 24 |
46218063 ps |
| T251 |
/workspace/coverage/default/8.sram_ctrl_bijection.2239623943 |
|
|
May 14 02:30:23 PM PDT 24 |
May 14 02:31:07 PM PDT 24 |
7865918481 ps |
| T252 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.482716336 |
|
|
May 14 02:30:16 PM PDT 24 |
May 14 02:30:18 PM PDT 24 |
88485373 ps |
| T253 |
/workspace/coverage/default/8.sram_ctrl_stress_all.2774296151 |
|
|
May 14 02:30:40 PM PDT 24 |
May 14 02:51:49 PM PDT 24 |
46030609578 ps |
| T254 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3866322399 |
|
|
May 14 02:52:52 PM PDT 24 |
May 14 02:52:56 PM PDT 24 |
727663633 ps |
| T255 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1510113755 |
|
|
May 14 02:29:22 PM PDT 24 |
May 14 02:34:57 PM PDT 24 |
63339627442 ps |
| T256 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3700704532 |
|
|
May 14 02:54:44 PM PDT 24 |
May 14 03:09:27 PM PDT 24 |
26966300389 ps |
| T257 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.8284311 |
|
|
May 14 02:31:33 PM PDT 24 |
May 14 02:31:35 PM PDT 24 |
51273079 ps |
| T258 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.3822639927 |
|
|
May 14 02:49:33 PM PDT 24 |
May 14 02:59:13 PM PDT 24 |
10628311186 ps |
| T259 |
/workspace/coverage/default/47.sram_ctrl_alert_test.2404359518 |
|
|
May 14 02:55:24 PM PDT 24 |
May 14 02:55:26 PM PDT 24 |
13858433 ps |
| T260 |
/workspace/coverage/default/9.sram_ctrl_partial_access.1077626692 |
|
|
May 14 02:30:51 PM PDT 24 |
May 14 02:32:58 PM PDT 24 |
1423180560 ps |
| T261 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.291505054 |
|
|
May 14 02:55:32 PM PDT 24 |
May 14 03:00:10 PM PDT 24 |
5382025857 ps |
| T262 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.108866933 |
|
|
May 14 02:47:08 PM PDT 24 |
May 14 02:47:16 PM PDT 24 |
4739214878 ps |
| T263 |
/workspace/coverage/default/19.sram_ctrl_alert_test.1527583009 |
|
|
May 14 02:35:25 PM PDT 24 |
May 14 02:35:27 PM PDT 24 |
12210599 ps |
| T264 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.4022184141 |
|
|
May 14 02:54:07 PM PDT 24 |
May 14 02:54:17 PM PDT 24 |
72107152 ps |
| T265 |
/workspace/coverage/default/27.sram_ctrl_partial_access.3501945417 |
|
|
May 14 02:42:43 PM PDT 24 |
May 14 02:42:46 PM PDT 24 |
94101519 ps |
| T266 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.401019303 |
|
|
May 14 02:29:11 PM PDT 24 |
May 14 02:34:01 PM PDT 24 |
2851135680 ps |
| T267 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.1307843643 |
|
|
May 14 02:44:00 PM PDT 24 |
May 14 02:48:42 PM PDT 24 |
8274963655 ps |
| T268 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.3909561343 |
|
|
May 14 02:45:57 PM PDT 24 |
May 14 02:45:58 PM PDT 24 |
31166712 ps |
| T269 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.3074032084 |
|
|
May 14 02:34:57 PM PDT 24 |
May 14 02:35:03 PM PDT 24 |
121796835 ps |
| T270 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.3724630144 |
|
|
May 14 02:43:08 PM PDT 24 |
May 14 02:43:18 PM PDT 24 |
1557141655 ps |
| T271 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1494177899 |
|
|
May 14 02:32:28 PM PDT 24 |
May 14 02:32:32 PM PDT 24 |
264426439 ps |
| T272 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.463285479 |
|
|
May 14 02:31:19 PM PDT 24 |
May 14 02:37:54 PM PDT 24 |
17688955279 ps |
| T273 |
/workspace/coverage/default/26.sram_ctrl_stress_all.2054876507 |
|
|
May 14 02:42:43 PM PDT 24 |
May 14 03:54:47 PM PDT 24 |
131521659662 ps |
| T274 |
/workspace/coverage/default/6.sram_ctrl_bijection.1114672353 |
|
|
May 14 02:29:51 PM PDT 24 |
May 14 02:31:02 PM PDT 24 |
64879836951 ps |
| T275 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.1462278310 |
|
|
May 14 02:29:51 PM PDT 24 |
May 14 02:29:56 PM PDT 24 |
62541241 ps |
| T276 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.133592411 |
|
|
May 14 02:28:21 PM PDT 24 |
May 14 02:29:15 PM PDT 24 |
458315001 ps |
| T277 |
/workspace/coverage/default/14.sram_ctrl_smoke.3495740703 |
|
|
May 14 02:32:49 PM PDT 24 |
May 14 02:33:01 PM PDT 24 |
182707417 ps |
| T278 |
/workspace/coverage/default/2.sram_ctrl_bijection.4148690115 |
|
|
May 14 02:28:37 PM PDT 24 |
May 14 02:29:16 PM PDT 24 |
1980797627 ps |
| T279 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.3587040195 |
|
|
May 14 02:49:58 PM PDT 24 |
May 14 02:50:04 PM PDT 24 |
472975318 ps |
| T280 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.238676079 |
|
|
May 14 02:53:34 PM PDT 24 |
May 14 02:53:36 PM PDT 24 |
30524838 ps |
| T281 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.2149789668 |
|
|
May 14 02:41:43 PM PDT 24 |
May 14 02:50:42 PM PDT 24 |
53485986717 ps |
| T282 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.2623473930 |
|
|
May 14 02:28:19 PM PDT 24 |
May 14 02:28:25 PM PDT 24 |
56596410 ps |
| T283 |
/workspace/coverage/default/9.sram_ctrl_regwen.2334741692 |
|
|
May 14 02:31:02 PM PDT 24 |
May 14 02:42:31 PM PDT 24 |
2667080758 ps |
| T284 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.1085741132 |
|
|
May 14 02:41:44 PM PDT 24 |
May 14 02:41:57 PM PDT 24 |
440320950 ps |
| T285 |
/workspace/coverage/default/23.sram_ctrl_alert_test.2187422920 |
|
|
May 14 02:42:09 PM PDT 24 |
May 14 02:42:11 PM PDT 24 |
44083617 ps |
| T286 |
/workspace/coverage/default/25.sram_ctrl_alert_test.2616445900 |
|
|
May 14 02:42:35 PM PDT 24 |
May 14 02:42:36 PM PDT 24 |
17318044 ps |
| T287 |
/workspace/coverage/default/15.sram_ctrl_executable.2599419195 |
|
|
May 14 02:33:26 PM PDT 24 |
May 14 02:43:35 PM PDT 24 |
7433186577 ps |
| T288 |
/workspace/coverage/default/35.sram_ctrl_bijection.51653602 |
|
|
May 14 02:46:51 PM PDT 24 |
May 14 02:47:19 PM PDT 24 |
13343649273 ps |
| T289 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2493035878 |
|
|
May 14 02:31:44 PM PDT 24 |
May 14 02:31:50 PM PDT 24 |
306144403 ps |
| T290 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2424297065 |
|
|
May 14 02:31:59 PM PDT 24 |
May 14 02:32:05 PM PDT 24 |
567353513 ps |
| T17 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.1341784994 |
|
|
May 14 02:28:37 PM PDT 24 |
May 14 02:28:44 PM PDT 24 |
545371123 ps |
| T33 |
/workspace/coverage/default/31.sram_ctrl_partial_access.1449467507 |
|
|
May 14 02:44:39 PM PDT 24 |
May 14 02:44:59 PM PDT 24 |
2031961562 ps |
| T34 |
/workspace/coverage/default/17.sram_ctrl_partial_access.3229189883 |
|
|
May 14 02:34:17 PM PDT 24 |
May 14 02:34:26 PM PDT 24 |
182422187 ps |
| T35 |
/workspace/coverage/default/1.sram_ctrl_partial_access.2317129314 |
|
|
May 14 02:28:30 PM PDT 24 |
May 14 02:28:45 PM PDT 24 |
362329159 ps |
| T36 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.2642857510 |
|
|
May 14 02:49:24 PM PDT 24 |
May 14 02:49:28 PM PDT 24 |
82961792 ps |
| T37 |
/workspace/coverage/default/34.sram_ctrl_partial_access.4006766849 |
|
|
May 14 02:46:15 PM PDT 24 |
May 14 02:46:25 PM PDT 24 |
653091257 ps |
| T38 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2501191427 |
|
|
May 14 02:30:41 PM PDT 24 |
May 14 02:30:46 PM PDT 24 |
159683074 ps |
| T39 |
/workspace/coverage/default/23.sram_ctrl_executable.651716895 |
|
|
May 14 02:42:03 PM PDT 24 |
May 14 02:54:41 PM PDT 24 |
2239497241 ps |
| T18 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.1476626983 |
|
|
May 14 02:29:11 PM PDT 24 |
May 14 02:29:15 PM PDT 24 |
2221323514 ps |
| T40 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.823384119 |
|
|
May 14 02:31:57 PM PDT 24 |
May 14 02:31:59 PM PDT 24 |
29047849 ps |
| T50 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.452140258 |
|
|
May 14 02:28:39 PM PDT 24 |
May 14 02:34:35 PM PDT 24 |
746282550 ps |
| T291 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.3312686588 |
|
|
May 14 02:53:02 PM PDT 24 |
May 14 02:53:08 PM PDT 24 |
116172942 ps |
| T292 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.302705866 |
|
|
May 14 02:54:54 PM PDT 24 |
May 14 02:59:25 PM PDT 24 |
5584175544 ps |
| T293 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1986615768 |
|
|
May 14 02:28:28 PM PDT 24 |
May 14 02:37:30 PM PDT 24 |
317741831712 ps |
| T294 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.3139025871 |
|
|
May 14 02:42:15 PM PDT 24 |
May 14 02:42:28 PM PDT 24 |
329070201 ps |
| T295 |
/workspace/coverage/default/33.sram_ctrl_regwen.3693347087 |
|
|
May 14 02:45:49 PM PDT 24 |
May 14 03:02:13 PM PDT 24 |
4831071331 ps |
| T296 |
/workspace/coverage/default/10.sram_ctrl_smoke.388970294 |
|
|
May 14 02:31:13 PM PDT 24 |
May 14 02:31:22 PM PDT 24 |
3233190098 ps |
| T297 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.1385091026 |
|
|
May 14 02:45:05 PM PDT 24 |
May 14 02:45:22 PM PDT 24 |
76500530 ps |
| T298 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.1981235788 |
|
|
May 14 02:48:24 PM PDT 24 |
May 14 02:48:28 PM PDT 24 |
314739380 ps |