Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
99.08	99.81	96.99	100.00	100.00	98.57	99.70	98.52

Total tests in report: 1026

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
87.13	87.13	98.34	98.34	81.30	81.30	94.78	94.78	100.00	100.00	93.08	93.08	94.90	94.90	47.50	47.50	/workspace/coverage/default/28.sram_ctrl_stress_all.2078102269
92.97	5.84	98.73	0.39	85.45	4.16	95.49	0.72	100.00	0.00	93.95	0.86	96.25	1.35	80.89	33.40	/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.638537498
95.20	2.23	99.32	0.58	90.78	5.32	95.89	0.39	100.00	0.00	97.12	3.17	96.25	0.00	87.01	6.12	/workspace/coverage/default/46.sram_ctrl_stress_all.440635730
96.28	1.08	99.51	0.19	91.69	0.91	96.10	0.21	100.00	0.00	97.98	0.86	96.25	0.00	92.39	5.38	/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2553528205
97.05	0.78	99.71	0.19	93.64	1.95	96.82	0.72	100.00	0.00	98.85	0.86	96.85	0.60	93.51	1.11	/workspace/coverage/default/2.sram_ctrl_sec_cm.1547129872
97.50	0.45	99.71	0.00	93.64	0.00	98.68	1.86	100.00	0.00	98.85	0.00	97.00	0.15	94.62	1.11	/workspace/coverage/default/3.sram_ctrl_stress_pipeline.3141763185
97.74	0.25	99.71	0.00	93.77	0.13	99.00	0.32	100.00	0.00	98.85	0.00	97.90	0.90	94.99	0.37	/workspace/coverage/default/17.sram_ctrl_access_during_key_req.2418028284
97.95	0.20	99.71	0.00	93.77	0.00	99.07	0.07	100.00	0.00	98.85	0.00	99.25	1.35	94.99	0.00	/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.827116912
98.14	0.20	99.71	0.00	93.77	0.00	99.14	0.07	100.00	0.00	98.85	0.00	99.25	0.00	96.29	1.30	/workspace/coverage/default/5.sram_ctrl_stress_all.1998036033
98.28	0.13	99.71	0.00	93.77	0.00	99.14	0.00	100.00	0.00	98.85	0.00	99.25	0.00	97.22	0.93	/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.2275851071
98.39	0.12	99.81	0.10	93.77	0.00	99.86	0.72	100.00	0.00	98.85	0.00	99.25	0.00	97.22	0.00	/workspace/coverage/default/12.sram_ctrl_ram_cfg.2199447896
98.47	0.08	99.81	0.00	93.77	0.00	99.86	0.00	100.00	0.00	98.85	0.00	99.25	0.00	97.77	0.56	/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.129987439
98.54	0.07	99.81	0.00	93.77	0.00	99.89	0.04	100.00	0.00	98.85	0.00	99.70	0.45	97.77	0.00	/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.2270373650
98.61	0.07	99.81	0.00	94.16	0.39	99.96	0.07	100.00	0.00	98.85	0.00	99.70	0.00	97.77	0.00	/workspace/coverage/default/16.sram_ctrl_alert_test.3866370030
98.66	0.05	99.81	0.00	94.16	0.00	99.96	0.00	100.00	0.00	98.85	0.00	99.70	0.00	98.14	0.37	/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.285535509
98.69	0.03	99.81	0.00	94.16	0.00	100.00	0.04	100.00	0.00	98.85	0.00	99.70	0.00	98.33	0.19	/workspace/coverage/default/14.sram_ctrl_stress_all.1539033668
98.72	0.03	99.81	0.00	94.16	0.00	100.00	0.00	100.00	0.00	98.85	0.00	99.70	0.00	98.52	0.19	/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3057573001

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2419120896
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.995317492
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1769188283
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1039858072
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2042504385
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1593462527
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.23838910
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2989425559
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2722907123
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2350514586
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1737175150
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2503218217
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2105874625
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1922620332
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1527374578
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3828639801
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2682294001
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.3932898275
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.166000410
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1705963419
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2451407993
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.992070622
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.715557099
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3321222199
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3930936312
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3898247212
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3006061459
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2101225517
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.4197043977
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3149507309
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1982512057
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.508682360
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.861160816
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2381437216
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3428931782
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3175492340
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1517025254
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.915408889
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.955332789
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1436009991
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.905351587
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3599564911
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2681638800
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1044923165
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1979022100
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1878994083
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1177019168
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2367262762
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.211185714
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3363187260
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3958889789
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2460528140
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.997988368
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2580122802
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3872195714
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.4000251300
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2344223907
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1860579843
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1156366326
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3654032574
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1539467199
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1223735225
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.548019348
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3198280675
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1415410275
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.931508836
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3884480946
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.281494902
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1187224980
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1129606643
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.701733444
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3366322196
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1257515813
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2521112229
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1321629866
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3526637345
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1266072252
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2943522373
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3248429539
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2925864970
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.4074080641
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2318444454
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1279503559
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3946540025
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1951227935
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.394586799
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3659570725
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1609923189
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1389277438
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1886299747
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.117340795
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1379433085
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.309631263
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2545381167
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.31815473
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2543193661
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2514821836
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1664935098
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3055364628
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1502886711
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3057563177
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.211603918
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2837045953
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1897009063
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.4077318287
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3746772907
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1850195812
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2298167850
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.224978434
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3154663303
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1245063277
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1388123799
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1079521134
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1236689161
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3209857303
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2179815650
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.25198270
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1648811662
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2313597387
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.272653356
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3939188909
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2923969669
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2724125943
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2798723494
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.791183413
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3106953819
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2291750475
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3112209906
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2314333998
/workspace/coverage/default/0.sram_ctrl_alert_test.2828717468
/workspace/coverage/default/0.sram_ctrl_bijection.2975901290
/workspace/coverage/default/0.sram_ctrl_executable.413913630
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2511132529
/workspace/coverage/default/0.sram_ctrl_max_throughput.3161367501
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2301567537
/workspace/coverage/default/0.sram_ctrl_mem_walk.375181207
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1509585831
/workspace/coverage/default/0.sram_ctrl_partial_access.2740237592
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1798280119
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2472179595
/workspace/coverage/default/0.sram_ctrl_regwen.1707434410
/workspace/coverage/default/0.sram_ctrl_sec_cm.1556948133
/workspace/coverage/default/0.sram_ctrl_smoke.2379851096
/workspace/coverage/default/0.sram_ctrl_stress_all.3615331785
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2884054691
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2136867278
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1999319041
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1669398422
/workspace/coverage/default/1.sram_ctrl_alert_test.4114424821
/workspace/coverage/default/1.sram_ctrl_bijection.1370871103
/workspace/coverage/default/1.sram_ctrl_executable.850118548
/workspace/coverage/default/1.sram_ctrl_lc_escalation.342233318
/workspace/coverage/default/1.sram_ctrl_max_throughput.2747555059
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.939986402
/workspace/coverage/default/1.sram_ctrl_mem_walk.3742595693
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2640735098
/workspace/coverage/default/1.sram_ctrl_partial_access.2806953108
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1255858013
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1791866020
/workspace/coverage/default/1.sram_ctrl_regwen.2363779706
/workspace/coverage/default/1.sram_ctrl_sec_cm.400517549
/workspace/coverage/default/1.sram_ctrl_smoke.1735606772
/workspace/coverage/default/1.sram_ctrl_stress_all.1339804546
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2020812931
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3773272502
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1823874204
/workspace/coverage/default/10.sram_ctrl_alert_test.3441289247
/workspace/coverage/default/10.sram_ctrl_bijection.1172576834
/workspace/coverage/default/10.sram_ctrl_executable.170858220
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1242112842
/workspace/coverage/default/10.sram_ctrl_max_throughput.1634658125
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.76056609
/workspace/coverage/default/10.sram_ctrl_mem_walk.992894624
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3413929809
/workspace/coverage/default/10.sram_ctrl_partial_access.1783226807
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2960298565
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2966024805
/workspace/coverage/default/10.sram_ctrl_regwen.342720266
/workspace/coverage/default/10.sram_ctrl_smoke.2203467020
/workspace/coverage/default/10.sram_ctrl_stress_all.3571335737
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.924757728
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.590038208
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.635128762
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3236093024
/workspace/coverage/default/11.sram_ctrl_alert_test.1010179497
/workspace/coverage/default/11.sram_ctrl_bijection.475210473
/workspace/coverage/default/11.sram_ctrl_executable.3811665048
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1954634349
/workspace/coverage/default/11.sram_ctrl_max_throughput.4196037157
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1619596438
/workspace/coverage/default/11.sram_ctrl_mem_walk.133574687
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1762013227
/workspace/coverage/default/11.sram_ctrl_partial_access.590561748
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3187077102
/workspace/coverage/default/11.sram_ctrl_ram_cfg.318543044
/workspace/coverage/default/11.sram_ctrl_regwen.2322476185
/workspace/coverage/default/11.sram_ctrl_smoke.4211205670
/workspace/coverage/default/11.sram_ctrl_stress_all.1016950906
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3244739243
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.4180955601
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.381466178
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/workspace/coverage/default/43.sram_ctrl_bijection.3245007366
/workspace/coverage/default/43.sram_ctrl_executable.418644790
/workspace/coverage/default/43.sram_ctrl_lc_escalation.3872279845
/workspace/coverage/default/43.sram_ctrl_max_throughput.33680239
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.860240728
/workspace/coverage/default/43.sram_ctrl_mem_walk.87437051
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3665157582
/workspace/coverage/default/43.sram_ctrl_partial_access.2909237197
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1928624782
/workspace/coverage/default/43.sram_ctrl_ram_cfg.1722071652
/workspace/coverage/default/43.sram_ctrl_regwen.1994068366
/workspace/coverage/default/43.sram_ctrl_smoke.639205867
/workspace/coverage/default/43.sram_ctrl_stress_all.3395331067
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.506446911
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.790551082
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3558722852
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3170239882
/workspace/coverage/default/44.sram_ctrl_alert_test.746431314
/workspace/coverage/default/44.sram_ctrl_bijection.1826438761
/workspace/coverage/default/44.sram_ctrl_executable.3952571151
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2789698793
/workspace/coverage/default/44.sram_ctrl_max_throughput.1666776044
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.285396646
/workspace/coverage/default/44.sram_ctrl_mem_walk.1188840358
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2071265818
/workspace/coverage/default/44.sram_ctrl_partial_access.1398441761
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1254320030
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1142909951
/workspace/coverage/default/44.sram_ctrl_regwen.326301395
/workspace/coverage/default/44.sram_ctrl_smoke.2080262127
/workspace/coverage/default/44.sram_ctrl_stress_all.1826845435
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1897836661
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1090851280
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.524305225
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3054540043
/workspace/coverage/default/45.sram_ctrl_alert_test.1237538286
/workspace/coverage/default/45.sram_ctrl_bijection.1048637244
/workspace/coverage/default/45.sram_ctrl_executable.655563719
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3907409908
/workspace/coverage/default/45.sram_ctrl_max_throughput.163894137
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.230315155
/workspace/coverage/default/45.sram_ctrl_mem_walk.1048729565
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2764617311
/workspace/coverage/default/45.sram_ctrl_partial_access.1644131079
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1303845342
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3705964144
/workspace/coverage/default/45.sram_ctrl_regwen.3653403507
/workspace/coverage/default/45.sram_ctrl_smoke.3844238629
/workspace/coverage/default/45.sram_ctrl_stress_all.413669298
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3469865491
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3983825806
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.540233697
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1998867823
/workspace/coverage/default/46.sram_ctrl_alert_test.3484038679
/workspace/coverage/default/46.sram_ctrl_bijection.1999475567
/workspace/coverage/default/46.sram_ctrl_executable.1173106568
/workspace/coverage/default/46.sram_ctrl_lc_escalation.4209868854
/workspace/coverage/default/46.sram_ctrl_max_throughput.3122622210
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2471077749
/workspace/coverage/default/46.sram_ctrl_mem_walk.2182425820
/workspace/coverage/default/46.sram_ctrl_multiple_keys.578528201
/workspace/coverage/default/46.sram_ctrl_partial_access.145348431
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2165212891
/workspace/coverage/default/46.sram_ctrl_ram_cfg.391982177
/workspace/coverage/default/46.sram_ctrl_regwen.4151463950
/workspace/coverage/default/46.sram_ctrl_smoke.1601626339
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2296291236
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1429224100
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2618502915
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1467808548
/workspace/coverage/default/47.sram_ctrl_alert_test.404716395
/workspace/coverage/default/47.sram_ctrl_bijection.1411320684
/workspace/coverage/default/47.sram_ctrl_executable.3062426303
/workspace/coverage/default/47.sram_ctrl_lc_escalation.838418065
/workspace/coverage/default/47.sram_ctrl_max_throughput.2381401181
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.4145180333
/workspace/coverage/default/47.sram_ctrl_mem_walk.4002962453
/workspace/coverage/default/47.sram_ctrl_multiple_keys.247878826
/workspace/coverage/default/47.sram_ctrl_partial_access.2356103215
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1331076855
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1587077167
/workspace/coverage/default/47.sram_ctrl_regwen.1875652258
/workspace/coverage/default/47.sram_ctrl_smoke.212446986
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1087540288
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1276060093
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4189297126
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3678336511
/workspace/coverage/default/48.sram_ctrl_alert_test.2213218808
/workspace/coverage/default/48.sram_ctrl_bijection.1064389327
/workspace/coverage/default/48.sram_ctrl_executable.3192190253
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1467321739
/workspace/coverage/default/48.sram_ctrl_max_throughput.1872539265
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1916489946
/workspace/coverage/default/48.sram_ctrl_mem_walk.1450612900
/workspace/coverage/default/48.sram_ctrl_multiple_keys.816613880
/workspace/coverage/default/48.sram_ctrl_partial_access.3799800441
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.715875053
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3020764886
/workspace/coverage/default/48.sram_ctrl_regwen.332626164
/workspace/coverage/default/48.sram_ctrl_smoke.630691255
/workspace/coverage/default/48.sram_ctrl_stress_all.3594484901
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3109090866
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.785444267
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3742794648
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.713031612
/workspace/coverage/default/49.sram_ctrl_alert_test.3323074197
/workspace/coverage/default/49.sram_ctrl_bijection.505457826
/workspace/coverage/default/49.sram_ctrl_executable.2826433167
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3602974405
/workspace/coverage/default/49.sram_ctrl_max_throughput.899957913
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.4066250183
/workspace/coverage/default/49.sram_ctrl_mem_walk.2312587772
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1446556369
/workspace/coverage/default/49.sram_ctrl_partial_access.787409989
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2339682576
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2971045505
/workspace/coverage/default/49.sram_ctrl_regwen.2314538800
/workspace/coverage/default/49.sram_ctrl_smoke.1434693825
/workspace/coverage/default/49.sram_ctrl_stress_all.4132329755
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.4146321501
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1560882764
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1841183346
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1324293623
/workspace/coverage/default/5.sram_ctrl_alert_test.1868372551
/workspace/coverage/default/5.sram_ctrl_bijection.3693077613
/workspace/coverage/default/5.sram_ctrl_executable.1944138232
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2140737473
/workspace/coverage/default/5.sram_ctrl_max_throughput.3657939875
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.356584423
/workspace/coverage/default/5.sram_ctrl_mem_walk.603959707
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2785483038
/workspace/coverage/default/5.sram_ctrl_partial_access.2444382006
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1894572493
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1853701467
/workspace/coverage/default/5.sram_ctrl_regwen.2120360266
/workspace/coverage/default/5.sram_ctrl_smoke.2664942132
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2847396531
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1316377352
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.148579751
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3910966190
/workspace/coverage/default/6.sram_ctrl_alert_test.381245232
/workspace/coverage/default/6.sram_ctrl_bijection.789014712
/workspace/coverage/default/6.sram_ctrl_executable.1619367645
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1767242601
/workspace/coverage/default/6.sram_ctrl_max_throughput.104518256
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.974414009
/workspace/coverage/default/6.sram_ctrl_mem_walk.585351247
/workspace/coverage/default/6.sram_ctrl_multiple_keys.413935520
/workspace/coverage/default/6.sram_ctrl_partial_access.3009584176
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1885871326
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2794568073
/workspace/coverage/default/6.sram_ctrl_regwen.924303331
/workspace/coverage/default/6.sram_ctrl_smoke.1227507771
/workspace/coverage/default/6.sram_ctrl_stress_all.1862739147
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1474305987
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1421511224
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1495072502
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.777102245
/workspace/coverage/default/7.sram_ctrl_alert_test.1855913342
/workspace/coverage/default/7.sram_ctrl_bijection.1800554812
/workspace/coverage/default/7.sram_ctrl_executable.934928175
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2604594905
/workspace/coverage/default/7.sram_ctrl_max_throughput.1697334056
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.4199355430
/workspace/coverage/default/7.sram_ctrl_mem_walk.1777792887
/workspace/coverage/default/7.sram_ctrl_multiple_keys.981955832
/workspace/coverage/default/7.sram_ctrl_partial_access.365100977
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1799079636
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2141584221
/workspace/coverage/default/7.sram_ctrl_regwen.4137362786
/workspace/coverage/default/7.sram_ctrl_smoke.2092673610
/workspace/coverage/default/7.sram_ctrl_stress_all.1136102480
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1290773135
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.4284124657
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2174567944
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.4237430665
/workspace/coverage/default/8.sram_ctrl_alert_test.1303624372
/workspace/coverage/default/8.sram_ctrl_bijection.1487327867
/workspace/coverage/default/8.sram_ctrl_executable.2097096244
/workspace/coverage/default/8.sram_ctrl_lc_escalation.4107079232
/workspace/coverage/default/8.sram_ctrl_max_throughput.2446921947
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.882456402
/workspace/coverage/default/8.sram_ctrl_mem_walk.2522836556
/workspace/coverage/default/8.sram_ctrl_multiple_keys.4285726165
/workspace/coverage/default/8.sram_ctrl_partial_access.2678959448
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2133722733
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1289548657
/workspace/coverage/default/8.sram_ctrl_regwen.4239601755
/workspace/coverage/default/8.sram_ctrl_smoke.261261761
/workspace/coverage/default/8.sram_ctrl_stress_all.2982785249
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3471620201
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2240815350
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3139224110
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3228788457
/workspace/coverage/default/9.sram_ctrl_alert_test.959646231
/workspace/coverage/default/9.sram_ctrl_bijection.2168781209
/workspace/coverage/default/9.sram_ctrl_executable.778553976
/workspace/coverage/default/9.sram_ctrl_lc_escalation.339527326
/workspace/coverage/default/9.sram_ctrl_max_throughput.1462995454
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1895245031
/workspace/coverage/default/9.sram_ctrl_mem_walk.930555121
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3842191782
/workspace/coverage/default/9.sram_ctrl_partial_access.265256438
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2613268115
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3577190999
/workspace/coverage/default/9.sram_ctrl_regwen.2847349044
/workspace/coverage/default/9.sram_ctrl_smoke.609252604
/workspace/coverage/default/9.sram_ctrl_stress_all.1194955905
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3036488511
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2229404131
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3717238103

Total test records in report: 1026

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/13.sram_ctrl_lc_escalation.4017649787	May 16 01:17:39 PM PDT 24	May 16 01:17:49 PM PDT 24	681876352 ps
T2	/workspace/coverage/default/39.sram_ctrl_access_during_key_req.1341180524	May 16 01:19:35 PM PDT 24	May 16 01:23:06 PM PDT 24	738786950 ps
T3	/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.1433802624	May 16 01:19:07 PM PDT 24	May 16 01:25:36 PM PDT 24	63624424844 ps
T7	/workspace/coverage/default/34.sram_ctrl_ram_cfg.2965454646	May 16 01:19:25 PM PDT 24	May 16 01:19:30 PM PDT 24	30926595 ps
T4	/workspace/coverage/default/4.sram_ctrl_mem_walk.1130420070	May 16 01:17:00 PM PDT 24	May 16 01:17:12 PM PDT 24	458273643 ps
T8	/workspace/coverage/default/2.sram_ctrl_mem_walk.4165289731	May 16 01:16:47 PM PDT 24	May 16 01:16:58 PM PDT 24	290378247 ps
T9	/workspace/coverage/default/44.sram_ctrl_alert_test.746431314	May 16 01:20:03 PM PDT 24	May 16 01:20:06 PM PDT 24	18721424 ps
T10	/workspace/coverage/default/26.sram_ctrl_access_during_key_req.648766083	May 16 01:18:42 PM PDT 24	May 16 01:38:49 PM PDT 24	16622544412 ps
T11	/workspace/coverage/default/17.sram_ctrl_access_during_key_req.2418028284	May 16 01:17:59 PM PDT 24	May 16 01:43:25 PM PDT 24	10695850076 ps
T5	/workspace/coverage/default/28.sram_ctrl_stress_all.2078102269	May 16 01:18:49 PM PDT 24	May 16 01:47:43 PM PDT 24	78957713950 ps
T18	/workspace/coverage/default/35.sram_ctrl_ram_cfg.334152559	May 16 01:19:25 PM PDT 24	May 16 01:19:30 PM PDT 24	43188166 ps
T14	/workspace/coverage/default/43.sram_ctrl_multiple_keys.3665157582	May 16 01:19:52 PM PDT 24	May 16 01:34:12 PM PDT 24	18695231657 ps
T19	/workspace/coverage/default/12.sram_ctrl_ram_cfg.2199447896	May 16 01:17:41 PM PDT 24	May 16 01:17:44 PM PDT 24	112225075 ps
T15	/workspace/coverage/default/9.sram_ctrl_partial_access.265256438	May 16 01:17:27 PM PDT 24	May 16 01:17:32 PM PDT 24	229162609 ps
T63	/workspace/coverage/default/24.sram_ctrl_max_throughput.3135891869	May 16 01:18:23 PM PDT 24	May 16 01:18:41 PM PDT 24	295202609 ps
T6	/workspace/coverage/default/1.sram_ctrl_lc_escalation.342233318	May 16 01:16:46 PM PDT 24	May 16 01:16:56 PM PDT 24	1171190619 ps
T13	/workspace/coverage/default/23.sram_ctrl_mem_walk.1399883434	May 16 01:18:14 PM PDT 24	May 16 01:18:30 PM PDT 24	1312472566 ps
T31	/workspace/coverage/default/45.sram_ctrl_mem_walk.1048729565	May 16 01:20:13 PM PDT 24	May 16 01:20:25 PM PDT 24	1752748881 ps
T12	/workspace/coverage/default/46.sram_ctrl_stress_all.440635730	May 16 01:20:23 PM PDT 24	May 16 02:02:25 PM PDT 24	146092212575 ps
T17	/workspace/coverage/default/26.sram_ctrl_multiple_keys.308380395	May 16 01:18:38 PM PDT 24	May 16 01:37:53 PM PDT 24	19287176153 ps
T150	/workspace/coverage/default/29.sram_ctrl_multiple_keys.42710878	May 16 01:18:53 PM PDT 24	May 16 01:44:59 PM PDT 24	98635854105 ps
T78	/workspace/coverage/default/3.sram_ctrl_stress_pipeline.3141763185	May 16 01:17:01 PM PDT 24	May 16 01:23:17 PM PDT 24	4905825454 ps
T105	/workspace/coverage/default/18.sram_ctrl_stress_pipeline.3465785998	May 16 01:17:59 PM PDT 24	May 16 01:22:15 PM PDT 24	10972665530 ps
T172	/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.751078438	May 16 01:19:27 PM PDT 24	May 16 01:20:23 PM PDT 24	119489524 ps
T79	/workspace/coverage/default/41.sram_ctrl_multiple_keys.4115344176	May 16 01:19:50 PM PDT 24	May 16 01:27:52 PM PDT 24	7145931041 ps
T171	/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.730651526	May 16 01:18:00 PM PDT 24	May 16 01:18:47 PM PDT 24	112789459 ps
T158	/workspace/coverage/default/9.sram_ctrl_bijection.2168781209	May 16 01:17:22 PM PDT 24	May 16 01:18:16 PM PDT 24	9660227606 ps
T16	/workspace/coverage/default/19.sram_ctrl_stress_all.3174842804	May 16 01:18:11 PM PDT 24	May 16 01:41:18 PM PDT 24	6004370057 ps
T167	/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.967424760	May 16 01:18:35 PM PDT 24	May 16 01:20:48 PM PDT 24	1340819179 ps
T173	/workspace/coverage/default/25.sram_ctrl_ram_cfg.69973505	May 16 01:18:31 PM PDT 24	May 16 01:18:34 PM PDT 24	30220057 ps
T165	/workspace/coverage/default/3.sram_ctrl_max_throughput.3748010990	May 16 01:16:59 PM PDT 24	May 16 01:18:21 PM PDT 24	296319516 ps
T106	/workspace/coverage/default/33.sram_ctrl_stress_pipeline.2763410353	May 16 01:19:22 PM PDT 24	May 16 01:25:14 PM PDT 24	3477381593 ps
T64	/workspace/coverage/default/48.sram_ctrl_regwen.332626164	May 16 01:20:22 PM PDT 24	May 16 01:33:54 PM PDT 24	9056758019 ps
T174	/workspace/coverage/default/15.sram_ctrl_multiple_keys.2839909207	May 16 01:17:52 PM PDT 24	May 16 01:28:15 PM PDT 24	24772080829 ps
T85	/workspace/coverage/default/40.sram_ctrl_mem_partial_access.1348898396	May 16 01:19:41 PM PDT 24	May 16 01:19:49 PM PDT 24	152117407 ps
T175	/workspace/coverage/default/6.sram_ctrl_ram_cfg.2794568073	May 16 01:17:18 PM PDT 24	May 16 01:17:22 PM PDT 24	33787896 ps
T107	/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3187077102	May 16 01:17:28 PM PDT 24	May 16 01:20:29 PM PDT 24	6845277741 ps
T155	/workspace/coverage/default/17.sram_ctrl_partial_access.219029861	May 16 01:17:47 PM PDT 24	May 16 01:17:55 PM PDT 24	159318403 ps
T30	/workspace/coverage/default/8.sram_ctrl_lc_escalation.4107079232	May 16 01:17:18 PM PDT 24	May 16 01:17:29 PM PDT 24	2378972541 ps
T164	/workspace/coverage/default/49.sram_ctrl_multiple_keys.1446556369	May 16 01:20:31 PM PDT 24	May 16 01:36:12 PM PDT 24	11277114025 ps
T86	/workspace/coverage/default/23.sram_ctrl_mem_partial_access.4253473227	May 16 01:18:16 PM PDT 24	May 16 01:18:24 PM PDT 24	103716708 ps
T65	/workspace/coverage/default/11.sram_ctrl_stress_all.1016950906	May 16 01:17:36 PM PDT 24	May 16 01:25:03 PM PDT 24	3588842658 ps
T153	/workspace/coverage/default/46.sram_ctrl_max_throughput.3122622210	May 16 01:20:11 PM PDT 24	May 16 01:20:17 PM PDT 24	54700781 ps
T108	/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1928624782	May 16 01:19:53 PM PDT 24	May 16 01:27:19 PM PDT 24	137083140911 ps
T87	/workspace/coverage/default/22.sram_ctrl_mem_partial_access.703310895	May 16 01:18:23 PM PDT 24	May 16 01:18:31 PM PDT 24	484133508 ps
T170	/workspace/coverage/default/22.sram_ctrl_smoke.1692105732	May 16 01:18:15 PM PDT 24	May 16 01:18:23 PM PDT 24	698807813 ps
T88	/workspace/coverage/default/49.sram_ctrl_mem_partial_access.4066250183	May 16 01:20:30 PM PDT 24	May 16 01:20:35 PM PDT 24	91293930 ps
T176	/workspace/coverage/default/2.sram_ctrl_max_throughput.1535337619	May 16 01:16:52 PM PDT 24	May 16 01:17:49 PM PDT 24	192877128 ps
T27	/workspace/coverage/default/16.sram_ctrl_stress_all.2497758477	May 16 01:17:49 PM PDT 24	May 16 01:36:35 PM PDT 24	19212939305 ps
T89	/workspace/coverage/default/39.sram_ctrl_mem_partial_access.2524240526	May 16 01:19:35 PM PDT 24	May 16 01:19:45 PM PDT 24	329538325 ps
T66	/workspace/coverage/default/0.sram_ctrl_stress_all.3615331785	May 16 01:16:44 PM PDT 24	May 16 01:36:18 PM PDT 24	39229662916 ps
T67	/workspace/coverage/default/22.sram_ctrl_lc_escalation.2435261023	May 16 01:18:15 PM PDT 24	May 16 01:18:23 PM PDT 24	489521174 ps
T28	/workspace/coverage/default/5.sram_ctrl_regwen.2120360266	May 16 01:17:13 PM PDT 24	May 16 01:19:25 PM PDT 24	6919720393 ps
T177	/workspace/coverage/default/48.sram_ctrl_mem_walk.1450612900	May 16 01:20:22 PM PDT 24	May 16 01:20:29 PM PDT 24	72826339 ps
T154	/workspace/coverage/default/45.sram_ctrl_bijection.1048637244	May 16 01:20:05 PM PDT 24	May 16 01:21:05 PM PDT 24	18642657615 ps
T109	/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.2289380661	May 16 01:19:23 PM PDT 24	May 16 01:25:33 PM PDT 24	51209860170 ps
T178	/workspace/coverage/default/42.sram_ctrl_max_throughput.2099115207	May 16 01:19:53 PM PDT 24	May 16 01:22:18 PM PDT 24	532121427 ps
T168	/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3773272502	May 16 01:16:49 PM PDT 24	May 16 01:18:42 PM PDT 24	152478251 ps
T90	/workspace/coverage/default/43.sram_ctrl_access_during_key_req.1724305929	May 16 01:20:03 PM PDT 24	May 16 01:34:39 PM PDT 24	2627850562 ps
T144	/workspace/coverage/default/36.sram_ctrl_executable.3860557477	May 16 01:19:30 PM PDT 24	May 16 01:33:31 PM PDT 24	19429657511 ps
T110	/workspace/coverage/default/20.sram_ctrl_stress_pipeline.1043039383	May 16 01:18:13 PM PDT 24	May 16 01:20:45 PM PDT 24	2978064401 ps
T179	/workspace/coverage/default/30.sram_ctrl_bijection.606211016	May 16 01:18:49 PM PDT 24	May 16 01:19:48 PM PDT 24	16416166901 ps
T111	/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1560882764	May 16 01:20:31 PM PDT 24	May 16 01:24:57 PM PDT 24	10829721568 ps
T180	/workspace/coverage/default/13.sram_ctrl_bijection.3658307293	May 16 01:17:40 PM PDT 24	May 16 01:19:05 PM PDT 24	5389394412 ps
T112	/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.3834085148	May 16 01:19:36 PM PDT 24	May 16 01:23:41 PM PDT 24	9564480271 ps
T163	/workspace/coverage/default/10.sram_ctrl_multiple_keys.3413929809	May 16 01:17:27 PM PDT 24	May 16 01:32:20 PM PDT 24	45743244054 ps
T181	/workspace/coverage/default/29.sram_ctrl_stress_pipeline.3617176931	May 16 01:18:53 PM PDT 24	May 16 01:20:45 PM PDT 24	5547237035 ps
T156	/workspace/coverage/default/7.sram_ctrl_bijection.1800554812	May 16 01:17:17 PM PDT 24	May 16 01:18:08 PM PDT 24	3047734365 ps
T182	/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.185585548	May 16 01:18:04 PM PDT 24	May 16 01:19:08 PM PDT 24	503289259 ps
T160	/workspace/coverage/default/7.sram_ctrl_smoke.2092673610	May 16 01:17:17 PM PDT 24	May 16 01:17:37 PM PDT 24	2309037654 ps
T91	/workspace/coverage/default/32.sram_ctrl_mem_partial_access.4097413405	May 16 01:19:02 PM PDT 24	May 16 01:19:07 PM PDT 24	340913158 ps
T183	/workspace/coverage/default/13.sram_ctrl_access_during_key_req.1603175615	May 16 01:17:37 PM PDT 24	May 16 01:20:13 PM PDT 24	695836633 ps
T20	/workspace/coverage/default/4.sram_ctrl_sec_cm.3381058643	May 16 01:17:00 PM PDT 24	May 16 01:17:05 PM PDT 24	529959187 ps
T37	/workspace/coverage/default/14.sram_ctrl_mem_walk.1556957740	May 16 01:17:49 PM PDT 24	May 16 01:17:56 PM PDT 24	151915312 ps
T38	/workspace/coverage/default/13.sram_ctrl_stress_pipeline.1592946771	May 16 01:17:42 PM PDT 24	May 16 01:22:15 PM PDT 24	3018655089 ps
T39	/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.381466178	May 16 01:17:31 PM PDT 24	May 16 01:18:32 PM PDT 24	712118010 ps
T40	/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3236093024	May 16 01:17:37 PM PDT 24	May 16 01:36:39 PM PDT 24	5751899251 ps
T41	/workspace/coverage/default/9.sram_ctrl_regwen.2847349044	May 16 01:17:28 PM PDT 24	May 16 01:22:58 PM PDT 24	1520913412 ps
T42	/workspace/coverage/default/10.sram_ctrl_stress_pipeline.590038208	May 16 01:17:27 PM PDT 24	May 16 01:23:15 PM PDT 24	11520102763 ps
T29	/workspace/coverage/default/35.sram_ctrl_regwen.3268177916	May 16 01:19:24 PM PDT 24	May 16 01:40:04 PM PDT 24	12294577379 ps
T43	/workspace/coverage/default/0.sram_ctrl_smoke.2379851096	May 16 01:16:43 PM PDT 24	May 16 01:17:30 PM PDT 24	1799901362 ps
T44	/workspace/coverage/default/5.sram_ctrl_ram_cfg.1853701467	May 16 01:17:11 PM PDT 24	May 16 01:17:15 PM PDT 24	29430382 ps
T147	/workspace/coverage/default/49.sram_ctrl_executable.2826433167	May 16 01:20:29 PM PDT 24	May 16 01:32:11 PM PDT 24	5729126236 ps
T184	/workspace/coverage/default/36.sram_ctrl_smoke.141221083	May 16 01:19:27 PM PDT 24	May 16 01:19:37 PM PDT 24	250576623 ps
T185	/workspace/coverage/default/32.sram_ctrl_executable.2564599538	May 16 01:19:04 PM PDT 24	May 16 01:28:16 PM PDT 24	9091407605 ps
T186	/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.4254727027	May 16 01:19:33 PM PDT 24	May 16 01:25:54 PM PDT 24	17542828573 ps
T187	/workspace/coverage/default/19.sram_ctrl_mem_walk.2932396875	May 16 01:18:03 PM PDT 24	May 16 01:18:15 PM PDT 24	461918141 ps
T45	/workspace/coverage/default/5.sram_ctrl_stress_all.1998036033	May 16 01:17:10 PM PDT 24	May 16 02:39:53 PM PDT 24	77026876771 ps
T188	/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2618502915	May 16 01:20:13 PM PDT 24	May 16 01:20:17 PM PDT 24	130740218 ps
T189	/workspace/coverage/default/22.sram_ctrl_bijection.2437107586	May 16 01:18:14 PM PDT 24	May 16 01:18:47 PM PDT 24	965585265 ps
T190	/workspace/coverage/default/42.sram_ctrl_multiple_keys.1791967301	May 16 01:19:51 PM PDT 24	May 16 01:27:26 PM PDT 24	20693104064 ps
T46	/workspace/coverage/default/36.sram_ctrl_stress_all.3045778001	May 16 01:19:26 PM PDT 24	May 16 02:15:43 PM PDT 24	121336331998 ps
T191	/workspace/coverage/default/8.sram_ctrl_ram_cfg.1289548657	May 16 01:17:19 PM PDT 24	May 16 01:17:23 PM PDT 24	75913720 ps
T192	/workspace/coverage/default/5.sram_ctrl_mem_walk.603959707	May 16 01:17:13 PM PDT 24	May 16 01:17:22 PM PDT 24	293536478 ps
T193	/workspace/coverage/default/34.sram_ctrl_mem_walk.3673173654	May 16 01:19:24 PM PDT 24	May 16 01:19:38 PM PDT 24	1909397367 ps
T194	/workspace/coverage/default/44.sram_ctrl_ram_cfg.1142909951	May 16 01:20:05 PM PDT 24	May 16 01:20:09 PM PDT 24	45993397 ps
T195	/workspace/coverage/default/40.sram_ctrl_regwen.2852638154	May 16 01:19:50 PM PDT 24	May 16 01:38:25 PM PDT 24	24534472171 ps
T196	/workspace/coverage/default/7.sram_ctrl_max_throughput.1697334056	May 16 01:17:18 PM PDT 24	May 16 01:17:34 PM PDT 24	145699170 ps
T197	/workspace/coverage/default/22.sram_ctrl_access_during_key_req.3686456580	May 16 01:18:14 PM PDT 24	May 16 01:20:45 PM PDT 24	1305374388 ps
T166	/workspace/coverage/default/44.sram_ctrl_lc_escalation.2789698793	May 16 01:20:00 PM PDT 24	May 16 01:20:08 PM PDT 24	530348795 ps
T23	/workspace/coverage/default/40.sram_ctrl_alert_test.2016454499	May 16 01:19:41 PM PDT 24	May 16 01:19:45 PM PDT 24	27794943 ps
T198	/workspace/coverage/default/49.sram_ctrl_regwen.2314538800	May 16 01:20:32 PM PDT 24	May 16 01:38:39 PM PDT 24	2585987132 ps
T151	/workspace/coverage/default/32.sram_ctrl_regwen.1991923582	May 16 01:19:06 PM PDT 24	May 16 01:32:39 PM PDT 24	13878043143 ps
T199	/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.3261813606	May 16 01:17:01 PM PDT 24	May 16 01:17:13 PM PDT 24	135685061 ps
T26	/workspace/coverage/default/23.sram_ctrl_alert_test.2917124079	May 16 01:18:24 PM PDT 24	May 16 01:18:29 PM PDT 24	26898885 ps
T157	/workspace/coverage/default/22.sram_ctrl_executable.2786522620	May 16 01:18:13 PM PDT 24	May 16 01:36:21 PM PDT 24	1814486446 ps
T24	/workspace/coverage/default/2.sram_ctrl_alert_test.1387374006	May 16 01:16:58 PM PDT 24	May 16 01:17:01 PM PDT 24	11044682 ps
T145	/workspace/coverage/default/6.sram_ctrl_executable.1619367645	May 16 01:17:17 PM PDT 24	May 16 01:39:36 PM PDT 24	19528417544 ps
T25	/workspace/coverage/default/38.sram_ctrl_alert_test.916910510	May 16 01:19:35 PM PDT 24	May 16 01:19:40 PM PDT 24	45422563 ps
T200	/workspace/coverage/default/6.sram_ctrl_partial_access.3009584176	May 16 01:17:13 PM PDT 24	May 16 01:17:49 PM PDT 24	313819565 ps
T161	/workspace/coverage/default/22.sram_ctrl_stress_all.1594667724	May 16 01:18:15 PM PDT 24	May 16 02:58:00 PM PDT 24	34365859403 ps
T201	/workspace/coverage/default/36.sram_ctrl_ram_cfg.3872421717	May 16 01:19:23 PM PDT 24	May 16 01:19:28 PM PDT 24	26732380 ps
T202	/workspace/coverage/default/6.sram_ctrl_regwen.924303331	May 16 01:17:18 PM PDT 24	May 16 01:28:22 PM PDT 24	7642925403 ps
T203	/workspace/coverage/default/36.sram_ctrl_mem_walk.1822717308	May 16 01:19:20 PM PDT 24	May 16 01:19:30 PM PDT 24	525651265 ps
T204	/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1254320030	May 16 01:20:03 PM PDT 24	May 16 01:26:12 PM PDT 24	37432668786 ps
T205	/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4189297126	May 16 01:20:25 PM PDT 24	May 16 01:21:49 PM PDT 24	917892318 ps
T169	/workspace/coverage/default/21.sram_ctrl_regwen.3238053111	May 16 01:18:12 PM PDT 24	May 16 01:32:50 PM PDT 24	55029177960 ps
T206	/workspace/coverage/default/6.sram_ctrl_max_throughput.104518256	May 16 01:17:08 PM PDT 24	May 16 01:17:51 PM PDT 24	180464648 ps
T152	/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1743208964	May 16 01:17:47 PM PDT 24	May 16 01:39:20 PM PDT 24	15194959986 ps
T207	/workspace/coverage/default/40.sram_ctrl_ram_cfg.1215151555	May 16 01:19:45 PM PDT 24	May 16 01:19:48 PM PDT 24	28201070 ps
T208	/workspace/coverage/default/16.sram_ctrl_alert_test.3866370030	May 16 01:17:48 PM PDT 24	May 16 01:17:51 PM PDT 24	22074009 ps
T209	/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.1857011395	May 16 01:18:37 PM PDT 24	May 16 01:18:45 PM PDT 24	567023802 ps
T210	/workspace/coverage/default/38.sram_ctrl_mem_walk.989841509	May 16 01:19:35 PM PDT 24	May 16 01:19:45 PM PDT 24	142914729 ps
T211	/workspace/coverage/default/24.sram_ctrl_bijection.3548633660	May 16 01:18:26 PM PDT 24	May 16 01:19:29 PM PDT 24	5724391837 ps
T159	/workspace/coverage/default/15.sram_ctrl_bijection.2111241959	May 16 01:18:00 PM PDT 24	May 16 01:19:01 PM PDT 24	4043722279 ps
T146	/workspace/coverage/default/37.sram_ctrl_stress_all.1214361042	May 16 01:19:26 PM PDT 24	May 16 02:43:31 PM PDT 24	258867671005 ps
T212	/workspace/coverage/default/33.sram_ctrl_smoke.1869478205	May 16 01:19:22 PM PDT 24	May 16 01:19:28 PM PDT 24	454511997 ps
T162	/workspace/coverage/default/33.sram_ctrl_alert_test.1602067892	May 16 01:19:21 PM PDT 24	May 16 01:19:24 PM PDT 24	21725629 ps
T213	/workspace/coverage/default/14.sram_ctrl_smoke.1561823122	May 16 01:17:36 PM PDT 24	May 16 01:17:50 PM PDT 24	204883700 ps
T21	/workspace/coverage/default/2.sram_ctrl_sec_cm.1547129872	May 16 01:16:46 PM PDT 24	May 16 01:16:50 PM PDT 24	626020966 ps
T214	/workspace/coverage/default/18.sram_ctrl_bijection.1352568761	May 16 01:17:59 PM PDT 24	May 16 01:19:03 PM PDT 24	5076459890 ps
T215	/workspace/coverage/default/2.sram_ctrl_bijection.1648254156	May 16 01:16:46 PM PDT 24	May 16 01:17:31 PM PDT 24	746479188 ps
T216	/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2339682576	May 16 01:20:33 PM PDT 24	May 16 01:25:24 PM PDT 24	42344224681 ps
T217	/workspace/coverage/default/10.sram_ctrl_lc_escalation.1242112842	May 16 01:17:28 PM PDT 24	May 16 01:17:35 PM PDT 24	390944409 ps
T218	/workspace/coverage/default/35.sram_ctrl_mem_walk.884646086	May 16 01:19:26 PM PDT 24	May 16 01:19:36 PM PDT 24	260827006 ps
T32	/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.638537498	May 16 01:16:48 PM PDT 24	May 16 01:25:26 PM PDT 24	3880419983 ps
T54	/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.616800345	May 16 01:18:36 PM PDT 24	May 16 01:28:13 PM PDT 24	64729154855 ps
T55	/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.3022595550	May 16 01:18:18 PM PDT 24	May 16 01:18:35 PM PDT 24	325466771 ps
T56	/workspace/coverage/default/33.sram_ctrl_mem_walk.1246987845	May 16 01:19:22 PM PDT 24	May 16 01:19:31 PM PDT 24	693973459 ps
T57	/workspace/coverage/default/23.sram_ctrl_stress_pipeline.3214869396	May 16 01:18:15 PM PDT 24	May 16 01:24:51 PM PDT 24	4615884819 ps
T58	/workspace/coverage/default/21.sram_ctrl_stress_pipeline.2292507141	May 16 01:18:23 PM PDT 24	May 16 01:22:29 PM PDT 24	8304196950 ps
T59	/workspace/coverage/default/38.sram_ctrl_bijection.4199974500	May 16 01:19:28 PM PDT 24	May 16 01:20:56 PM PDT 24	19541605511 ps
T60	/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.715875053	May 16 01:20:19 PM PDT 24	May 16 01:24:40 PM PDT 24	5073533161 ps
T61	/workspace/coverage/default/6.sram_ctrl_alert_test.381245232	May 16 01:17:18 PM PDT 24	May 16 01:17:22 PM PDT 24	24997515 ps
T62	/workspace/coverage/default/10.sram_ctrl_executable.170858220	May 16 01:17:27 PM PDT 24	May 16 01:27:43 PM PDT 24	47334873316 ps
T219	/workspace/coverage/default/17.sram_ctrl_bijection.2637512147	May 16 01:18:00 PM PDT 24	May 16 01:18:35 PM PDT 24	1488834743 ps
T148	/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2613268115	May 16 01:17:25 PM PDT 24	May 16 01:24:09 PM PDT 24	68457178901 ps
T220	/workspace/coverage/default/30.sram_ctrl_stress_all.1680497324	May 16 01:19:04 PM PDT 24	May 16 01:38:53 PM PDT 24	126648928305 ps
T221	/workspace/coverage/default/24.sram_ctrl_alert_test.344270040	May 16 01:18:25 PM PDT 24	May 16 01:18:29 PM PDT 24	10288279 ps
T222	/workspace/coverage/default/11.sram_ctrl_lc_escalation.1954634349	May 16 01:17:28 PM PDT 24	May 16 01:17:35 PM PDT 24	598743780 ps
T223	/workspace/coverage/default/34.sram_ctrl_access_during_key_req.4165308215	May 16 01:19:23 PM PDT 24	May 16 01:28:00 PM PDT 24	2838245067 ps
T224	/workspace/coverage/default/28.sram_ctrl_access_during_key_req.4092606566	May 16 01:18:48 PM PDT 24	May 16 01:31:12 PM PDT 24	5418851019 ps
T225	/workspace/coverage/default/9.sram_ctrl_mem_walk.930555121	May 16 01:17:27 PM PDT 24	May 16 01:17:35 PM PDT 24	239453542 ps
T226	/workspace/coverage/default/4.sram_ctrl_smoke.2139249846	May 16 01:17:02 PM PDT 24	May 16 01:19:27 PM PDT 24	162582347 ps
T227	/workspace/coverage/default/32.sram_ctrl_lc_escalation.1607380225	May 16 01:19:05 PM PDT 24	May 16 01:19:16 PM PDT 24	1228839796 ps
T228	/workspace/coverage/default/21.sram_ctrl_executable.163255399	May 16 01:18:12 PM PDT 24	May 16 01:49:40 PM PDT 24	85526362271 ps
T229	/workspace/coverage/default/14.sram_ctrl_stress_all.1539033668	May 16 01:17:49 PM PDT 24	May 16 02:00:23 PM PDT 24	7739920631 ps
T230	/workspace/coverage/default/37.sram_ctrl_stress_pipeline.2922724108	May 16 01:19:26 PM PDT 24	May 16 01:24:14 PM PDT 24	15770879188 ps
T231	/workspace/coverage/default/3.sram_ctrl_access_during_key_req.1632162209	May 16 01:17:00 PM PDT 24	May 16 01:37:36 PM PDT 24	16117641964 ps
T232	/workspace/coverage/default/30.sram_ctrl_multiple_keys.541357929	May 16 01:18:51 PM PDT 24	May 16 01:29:53 PM PDT 24	30686381871 ps
T22	/workspace/coverage/default/1.sram_ctrl_sec_cm.400517549	May 16 01:16:48 PM PDT 24	May 16 01:16:54 PM PDT 24	541113726 ps
T33	/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.3623114933	May 16 01:19:51 PM PDT 24	May 16 01:27:39 PM PDT 24	1800811971 ps
T233	/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3983825806	May 16 01:20:03 PM PDT 24	May 16 01:24:19 PM PDT 24	10596061892 ps
T234	/workspace/coverage/default/43.sram_ctrl_mem_walk.87437051	May 16 01:20:05 PM PDT 24	May 16 01:20:18 PM PDT 24	975419850 ps
T235	/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2735195751	May 16 01:17:39 PM PDT 24	May 16 01:33:58 PM PDT 24	13169884008 ps
T236	/workspace/coverage/default/45.sram_ctrl_max_throughput.163894137	May 16 01:20:13 PM PDT 24	May 16 01:22:33 PM PDT 24	525560612 ps
T237	/workspace/coverage/default/19.sram_ctrl_mem_partial_access.2337211803	May 16 01:18:13 PM PDT 24	May 16 01:18:22 PM PDT 24	1475445200 ps
T238	/workspace/coverage/default/23.sram_ctrl_ram_cfg.4116134566	May 16 01:18:15 PM PDT 24	May 16 01:18:21 PM PDT 24	46365752 ps
T239	/workspace/coverage/default/7.sram_ctrl_lc_escalation.2604594905	May 16 01:17:19 PM PDT 24	May 16 01:17:29 PM PDT 24	952429302 ps
T240	/workspace/coverage/default/49.sram_ctrl_mem_walk.2312587772	May 16 01:20:30 PM PDT 24	May 16 01:20:41 PM PDT 24	1180960229 ps
T241	/workspace/coverage/default/19.sram_ctrl_stress_pipeline.641424524	May 16 01:18:01 PM PDT 24	May 16 01:24:30 PM PDT 24	16404304964 ps
T242	/workspace/coverage/default/21.sram_ctrl_lc_escalation.3013803565	May 16 01:18:14 PM PDT 24	May 16 01:18:22 PM PDT 24	653697172 ps
T243	/workspace/coverage/default/37.sram_ctrl_executable.3500498498	May 16 01:19:27 PM PDT 24	May 16 01:20:17 PM PDT 24	5870893069 ps
T244	/workspace/coverage/default/36.sram_ctrl_alert_test.3460484640	May 16 01:19:26 PM PDT 24	May 16 01:19:33 PM PDT 24	14811806 ps
T245	/workspace/coverage/default/25.sram_ctrl_smoke.1465935772	May 16 01:18:26 PM PDT 24	May 16 01:18:30 PM PDT 24	39270166 ps
T246	/workspace/coverage/default/15.sram_ctrl_mem_walk.714648061	May 16 01:17:52 PM PDT 24	May 16 01:18:00 PM PDT 24	335251683 ps
T247	/workspace/coverage/default/13.sram_ctrl_alert_test.2533924979	May 16 01:17:39 PM PDT 24	May 16 01:17:43 PM PDT 24	42768183 ps
T248	/workspace/coverage/default/8.sram_ctrl_alert_test.1303624372	May 16 01:17:23 PM PDT 24	May 16 01:17:26 PM PDT 24	36419777 ps
T249	/workspace/coverage/default/14.sram_ctrl_executable.1775169610	May 16 01:17:47 PM PDT 24	May 16 01:23:05 PM PDT 24	12427773931 ps
T250	/workspace/coverage/default/2.sram_ctrl_stress_pipeline.2236052961	May 16 01:16:46 PM PDT 24	May 16 01:21:50 PM PDT 24	3033627977 ps
T251	/workspace/coverage/default/5.sram_ctrl_alert_test.1868372551	May 16 01:17:11 PM PDT 24	May 16 01:17:16 PM PDT 24	54642590 ps
T149	/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.2275851071	May 16 01:19:21 PM PDT 24	May 16 01:25:40 PM PDT 24	66023897719 ps
T252	/workspace/coverage/default/32.sram_ctrl_multiple_keys.3193666208	May 16 01:19:04 PM PDT 24	May 16 01:29:44 PM PDT 24	41768608290 ps
T253	/workspace/coverage/default/44.sram_ctrl_smoke.2080262127	May 16 01:20:04 PM PDT 24	May 16 01:20:25 PM PDT 24	1183381675 ps
T254	/workspace/coverage/default/40.sram_ctrl_partial_access.2101014354	May 16 01:19:38 PM PDT 24	May 16 01:19:45 PM PDT 24	54198272 ps
T255	/workspace/coverage/default/48.sram_ctrl_stress_pipeline.785444267	May 16 01:20:20 PM PDT 24	May 16 01:25:11 PM PDT 24	5800965354 ps
T256	/workspace/coverage/default/34.sram_ctrl_stress_all.3111029674	May 16 01:19:22 PM PDT 24	May 16 02:08:08 PM PDT 24	17667637495 ps
T257	/workspace/coverage/default/26.sram_ctrl_mem_partial_access.897423637	May 16 01:18:36 PM PDT 24	May 16 01:18:43 PM PDT 24	614374567 ps
T258	/workspace/coverage/default/29.sram_ctrl_mem_partial_access.4038993169	May 16 01:18:50 PM PDT 24	May 16 01:18:57 PM PDT 24	1416470136 ps
T259	/workspace/coverage/default/34.sram_ctrl_stress_pipeline.349325380	May 16 01:19:23 PM PDT 24	May 16 01:22:07 PM PDT 24	1816499800 ps
T260	/workspace/coverage/default/34.sram_ctrl_lc_escalation.4170979369	May 16 01:19:21 PM PDT 24	May 16 01:19:24 PM PDT 24	116744924 ps
T261	/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1219341424	May 16 01:17:38 PM PDT 24	May 16 01:25:28 PM PDT 24	325914530303 ps
T262	/workspace/coverage/default/31.sram_ctrl_mem_partial_access.2675477923	May 16 01:19:02 PM PDT 24	May 16 01:19:07 PM PDT 24	194332540 ps
T263	/workspace/coverage/default/6.sram_ctrl_mem_partial_access.974414009	May 16 01:17:28 PM PDT 24	May 16 01:17:34 PM PDT 24	172983843 ps
T264	/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1841183346	May 16 01:20:32 PM PDT 24	May 16 01:22:54 PM PDT 24	544435162 ps
T265	/workspace/coverage/default/48.sram_ctrl_multiple_keys.816613880	May 16 01:20:22 PM PDT 24	May 16 01:49:54 PM PDT 24	125276221554 ps
T266	/workspace/coverage/default/34.sram_ctrl_regwen.3126223142	May 16 01:19:25 PM PDT 24	May 16 01:42:54 PM PDT 24	24004961271 ps
T267	/workspace/coverage/default/44.sram_ctrl_partial_access.1398441761	May 16 01:20:01 PM PDT 24	May 16 01:20:08 PM PDT 24	578288959 ps
T268	/workspace/coverage/default/26.sram_ctrl_regwen.377293183	May 16 01:18:38 PM PDT 24	May 16 01:28:50 PM PDT 24	39004127716 ps
T269	/workspace/coverage/default/39.sram_ctrl_smoke.2687228143	May 16 01:19:35 PM PDT 24	May 16 01:19:53 PM PDT 24	3300317104 ps
T270	/workspace/coverage/default/1.sram_ctrl_bijection.1370871103	May 16 01:16:47 PM PDT 24	May 16 01:17:16 PM PDT 24	1202761252 ps
T271	/workspace/coverage/default/29.sram_ctrl_mem_walk.591121571	May 16 01:18:52 PM PDT 24	May 16 01:19:00 PM PDT 24	235824053 ps
T272	/workspace/coverage/default/46.sram_ctrl_regwen.4151463950	May 16 01:20:13 PM PDT 24	May 16 01:26:46 PM PDT 24	8986230665 ps
T273	/workspace/coverage/default/47.sram_ctrl_mem_walk.4002962453	May 16 01:20:21 PM PDT 24	May 16 01:20:33 PM PDT 24	1807189593 ps
T274	/workspace/coverage/default/18.sram_ctrl_max_throughput.1129739376	May 16 01:17:59 PM PDT 24	May 16 01:18:07 PM PDT 24	192849808 ps
T275	/workspace/coverage/default/3.sram_ctrl_multiple_keys.4145934138	May 16 01:16:58 PM PDT 24	May 16 01:21:15 PM PDT 24	1731079920 ps
T276	/workspace/coverage/default/12.sram_ctrl_regwen.1187225962	May 16 01:17:38 PM PDT 24	May 16 01:24:14 PM PDT 24	1430464629 ps
T277	/workspace/coverage/default/7.sram_ctrl_multiple_keys.981955832	May 16 01:17:16 PM PDT 24	May 16 01:26:08 PM PDT 24	5112248521 ps
T278	/workspace/coverage/default/42.sram_ctrl_lc_escalation.3842979956	May 16 01:19:51 PM PDT 24	May 16 01:20:05 PM PDT 24	2587590219 ps
T279	/workspace/coverage/default/43.sram_ctrl_smoke.639205867	May 16 01:19:52 PM PDT 24	May 16 01:20:39 PM PDT 24	187006331 ps
T280	/workspace/coverage/default/11.sram_ctrl_mem_walk.133574687	May 16 01:17:37 PM PDT 24	May 16 01:17:46 PM PDT 24	897513619 ps
T281	/workspace/coverage/default/8.sram_ctrl_max_throughput.2446921947	May 16 01:17:17 PM PDT 24	May 16 01:18:20 PM PDT 24	670414577 ps
T282	/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1072495413	May 16 01:17:41 PM PDT 24	May 16 01:17:48 PM PDT 24	238364388 ps
T283	/workspace/coverage/default/29.sram_ctrl_partial_access.2568105177	May 16 01:18:52 PM PDT 24	May 16 01:19:07 PM PDT 24	558073105 ps
T284	/workspace/coverage/default/28.sram_ctrl_alert_test.4290652869	May 16 01:18:49 PM PDT 24	May 16 01:18:54 PM PDT 24	38114403 ps
T285	/workspace/coverage/default/41.sram_ctrl_access_during_key_req.2508675172	May 16 01:19:45 PM PDT 24	May 16 01:36:37 PM PDT 24	19695365403 ps
T34	/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.506446911	May 16 01:20:01 PM PDT 24	May 16 01:20:20 PM PDT 24	573614216 ps
T124	/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2064330777	May 16 01:19:20 PM PDT 24	May 16 01:20:14 PM PDT 24	569024013 ps
T125	/workspace/coverage/default/39.sram_ctrl_regwen.2263933856	May 16 01:19:34 PM PDT 24	May 16 01:22:07 PM PDT 24	4477356212 ps
T126	/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1208728318	May 16 01:17:43 PM PDT 24	May 16 01:19:22 PM PDT 24	613858415 ps
T127	/workspace/coverage/default/2.sram_ctrl_lc_escalation.3381377447	May 16 01:16:46 PM PDT 24	May 16 01:16:53 PM PDT 24	625556492 ps
T128	/workspace/coverage/default/4.sram_ctrl_access_during_key_req.893369702	May 16 01:16:58 PM PDT 24	May 16 01:47:15 PM PDT 24	7423020023 ps
T47	/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.4146321501	May 16 01:20:32 PM PDT 24	May 16 01:23:45 PM PDT 24	1313341993 ps
T129	/workspace/coverage/default/13.sram_ctrl_partial_access.2080339765	May 16 01:17:36 PM PDT 24	May 16 01:18:37 PM PDT 24	1813618328 ps
T130	/workspace/coverage/default/31.sram_ctrl_access_during_key_req.2535856935	May 16 01:19:02 PM PDT 24	May 16 01:27:44 PM PDT 24	12200744454 ps
T131	/workspace/coverage/default/49.sram_ctrl_smoke.1434693825	May 16 01:20:30 PM PDT 24	May 16 01:20:41 PM PDT 24	166040592 ps
T48	/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3109090866	May 16 01:20:25 PM PDT 24	May 16 01:21:52 PM PDT 24	4403692292 ps
T286	/workspace/coverage/default/13.sram_ctrl_ram_cfg.3702865177	May 16 01:17:36 PM PDT 24	May 16 01:17:40 PM PDT 24	72152212 ps
T287	/workspace/coverage/default/7.sram_ctrl_executable.934928175	May 16 01:17:22 PM PDT 24	May 16 01:18:17 PM PDT 24	6213691699 ps
T288	/workspace/coverage/default/32.sram_ctrl_partial_access.3584059386	May 16 01:19:05 PM PDT 24	May 16 01:19:12 PM PDT 24	80902737 ps
T289	/workspace/coverage/default/45.sram_ctrl_smoke.3844238629	May 16 01:20:05 PM PDT 24	May 16 01:20:22 PM PDT 24	274021015 ps
T290	/workspace/coverage/default/25.sram_ctrl_regwen.484300141	May 16 01:18:30 PM PDT 24	May 16 01:34:41 PM PDT 24	157334251355 ps
T291	/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.2104081577	May 16 01:18:00 PM PDT 24	May 16 01:22:05 PM PDT 24	3517760140 ps
T292	/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3678336511	May 16 01:20:22 PM PDT 24	May 16 01:32:45 PM PDT 24	3669519737 ps
T293	/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2081364856	May 16 01:18:15 PM PDT 24	May 16 01:24:50 PM PDT 24	5584650740 ps
T294	/workspace/coverage/default/18.sram_ctrl_partial_access.909359511	May 16 01:17:59 PM PDT 24	May 16 01:18:13 PM PDT 24	225912283 ps
T295	/workspace/coverage/default/44.sram_ctrl_stress_all.1826845435	May 16 01:20:03 PM PDT 24	May 16 01:49:39 PM PDT 24	36212219804 ps
T296	/workspace/coverage/default/23.sram_ctrl_access_during_key_req.586785465	May 16 01:18:16 PM PDT 24	May 16 01:34:38 PM PDT 24	8169394752 ps
T297	/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1669398422	May 16 01:16:49 PM PDT 24	May 16 01:30:11 PM PDT 24	8652868849 ps
T298	/workspace/coverage/default/30.sram_ctrl_ram_cfg.2421008639	May 16 01:19:06 PM PDT 24	May 16 01:19:11 PM PDT 24	305083317 ps
T299	/workspace/coverage/default/44.sram_ctrl_mem_partial_access.285396646	May 16 01:20:02 PM PDT 24	May 16 01:20:08 PM PDT 24	249421577 ps
T300	/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.1266802248	May 16 01:19:26 PM PDT 24	May 16 01:24:31 PM PDT 24	29204572941 ps
T301	/workspace/coverage/default/37.sram_ctrl_ram_cfg.1020208672	May 16 01:19:32 PM PDT 24	May 16 01:19:38 PM PDT 24	141898458 ps
T302	/workspace/coverage/default/46.sram_ctrl_alert_test.3484038679	May 16 01:20:20 PM PDT 24	May 16 01:20:22 PM PDT 24	16729516 ps
T303	/workspace/coverage/default/29.sram_ctrl_stress_all.3261683447	May 16 01:18:53 PM PDT 24	May 16 01:52:52 PM PDT 24	165669645909 ps
T304	/workspace/coverage/default/43.sram_ctrl_bijection.3245007366	May 16 01:19:52 PM PDT 24	May 16 01:20:39 PM PDT 24	1381282763 ps
T305	/workspace/coverage/default/6.sram_ctrl_bijection.789014712	May 16 01:17:12 PM PDT 24	May 16 01:17:37 PM PDT 24	1471161678 ps
T306	/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1429224100	May 16 01:20:13 PM PDT 24	May 16 01:22:46 PM PDT 24	6436159688 ps
T307	/workspace/coverage/default/20.sram_ctrl_ram_cfg.3164321332	May 16 01:18:23 PM PDT 24	May 16 01:18:27 PM PDT 24	83761887 ps
T308	/workspace/coverage/default/43.sram_ctrl_ram_cfg.1722071652	May 16 01:20:02 PM PDT 24	May 16 01:20:05 PM PDT 24	60095902 ps