Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1216454113 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1258048440 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3054012943 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1851812129 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1196392715 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2307832515 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1098352998 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2442940007 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2396253224 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2819372437 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3884808330 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1999241870 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3545385767 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.162563705 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.674355047 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1572792678 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1734269267 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2919162252 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.760812860 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3364937398 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.4079398305 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2664566969 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.434394339 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2771712295 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1455948794 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2837447264 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1688574319 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2098185873 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.480789768 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2788827085 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.712712260 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3593946648 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3640496463 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3408770471 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3462693917 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3278277744 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.116955404 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.724622381 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.558430730 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3528221062 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3975793412 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3449943147 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.751673348 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.743492823 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3902268193 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1894922202 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3429743386 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2106516917 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1951382022 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.142536866 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1755436365 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2639692573 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2038785857 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1243750082 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3501808164 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1767032617 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.134737695 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.60860739 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1639627560 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2630011504 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2587606732 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.561383957 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3815136824 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2958928218 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.4156343642 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2716707829 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2629579832 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3952608978 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1767157949 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1915340668 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1475523513 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2700297377 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2150164418 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.899102490 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.612329717 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1321045620 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2848668694 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3557732267 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3723188918 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.4144644854 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.4022392641 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.295016107 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.4063326926 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.4129511744 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1622827798 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.127009004 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1135585842 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2099710662 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.520706222 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.361379805 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3754363944 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.20967390 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3749766684 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1792910124 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2090478171 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.47786018 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3180300785 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.251432631 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3840747631 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2962887802 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3362625553 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.966465600 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1070766115 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.989310045 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1319225067 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.483889640 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1063196407 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.715406876 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2019952100 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3128226975 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2095668437 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.4276526963 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2444789344 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1618064568 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.4157560914 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3785472870 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.159495963 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.733579184 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.119834369 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3440456908 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.847836463 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.937744968 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1421092101 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3405299935 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1814535661 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.753335427 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3988593637 |
/workspace/coverage/default/0.sram_ctrl_bijection.1255097743 |
/workspace/coverage/default/0.sram_ctrl_executable.1357570601 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3881134733 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.2084367066 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1311373906 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.2199667257 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3573493473 |
/workspace/coverage/default/0.sram_ctrl_partial_access.3333647849 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1958561373 |
/workspace/coverage/default/0.sram_ctrl_regwen.2502233234 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.2525152058 |
/workspace/coverage/default/0.sram_ctrl_smoke.2109932514 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1202752481 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.788575929 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.123886089 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3171636569 |
/workspace/coverage/default/1.sram_ctrl_alert_test.2864820028 |
/workspace/coverage/default/1.sram_ctrl_bijection.904010650 |
/workspace/coverage/default/1.sram_ctrl_executable.2412171551 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.744502254 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.636370184 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.361185206 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.755365036 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2841659365 |
/workspace/coverage/default/1.sram_ctrl_partial_access.1271343394 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2115308256 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.190944249 |
/workspace/coverage/default/1.sram_ctrl_regwen.1804411563 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.4244960739 |
/workspace/coverage/default/1.sram_ctrl_smoke.146269837 |
/workspace/coverage/default/1.sram_ctrl_stress_all.2530989405 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3175918549 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2067447646 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3569470178 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2864946405 |
/workspace/coverage/default/10.sram_ctrl_alert_test.2150319975 |
/workspace/coverage/default/10.sram_ctrl_bijection.516853374 |
/workspace/coverage/default/10.sram_ctrl_executable.1940201307 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.992708555 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.1125453952 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.769658744 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.3625853366 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3491756561 |
/workspace/coverage/default/10.sram_ctrl_partial_access.3874654359 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3121116805 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1788651933 |
/workspace/coverage/default/10.sram_ctrl_regwen.744004313 |
/workspace/coverage/default/10.sram_ctrl_smoke.69271844 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.737643653 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1237740691 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.4233726967 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3514825261 |
/workspace/coverage/default/11.sram_ctrl_alert_test.3004766693 |
/workspace/coverage/default/11.sram_ctrl_bijection.3451137772 |
/workspace/coverage/default/11.sram_ctrl_executable.1761596123 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2311830015 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.1517222980 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1589036343 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.1074952448 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3704550308 |
/workspace/coverage/default/11.sram_ctrl_partial_access.3882546857 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1781818733 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3836744590 |
/workspace/coverage/default/11.sram_ctrl_regwen.4115697672 |
/workspace/coverage/default/11.sram_ctrl_smoke.3718742831 |
/workspace/coverage/default/11.sram_ctrl_stress_all.2955379329 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3537073161 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.451715693 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3583495003 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2744093041 |
/workspace/coverage/default/12.sram_ctrl_alert_test.1989238441 |
/workspace/coverage/default/12.sram_ctrl_bijection.2417976150 |
/workspace/coverage/default/12.sram_ctrl_executable.486161691 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.629346920 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.3763613045 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.4166469769 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.97202357 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3698670454 |
/workspace/coverage/default/12.sram_ctrl_partial_access.3275666791 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.4252051970 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.954631863 |
/workspace/coverage/default/12.sram_ctrl_regwen.1883699264 |
/workspace/coverage/default/12.sram_ctrl_smoke.3538741854 |
/workspace/coverage/default/12.sram_ctrl_stress_all.2568774410 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.917558851 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.925901640 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3121894773 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.4199963549 |
/workspace/coverage/default/13.sram_ctrl_alert_test.2732323691 |
/workspace/coverage/default/13.sram_ctrl_bijection.1977997767 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.2676583204 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.2138927600 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2681354187 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.401060767 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.3324476891 |
/workspace/coverage/default/13.sram_ctrl_partial_access.1748881455 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3032800833 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.2418097676 |
/workspace/coverage/default/13.sram_ctrl_regwen.2336426733 |
/workspace/coverage/default/13.sram_ctrl_smoke.4141498 |
/workspace/coverage/default/13.sram_ctrl_stress_all.1588269413 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.3885396968 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3190332490 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.2170502233 |
/workspace/coverage/default/14.sram_ctrl_alert_test.619566325 |
/workspace/coverage/default/14.sram_ctrl_bijection.425668822 |
/workspace/coverage/default/14.sram_ctrl_executable.2947788490 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.3248958288 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.1352933153 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2437204441 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.435708495 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.4155465323 |
/workspace/coverage/default/14.sram_ctrl_partial_access.2596446952 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.1527667128 |
/workspace/coverage/default/14.sram_ctrl_regwen.3243760657 |
/workspace/coverage/default/14.sram_ctrl_smoke.3061981801 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3137716222 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.2357564592 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3251364231 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1180388889 |
/workspace/coverage/default/15.sram_ctrl_alert_test.1108042212 |
/workspace/coverage/default/15.sram_ctrl_bijection.2052911342 |
/workspace/coverage/default/15.sram_ctrl_executable.2398690574 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.2116314690 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.4201751326 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.731459811 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.2625599989 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.532606444 |
/workspace/coverage/default/15.sram_ctrl_partial_access.4043437615 |
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/workspace/coverage/default/45.sram_ctrl_multiple_keys.3419393672 |
/workspace/coverage/default/45.sram_ctrl_partial_access.1076293225 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.4203860864 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1541949830 |
/workspace/coverage/default/45.sram_ctrl_regwen.3725846114 |
/workspace/coverage/default/45.sram_ctrl_smoke.1066364345 |
/workspace/coverage/default/45.sram_ctrl_stress_all.1659201152 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3915869661 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1057300626 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2994135328 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1403026053 |
/workspace/coverage/default/46.sram_ctrl_alert_test.4249354063 |
/workspace/coverage/default/46.sram_ctrl_bijection.2139270117 |
/workspace/coverage/default/46.sram_ctrl_executable.4290362408 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3748822547 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.4224060440 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3992493673 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.2013295513 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3581604780 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1826473910 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.948743905 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3447902804 |
/workspace/coverage/default/46.sram_ctrl_regwen.3916532141 |
/workspace/coverage/default/46.sram_ctrl_smoke.2462665191 |
/workspace/coverage/default/46.sram_ctrl_stress_all.2831648508 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1004986132 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1694249817 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1962840863 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3927557403 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3386816917 |
/workspace/coverage/default/47.sram_ctrl_bijection.2420083725 |
/workspace/coverage/default/47.sram_ctrl_executable.4153050297 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2991002215 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.1712190216 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.810371447 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.1268040935 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1361768382 |
/workspace/coverage/default/47.sram_ctrl_partial_access.3916614216 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.39486316 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1215838684 |
/workspace/coverage/default/47.sram_ctrl_regwen.3014336891 |
/workspace/coverage/default/47.sram_ctrl_smoke.3904609872 |
/workspace/coverage/default/47.sram_ctrl_stress_all.1415510827 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.549528168 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.232407705 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.859889245 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2839771623 |
/workspace/coverage/default/48.sram_ctrl_alert_test.964552814 |
/workspace/coverage/default/48.sram_ctrl_bijection.772566681 |
/workspace/coverage/default/48.sram_ctrl_executable.3609418672 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.13526409 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.2060625115 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1111171497 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.3499905071 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1991882651 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2588537646 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1699186694 |
/workspace/coverage/default/48.sram_ctrl_regwen.3325305748 |
/workspace/coverage/default/48.sram_ctrl_smoke.836841239 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3795302057 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1229314311 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2854512248 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2232969604 |
/workspace/coverage/default/49.sram_ctrl_alert_test.677042826 |
/workspace/coverage/default/49.sram_ctrl_bijection.3440017942 |
/workspace/coverage/default/49.sram_ctrl_executable.2243168763 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.217930139 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.3271053782 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2612199844 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.2208378633 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.661334405 |
/workspace/coverage/default/49.sram_ctrl_partial_access.3088792264 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3691602410 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1841063933 |
/workspace/coverage/default/49.sram_ctrl_regwen.2595477876 |
/workspace/coverage/default/49.sram_ctrl_smoke.3248179160 |
/workspace/coverage/default/49.sram_ctrl_stress_all.1715446314 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3196013563 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1150882205 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.919228018 |
/workspace/coverage/default/5.sram_ctrl_alert_test.1284244908 |
/workspace/coverage/default/5.sram_ctrl_bijection.2505310213 |
/workspace/coverage/default/5.sram_ctrl_executable.2731298525 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1716537980 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.3170049498 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.66167547 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.3795265386 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2253304182 |
/workspace/coverage/default/5.sram_ctrl_partial_access.2448291628 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3640278573 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2774422247 |
/workspace/coverage/default/5.sram_ctrl_regwen.1491470970 |
/workspace/coverage/default/5.sram_ctrl_smoke.3293824561 |
/workspace/coverage/default/5.sram_ctrl_stress_all.1727197276 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.870858722 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2068704272 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3557882919 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.940773841 |
/workspace/coverage/default/6.sram_ctrl_alert_test.3902088259 |
/workspace/coverage/default/6.sram_ctrl_bijection.49230753 |
/workspace/coverage/default/6.sram_ctrl_executable.3485953995 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2726703616 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.2810619100 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.4034125201 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.2983998091 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.476400138 |
/workspace/coverage/default/6.sram_ctrl_partial_access.4009436911 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.117486944 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.677112873 |
/workspace/coverage/default/6.sram_ctrl_regwen.3381355880 |
/workspace/coverage/default/6.sram_ctrl_smoke.1269136560 |
/workspace/coverage/default/6.sram_ctrl_stress_all.3125101263 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.4276623309 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.625697456 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1509400507 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2745728519 |
/workspace/coverage/default/7.sram_ctrl_alert_test.700888465 |
/workspace/coverage/default/7.sram_ctrl_bijection.2639889528 |
/workspace/coverage/default/7.sram_ctrl_executable.1981019125 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3004876252 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.4183805460 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3332692047 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.924395791 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.4182615935 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2506943807 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1309808448 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.420499681 |
/workspace/coverage/default/7.sram_ctrl_regwen.3290596834 |
/workspace/coverage/default/7.sram_ctrl_smoke.2035374544 |
/workspace/coverage/default/7.sram_ctrl_stress_all.3262302857 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.276411745 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.4238743482 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2870053995 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2451464448 |
/workspace/coverage/default/8.sram_ctrl_alert_test.2647367095 |
/workspace/coverage/default/8.sram_ctrl_bijection.3091052414 |
/workspace/coverage/default/8.sram_ctrl_executable.1946287549 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3983115203 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.4160516889 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3350034125 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.1120724115 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3877721790 |
/workspace/coverage/default/8.sram_ctrl_partial_access.593129223 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1422260356 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3920601039 |
/workspace/coverage/default/8.sram_ctrl_regwen.3067699412 |
/workspace/coverage/default/8.sram_ctrl_smoke.3421490819 |
/workspace/coverage/default/8.sram_ctrl_stress_all.1299070815 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3613832617 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3317184583 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1258514925 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.25438416 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1597345723 |
/workspace/coverage/default/9.sram_ctrl_bijection.2882585533 |
/workspace/coverage/default/9.sram_ctrl_executable.1537263178 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.755443316 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1618164384 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.11808946 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.2181227169 |
/workspace/coverage/default/9.sram_ctrl_partial_access.1945480277 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.830581422 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.362939320 |
/workspace/coverage/default/9.sram_ctrl_regwen.2385670459 |
/workspace/coverage/default/9.sram_ctrl_smoke.604669483 |
/workspace/coverage/default/9.sram_ctrl_stress_all.4292874653 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2676519172 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2487876450 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.4267570966 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.127545202 |
|
|
Jun 05 04:40:14 PM PDT 24 |
Jun 05 04:46:48 PM PDT 24 |
15124622897 ps |
T2 |
/workspace/coverage/default/14.sram_ctrl_stress_all.3241831245 |
|
|
Jun 05 04:40:24 PM PDT 24 |
Jun 05 05:19:12 PM PDT 24 |
49525775332 ps |
T3 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.1699168776 |
|
|
Jun 05 04:40:39 PM PDT 24 |
Jun 05 04:40:51 PM PDT 24 |
2281168762 ps |
T7 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.1845851632 |
|
|
Jun 05 04:39:46 PM PDT 24 |
Jun 05 04:39:47 PM PDT 24 |
77313618 ps |
T4 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3992493673 |
|
|
Jun 05 04:43:37 PM PDT 24 |
Jun 05 04:43:42 PM PDT 24 |
68466519 ps |
T8 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.394315311 |
|
|
Jun 05 04:40:37 PM PDT 24 |
Jun 05 04:40:40 PM PDT 24 |
62325801 ps |
T9 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1597345723 |
|
|
Jun 05 04:40:06 PM PDT 24 |
Jun 05 04:40:07 PM PDT 24 |
59067744 ps |
T10 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.1527667128 |
|
|
Jun 05 04:40:25 PM PDT 24 |
Jun 05 04:40:27 PM PDT 24 |
108998134 ps |
T11 |
/workspace/coverage/default/9.sram_ctrl_executable.1537263178 |
|
|
Jun 05 04:40:03 PM PDT 24 |
Jun 05 04:54:01 PM PDT 24 |
37984773614 ps |
T12 |
/workspace/coverage/default/30.sram_ctrl_regwen.990752722 |
|
|
Jun 05 04:41:36 PM PDT 24 |
Jun 05 05:00:27 PM PDT 24 |
2438015045 ps |
T5 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.2676583204 |
|
|
Jun 05 04:40:13 PM PDT 24 |
Jun 05 04:40:21 PM PDT 24 |
2784213365 ps |
T29 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.3239480350 |
|
|
Jun 05 04:43:04 PM PDT 24 |
Jun 05 04:43:06 PM PDT 24 |
32270158 ps |
T13 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3691602410 |
|
|
Jun 05 04:44:04 PM PDT 24 |
Jun 05 04:49:22 PM PDT 24 |
4788544380 ps |
T14 |
/workspace/coverage/default/0.sram_ctrl_smoke.2109932514 |
|
|
Jun 05 04:39:30 PM PDT 24 |
Jun 05 04:39:46 PM PDT 24 |
3731465041 ps |
T56 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.2625599989 |
|
|
Jun 05 04:40:23 PM PDT 24 |
Jun 05 04:40:32 PM PDT 24 |
508962316 ps |
T15 |
/workspace/coverage/default/30.sram_ctrl_alert_test.567117966 |
|
|
Jun 05 04:41:45 PM PDT 24 |
Jun 05 04:41:47 PM PDT 24 |
48178019 ps |
T50 |
/workspace/coverage/default/24.sram_ctrl_regwen.1248886150 |
|
|
Jun 05 04:41:03 PM PDT 24 |
Jun 05 04:57:55 PM PDT 24 |
63190667384 ps |
T41 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.1387080579 |
|
|
Jun 05 04:41:03 PM PDT 24 |
Jun 05 04:58:35 PM PDT 24 |
3263776029 ps |
T60 |
/workspace/coverage/default/26.sram_ctrl_regwen.2391297045 |
|
|
Jun 05 04:41:18 PM PDT 24 |
Jun 05 05:01:57 PM PDT 24 |
7866833325 ps |
T61 |
/workspace/coverage/default/29.sram_ctrl_regwen.2935195305 |
|
|
Jun 05 04:41:34 PM PDT 24 |
Jun 05 04:49:04 PM PDT 24 |
1714074925 ps |
T168 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.1596538455 |
|
|
Jun 05 04:41:25 PM PDT 24 |
Jun 05 04:41:26 PM PDT 24 |
81909151 ps |
T26 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3931959441 |
|
|
Jun 05 04:40:57 PM PDT 24 |
Jun 05 04:45:09 PM PDT 24 |
2148133449 ps |
T68 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.3226692959 |
|
|
Jun 05 04:42:35 PM PDT 24 |
Jun 05 04:42:37 PM PDT 24 |
30571656 ps |
T6 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.1450915165 |
|
|
Jun 05 04:42:43 PM PDT 24 |
Jun 05 04:42:48 PM PDT 24 |
322199804 ps |
T69 |
/workspace/coverage/default/13.sram_ctrl_executable.2667433024 |
|
|
Jun 05 04:40:16 PM PDT 24 |
Jun 05 05:07:22 PM PDT 24 |
5949706223 ps |
T70 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.988092130 |
|
|
Jun 05 04:42:02 PM PDT 24 |
Jun 05 04:42:03 PM PDT 24 |
82100363 ps |
T24 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2311830015 |
|
|
Jun 05 04:40:03 PM PDT 24 |
Jun 05 04:40:14 PM PDT 24 |
2524972326 ps |
T25 |
/workspace/coverage/default/40.sram_ctrl_stress_all.618679911 |
|
|
Jun 05 04:42:48 PM PDT 24 |
Jun 05 05:06:14 PM PDT 24 |
3659284256 ps |
T71 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.4155465323 |
|
|
Jun 05 04:40:16 PM PDT 24 |
Jun 05 04:43:36 PM PDT 24 |
10786837972 ps |
T21 |
/workspace/coverage/default/22.sram_ctrl_regwen.1574438755 |
|
|
Jun 05 04:40:56 PM PDT 24 |
Jun 05 05:00:28 PM PDT 24 |
65471369701 ps |
T72 |
/workspace/coverage/default/12.sram_ctrl_regwen.1883699264 |
|
|
Jun 05 04:40:14 PM PDT 24 |
Jun 05 04:58:59 PM PDT 24 |
53859826195 ps |
T156 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.4182615935 |
|
|
Jun 05 04:39:57 PM PDT 24 |
Jun 05 04:55:36 PM PDT 24 |
13338302225 ps |
T159 |
/workspace/coverage/default/47.sram_ctrl_executable.4153050297 |
|
|
Jun 05 04:43:43 PM PDT 24 |
Jun 05 04:47:03 PM PDT 24 |
5576702796 ps |
T152 |
/workspace/coverage/default/7.sram_ctrl_bijection.2639889528 |
|
|
Jun 05 04:39:57 PM PDT 24 |
Jun 05 04:40:58 PM PDT 24 |
2639397318 ps |
T97 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.1417290272 |
|
|
Jun 05 04:42:07 PM PDT 24 |
Jun 05 04:46:31 PM PDT 24 |
10531170907 ps |
T146 |
/workspace/coverage/default/2.sram_ctrl_bijection.1237482527 |
|
|
Jun 05 04:39:38 PM PDT 24 |
Jun 05 04:40:33 PM PDT 24 |
9641195700 ps |
T150 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3004876252 |
|
|
Jun 05 04:39:59 PM PDT 24 |
Jun 05 04:40:06 PM PDT 24 |
1812507447 ps |
T87 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.625912191 |
|
|
Jun 05 04:39:35 PM PDT 24 |
Jun 05 04:39:38 PM PDT 24 |
173041582 ps |
T167 |
/workspace/coverage/default/4.sram_ctrl_partial_access.1219691824 |
|
|
Jun 05 04:39:47 PM PDT 24 |
Jun 05 04:40:48 PM PDT 24 |
200442145 ps |
T88 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.3919472588 |
|
|
Jun 05 04:42:08 PM PDT 24 |
Jun 05 04:42:14 PM PDT 24 |
1024416631 ps |
T147 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1242279752 |
|
|
Jun 05 04:40:29 PM PDT 24 |
Jun 05 04:42:58 PM PDT 24 |
568483992 ps |
T98 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.597462266 |
|
|
Jun 05 04:41:14 PM PDT 24 |
Jun 05 04:45:54 PM PDT 24 |
3380101436 ps |
T144 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.597159623 |
|
|
Jun 05 04:43:19 PM PDT 24 |
Jun 05 04:43:25 PM PDT 24 |
400424690 ps |
T99 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.695174915 |
|
|
Jun 05 04:40:45 PM PDT 24 |
Jun 05 04:46:40 PM PDT 24 |
18375831468 ps |
T132 |
/workspace/coverage/default/47.sram_ctrl_regwen.3014336891 |
|
|
Jun 05 04:43:44 PM PDT 24 |
Jun 05 04:54:56 PM PDT 24 |
35778779559 ps |
T46 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.3421714873 |
|
|
Jun 05 04:40:39 PM PDT 24 |
Jun 05 04:40:42 PM PDT 24 |
58588457 ps |
T16 |
/workspace/coverage/default/5.sram_ctrl_alert_test.1284244908 |
|
|
Jun 05 04:39:55 PM PDT 24 |
Jun 05 04:39:57 PM PDT 24 |
35574930 ps |
T169 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1703957174 |
|
|
Jun 05 04:43:12 PM PDT 24 |
Jun 05 04:43:25 PM PDT 24 |
75090836 ps |
T170 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.636370184 |
|
|
Jun 05 04:39:35 PM PDT 24 |
Jun 05 04:39:47 PM PDT 24 |
84831170 ps |
T171 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.1268040935 |
|
|
Jun 05 04:43:45 PM PDT 24 |
Jun 05 04:43:54 PM PDT 24 |
139358121 ps |
T172 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.2235313582 |
|
|
Jun 05 04:42:55 PM PDT 24 |
Jun 05 04:44:21 PM PDT 24 |
121988901 ps |
T163 |
/workspace/coverage/default/25.sram_ctrl_bijection.2362844182 |
|
|
Jun 05 04:41:13 PM PDT 24 |
Jun 05 04:42:33 PM PDT 24 |
8136005727 ps |
T142 |
/workspace/coverage/default/11.sram_ctrl_smoke.3718742831 |
|
|
Jun 05 04:40:02 PM PDT 24 |
Jun 05 04:40:05 PM PDT 24 |
196238904 ps |
T134 |
/workspace/coverage/default/8.sram_ctrl_executable.1946287549 |
|
|
Jun 05 04:40:00 PM PDT 24 |
Jun 05 04:56:46 PM PDT 24 |
10987345420 ps |
T173 |
/workspace/coverage/default/5.sram_ctrl_partial_access.2448291628 |
|
|
Jun 05 04:39:47 PM PDT 24 |
Jun 05 04:40:01 PM PDT 24 |
973278467 ps |
T118 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.3333554758 |
|
|
Jun 05 04:41:20 PM PDT 24 |
Jun 05 04:41:27 PM PDT 24 |
1711316680 ps |
T174 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.4233726967 |
|
|
Jun 05 04:40:05 PM PDT 24 |
Jun 05 04:40:15 PM PDT 24 |
257418547 ps |
T155 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.3324476891 |
|
|
Jun 05 04:40:15 PM PDT 24 |
Jun 05 04:49:16 PM PDT 24 |
9417375729 ps |
T160 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.190944249 |
|
|
Jun 05 04:39:42 PM PDT 24 |
Jun 05 04:39:43 PM PDT 24 |
83294856 ps |
T175 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.954631863 |
|
|
Jun 05 04:40:13 PM PDT 24 |
Jun 05 04:40:15 PM PDT 24 |
27964182 ps |
T176 |
/workspace/coverage/default/26.sram_ctrl_smoke.3334197867 |
|
|
Jun 05 04:41:12 PM PDT 24 |
Jun 05 04:42:03 PM PDT 24 |
134508040 ps |
T153 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.142969018 |
|
|
Jun 05 04:39:26 PM PDT 24 |
Jun 05 04:39:28 PM PDT 24 |
83381927 ps |
T154 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.3139249714 |
|
|
Jun 05 04:41:11 PM PDT 24 |
Jun 05 04:50:47 PM PDT 24 |
9532939429 ps |
T158 |
/workspace/coverage/default/37.sram_ctrl_executable.3034739409 |
|
|
Jun 05 04:42:29 PM PDT 24 |
Jun 05 04:43:26 PM PDT 24 |
185099747 ps |
T177 |
/workspace/coverage/default/34.sram_ctrl_smoke.679451880 |
|
|
Jun 05 04:42:02 PM PDT 24 |
Jun 05 04:42:15 PM PDT 24 |
445699642 ps |
T166 |
/workspace/coverage/default/0.sram_ctrl_bijection.1255097743 |
|
|
Jun 05 04:39:27 PM PDT 24 |
Jun 05 04:40:18 PM PDT 24 |
762828055 ps |
T141 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.325870608 |
|
|
Jun 05 04:40:27 PM PDT 24 |
Jun 05 04:40:32 PM PDT 24 |
446857738 ps |
T89 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.474821260 |
|
|
Jun 05 04:43:20 PM PDT 24 |
Jun 05 04:43:23 PM PDT 24 |
62846105 ps |
T47 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.1735656656 |
|
|
Jun 05 04:43:03 PM PDT 24 |
Jun 05 04:43:10 PM PDT 24 |
195307871 ps |
T148 |
/workspace/coverage/default/34.sram_ctrl_executable.129579807 |
|
|
Jun 05 04:42:06 PM PDT 24 |
Jun 05 04:56:30 PM PDT 24 |
4068257154 ps |
T178 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1618164384 |
|
|
Jun 05 04:39:58 PM PDT 24 |
Jun 05 04:42:24 PM PDT 24 |
721593105 ps |
T137 |
/workspace/coverage/default/2.sram_ctrl_executable.3935356271 |
|
|
Jun 05 04:39:35 PM PDT 24 |
Jun 05 04:46:06 PM PDT 24 |
24746667156 ps |
T48 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1384820374 |
|
|
Jun 05 04:43:29 PM PDT 24 |
Jun 05 04:43:36 PM PDT 24 |
181696889 ps |
T145 |
/workspace/coverage/default/23.sram_ctrl_stress_all.3995099105 |
|
|
Jun 05 04:41:10 PM PDT 24 |
Jun 05 05:14:43 PM PDT 24 |
9906299668 ps |
T138 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.2952073515 |
|
|
Jun 05 04:41:46 PM PDT 24 |
Jun 05 05:02:23 PM PDT 24 |
75970659035 ps |
T179 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.2060625115 |
|
|
Jun 05 04:43:50 PM PDT 24 |
Jun 05 04:44:47 PM PDT 24 |
114779359 ps |
T133 |
/workspace/coverage/default/48.sram_ctrl_regwen.3325305748 |
|
|
Jun 05 04:43:51 PM PDT 24 |
Jun 05 05:07:33 PM PDT 24 |
16206367444 ps |
T151 |
/workspace/coverage/default/0.sram_ctrl_executable.1357570601 |
|
|
Jun 05 04:39:29 PM PDT 24 |
Jun 05 04:43:08 PM PDT 24 |
7913905031 ps |
T149 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.129119203 |
|
|
Jun 05 04:41:18 PM PDT 24 |
Jun 05 04:41:26 PM PDT 24 |
442442761 ps |
T17 |
/workspace/coverage/default/28.sram_ctrl_alert_test.1484857765 |
|
|
Jun 05 04:41:27 PM PDT 24 |
Jun 05 04:41:28 PM PDT 24 |
15546094 ps |
T49 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.3201220433 |
|
|
Jun 05 04:40:30 PM PDT 24 |
Jun 05 04:40:37 PM PDT 24 |
722628060 ps |
T162 |
/workspace/coverage/default/38.sram_ctrl_smoke.1634666190 |
|
|
Jun 05 04:42:33 PM PDT 24 |
Jun 05 04:42:37 PM PDT 24 |
65940766 ps |
T51 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.1255869840 |
|
|
Jun 05 04:42:32 PM PDT 24 |
Jun 05 04:42:38 PM PDT 24 |
451131909 ps |
T100 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.1063853892 |
|
|
Jun 05 04:42:56 PM PDT 24 |
Jun 05 04:48:09 PM PDT 24 |
3792355957 ps |
T143 |
/workspace/coverage/default/41.sram_ctrl_regwen.2338517566 |
|
|
Jun 05 04:42:56 PM PDT 24 |
Jun 05 04:52:53 PM PDT 24 |
8157129621 ps |
T180 |
/workspace/coverage/default/38.sram_ctrl_stress_all.159225067 |
|
|
Jun 05 04:42:34 PM PDT 24 |
Jun 05 05:29:16 PM PDT 24 |
200643586799 ps |
T181 |
/workspace/coverage/default/18.sram_ctrl_partial_access.1955919690 |
|
|
Jun 05 04:40:37 PM PDT 24 |
Jun 05 04:40:55 PM PDT 24 |
2036150912 ps |
T164 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3881134733 |
|
|
Jun 05 04:39:29 PM PDT 24 |
Jun 05 04:39:33 PM PDT 24 |
963446446 ps |
T182 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.4183805460 |
|
|
Jun 05 04:39:56 PM PDT 24 |
Jun 05 04:40:05 PM PDT 24 |
252540540 ps |
T183 |
/workspace/coverage/default/8.sram_ctrl_smoke.3421490819 |
|
|
Jun 05 04:39:55 PM PDT 24 |
Jun 05 04:40:03 PM PDT 24 |
143778649 ps |
T184 |
/workspace/coverage/default/3.sram_ctrl_partial_access.4226853331 |
|
|
Jun 05 04:39:35 PM PDT 24 |
Jun 05 04:41:03 PM PDT 24 |
192195711 ps |
T22 |
/workspace/coverage/default/21.sram_ctrl_stress_all.3410317005 |
|
|
Jun 05 04:40:46 PM PDT 24 |
Jun 05 04:57:05 PM PDT 24 |
5197286003 ps |
T185 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2627158998 |
|
|
Jun 05 04:43:22 PM PDT 24 |
Jun 05 04:43:24 PM PDT 24 |
55174561 ps |
T186 |
/workspace/coverage/default/29.sram_ctrl_stress_all.636186488 |
|
|
Jun 05 04:41:33 PM PDT 24 |
Jun 05 04:54:12 PM PDT 24 |
5140448123 ps |
T165 |
/workspace/coverage/default/43.sram_ctrl_stress_all.1101305297 |
|
|
Jun 05 04:43:20 PM PDT 24 |
Jun 05 06:13:50 PM PDT 24 |
31942733961 ps |
T187 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.3414707305 |
|
|
Jun 05 04:42:37 PM PDT 24 |
Jun 05 04:43:07 PM PDT 24 |
98639479 ps |
T188 |
/workspace/coverage/default/36.sram_ctrl_smoke.965064906 |
|
|
Jun 05 04:42:16 PM PDT 24 |
Jun 05 04:42:32 PM PDT 24 |
718403502 ps |
T189 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1841063933 |
|
|
Jun 05 04:44:05 PM PDT 24 |
Jun 05 04:44:06 PM PDT 24 |
27770180 ps |
T135 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.3432969006 |
|
|
Jun 05 04:40:55 PM PDT 24 |
Jun 05 04:45:42 PM PDT 24 |
12081447643 ps |
T190 |
/workspace/coverage/default/24.sram_ctrl_partial_access.1336806437 |
|
|
Jun 05 04:41:11 PM PDT 24 |
Jun 05 04:43:34 PM PDT 24 |
970846462 ps |
T191 |
/workspace/coverage/default/4.sram_ctrl_bijection.1105604189 |
|
|
Jun 05 04:39:47 PM PDT 24 |
Jun 05 04:40:09 PM PDT 24 |
1191167860 ps |
T192 |
/workspace/coverage/default/31.sram_ctrl_stress_all.4006700860 |
|
|
Jun 05 04:41:42 PM PDT 24 |
Jun 05 05:03:20 PM PDT 24 |
38127033464 ps |
T193 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.592096604 |
|
|
Jun 05 04:39:44 PM PDT 24 |
Jun 05 04:39:49 PM PDT 24 |
452381543 ps |
T23 |
/workspace/coverage/default/20.sram_ctrl_regwen.782108244 |
|
|
Jun 05 04:40:47 PM PDT 24 |
Jun 05 04:57:59 PM PDT 24 |
12689135063 ps |
T157 |
/workspace/coverage/default/15.sram_ctrl_regwen.2453313948 |
|
|
Jun 05 04:40:22 PM PDT 24 |
Jun 05 04:51:34 PM PDT 24 |
32142976298 ps |
T194 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.3180507462 |
|
|
Jun 05 04:39:37 PM PDT 24 |
Jun 05 04:39:40 PM PDT 24 |
164801017 ps |
T52 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.97202357 |
|
|
Jun 05 04:40:10 PM PDT 24 |
Jun 05 04:40:22 PM PDT 24 |
677531008 ps |
T195 |
/workspace/coverage/default/11.sram_ctrl_partial_access.3882546857 |
|
|
Jun 05 04:40:03 PM PDT 24 |
Jun 05 04:42:36 PM PDT 24 |
683362597 ps |
T53 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.691360971 |
|
|
Jun 05 04:41:35 PM PDT 24 |
Jun 05 04:41:47 PM PDT 24 |
2270270815 ps |
T196 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.1245286787 |
|
|
Jun 05 04:40:36 PM PDT 24 |
Jun 05 04:43:38 PM PDT 24 |
4065324363 ps |
T161 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.629346920 |
|
|
Jun 05 04:40:19 PM PDT 24 |
Jun 05 04:40:24 PM PDT 24 |
805344736 ps |
T197 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.2092897443 |
|
|
Jun 05 04:42:31 PM PDT 24 |
Jun 05 04:54:05 PM PDT 24 |
12441902776 ps |
T198 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.3690618648 |
|
|
Jun 05 04:41:42 PM PDT 24 |
Jun 05 05:03:35 PM PDT 24 |
26212336049 ps |
T199 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.661334405 |
|
|
Jun 05 04:44:04 PM PDT 24 |
Jun 05 05:05:47 PM PDT 24 |
138909422841 ps |
T200 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.2186470335 |
|
|
Jun 05 04:40:56 PM PDT 24 |
Jun 05 04:41:12 PM PDT 24 |
115680609 ps |
T27 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.4141981844 |
|
|
Jun 05 04:40:22 PM PDT 24 |
Jun 05 04:41:44 PM PDT 24 |
3583421700 ps |
T201 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.282401923 |
|
|
Jun 05 04:40:48 PM PDT 24 |
Jun 05 04:42:43 PM PDT 24 |
163540343 ps |
T202 |
/workspace/coverage/default/23.sram_ctrl_executable.1405682866 |
|
|
Jun 05 04:40:58 PM PDT 24 |
Jun 05 05:00:50 PM PDT 24 |
15786279755 ps |
T203 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.3795265386 |
|
|
Jun 05 04:39:44 PM PDT 24 |
Jun 05 04:39:53 PM PDT 24 |
133457883 ps |
T204 |
/workspace/coverage/default/7.sram_ctrl_smoke.2035374544 |
|
|
Jun 05 04:39:56 PM PDT 24 |
Jun 05 04:40:03 PM PDT 24 |
279463179 ps |
T28 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.870858722 |
|
|
Jun 05 04:39:45 PM PDT 24 |
Jun 05 04:41:23 PM PDT 24 |
3022583777 ps |
T205 |
/workspace/coverage/default/19.sram_ctrl_smoke.461604907 |
|
|
Jun 05 04:40:38 PM PDT 24 |
Jun 05 04:40:49 PM PDT 24 |
1456459641 ps |
T206 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.2189836498 |
|
|
Jun 05 04:41:33 PM PDT 24 |
Jun 05 04:41:39 PM PDT 24 |
98743178 ps |
T42 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3927557403 |
|
|
Jun 05 04:43:44 PM PDT 24 |
Jun 05 04:58:39 PM PDT 24 |
5395303791 ps |
T54 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3378149487 |
|
|
Jun 05 04:41:10 PM PDT 24 |
Jun 05 04:45:21 PM PDT 24 |
1110306260 ps |
T207 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3521518937 |
|
|
Jun 05 04:41:26 PM PDT 24 |
Jun 05 04:41:58 PM PDT 24 |
185867493 ps |
T208 |
/workspace/coverage/default/46.sram_ctrl_bijection.2139270117 |
|
|
Jun 05 04:43:28 PM PDT 24 |
Jun 05 04:43:48 PM PDT 24 |
1834486875 ps |
T55 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.737643653 |
|
|
Jun 05 04:40:09 PM PDT 24 |
Jun 05 04:52:05 PM PDT 24 |
10087751926 ps |
T209 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.205561977 |
|
|
Jun 05 04:41:52 PM PDT 24 |
Jun 05 04:41:57 PM PDT 24 |
76103202 ps |
T64 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.788577571 |
|
|
Jun 05 04:41:02 PM PDT 24 |
Jun 05 04:43:46 PM PDT 24 |
5158226708 ps |
T210 |
/workspace/coverage/default/43.sram_ctrl_executable.3827570490 |
|
|
Jun 05 04:43:14 PM PDT 24 |
Jun 05 04:58:18 PM PDT 24 |
117005847629 ps |
T43 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.1767902936 |
|
|
Jun 05 04:39:37 PM PDT 24 |
Jun 05 04:42:41 PM PDT 24 |
541149109 ps |
T211 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2101938471 |
|
|
Jun 05 04:42:37 PM PDT 24 |
Jun 05 04:45:55 PM PDT 24 |
14492437289 ps |
T139 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.704369019 |
|
|
Jun 05 04:41:46 PM PDT 24 |
Jun 05 04:41:50 PM PDT 24 |
455333876 ps |
T212 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.1860645144 |
|
|
Jun 05 04:40:31 PM PDT 24 |
Jun 05 04:40:32 PM PDT 24 |
25174274 ps |
T213 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.1575156503 |
|
|
Jun 05 04:39:35 PM PDT 24 |
Jun 05 04:44:07 PM PDT 24 |
5037210953 ps |
T214 |
/workspace/coverage/default/1.sram_ctrl_executable.2412171551 |
|
|
Jun 05 04:39:35 PM PDT 24 |
Jun 05 04:55:56 PM PDT 24 |
2184753505 ps |
T215 |
/workspace/coverage/default/26.sram_ctrl_bijection.2091142484 |
|
|
Jun 05 04:41:12 PM PDT 24 |
Jun 05 04:41:34 PM PDT 24 |
320017835 ps |
T216 |
/workspace/coverage/default/20.sram_ctrl_executable.4111790892 |
|
|
Jun 05 04:40:50 PM PDT 24 |
Jun 05 04:55:53 PM PDT 24 |
15753482969 ps |
T217 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.860730466 |
|
|
Jun 05 04:39:36 PM PDT 24 |
Jun 05 04:39:48 PM PDT 24 |
660041267 ps |
T218 |
/workspace/coverage/default/10.sram_ctrl_stress_all.325856759 |
|
|
Jun 05 04:40:04 PM PDT 24 |
Jun 05 05:28:01 PM PDT 24 |
17997520643 ps |
T219 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.2371359448 |
|
|
Jun 05 04:40:55 PM PDT 24 |
Jun 05 04:40:57 PM PDT 24 |
27256663 ps |
T220 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3569470178 |
|
|
Jun 05 04:39:37 PM PDT 24 |
Jun 05 04:41:31 PM PDT 24 |
511583382 ps |
T221 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.1336972902 |
|
|
Jun 05 04:42:18 PM PDT 24 |
Jun 05 04:50:21 PM PDT 24 |
88114572588 ps |
T222 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.769825662 |
|
|
Jun 05 04:41:33 PM PDT 24 |
Jun 05 04:45:39 PM PDT 24 |
9878894665 ps |
T223 |
/workspace/coverage/default/29.sram_ctrl_smoke.2886345643 |
|
|
Jun 05 04:41:27 PM PDT 24 |
Jun 05 04:41:43 PM PDT 24 |
255468465 ps |
T224 |
/workspace/coverage/default/27.sram_ctrl_regwen.1411650493 |
|
|
Jun 05 04:41:18 PM PDT 24 |
Jun 05 04:46:23 PM PDT 24 |
10643217997 ps |
T225 |
/workspace/coverage/default/7.sram_ctrl_regwen.3290596834 |
|
|
Jun 05 04:39:55 PM PDT 24 |
Jun 05 04:41:30 PM PDT 24 |
1483742744 ps |
T226 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.4054025653 |
|
|
Jun 05 04:42:34 PM PDT 24 |
Jun 05 04:42:36 PM PDT 24 |
351194806 ps |
T227 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2773834877 |
|
|
Jun 05 04:40:55 PM PDT 24 |
Jun 05 04:41:15 PM PDT 24 |
311157066 ps |
T228 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.3384762608 |
|
|
Jun 05 04:39:42 PM PDT 24 |
Jun 05 04:45:10 PM PDT 24 |
22306710395 ps |
T229 |
/workspace/coverage/default/49.sram_ctrl_stress_all.1715446314 |
|
|
Jun 05 04:44:03 PM PDT 24 |
Jun 05 05:22:10 PM PDT 24 |
29323889281 ps |
T230 |
/workspace/coverage/default/31.sram_ctrl_executable.364765594 |
|
|
Jun 05 04:41:44 PM PDT 24 |
Jun 05 04:59:28 PM PDT 24 |
9010144503 ps |
T136 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3071791604 |
|
|
Jun 05 04:42:32 PM PDT 24 |
Jun 05 04:47:24 PM PDT 24 |
18455498940 ps |
T231 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1229314311 |
|
|
Jun 05 04:43:53 PM PDT 24 |
Jun 05 04:48:07 PM PDT 24 |
10752253716 ps |
T232 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.706044951 |
|
|
Jun 05 04:41:26 PM PDT 24 |
Jun 05 04:44:45 PM PDT 24 |
2345094557 ps |
T233 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1991882651 |
|
|
Jun 05 04:43:51 PM PDT 24 |
Jun 05 04:43:52 PM PDT 24 |
324257550 ps |
T65 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3175918549 |
|
|
Jun 05 04:39:38 PM PDT 24 |
Jun 05 04:48:17 PM PDT 24 |
11920245247 ps |
T234 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.217930139 |
|
|
Jun 05 04:44:03 PM PDT 24 |
Jun 05 04:44:13 PM PDT 24 |
951530533 ps |
T235 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.1447335429 |
|
|
Jun 05 04:42:34 PM PDT 24 |
Jun 05 04:42:41 PM PDT 24 |
52404730 ps |
T236 |
/workspace/coverage/default/0.sram_ctrl_regwen.2502233234 |
|
|
Jun 05 04:39:28 PM PDT 24 |
Jun 05 04:40:35 PM PDT 24 |
1858694327 ps |
T237 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.755443316 |
|
|
Jun 05 04:40:06 PM PDT 24 |
Jun 05 04:40:11 PM PDT 24 |
433732479 ps |
T238 |
/workspace/coverage/default/15.sram_ctrl_stress_all.171763062 |
|
|
Jun 05 04:40:22 PM PDT 24 |
Jun 05 04:54:38 PM PDT 24 |
54639189286 ps |
T239 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.1853824407 |
|
|
Jun 05 04:40:22 PM PDT 24 |
Jun 05 04:40:46 PM PDT 24 |
337719982 ps |
T240 |
/workspace/coverage/default/38.sram_ctrl_executable.2719580039 |
|
|
Jun 05 04:42:32 PM PDT 24 |
Jun 05 04:49:02 PM PDT 24 |
5983905449 ps |
T241 |
/workspace/coverage/default/38.sram_ctrl_regwen.3378136849 |
|
|
Jun 05 04:42:36 PM PDT 24 |
Jun 05 04:43:49 PM PDT 24 |
1653603543 ps |
T242 |
/workspace/coverage/default/12.sram_ctrl_partial_access.3275666791 |
|
|
Jun 05 04:40:15 PM PDT 24 |
Jun 05 04:41:33 PM PDT 24 |
738121353 ps |
T243 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.1668923153 |
|
|
Jun 05 04:41:02 PM PDT 24 |
Jun 05 04:41:14 PM PDT 24 |
1529552737 ps |
T244 |
/workspace/coverage/default/9.sram_ctrl_partial_access.1945480277 |
|
|
Jun 05 04:39:58 PM PDT 24 |
Jun 05 04:40:04 PM PDT 24 |
146898505 ps |
T245 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.3471236292 |
|
|
Jun 05 04:40:37 PM PDT 24 |
Jun 05 04:54:50 PM PDT 24 |
7654758584 ps |
T246 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.337367546 |
|
|
Jun 05 04:41:42 PM PDT 24 |
Jun 05 05:03:58 PM PDT 24 |
59940937215 ps |
T247 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.2186702720 |
|
|
Jun 05 04:41:43 PM PDT 24 |
Jun 05 04:41:48 PM PDT 24 |
137348877 ps |
T248 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.1120724115 |
|
|
Jun 05 04:39:58 PM PDT 24 |
Jun 05 04:40:05 PM PDT 24 |
458634926 ps |
T249 |
/workspace/coverage/default/9.sram_ctrl_regwen.2385670459 |
|
|
Jun 05 04:40:06 PM PDT 24 |
Jun 05 04:50:34 PM PDT 24 |
10396599076 ps |
T250 |
/workspace/coverage/default/2.sram_ctrl_smoke.1458313925 |
|
|
Jun 05 04:39:40 PM PDT 24 |
Jun 05 04:39:53 PM PDT 24 |
834378576 ps |
T251 |
/workspace/coverage/default/34.sram_ctrl_regwen.3685162405 |
|
|
Jun 05 04:42:12 PM PDT 24 |
Jun 05 04:52:49 PM PDT 24 |
10501266802 ps |
T252 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.2802081341 |
|
|
Jun 05 04:41:19 PM PDT 24 |
Jun 05 04:41:24 PM PDT 24 |
246307104 ps |
T253 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3729132076 |
|
|
Jun 05 04:43:21 PM PDT 24 |
Jun 05 04:51:02 PM PDT 24 |
11807174832 ps |
T44 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.4112159439 |
|
|
Jun 05 04:40:30 PM PDT 24 |
Jun 05 04:40:41 PM PDT 24 |
1997908074 ps |
T254 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2991002215 |
|
|
Jun 05 04:43:41 PM PDT 24 |
Jun 05 04:43:46 PM PDT 24 |
556593071 ps |
T255 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.2013295513 |
|
|
Jun 05 04:43:36 PM PDT 24 |
Jun 05 04:43:43 PM PDT 24 |
2036138997 ps |
T256 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.608814088 |
|
|
Jun 05 04:42:12 PM PDT 24 |
Jun 05 04:50:31 PM PDT 24 |
1785889994 ps |
T257 |
/workspace/coverage/default/36.sram_ctrl_bijection.3674427605 |
|
|
Jun 05 04:42:15 PM PDT 24 |
Jun 05 04:43:01 PM PDT 24 |
5428367302 ps |
T258 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.2013192348 |
|
|
Jun 05 04:42:34 PM PDT 24 |
Jun 05 04:53:36 PM PDT 24 |
1774723023 ps |
T259 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.4224060440 |
|
|
Jun 05 04:43:27 PM PDT 24 |
Jun 05 04:43:31 PM PDT 24 |
45635003 ps |
T260 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.2138927600 |
|
|
Jun 05 04:40:14 PM PDT 24 |
Jun 05 04:41:00 PM PDT 24 |
202092950 ps |
T261 |
/workspace/coverage/default/21.sram_ctrl_regwen.1176079919 |
|
|
Jun 05 04:40:45 PM PDT 24 |
Jun 05 04:48:48 PM PDT 24 |
1848949358 ps |
T262 |
/workspace/coverage/default/10.sram_ctrl_regwen.744004313 |
|
|
Jun 05 04:40:03 PM PDT 24 |
Jun 05 04:54:01 PM PDT 24 |
2923169206 ps |
T263 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.2258173568 |
|
|
Jun 05 04:39:37 PM PDT 24 |
Jun 05 04:45:58 PM PDT 24 |
5288510886 ps |
T264 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.922221545 |
|
|
Jun 05 04:40:32 PM PDT 24 |
Jun 05 04:46:25 PM PDT 24 |
3894820244 ps |
T265 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.1603963812 |
|
|
Jun 05 04:43:20 PM PDT 24 |
Jun 05 04:43:26 PM PDT 24 |
96385706 ps |
T266 |
/workspace/coverage/default/28.sram_ctrl_regwen.15720557 |
|
|
Jun 05 04:41:29 PM PDT 24 |
Jun 05 04:54:16 PM PDT 24 |
9522512960 ps |
T267 |
/workspace/coverage/default/5.sram_ctrl_stress_all.1727197276 |
|
|
Jun 05 04:40:00 PM PDT 24 |
Jun 05 05:42:34 PM PDT 24 |
185658500272 ps |
T268 |
/workspace/coverage/default/32.sram_ctrl_executable.2023270146 |
|
|
Jun 05 04:41:50 PM PDT 24 |
Jun 05 04:48:31 PM PDT 24 |
5005497655 ps |
T269 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.378025454 |
|
|
Jun 05 04:39:38 PM PDT 24 |
Jun 05 04:39:39 PM PDT 24 |
34875027 ps |
T270 |
/workspace/coverage/default/44.sram_ctrl_alert_test.800419565 |
|
|
Jun 05 04:43:22 PM PDT 24 |
Jun 05 04:43:23 PM PDT 24 |
13985380 ps |
T271 |
/workspace/coverage/default/36.sram_ctrl_partial_access.3383280346 |
|
|
Jun 05 04:42:17 PM PDT 24 |
Jun 05 04:43:34 PM PDT 24 |
957170306 ps |
T272 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.39486316 |
|
|
Jun 05 04:43:43 PM PDT 24 |
Jun 05 04:50:35 PM PDT 24 |
53740437622 ps |
T273 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.1890984622 |
|
|
Jun 05 04:43:04 PM PDT 24 |
Jun 05 04:43:14 PM PDT 24 |
557338241 ps |
T66 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1357288949 |
|
|
Jun 05 04:42:57 PM PDT 24 |
Jun 05 04:44:01 PM PDT 24 |
1647066466 ps |
T274 |
/workspace/coverage/default/31.sram_ctrl_partial_access.1113296175 |
|
|
Jun 05 04:41:42 PM PDT 24 |
Jun 05 04:44:18 PM PDT 24 |
2560165556 ps |
T275 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.755365036 |
|
|
Jun 05 04:39:37 PM PDT 24 |
Jun 05 04:39:46 PM PDT 24 |
140586946 ps |
T276 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.2236691446 |
|
|
Jun 05 04:41:11 PM PDT 24 |
Jun 05 04:41:16 PM PDT 24 |
186681691 ps |
T277 |
/workspace/coverage/default/49.sram_ctrl_bijection.3440017942 |
|
|
Jun 05 04:44:05 PM PDT 24 |
Jun 05 04:44:34 PM PDT 24 |
496361538 ps |
T278 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2951538111 |
|
|
Jun 05 04:40:23 PM PDT 24 |
Jun 05 04:40:57 PM PDT 24 |
98038947 ps |
T279 |
/workspace/coverage/default/28.sram_ctrl_bijection.1461828276 |
|
|
Jun 05 04:41:27 PM PDT 24 |
Jun 05 04:42:22 PM PDT 24 |
1122309436 ps |
T280 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.1968281023 |
|
|
Jun 05 04:42:50 PM PDT 24 |
Jun 05 04:43:09 PM PDT 24 |
283004504 ps |
T281 |
/workspace/coverage/default/4.sram_ctrl_regwen.3110652123 |
|
|
Jun 05 04:39:46 PM PDT 24 |
Jun 05 04:42:41 PM PDT 24 |
3217474251 ps |
T282 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.3656927964 |
|
|
Jun 05 04:40:29 PM PDT 24 |
Jun 05 04:45:02 PM PDT 24 |
43533083411 ps |
T283 |
/workspace/coverage/default/40.sram_ctrl_smoke.143043625 |
|
|
Jun 05 04:42:43 PM PDT 24 |
Jun 05 04:42:59 PM PDT 24 |
247210370 ps |
T284 |
/workspace/coverage/default/45.sram_ctrl_executable.3381792933 |
|
|
Jun 05 04:43:29 PM PDT 24 |
Jun 05 05:02:14 PM PDT 24 |
26553453187 ps |
T285 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.314776508 |
|
|
Jun 05 04:41:41 PM PDT 24 |
Jun 05 04:41:47 PM PDT 24 |
694545852 ps |
T286 |
/workspace/coverage/default/19.sram_ctrl_partial_access.2308713628 |
|
|
Jun 05 04:40:38 PM PDT 24 |
Jun 05 04:42:30 PM PDT 24 |
214962266 ps |
T287 |
/workspace/coverage/default/3.sram_ctrl_executable.4212435109 |
|
|
Jun 05 04:39:44 PM PDT 24 |
Jun 05 05:01:58 PM PDT 24 |
14285111611 ps |
T288 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.11808946 |
|
|
Jun 05 04:40:05 PM PDT 24 |
Jun 05 04:40:11 PM PDT 24 |
359445225 ps |
T289 |
/workspace/coverage/default/0.sram_ctrl_alert_test.4205148069 |
|
|
Jun 05 04:39:27 PM PDT 24 |
Jun 05 04:39:28 PM PDT 24 |
15240741 ps |
T290 |
/workspace/coverage/default/4.sram_ctrl_smoke.680590543 |
|
|
Jun 05 04:39:43 PM PDT 24 |
Jun 05 04:39:52 PM PDT 24 |
58357627 ps |
T291 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1694249817 |
|
|
Jun 05 04:43:29 PM PDT 24 |
Jun 05 04:48:50 PM PDT 24 |
13165984830 ps |
T67 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.1421888178 |
|
|
Jun 05 04:42:32 PM PDT 24 |
Jun 05 04:45:32 PM PDT 24 |
6036145308 ps |
T292 |
/workspace/coverage/default/34.sram_ctrl_partial_access.348016235 |
|
|
Jun 05 04:42:01 PM PDT 24 |
Jun 05 04:43:33 PM PDT 24 |
679136062 ps |
T293 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2506943807 |
|
|
Jun 05 04:39:57 PM PDT 24 |
Jun 05 04:40:14 PM PDT 24 |
966290055 ps |
T294 |
/workspace/coverage/default/26.sram_ctrl_partial_access.2650463928 |
|
|
Jun 05 04:41:11 PM PDT 24 |
Jun 05 04:41:13 PM PDT 24 |
86718241 ps |
T295 |
/workspace/coverage/default/49.sram_ctrl_executable.2243168763 |
|
|
Jun 05 04:44:04 PM PDT 24 |
Jun 05 05:09:49 PM PDT 24 |
37650511748 ps |
T296 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.3594317004 |
|
|
Jun 05 04:42:06 PM PDT 24 |
Jun 05 04:43:06 PM PDT 24 |
2774146411 ps |
T297 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.2295849317 |
|
|
Jun 05 04:40:24 PM PDT 24 |
Jun 05 04:40:26 PM PDT 24 |
44537321 ps |
T298 |
/workspace/coverage/default/14.sram_ctrl_executable.2947788490 |
|
|
Jun 05 04:40:25 PM PDT 24 |
Jun 05 04:49:09 PM PDT 24 |
7118134309 ps |
T299 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3196013563 |
|
|
Jun 05 04:44:03 PM PDT 24 |
Jun 05 04:46:33 PM PDT 24 |
1738336695 ps |
T300 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.2170502233 |
|
|
Jun 05 04:40:23 PM PDT 24 |
Jun 05 04:59:40 PM PDT 24 |
6515402800 ps |
T301 |
/workspace/coverage/default/42.sram_ctrl_smoke.525408327 |
|
|
Jun 05 04:42:55 PM PDT 24 |
Jun 05 04:43:55 PM PDT 24 |
2057430235 ps |
T302 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.2720380460 |
|
|
Jun 05 04:40:46 PM PDT 24 |
Jun 05 04:40:50 PM PDT 24 |
173012716 ps |
T303 |
/workspace/coverage/default/35.sram_ctrl_executable.2750908636 |
|
|
Jun 05 04:42:12 PM PDT 24 |
Jun 05 04:52:46 PM PDT 24 |
11853077863 ps |
T304 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.3586334841 |
|
|
Jun 05 04:42:31 PM PDT 24 |
Jun 05 04:47:40 PM PDT 24 |
3222842674 ps |
T305 |
/workspace/coverage/default/33.sram_ctrl_regwen.2145283074 |
|
|
Jun 05 04:42:01 PM PDT 24 |
Jun 05 05:03:20 PM PDT 24 |
120194082850 ps |
T306 |
/workspace/coverage/default/8.sram_ctrl_alert_test.2647367095 |
|
|
Jun 05 04:39:55 PM PDT 24 |
Jun 05 04:39:57 PM PDT 24 |
14133838 ps |
T307 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.2733066227 |
|
|
Jun 05 04:41:02 PM PDT 24 |
Jun 05 04:50:17 PM PDT 24 |
57917285983 ps |
T308 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.2913234264 |
|
|
Jun 05 04:42:09 PM PDT 24 |
Jun 05 04:42:15 PM PDT 24 |
359530496 ps |
T309 |
/workspace/coverage/default/27.sram_ctrl_alert_test.1542461776 |
|
|
Jun 05 04:41:27 PM PDT 24 |
Jun 05 04:41:29 PM PDT 24 |
15679678 ps |
T310 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.3025821987 |
|
|
Jun 05 04:41:33 PM PDT 24 |
Jun 05 04:41:38 PM PDT 24 |
1040883866 ps |
T311 |
/workspace/coverage/default/42.sram_ctrl_regwen.4136143807 |
|
|
Jun 05 04:43:03 PM PDT 24 |
Jun 05 04:50:13 PM PDT 24 |
11640567679 ps |
T312 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.990020785 |
|
|
Jun 05 04:40:30 PM PDT 24 |
Jun 05 04:40:36 PM PDT 24 |
864727159 ps |
T313 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.1941665802 |
|
|
Jun 05 04:41:27 PM PDT 24 |
Jun 05 04:41:29 PM PDT 24 |
67492875 ps |
T314 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.206532611 |
|
|
Jun 05 04:40:24 PM PDT 24 |
Jun 05 04:49:09 PM PDT 24 |
20200462789 ps |
T315 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.727805876 |
|
|
Jun 05 04:40:49 PM PDT 24 |
Jun 05 04:42:47 PM PDT 24 |
148373560 ps |
T316 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1781818733 |
|
|
Jun 05 04:40:05 PM PDT 24 |
Jun 05 04:46:40 PM PDT 24 |
28971104184 ps |
T317 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.677112873 |
|
|
Jun 05 04:39:56 PM PDT 24 |
Jun 05 04:39:58 PM PDT 24 |
28336483 ps |
T18 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.2223935001 |
|
|
Jun 05 04:39:49 PM PDT 24 |
Jun 05 04:39:51 PM PDT 24 |
89541938 ps |
T32 |
/workspace/coverage/default/20.sram_ctrl_partial_access.1556802811 |
|
|
Jun 05 04:40:48 PM PDT 24 |
Jun 05 04:40:52 PM PDT 24 |
93530767 ps |
T33 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2371100302 |
|
|
Jun 05 04:43:13 PM PDT 24 |
Jun 05 04:43:14 PM PDT 24 |
66556946 ps |
T34 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2787307168 |
|
|
Jun 05 04:42:03 PM PDT 24 |
Jun 05 04:43:26 PM PDT 24 |
626015986 ps |
T35 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.4043876733 |
|
|
Jun 05 04:40:37 PM PDT 24 |
Jun 05 05:05:52 PM PDT 24 |
8419355220 ps |