Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.36 98.99 92.48 99.31 100.00 95.26 98.38 97.07


Total tests in report: 1015
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
69.80 69.80 91.08 91.08 68.60 68.60 90.45 90.45 23.81 23.81 77.88 77.88 93.98 93.98 42.78 42.78 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.2085843677
86.72 16.92 97.05 5.98 79.03 10.43 92.43 1.98 90.48 66.67 88.70 10.82 96.62 2.64 62.71 19.93 /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.923678891
92.14 5.42 98.57 1.52 84.48 5.45 96.60 4.17 100.00 9.52 93.27 4.57 96.92 0.29 75.14 12.43 /workspace/coverage/default/45.sram_ctrl_stress_all.2161475187
93.70 1.56 98.74 0.17 86.26 1.78 96.74 0.14 100.00 0.00 94.23 0.96 96.92 0.00 83.00 7.86 /workspace/coverage/default/16.sram_ctrl_stress_all.3970699397
94.62 0.92 98.91 0.17 86.85 0.59 96.94 0.21 100.00 0.00 94.95 0.72 96.92 0.00 87.75 4.75 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3792241791
95.12 0.51 98.91 0.00 88.27 1.42 97.50 0.56 100.00 0.00 95.43 0.48 96.92 0.00 88.85 1.10 /workspace/coverage/default/33.sram_ctrl_lc_escalation.1189583308
95.59 0.47 98.91 0.00 88.27 0.00 97.50 0.00 100.00 0.00 95.43 0.00 96.92 0.00 92.14 3.29 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2281427382
95.93 0.33 98.91 0.00 88.27 0.00 97.50 0.00 100.00 0.00 95.43 0.00 97.06 0.15 94.33 2.19 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.3466639288
96.16 0.23 98.91 0.00 88.51 0.24 97.57 0.07 100.00 0.00 95.43 0.00 98.38 1.32 94.33 0.00 /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.52996491
96.39 0.23 98.91 0.00 88.98 0.47 98.16 0.59 100.00 0.00 95.43 0.00 98.38 0.00 94.88 0.55 /workspace/coverage/default/3.sram_ctrl_alert_test.1007976245
96.53 0.14 98.99 0.08 88.98 0.00 99.03 0.87 100.00 0.00 95.43 0.00 98.38 0.00 94.88 0.00 /workspace/coverage/default/37.sram_ctrl_ram_cfg.2708542114
96.61 0.08 98.99 0.00 88.98 0.00 99.03 0.00 100.00 0.00 95.43 0.00 98.38 0.00 95.43 0.55 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.20250051
96.68 0.08 98.99 0.00 88.98 0.00 99.03 0.00 100.00 0.00 95.43 0.00 98.38 0.00 95.98 0.55 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3539415935
96.76 0.07 98.99 0.00 89.22 0.24 99.31 0.28 100.00 0.00 95.43 0.00 98.38 0.00 95.98 0.00 /workspace/coverage/default/11.sram_ctrl_regwen.3223843501
96.81 0.05 98.99 0.00 89.22 0.00 99.31 0.00 100.00 0.00 95.43 0.00 98.38 0.00 96.34 0.37 /workspace/coverage/default/1.sram_ctrl_executable.3812500232
96.84 0.03 98.99 0.00 89.22 0.00 99.31 0.00 100.00 0.00 95.43 0.00 98.38 0.00 96.53 0.18 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1850135212
96.86 0.03 98.99 0.00 89.22 0.00 99.31 0.00 100.00 0.00 95.43 0.00 98.38 0.00 96.71 0.18 /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2303418351
96.89 0.03 98.99 0.00 89.22 0.00 99.31 0.00 100.00 0.00 95.43 0.00 98.38 0.00 96.89 0.18 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.709774982
96.92 0.03 98.99 0.00 89.22 0.00 99.31 0.00 100.00 0.00 95.43 0.00 98.38 0.00 97.07 0.18 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.502630131

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3534224462
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1701998792
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1125199786
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.776087790
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3725734307
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3546773871
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2815450619
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.499177103
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2168188333
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2009741146
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2254626230
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2084677363
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2860213198
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1055930305
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3255103447
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3428915032
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.4052505272
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.64437552
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1415551650
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1606276170
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2850718640
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.4183315159
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3646672838
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3831030155
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1645482345
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.426525658
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2108276392
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2845000542
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1009312988
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2751070005
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1915129535
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2428845188
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.490488015
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1468404949
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.4229928169
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.4045923048
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.634054588
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3764058833
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.195617949
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3415106728
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.569154161
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.915362156
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1686151498
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1910561727
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.861151184
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1977303623
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.615019756
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2491498151
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3990025100
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1045198082
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1239567655
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1129094788
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1052242848
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.711336654
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3910747369
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.843593971
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3713527128
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3599401814
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1362241879
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.832055118
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1368707636
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1272915237
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.960422118
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1577844441
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3265788384
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1231864598
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3848529398
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2548203289
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2863300163
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1117391540
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2775071490
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3402692003
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3038094076
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2795967372
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2895221268
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3901304630
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3499801848
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.174045018
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.417316098
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1203537220
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3107147308
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1989107057
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2664170990
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1416713747
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2018446306
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1584549279
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3159455875
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.4150973001
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.667085481
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1299549792
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1423474661
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2486474815
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.4075928563
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1368232363
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.154262560
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2685453704
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.924505624
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3148500298
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3121774361
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.4129052951
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2717212916
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1545007398
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.136796681
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.513647094
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.1624500176
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1846404961
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1531828101
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.294444892
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3351185717
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3690340609
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2304236609
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3966208352
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.947337142
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1352810974
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2051917972
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.836018195
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2360185146
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1943041177
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.396399712
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.908617085
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.3085269934
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2610998361
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3562125239
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1616301128
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3067006490
/workspace/coverage/default/0.sram_ctrl_alert_test.1651850069
/workspace/coverage/default/0.sram_ctrl_bijection.1804105681
/workspace/coverage/default/0.sram_ctrl_executable.2507319138
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3347908365
/workspace/coverage/default/0.sram_ctrl_max_throughput.3721239474
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2259281334
/workspace/coverage/default/0.sram_ctrl_mem_walk.2194673753
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1635934911
/workspace/coverage/default/0.sram_ctrl_partial_access.1619548969
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3185197599
/workspace/coverage/default/0.sram_ctrl_ram_cfg.354007303
/workspace/coverage/default/0.sram_ctrl_regwen.2097591958
/workspace/coverage/default/0.sram_ctrl_smoke.2462693253
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3783113766
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3052583920
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3017763273
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3739671963
/workspace/coverage/default/1.sram_ctrl_alert_test.705084368
/workspace/coverage/default/1.sram_ctrl_bijection.3535304731
/workspace/coverage/default/1.sram_ctrl_lc_escalation.271336306
/workspace/coverage/default/1.sram_ctrl_max_throughput.34547499
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.104133872
/workspace/coverage/default/1.sram_ctrl_mem_walk.3495478308
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2197609391
/workspace/coverage/default/1.sram_ctrl_partial_access.1764658431
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.704042551
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3820113332
/workspace/coverage/default/1.sram_ctrl_regwen.1913086496
/workspace/coverage/default/1.sram_ctrl_smoke.4161793211
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.445443125
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3651018226
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.396573591
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.74033652
/workspace/coverage/default/10.sram_ctrl_alert_test.3154748842
/workspace/coverage/default/10.sram_ctrl_bijection.3288108383
/workspace/coverage/default/10.sram_ctrl_executable.2981007528
/workspace/coverage/default/10.sram_ctrl_lc_escalation.649818099
/workspace/coverage/default/10.sram_ctrl_max_throughput.2205890890
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.4061563557
/workspace/coverage/default/10.sram_ctrl_mem_walk.3376413243
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1248219432
/workspace/coverage/default/10.sram_ctrl_partial_access.3811245218
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2747089079
/workspace/coverage/default/10.sram_ctrl_ram_cfg.295032753
/workspace/coverage/default/10.sram_ctrl_regwen.1657440472
/workspace/coverage/default/10.sram_ctrl_smoke.4072396563
/workspace/coverage/default/10.sram_ctrl_stress_all.3981494122
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1482405849
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2303767991
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.4166798354
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3792527204
/workspace/coverage/default/11.sram_ctrl_alert_test.702403361
/workspace/coverage/default/11.sram_ctrl_bijection.3592218919
/workspace/coverage/default/11.sram_ctrl_executable.985991115
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3985379620
/workspace/coverage/default/11.sram_ctrl_max_throughput.3410416952
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.201785770
/workspace/coverage/default/11.sram_ctrl_mem_walk.2336551522
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3896242402
/workspace/coverage/default/11.sram_ctrl_partial_access.26207618
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1292319270
/workspace/coverage/default/11.sram_ctrl_smoke.109666505
/workspace/coverage/default/11.sram_ctrl_stress_all.205826567
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1804820567
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.394947904
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.157997546
/workspace/coverage/default/12.sram_ctrl_alert_test.4253925581
/workspace/coverage/default/12.sram_ctrl_bijection.1260004825
/workspace/coverage/default/12.sram_ctrl_executable.2103701970
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1460948420
/workspace/coverage/default/12.sram_ctrl_max_throughput.3297605602
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3159336971
/workspace/coverage/default/12.sram_ctrl_mem_walk.2137653928
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3777119994
/workspace/coverage/default/12.sram_ctrl_partial_access.3515965663
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.522230217
/workspace/coverage/default/12.sram_ctrl_ram_cfg.2155775133
/workspace/coverage/default/12.sram_ctrl_regwen.481255386
/workspace/coverage/default/12.sram_ctrl_smoke.2626341220
/workspace/coverage/default/12.sram_ctrl_stress_all.649601368
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.314530468
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1128307009
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1201245857
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/workspace/coverage/default/44.sram_ctrl_alert_test.1410946566
/workspace/coverage/default/44.sram_ctrl_bijection.112690418
/workspace/coverage/default/44.sram_ctrl_executable.3533346468
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1143557453
/workspace/coverage/default/44.sram_ctrl_max_throughput.4041698172
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.417039310
/workspace/coverage/default/44.sram_ctrl_mem_walk.1267335690
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1765406628
/workspace/coverage/default/44.sram_ctrl_partial_access.580283426
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.282082191
/workspace/coverage/default/44.sram_ctrl_ram_cfg.227570120
/workspace/coverage/default/44.sram_ctrl_regwen.3044181911
/workspace/coverage/default/44.sram_ctrl_smoke.310266105
/workspace/coverage/default/44.sram_ctrl_stress_all.1959549099
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2631122390
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1150274307
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.4205736183
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2095925781
/workspace/coverage/default/45.sram_ctrl_alert_test.1824261840
/workspace/coverage/default/45.sram_ctrl_bijection.3945949551
/workspace/coverage/default/45.sram_ctrl_executable.1234553814
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3977941546
/workspace/coverage/default/45.sram_ctrl_max_throughput.3559715632
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.456354054
/workspace/coverage/default/45.sram_ctrl_mem_walk.4253774687
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3709406847
/workspace/coverage/default/45.sram_ctrl_partial_access.2708730221
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1287433862
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2018014983
/workspace/coverage/default/45.sram_ctrl_regwen.3516176071
/workspace/coverage/default/45.sram_ctrl_smoke.3184998871
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2537737804
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1867809277
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2664848843
/workspace/coverage/default/46.sram_ctrl_alert_test.663304767
/workspace/coverage/default/46.sram_ctrl_bijection.2607572265
/workspace/coverage/default/46.sram_ctrl_executable.3734819846
/workspace/coverage/default/46.sram_ctrl_lc_escalation.4091193798
/workspace/coverage/default/46.sram_ctrl_max_throughput.137944660
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1141177856
/workspace/coverage/default/46.sram_ctrl_mem_walk.169364087
/workspace/coverage/default/46.sram_ctrl_multiple_keys.4082453551
/workspace/coverage/default/46.sram_ctrl_partial_access.2486938599
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.868915438
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3767346363
/workspace/coverage/default/46.sram_ctrl_regwen.1537198771
/workspace/coverage/default/46.sram_ctrl_smoke.1367949743
/workspace/coverage/default/46.sram_ctrl_stress_all.1642995219
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3831573069
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1804752569
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3629299780
/workspace/coverage/default/47.sram_ctrl_alert_test.1675186703
/workspace/coverage/default/47.sram_ctrl_bijection.2179385085
/workspace/coverage/default/47.sram_ctrl_executable.2837886341
/workspace/coverage/default/47.sram_ctrl_lc_escalation.62784942
/workspace/coverage/default/47.sram_ctrl_max_throughput.1035723102
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.584528774
/workspace/coverage/default/47.sram_ctrl_mem_walk.677096554
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3342208366
/workspace/coverage/default/47.sram_ctrl_partial_access.4205561066
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3519870361
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1687235244
/workspace/coverage/default/47.sram_ctrl_regwen.3083290431
/workspace/coverage/default/47.sram_ctrl_smoke.892283498
/workspace/coverage/default/47.sram_ctrl_stress_all.4214868684
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1426333442
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.702138195
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.371665097
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1764084447
/workspace/coverage/default/48.sram_ctrl_alert_test.3285010325
/workspace/coverage/default/48.sram_ctrl_bijection.3482477641
/workspace/coverage/default/48.sram_ctrl_executable.772704785
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2673288339
/workspace/coverage/default/48.sram_ctrl_max_throughput.165560839
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.873715836
/workspace/coverage/default/48.sram_ctrl_mem_walk.2312169789
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1652612088
/workspace/coverage/default/48.sram_ctrl_partial_access.554708460
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1702289771
/workspace/coverage/default/48.sram_ctrl_ram_cfg.845393492
/workspace/coverage/default/48.sram_ctrl_regwen.3907296925
/workspace/coverage/default/48.sram_ctrl_smoke.2318579754
/workspace/coverage/default/48.sram_ctrl_stress_all.474601052
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3087997073
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1752297921
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3421217846
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3235057586
/workspace/coverage/default/49.sram_ctrl_alert_test.2952486
/workspace/coverage/default/49.sram_ctrl_bijection.2984272307
/workspace/coverage/default/49.sram_ctrl_executable.3376767710
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3951456746
/workspace/coverage/default/49.sram_ctrl_max_throughput.1717236842
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3227332457
/workspace/coverage/default/49.sram_ctrl_mem_walk.2163980760
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2513174479
/workspace/coverage/default/49.sram_ctrl_partial_access.3993368123
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3999537597
/workspace/coverage/default/49.sram_ctrl_ram_cfg.977725448
/workspace/coverage/default/49.sram_ctrl_regwen.2544528030
/workspace/coverage/default/49.sram_ctrl_smoke.524082408
/workspace/coverage/default/49.sram_ctrl_stress_all.1665128016
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3852650292
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1140296764
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3691893555
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3828944906
/workspace/coverage/default/5.sram_ctrl_alert_test.630800550
/workspace/coverage/default/5.sram_ctrl_bijection.3412295925
/workspace/coverage/default/5.sram_ctrl_executable.1372130595
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2303607424
/workspace/coverage/default/5.sram_ctrl_max_throughput.66974571
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1277375482
/workspace/coverage/default/5.sram_ctrl_mem_walk.2003155823
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1329897817
/workspace/coverage/default/5.sram_ctrl_partial_access.854581463
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3309382033
/workspace/coverage/default/5.sram_ctrl_ram_cfg.4189512931
/workspace/coverage/default/5.sram_ctrl_regwen.1732888045
/workspace/coverage/default/5.sram_ctrl_smoke.3562286936
/workspace/coverage/default/5.sram_ctrl_stress_all.3707177535
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1885939475
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.4267904538
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.331710028
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.296747420
/workspace/coverage/default/6.sram_ctrl_alert_test.1637666244
/workspace/coverage/default/6.sram_ctrl_bijection.2028667578
/workspace/coverage/default/6.sram_ctrl_executable.1591811004
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2038354632
/workspace/coverage/default/6.sram_ctrl_max_throughput.1432059466
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2115803962
/workspace/coverage/default/6.sram_ctrl_mem_walk.1586503123
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3257590608
/workspace/coverage/default/6.sram_ctrl_partial_access.304149770
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.878136493
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2716818368
/workspace/coverage/default/6.sram_ctrl_regwen.3515206128
/workspace/coverage/default/6.sram_ctrl_smoke.3418223114
/workspace/coverage/default/6.sram_ctrl_stress_all.292979765
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1830949815
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.763388228
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.645596190
/workspace/coverage/default/7.sram_ctrl_alert_test.1008932384
/workspace/coverage/default/7.sram_ctrl_bijection.1013542797
/workspace/coverage/default/7.sram_ctrl_executable.2533674596
/workspace/coverage/default/7.sram_ctrl_lc_escalation.128859024
/workspace/coverage/default/7.sram_ctrl_max_throughput.2462383842
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.202855870
/workspace/coverage/default/7.sram_ctrl_mem_walk.2585360431
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2446323669
/workspace/coverage/default/7.sram_ctrl_partial_access.3435509224
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3079478827
/workspace/coverage/default/7.sram_ctrl_ram_cfg.111092007
/workspace/coverage/default/7.sram_ctrl_regwen.1536202394
/workspace/coverage/default/7.sram_ctrl_smoke.2213468927
/workspace/coverage/default/7.sram_ctrl_stress_all.2523676410
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.821501094
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2924842147
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2082209151
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2505387480
/workspace/coverage/default/8.sram_ctrl_alert_test.722437947
/workspace/coverage/default/8.sram_ctrl_bijection.2857085886
/workspace/coverage/default/8.sram_ctrl_executable.1686012402
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3168279513
/workspace/coverage/default/8.sram_ctrl_max_throughput.705598241
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1648275301
/workspace/coverage/default/8.sram_ctrl_mem_walk.3698979160
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2377452392
/workspace/coverage/default/8.sram_ctrl_partial_access.1060146505
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2355653
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3222817055
/workspace/coverage/default/8.sram_ctrl_smoke.956676614
/workspace/coverage/default/8.sram_ctrl_stress_all.212287077
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3336607105
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.858774725
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3870879216
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3410822844
/workspace/coverage/default/9.sram_ctrl_alert_test.2495218170
/workspace/coverage/default/9.sram_ctrl_bijection.2841824482
/workspace/coverage/default/9.sram_ctrl_executable.493270046
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3514589787
/workspace/coverage/default/9.sram_ctrl_max_throughput.90693364
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3066170852
/workspace/coverage/default/9.sram_ctrl_mem_walk.377049
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1238151466
/workspace/coverage/default/9.sram_ctrl_partial_access.1790832332
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.4236355490
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1471063274
/workspace/coverage/default/9.sram_ctrl_regwen.3075361858
/workspace/coverage/default/9.sram_ctrl_smoke.2778799073
/workspace/coverage/default/9.sram_ctrl_stress_all.738995470
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.4219264905
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3727021236
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2030343021



Total test records in report: 1015
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.502630131 Jun 07 07:34:25 PM PDT 24 Jun 07 07:39:02 PM PDT 24 16157566081 ps
T2 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.579574886 Jun 07 07:36:21 PM PDT 24 Jun 07 07:36:27 PM PDT 24 87197169 ps
T3 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.2085843677 Jun 07 07:37:42 PM PDT 24 Jun 07 07:48:34 PM PDT 24 8091135790 ps
T4 /workspace/coverage/default/29.sram_ctrl_executable.2329885276 Jun 07 07:37:04 PM PDT 24 Jun 07 07:46:59 PM PDT 24 1923142543 ps
T5 /workspace/coverage/default/6.sram_ctrl_lc_escalation.2038354632 Jun 07 07:33:53 PM PDT 24 Jun 07 07:34:05 PM PDT 24 1185013879 ps
T8 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3541208314 Jun 07 07:40:33 PM PDT 24 Jun 07 07:40:36 PM PDT 24 78474937 ps
T9 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3021160835 Jun 07 07:37:07 PM PDT 24 Jun 07 07:39:20 PM PDT 24 301138276 ps
T10 /workspace/coverage/default/30.sram_ctrl_stress_all.79615482 Jun 07 07:37:29 PM PDT 24 Jun 07 07:44:29 PM PDT 24 1612899272 ps
T11 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2401853866 Jun 07 07:40:06 PM PDT 24 Jun 07 07:46:59 PM PDT 24 5545739280 ps
T12 /workspace/coverage/default/42.sram_ctrl_executable.2849543982 Jun 07 07:40:12 PM PDT 24 Jun 07 08:05:21 PM PDT 24 6331390437 ps
T6 /workspace/coverage/default/33.sram_ctrl_lc_escalation.1189583308 Jun 07 07:38:04 PM PDT 24 Jun 07 07:38:12 PM PDT 24 721719872 ps
T16 /workspace/coverage/default/11.sram_ctrl_regwen.3223843501 Jun 07 07:34:23 PM PDT 24 Jun 07 07:34:51 PM PDT 24 1443202191 ps
T57 /workspace/coverage/default/4.sram_ctrl_multiple_keys.2043470404 Jun 07 07:33:41 PM PDT 24 Jun 07 08:03:36 PM PDT 24 13316155919 ps
T7 /workspace/coverage/default/2.sram_ctrl_stress_all.943500772 Jun 07 07:33:31 PM PDT 24 Jun 07 07:34:47 PM PDT 24 3823096037 ps
T26 /workspace/coverage/default/37.sram_ctrl_ram_cfg.2708542114 Jun 07 07:38:58 PM PDT 24 Jun 07 07:39:01 PM PDT 24 28770995 ps
T147 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3145627581 Jun 07 07:37:59 PM PDT 24 Jun 07 07:38:03 PM PDT 24 288364153 ps
T19 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.543983468 Jun 07 07:34:47 PM PDT 24 Jun 07 07:34:55 PM PDT 24 601363202 ps
T13 /workspace/coverage/default/3.sram_ctrl_alert_test.1007976245 Jun 07 07:33:43 PM PDT 24 Jun 07 07:33:48 PM PDT 24 52338282 ps
T27 /workspace/coverage/default/27.sram_ctrl_ram_cfg.472619462 Jun 07 07:36:43 PM PDT 24 Jun 07 07:36:45 PM PDT 24 99012813 ps
T29 /workspace/coverage/default/42.sram_ctrl_smoke.1810382650 Jun 07 07:40:05 PM PDT 24 Jun 07 07:40:19 PM PDT 24 362656842 ps
T30 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.157997546 Jun 07 07:34:32 PM PDT 24 Jun 07 07:41:57 PM PDT 24 1709426730 ps
T17 /workspace/coverage/default/14.sram_ctrl_stress_all.4082389749 Jun 07 07:34:31 PM PDT 24 Jun 07 08:29:36 PM PDT 24 33323074962 ps
T34 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.4129231754 Jun 07 07:34:43 PM PDT 24 Jun 07 07:34:50 PM PDT 24 377863437 ps
T18 /workspace/coverage/default/9.sram_ctrl_regwen.3075361858 Jun 07 07:34:18 PM PDT 24 Jun 07 07:46:53 PM PDT 24 15156781277 ps
T21 /workspace/coverage/default/9.sram_ctrl_lc_escalation.3514589787 Jun 07 07:34:07 PM PDT 24 Jun 07 07:34:15 PM PDT 24 471654680 ps
T32 /workspace/coverage/default/46.sram_ctrl_executable.3734819846 Jun 07 07:40:46 PM PDT 24 Jun 07 07:52:16 PM PDT 24 17057012037 ps
T43 /workspace/coverage/default/26.sram_ctrl_multiple_keys.4219410729 Jun 07 07:36:18 PM PDT 24 Jun 07 07:44:48 PM PDT 24 28967226786 ps
T22 /workspace/coverage/default/45.sram_ctrl_stress_all.2161475187 Jun 07 07:40:44 PM PDT 24 Jun 07 08:00:00 PM PDT 24 70322882121 ps
T44 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.873715836 Jun 07 07:41:02 PM PDT 24 Jun 07 07:41:07 PM PDT 24 274036503 ps
T31 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.2906643020 Jun 07 07:34:47 PM PDT 24 Jun 07 07:35:12 PM PDT 24 515068672 ps
T45 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.1149511143 Jun 07 07:38:51 PM PDT 24 Jun 07 07:42:59 PM PDT 24 4715162039 ps
T46 /workspace/coverage/default/45.sram_ctrl_smoke.3184998871 Jun 07 07:40:49 PM PDT 24 Jun 07 07:41:06 PM PDT 24 3407666080 ps
T148 /workspace/coverage/default/3.sram_ctrl_executable.1062853408 Jun 07 07:33:42 PM PDT 24 Jun 07 07:34:00 PM PDT 24 2312994093 ps
T150 /workspace/coverage/default/22.sram_ctrl_max_throughput.193036661 Jun 07 07:35:27 PM PDT 24 Jun 07 07:36:05 PM PDT 24 103285170 ps
T23 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.82087694 Jun 07 07:35:21 PM PDT 24 Jun 07 07:36:05 PM PDT 24 9249167799 ps
T33 /workspace/coverage/default/43.sram_ctrl_executable.2040134245 Jun 07 07:40:32 PM PDT 24 Jun 07 07:50:02 PM PDT 24 5612762791 ps
T28 /workspace/coverage/default/24.sram_ctrl_ram_cfg.2838020395 Jun 07 07:35:56 PM PDT 24 Jun 07 07:35:59 PM PDT 24 28778730 ps
T60 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.4267904538 Jun 07 07:33:50 PM PDT 24 Jun 07 07:38:34 PM PDT 24 2914566054 ps
T61 /workspace/coverage/default/23.sram_ctrl_max_throughput.2056155918 Jun 07 07:35:32 PM PDT 24 Jun 07 07:37:39 PM PDT 24 143000743 ps
T62 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.1964255517 Jun 07 07:38:44 PM PDT 24 Jun 07 08:09:22 PM PDT 24 25444419360 ps
T63 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.2969893449 Jun 07 07:36:19 PM PDT 24 Jun 07 07:42:50 PM PDT 24 5107473946 ps
T64 /workspace/coverage/default/30.sram_ctrl_bijection.3578021508 Jun 07 07:37:12 PM PDT 24 Jun 07 07:37:42 PM PDT 24 4472627950 ps
T65 /workspace/coverage/default/43.sram_ctrl_partial_access.4111636467 Jun 07 07:40:19 PM PDT 24 Jun 07 07:40:38 PM PDT 24 230401298 ps
T66 /workspace/coverage/default/23.sram_ctrl_partial_access.928402888 Jun 07 07:35:34 PM PDT 24 Jun 07 07:35:44 PM PDT 24 397531270 ps
T99 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.741096764 Jun 07 07:36:37 PM PDT 24 Jun 07 07:40:05 PM PDT 24 2256477078 ps
T100 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.2924842147 Jun 07 07:33:53 PM PDT 24 Jun 07 07:37:08 PM PDT 24 37589907287 ps
T149 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.4205736183 Jun 07 07:40:38 PM PDT 24 Jun 07 07:41:00 PM PDT 24 88995923 ps
T82 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.3792527204 Jun 07 07:34:34 PM PDT 24 Jun 07 07:56:14 PM PDT 24 8126084336 ps
T14 /workspace/coverage/default/10.sram_ctrl_alert_test.3154748842 Jun 07 07:34:23 PM PDT 24 Jun 07 07:34:28 PM PDT 24 12056980 ps
T56 /workspace/coverage/default/1.sram_ctrl_lc_escalation.271336306 Jun 07 07:33:33 PM PDT 24 Jun 07 07:33:39 PM PDT 24 112809859 ps
T137 /workspace/coverage/default/16.sram_ctrl_multiple_keys.3305854074 Jun 07 07:34:40 PM PDT 24 Jun 07 07:47:25 PM PDT 24 9442303863 ps
T151 /workspace/coverage/default/6.sram_ctrl_bijection.2028667578 Jun 07 07:33:43 PM PDT 24 Jun 07 07:34:44 PM PDT 24 887155678 ps
T35 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.2259281334 Jun 07 07:33:29 PM PDT 24 Jun 07 07:33:38 PM PDT 24 736016932 ps
T24 /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.923678891 Jun 07 07:34:22 PM PDT 24 Jun 07 07:36:24 PM PDT 24 1711742554 ps
T53 /workspace/coverage/default/39.sram_ctrl_regwen.3728515264 Jun 07 07:39:28 PM PDT 24 Jun 07 08:10:19 PM PDT 24 4336986745 ps
T101 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.3466639288 Jun 07 07:34:39 PM PDT 24 Jun 07 07:40:13 PM PDT 24 103638295494 ps
T152 /workspace/coverage/default/45.sram_ctrl_partial_access.2708730221 Jun 07 07:40:45 PM PDT 24 Jun 07 07:41:05 PM PDT 24 1903744548 ps
T142 /workspace/coverage/default/0.sram_ctrl_executable.2507319138 Jun 07 07:33:33 PM PDT 24 Jun 07 07:54:30 PM PDT 24 28281161169 ps
T153 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.3771786892 Jun 07 07:34:39 PM PDT 24 Jun 07 07:36:18 PM PDT 24 1100149616 ps
T102 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.2796514280 Jun 07 07:39:12 PM PDT 24 Jun 07 07:42:34 PM PDT 24 2066877001 ps
T154 /workspace/coverage/default/45.sram_ctrl_ram_cfg.2018014983 Jun 07 07:40:46 PM PDT 24 Jun 07 07:40:50 PM PDT 24 33464688 ps
T141 /workspace/coverage/default/41.sram_ctrl_multiple_keys.1580056813 Jun 07 07:39:55 PM PDT 24 Jun 07 08:04:59 PM PDT 24 13412294786 ps
T103 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.3767689517 Jun 07 07:34:55 PM PDT 24 Jun 07 07:44:19 PM PDT 24 150106672558 ps
T111 /workspace/coverage/default/3.sram_ctrl_stress_all.797263263 Jun 07 07:33:36 PM PDT 24 Jun 07 07:42:31 PM PDT 24 145373900827 ps
T143 /workspace/coverage/default/48.sram_ctrl_multiple_keys.1652612088 Jun 07 07:41:01 PM PDT 24 Jun 07 07:48:44 PM PDT 24 25958536004 ps
T128 /workspace/coverage/default/48.sram_ctrl_executable.772704785 Jun 07 07:41:02 PM PDT 24 Jun 07 08:01:58 PM PDT 24 51334214021 ps
T126 /workspace/coverage/default/16.sram_ctrl_stress_all.3970699397 Jun 07 07:34:40 PM PDT 24 Jun 07 08:21:10 PM PDT 24 8862706206 ps
T155 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.1730725072 Jun 07 07:39:47 PM PDT 24 Jun 07 07:42:55 PM PDT 24 522509884 ps
T138 /workspace/coverage/default/8.sram_ctrl_multiple_keys.2377452392 Jun 07 07:33:54 PM PDT 24 Jun 07 07:45:50 PM PDT 24 35252118799 ps
T131 /workspace/coverage/default/30.sram_ctrl_regwen.3277338314 Jun 07 07:37:21 PM PDT 24 Jun 07 07:42:40 PM PDT 24 6998521474 ps
T25 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.3025485302 Jun 07 07:38:37 PM PDT 24 Jun 07 07:38:44 PM PDT 24 147214434 ps
T15 /workspace/coverage/default/39.sram_ctrl_alert_test.2048349649 Jun 07 07:39:35 PM PDT 24 Jun 07 07:39:37 PM PDT 24 15405050 ps
T144 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.208314289 Jun 07 07:35:10 PM PDT 24 Jun 07 07:39:23 PM PDT 24 9627270671 ps
T139 /workspace/coverage/default/26.sram_ctrl_smoke.2417691254 Jun 07 07:36:20 PM PDT 24 Jun 07 07:37:47 PM PDT 24 880112021 ps
T39 /workspace/coverage/default/42.sram_ctrl_mem_walk.134050946 Jun 07 07:40:10 PM PDT 24 Jun 07 07:40:24 PM PDT 24 711176933 ps
T156 /workspace/coverage/default/11.sram_ctrl_bijection.3592218919 Jun 07 07:34:23 PM PDT 24 Jun 07 07:35:32 PM PDT 24 1537867513 ps
T140 /workspace/coverage/default/49.sram_ctrl_lc_escalation.3951456746 Jun 07 07:41:01 PM PDT 24 Jun 07 07:41:10 PM PDT 24 614034129 ps
T157 /workspace/coverage/default/12.sram_ctrl_bijection.1260004825 Jun 07 07:34:31 PM PDT 24 Jun 07 07:35:09 PM PDT 24 1899430365 ps
T40 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2281427382 Jun 07 07:33:51 PM PDT 24 Jun 07 07:36:40 PM PDT 24 615601905 ps
T158 /workspace/coverage/default/12.sram_ctrl_multiple_keys.3777119994 Jun 07 07:34:23 PM PDT 24 Jun 07 07:46:07 PM PDT 24 12170309991 ps
T159 /workspace/coverage/default/4.sram_ctrl_bijection.3464502868 Jun 07 07:33:49 PM PDT 24 Jun 07 07:35:21 PM PDT 24 10366690591 ps
T160 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.2241085079 Jun 07 07:38:59 PM PDT 24 Jun 07 07:47:03 PM PDT 24 4871346515 ps
T161 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.3831573069 Jun 07 07:40:44 PM PDT 24 Jun 07 07:42:34 PM PDT 24 2141581916 ps
T145 /workspace/coverage/default/2.sram_ctrl_lc_escalation.3793317973 Jun 07 07:33:29 PM PDT 24 Jun 07 07:33:36 PM PDT 24 428943613 ps
T162 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.203361383 Jun 07 07:35:02 PM PDT 24 Jun 07 07:47:47 PM PDT 24 8213436335 ps
T38 /workspace/coverage/default/20.sram_ctrl_mem_walk.3217510151 Jun 07 07:35:09 PM PDT 24 Jun 07 07:35:18 PM PDT 24 1136046161 ps
T163 /workspace/coverage/default/35.sram_ctrl_partial_access.3919468801 Jun 07 07:38:26 PM PDT 24 Jun 07 07:38:47 PM PDT 24 948575581 ps
T164 /workspace/coverage/default/23.sram_ctrl_bijection.3513631869 Jun 07 07:35:32 PM PDT 24 Jun 07 07:36:36 PM PDT 24 16192711549 ps
T20 /workspace/coverage/default/43.sram_ctrl_alert_test.755598060 Jun 07 07:40:47 PM PDT 24 Jun 07 07:40:50 PM PDT 24 12915887 ps
T165 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.3805766297 Jun 07 07:35:09 PM PDT 24 Jun 07 07:36:07 PM PDT 24 213397137 ps
T41 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.1268309017 Jun 07 07:37:12 PM PDT 24 Jun 07 07:37:19 PM PDT 24 660581401 ps
T166 /workspace/coverage/default/42.sram_ctrl_max_throughput.4199451411 Jun 07 07:40:07 PM PDT 24 Jun 07 07:40:20 PM PDT 24 285383336 ps
T167 /workspace/coverage/default/12.sram_ctrl_ram_cfg.2155775133 Jun 07 07:34:32 PM PDT 24 Jun 07 07:34:37 PM PDT 24 32209261 ps
T146 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.414431302 Jun 07 07:34:48 PM PDT 24 Jun 07 07:34:55 PM PDT 24 63665426 ps
T168 /workspace/coverage/default/4.sram_ctrl_max_throughput.746126264 Jun 07 07:33:38 PM PDT 24 Jun 07 07:33:57 PM PDT 24 521265426 ps
T169 /workspace/coverage/default/5.sram_ctrl_executable.1372130595 Jun 07 07:33:45 PM PDT 24 Jun 07 07:41:25 PM PDT 24 7299719630 ps
T170 /workspace/coverage/default/37.sram_ctrl_executable.2016856808 Jun 07 07:38:58 PM PDT 24 Jun 07 07:48:05 PM PDT 24 26983544167 ps
T171 /workspace/coverage/default/41.sram_ctrl_bijection.1651972540 Jun 07 07:39:54 PM PDT 24 Jun 07 07:40:35 PM PDT 24 3853921949 ps
T172 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.584528774 Jun 07 07:40:57 PM PDT 24 Jun 07 07:41:02 PM PDT 24 300963604 ps
T173 /workspace/coverage/default/18.sram_ctrl_partial_access.3005407516 Jun 07 07:34:48 PM PDT 24 Jun 07 07:35:10 PM PDT 24 3639037498 ps
T42 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.1334924130 Jun 07 07:35:32 PM PDT 24 Jun 07 07:38:46 PM PDT 24 3128546663 ps
T174 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1140296764 Jun 07 07:41:07 PM PDT 24 Jun 07 07:44:38 PM PDT 24 8450589017 ps
T175 /workspace/coverage/default/7.sram_ctrl_alert_test.1008932384 Jun 07 07:33:52 PM PDT 24 Jun 07 07:33:56 PM PDT 24 16091543 ps
T176 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1409539109 Jun 07 07:37:20 PM PDT 24 Jun 07 07:37:44 PM PDT 24 84903394 ps
T177 /workspace/coverage/default/27.sram_ctrl_partial_access.1811936079 Jun 07 07:36:36 PM PDT 24 Jun 07 07:36:38 PM PDT 24 45553798 ps
T178 /workspace/coverage/default/10.sram_ctrl_ram_cfg.295032753 Jun 07 07:34:23 PM PDT 24 Jun 07 07:34:29 PM PDT 24 55907708 ps
T179 /workspace/coverage/default/10.sram_ctrl_partial_access.3811245218 Jun 07 07:34:16 PM PDT 24 Jun 07 07:36:35 PM PDT 24 2537818583 ps
T180 /workspace/coverage/default/9.sram_ctrl_max_throughput.90693364 Jun 07 07:34:07 PM PDT 24 Jun 07 07:35:21 PM PDT 24 126921597 ps
T181 /workspace/coverage/default/34.sram_ctrl_lc_escalation.3395943979 Jun 07 07:38:19 PM PDT 24 Jun 07 07:38:29 PM PDT 24 1422717390 ps
T47 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1885939475 Jun 07 07:33:42 PM PDT 24 Jun 07 07:36:58 PM PDT 24 4203828339 ps
T182 /workspace/coverage/default/19.sram_ctrl_max_throughput.3794298092 Jun 07 07:34:54 PM PDT 24 Jun 07 07:35:29 PM PDT 24 93331643 ps
T183 /workspace/coverage/default/25.sram_ctrl_lc_escalation.3849542590 Jun 07 07:36:13 PM PDT 24 Jun 07 07:36:18 PM PDT 24 220004923 ps
T184 /workspace/coverage/default/42.sram_ctrl_bijection.1232687552 Jun 07 07:40:04 PM PDT 24 Jun 07 07:40:46 PM PDT 24 584504963 ps
T185 /workspace/coverage/default/4.sram_ctrl_alert_test.1523863108 Jun 07 07:33:43 PM PDT 24 Jun 07 07:33:48 PM PDT 24 15056079 ps
T186 /workspace/coverage/default/34.sram_ctrl_bijection.2789237289 Jun 07 07:38:08 PM PDT 24 Jun 07 07:38:45 PM PDT 24 2975852521 ps
T187 /workspace/coverage/default/31.sram_ctrl_ram_cfg.2861685214 Jun 07 07:37:40 PM PDT 24 Jun 07 07:37:43 PM PDT 24 26304424 ps
T188 /workspace/coverage/default/46.sram_ctrl_partial_access.2486938599 Jun 07 07:40:49 PM PDT 24 Jun 07 07:41:09 PM PDT 24 3731426401 ps
T189 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.1025272648 Jun 07 07:33:47 PM PDT 24 Jun 07 07:38:19 PM PDT 24 12229183537 ps
T190 /workspace/coverage/default/46.sram_ctrl_mem_walk.169364087 Jun 07 07:40:52 PM PDT 24 Jun 07 07:41:03 PM PDT 24 183256102 ps
T191 /workspace/coverage/default/21.sram_ctrl_mem_walk.708437249 Jun 07 07:35:16 PM PDT 24 Jun 07 07:35:23 PM PDT 24 927211358 ps
T192 /workspace/coverage/default/32.sram_ctrl_mem_walk.3206823980 Jun 07 07:37:55 PM PDT 24 Jun 07 07:38:07 PM PDT 24 184302174 ps
T193 /workspace/coverage/default/3.sram_ctrl_regwen.2796632318 Jun 07 07:33:38 PM PDT 24 Jun 07 07:48:37 PM PDT 24 4296722739 ps
T194 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.3225872733 Jun 07 07:38:36 PM PDT 24 Jun 07 07:48:22 PM PDT 24 2882011793 ps
T195 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.4061563557 Jun 07 07:34:33 PM PDT 24 Jun 07 07:34:41 PM PDT 24 333777709 ps
T130 /workspace/coverage/default/2.sram_ctrl_executable.2791131954 Jun 07 07:33:31 PM PDT 24 Jun 07 07:55:34 PM PDT 24 51153358027 ps
T48 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2711877161 Jun 07 07:39:35 PM PDT 24 Jun 07 07:46:55 PM PDT 24 7600756062 ps
T196 /workspace/coverage/default/2.sram_ctrl_regwen.4164418122 Jun 07 07:33:32 PM PDT 24 Jun 07 07:49:06 PM PDT 24 67726979321 ps
T197 /workspace/coverage/default/0.sram_ctrl_alert_test.1651850069 Jun 07 07:33:34 PM PDT 24 Jun 07 07:33:39 PM PDT 24 93102003 ps
T198 /workspace/coverage/default/11.sram_ctrl_lc_escalation.3985379620 Jun 07 07:34:26 PM PDT 24 Jun 07 07:34:31 PM PDT 24 105032926 ps
T127 /workspace/coverage/default/7.sram_ctrl_regwen.1536202394 Jun 07 07:33:52 PM PDT 24 Jun 07 07:55:36 PM PDT 24 54957521791 ps
T199 /workspace/coverage/default/27.sram_ctrl_mem_walk.1869571878 Jun 07 07:36:41 PM PDT 24 Jun 07 07:36:54 PM PDT 24 675307228 ps
T200 /workspace/coverage/default/38.sram_ctrl_ram_cfg.3147227895 Jun 07 07:39:13 PM PDT 24 Jun 07 07:39:16 PM PDT 24 30274509 ps
T201 /workspace/coverage/default/35.sram_ctrl_multiple_keys.813226527 Jun 07 07:38:29 PM PDT 24 Jun 07 07:42:41 PM PDT 24 1729380765 ps
T202 /workspace/coverage/default/46.sram_ctrl_alert_test.663304767 Jun 07 07:40:54 PM PDT 24 Jun 07 07:40:56 PM PDT 24 11146829 ps
T203 /workspace/coverage/default/10.sram_ctrl_smoke.4072396563 Jun 07 07:34:18 PM PDT 24 Jun 07 07:34:31 PM PDT 24 657775939 ps
T204 /workspace/coverage/default/36.sram_ctrl_smoke.2077589122 Jun 07 07:38:42 PM PDT 24 Jun 07 07:38:53 PM PDT 24 147246568 ps
T205 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.3651018226 Jun 07 07:33:42 PM PDT 24 Jun 07 07:39:56 PM PDT 24 7660741990 ps
T206 /workspace/coverage/default/36.sram_ctrl_alert_test.3068574001 Jun 07 07:38:52 PM PDT 24 Jun 07 07:38:55 PM PDT 24 13816336 ps
T207 /workspace/coverage/default/15.sram_ctrl_multiple_keys.103951037 Jun 07 07:34:32 PM PDT 24 Jun 07 07:55:49 PM PDT 24 12827831255 ps
T208 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.2537737804 Jun 07 07:40:48 PM PDT 24 Jun 07 07:45:31 PM PDT 24 2919674439 ps
T209 /workspace/coverage/default/13.sram_ctrl_regwen.3836703727 Jun 07 07:34:30 PM PDT 24 Jun 07 07:54:09 PM PDT 24 62042516360 ps
T135 /workspace/coverage/default/30.sram_ctrl_multiple_keys.2738919092 Jun 07 07:37:13 PM PDT 24 Jun 07 07:54:59 PM PDT 24 72186520579 ps
T132 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.257406761 Jun 07 07:39:06 PM PDT 24 Jun 07 07:39:12 PM PDT 24 94487792 ps
T210 /workspace/coverage/default/41.sram_ctrl_mem_walk.2001365821 Jun 07 07:39:59 PM PDT 24 Jun 07 07:40:08 PM PDT 24 299749852 ps
T211 /workspace/coverage/default/44.sram_ctrl_max_throughput.4041698172 Jun 07 07:40:38 PM PDT 24 Jun 07 07:42:17 PM PDT 24 275980547 ps
T212 /workspace/coverage/default/7.sram_ctrl_ram_cfg.111092007 Jun 07 07:33:54 PM PDT 24 Jun 07 07:33:58 PM PDT 24 151803181 ps
T213 /workspace/coverage/default/7.sram_ctrl_mem_walk.2585360431 Jun 07 07:33:53 PM PDT 24 Jun 07 07:34:02 PM PDT 24 293580491 ps
T214 /workspace/coverage/default/40.sram_ctrl_alert_test.1463922418 Jun 07 07:39:55 PM PDT 24 Jun 07 07:39:57 PM PDT 24 19091951 ps
T215 /workspace/coverage/default/32.sram_ctrl_max_throughput.3202607526 Jun 07 07:37:53 PM PDT 24 Jun 07 07:38:07 PM PDT 24 267196541 ps
T49 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.3296385171 Jun 07 07:34:39 PM PDT 24 Jun 07 07:39:12 PM PDT 24 1828268035 ps
T216 /workspace/coverage/default/32.sram_ctrl_partial_access.2758825201 Jun 07 07:37:54 PM PDT 24 Jun 07 07:38:00 PM PDT 24 787665020 ps
T217 /workspace/coverage/default/15.sram_ctrl_partial_access.3580264584 Jun 07 07:34:40 PM PDT 24 Jun 07 07:35:01 PM PDT 24 821119741 ps
T218 /workspace/coverage/default/13.sram_ctrl_bijection.3818183512 Jun 07 07:34:32 PM PDT 24 Jun 07 07:35:28 PM PDT 24 9101602388 ps
T219 /workspace/coverage/default/27.sram_ctrl_bijection.1276113513 Jun 07 07:36:37 PM PDT 24 Jun 07 07:38:02 PM PDT 24 51404405154 ps
T129 /workspace/coverage/default/1.sram_ctrl_regwen.1913086496 Jun 07 07:33:44 PM PDT 24 Jun 07 07:58:47 PM PDT 24 61776952889 ps
T220 /workspace/coverage/default/46.sram_ctrl_ram_cfg.3767346363 Jun 07 07:40:55 PM PDT 24 Jun 07 07:40:58 PM PDT 24 29047816 ps
T221 /workspace/coverage/default/26.sram_ctrl_regwen.2016460809 Jun 07 07:36:28 PM PDT 24 Jun 07 07:37:32 PM PDT 24 6052760436 ps
T222 /workspace/coverage/default/0.sram_ctrl_lc_escalation.3347908365 Jun 07 07:33:32 PM PDT 24 Jun 07 07:33:41 PM PDT 24 1148123462 ps
T223 /workspace/coverage/default/49.sram_ctrl_ram_cfg.977725448 Jun 07 07:41:10 PM PDT 24 Jun 07 07:41:12 PM PDT 24 71781390 ps
T224 /workspace/coverage/default/45.sram_ctrl_max_throughput.3559715632 Jun 07 07:40:45 PM PDT 24 Jun 07 07:42:48 PM PDT 24 269230149 ps
T83 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.104133872 Jun 07 07:33:44 PM PDT 24 Jun 07 07:33:52 PM PDT 24 58101398 ps
T225 /workspace/coverage/default/39.sram_ctrl_executable.3301819396 Jun 07 07:39:32 PM PDT 24 Jun 07 07:43:23 PM PDT 24 956057765 ps
T226 /workspace/coverage/default/5.sram_ctrl_alert_test.630800550 Jun 07 07:33:42 PM PDT 24 Jun 07 07:33:47 PM PDT 24 12060597 ps
T227 /workspace/coverage/default/33.sram_ctrl_executable.1773646202 Jun 07 07:38:02 PM PDT 24 Jun 07 08:09:46 PM PDT 24 26861599541 ps
T228 /workspace/coverage/default/11.sram_ctrl_executable.985991115 Jun 07 07:34:24 PM PDT 24 Jun 07 07:35:48 PM PDT 24 2470362060 ps
T58 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1651539223 Jun 07 07:38:49 PM PDT 24 Jun 07 07:40:44 PM PDT 24 1495353231 ps
T229 /workspace/coverage/default/8.sram_ctrl_max_throughput.705598241 Jun 07 07:33:59 PM PDT 24 Jun 07 07:36:01 PM PDT 24 141987645 ps
T230 /workspace/coverage/default/2.sram_ctrl_multiple_keys.763779885 Jun 07 07:33:43 PM PDT 24 Jun 07 07:51:31 PM PDT 24 40424876336 ps
T231 /workspace/coverage/default/47.sram_ctrl_max_throughput.1035723102 Jun 07 07:40:54 PM PDT 24 Jun 07 07:41:00 PM PDT 24 458476239 ps
T232 /workspace/coverage/default/29.sram_ctrl_alert_test.1817561617 Jun 07 07:37:13 PM PDT 24 Jun 07 07:37:15 PM PDT 24 131792899 ps
T233 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.3410822844 Jun 07 07:34:05 PM PDT 24 Jun 07 07:41:04 PM PDT 24 7552824995 ps
T234 /workspace/coverage/default/29.sram_ctrl_smoke.1613440070 Jun 07 07:36:57 PM PDT 24 Jun 07 07:37:40 PM PDT 24 478126359 ps
T235 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.3993916293 Jun 07 07:34:34 PM PDT 24 Jun 07 07:37:40 PM PDT 24 4358069936 ps
T236 /workspace/coverage/default/16.sram_ctrl_mem_walk.1235070946 Jun 07 07:34:40 PM PDT 24 Jun 07 07:34:53 PM PDT 24 551551844 ps
T237 /workspace/coverage/default/11.sram_ctrl_multiple_keys.3896242402 Jun 07 07:34:23 PM PDT 24 Jun 07 07:53:20 PM PDT 24 51905505219 ps
T238 /workspace/coverage/default/40.sram_ctrl_executable.3727996168 Jun 07 07:39:45 PM PDT 24 Jun 07 07:56:03 PM PDT 24 6112892351 ps
T239 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.1793209015 Jun 07 07:39:57 PM PDT 24 Jun 07 07:40:01 PM PDT 24 163425883 ps
T240 /workspace/coverage/default/15.sram_ctrl_lc_escalation.2372777389 Jun 07 07:34:39 PM PDT 24 Jun 07 07:34:49 PM PDT 24 834853842 ps
T241 /workspace/coverage/default/7.sram_ctrl_executable.2533674596 Jun 07 07:33:53 PM PDT 24 Jun 07 07:47:55 PM PDT 24 12940613801 ps
T242 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3131103239 Jun 07 07:34:30 PM PDT 24 Jun 07 07:38:10 PM PDT 24 12255703829 ps
T243 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.1128307009 Jun 07 07:34:31 PM PDT 24 Jun 07 07:38:49 PM PDT 24 3210557955 ps
T244 /workspace/coverage/default/28.sram_ctrl_regwen.1989869764 Jun 07 07:36:50 PM PDT 24 Jun 07 07:55:24 PM PDT 24 2731414354 ps
T245 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2030343021 Jun 07 07:34:07 PM PDT 24 Jun 07 07:34:37 PM PDT 24 602245075 ps
T59 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.797570841 Jun 07 07:34:47 PM PDT 24 Jun 07 07:43:11 PM PDT 24 16055565727 ps
T246 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.1573309298 Jun 07 07:33:33 PM PDT 24 Jun 07 07:33:42 PM PDT 24 66114631 ps
T247 /workspace/coverage/default/34.sram_ctrl_regwen.1080205074 Jun 07 07:38:20 PM PDT 24 Jun 07 07:41:11 PM PDT 24 15830317247 ps
T248 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.1100704114 Jun 07 07:40:06 PM PDT 24 Jun 07 07:43:55 PM PDT 24 3547399867 ps
T249 /workspace/coverage/default/37.sram_ctrl_mem_walk.3785379642 Jun 07 07:38:57 PM PDT 24 Jun 07 07:39:12 PM PDT 24 658293848 ps
T250 /workspace/coverage/default/42.sram_ctrl_multiple_keys.3369491692 Jun 07 07:40:06 PM PDT 24 Jun 07 07:48:55 PM PDT 24 2413401192 ps
T251 /workspace/coverage/default/0.sram_ctrl_mem_walk.2194673753 Jun 07 07:33:33 PM PDT 24 Jun 07 07:33:42 PM PDT 24 343817915 ps
T252 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.3811548964 Jun 07 07:39:47 PM PDT 24 Jun 07 07:39:54 PM PDT 24 1685075889 ps
T253 /workspace/coverage/default/21.sram_ctrl_alert_test.2148224710 Jun 07 07:35:15 PM PDT 24 Jun 07 07:35:17 PM PDT 24 25009053 ps
T254 /workspace/coverage/default/20.sram_ctrl_ram_cfg.3925360477 Jun 07 07:35:01 PM PDT 24 Jun 07 07:35:04 PM PDT 24 56061450 ps
T255 /workspace/coverage/default/12.sram_ctrl_lc_escalation.1460948420 Jun 07 07:34:31 PM PDT 24 Jun 07 07:34:39 PM PDT 24 1466424489 ps
T106 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3612897027 Jun 07 07:38:09 PM PDT 24 Jun 07 07:38:47 PM PDT 24 1166914448 ps
T256 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.3647495518 Jun 07 07:39:29 PM PDT 24 Jun 07 07:39:35 PM PDT 24 385445678 ps
T257 /workspace/coverage/default/28.sram_ctrl_stress_all.4013943332 Jun 07 07:37:00 PM PDT 24 Jun 07 07:53:10 PM PDT 24 15877845173 ps
T134 /workspace/coverage/default/23.sram_ctrl_stress_all.1784316985 Jun 07 07:35:43 PM PDT 24 Jun 07 07:52:53 PM PDT 24 105338819394 ps
T258 /workspace/coverage/default/49.sram_ctrl_executable.3376767710 Jun 07 07:41:09 PM PDT 24 Jun 07 08:01:04 PM PDT 24 59231189570 ps
T259 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.394947904 Jun 07 07:34:23 PM PDT 24 Jun 07 07:35:52 PM PDT 24 601641237 ps
T260 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.3094096500 Jun 07 07:33:45 PM PDT 24 Jun 07 07:42:12 PM PDT 24 4056003141 ps
T261 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.3810096450 Jun 07 07:37:05 PM PDT 24 Jun 07 07:45:57 PM PDT 24 10699652885 ps
T262 /workspace/coverage/default/18.sram_ctrl_max_throughput.1354796469 Jun 07 07:34:47 PM PDT 24 Jun 07 07:37:30 PM PDT 24 139232639 ps
T263 /workspace/coverage/default/33.sram_ctrl_partial_access.2334744292 Jun 07 07:38:01 PM PDT 24 Jun 07 07:38:07 PM PDT 24 153829541 ps
T264 /workspace/coverage/default/24.sram_ctrl_executable.1427301928 Jun 07 07:35:56 PM PDT 24 Jun 07 08:00:08 PM PDT 24 64875940979 ps
T265 /workspace/coverage/default/16.sram_ctrl_alert_test.2112983200 Jun 07 07:34:41 PM PDT 24 Jun 07 07:34:47 PM PDT 24 31822521 ps
T266 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.1443003294 Jun 07 07:40:47 PM PDT 24 Jun 07 07:54:50 PM PDT 24 6605001114 ps
T267 /workspace/coverage/default/10.sram_ctrl_executable.2981007528 Jun 07 07:34:25 PM PDT 24 Jun 07 07:39:51 PM PDT 24 9239471002 ps
T268 /workspace/coverage/default/25.sram_ctrl_partial_access.1062814553 Jun 07 07:36:13 PM PDT 24 Jun 07 07:36:17 PM PDT 24 205360009 ps
T269 /workspace/coverage/default/20.sram_ctrl_multiple_keys.1878461677 Jun 07 07:35:04 PM PDT 24 Jun 07 07:47:16 PM PDT 24 2124725440 ps
T270 /workspace/coverage/default/47.sram_ctrl_partial_access.4205561066 Jun 07 07:40:54 PM PDT 24 Jun 07 07:40:59 PM PDT 24 91482902 ps
T271 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3221289833 Jun 07 07:35:43 PM PDT 24 Jun 07 07:37:16 PM PDT 24 1071968487 ps
T272 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.2088356483 Jun 07 07:40:31 PM PDT 24 Jun 07 07:54:56 PM PDT 24 5800866265 ps
T273 /workspace/coverage/default/35.sram_ctrl_max_throughput.3968208349 Jun 07 07:38:27 PM PDT 24 Jun 07 07:38:32 PM PDT 24 151055775 ps
T274 /workspace/coverage/default/10.sram_ctrl_lc_escalation.649818099 Jun 07 07:34:33 PM PDT 24 Jun 07 07:34:46 PM PDT 24 2994377060 ps
T275 /workspace/coverage/default/14.sram_ctrl_stress_pipeline.1355075759 Jun 07 07:34:31 PM PDT 24 Jun 07 07:37:32 PM PDT 24 7449749459 ps
T276 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1201245857 Jun 07 07:34:32 PM PDT 24 Jun 07 07:36:34 PM PDT 24 327052781 ps
T277 /workspace/coverage/default/41.sram_ctrl_lc_escalation.3769347916 Jun 07 07:39:59 PM PDT 24 Jun 07 07:40:09 PM PDT 24 1715599500 ps
T278 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2990407755 Jun 07 07:33:38 PM PDT 24 Jun 07 07:34:30 PM PDT 24 126540808 ps
T279 /workspace/coverage/default/2.sram_ctrl_bijection.1841240742 Jun 07 07:33:34 PM PDT 24 Jun 07 07:34:51 PM PDT 24 12639106119 ps
T280 /workspace/coverage/default/28.sram_ctrl_lc_escalation.3242062553 Jun 07 07:36:50 PM PDT 24 Jun 07 07:36:57 PM PDT 24 3912386835 ps
T281 /workspace/coverage/default/23.sram_ctrl_lc_escalation.3256917339 Jun 07 07:35:35 PM PDT 24 Jun 07 07:35:42 PM PDT 24 915971316 ps
T282 /workspace/coverage/default/49.sram_ctrl_bijection.2984272307 Jun 07 07:41:01 PM PDT 24 Jun 07 07:42:01 PM PDT 24 14532406894 ps
T283 /workspace/coverage/default/20.sram_ctrl_stress_all.302557812 Jun 07 07:35:09 PM PDT 24 Jun 07 08:22:19 PM PDT 24 15252366914 ps
T284 /workspace/coverage/default/47.sram_ctrl_mem_walk.677096554 Jun 07 07:40:54 PM PDT 24 Jun 07 07:41:05 PM PDT 24 182174750 ps
T285 /workspace/coverage/default/24.sram_ctrl_smoke.1266827477 Jun 07 07:35:49 PM PDT 24 Jun 07 07:38:23 PM PDT 24 143546421 ps
T286 /workspace/coverage/default/25.sram_ctrl_regwen.1248362945 Jun 07 07:36:22 PM PDT 24 Jun 07 08:12:29 PM PDT 24 21112016977 ps
T287 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.424873078 Jun 07 07:34:40 PM PDT 24 Jun 07 07:36:50 PM PDT 24 609863368 ps
T288 /workspace/coverage/default/13.sram_ctrl_mem_walk.622367727 Jun 07 07:34:33 PM PDT 24 Jun 07 07:34:43 PM PDT 24 252038737 ps
T289 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.2433891755 Jun 07 07:37:41 PM PDT 24 Jun 07 07:37:48 PM PDT 24 220940582 ps
T290 /workspace/coverage/default/37.sram_ctrl_lc_escalation.452953717 Jun 07 07:38:57 PM PDT 24 Jun 07 07:39:01 PM PDT 24 297447533 ps
T291 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.3067006490 Jun 07 07:33:32 PM PDT 24 Jun 07 07:43:47 PM PDT 24 14255258434 ps
T292 /workspace/coverage/default/32.sram_ctrl_ram_cfg.3829413231 Jun 07 07:37:57 PM PDT 24 Jun 07 07:38:01 PM PDT 24 47504017 ps
T293 /workspace/coverage/default/9.sram_ctrl_smoke.2778799073 Jun 07 07:34:10 PM PDT 24 Jun 07 07:34:42 PM PDT 24 4628627435 ps
T294 /workspace/coverage/default/35.sram_ctrl_mem_walk.1212493847 Jun 07 07:38:36 PM PDT 24 Jun 07 07:38:49 PM PDT 24 1320795476 ps
T295 /workspace/coverage/default/40.sram_ctrl_multiple_keys.3193518099 Jun 07 07:39:35 PM PDT 24 Jun 07 07:46:40 PM PDT 24 9404915431 ps
T296 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.21649914 Jun 07 07:33:43 PM PDT 24 Jun 07 07:33:50 PM PDT 24 516935945 ps
T297 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1867809277 Jun 07 07:40:49 PM PDT 24 Jun 07 07:41:56 PM PDT 24 125559435 ps
T298 /workspace/coverage/default/25.sram_ctrl_ram_cfg.2589956221 Jun 07 07:36:22 PM PDT 24 Jun 07 07:36:25 PM PDT 24 27392003 ps
T299 /workspace/coverage/default/34.sram_ctrl_mem_walk.720838477 Jun 07 07:38:19 PM PDT 24 Jun 07 07:38:29 PM PDT 24 862315632 ps
T300 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.3066170852 Jun 07 07:34:16 PM PDT 24 Jun 07 07:34:21 PM PDT 24 147638111 ps
T301 /workspace/coverage/default/26.sram_ctrl_alert_test.170738018 Jun 07 07:36:29 PM PDT 24 Jun 07 07:36:31 PM PDT 24 18522817 ps
T302 /workspace/coverage/default/11.sram_ctrl_mem_walk.2336551522 Jun 07 07:34:24 PM PDT 24 Jun 07 07:34:40 PM PDT 24 2616365566 ps
T303 /workspace/coverage/default/21.sram_ctrl_smoke.916817195 Jun 07 07:35:11 PM PDT 24 Jun 07 07:36:34 PM PDT 24 512506011 ps
T304 /workspace/coverage/default/3.sram_ctrl_bijection.3657897612 Jun 07 07:33:40 PM PDT 24 Jun 07 07:35:15 PM PDT 24 9215935035 ps
T305 /workspace/coverage/default/20.sram_ctrl_alert_test.1925839898 Jun 07 07:35:12 PM PDT 24 Jun 07 07:35:14 PM PDT 24 85364537 ps
T306 /workspace/coverage/default/6.sram_ctrl_partial_access.304149770 Jun 07 07:33:43 PM PDT 24 Jun 07 07:33:50 PM PDT 24 65349924 ps
T307 /workspace/coverage/default/30.sram_ctrl_lc_escalation.3862584648 Jun 07 07:37:22 PM PDT 24 Jun 07 07:37:30 PM PDT 24 415395473 ps
T308 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1804752569 Jun 07 07:40:44 PM PDT 24 Jun 07 07:42:25 PM PDT 24 511343526 ps
T133 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3029864894 Jun 07 07:38:27 PM PDT 24 Jun 07 07:44:55 PM PDT 24 51667772644 ps
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