Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total test records in report: 1024
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

T311 /workspace/coverage/default/18.sram_ctrl_stress_all.2421594613 Jun 27 06:27:24 PM PDT 24 Jun 27 06:42:16 PM PDT 24 14124177216 ps
T312 /workspace/coverage/default/20.sram_ctrl_partial_access.2087326245 Jun 27 06:27:21 PM PDT 24 Jun 27 06:27:43 PM PDT 24 210515459 ps
T313 /workspace/coverage/default/0.sram_ctrl_max_throughput.2595694531 Jun 27 06:26:19 PM PDT 24 Jun 27 06:26:25 PM PDT 24 133890790 ps
T314 /workspace/coverage/default/43.sram_ctrl_max_throughput.1498749171 Jun 27 06:29:02 PM PDT 24 Jun 27 06:29:06 PM PDT 24 380346203 ps
T315 /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.252851844 Jun 27 06:27:33 PM PDT 24 Jun 27 06:32:09 PM PDT 24 9638880425 ps
T316 /workspace/coverage/default/36.sram_ctrl_mem_walk.583868496 Jun 27 06:28:29 PM PDT 24 Jun 27 06:28:38 PM PDT 24 1223203105 ps
T317 /workspace/coverage/default/23.sram_ctrl_ram_cfg.1127016488 Jun 27 06:27:24 PM PDT 24 Jun 27 06:27:43 PM PDT 24 45491274 ps
T318 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.3586005110 Jun 27 06:29:23 PM PDT 24 Jun 27 06:29:31 PM PDT 24 95308191 ps
T319 /workspace/coverage/default/29.sram_ctrl_lc_escalation.3247065179 Jun 27 06:27:50 PM PDT 24 Jun 27 06:28:10 PM PDT 24 247085801 ps
T83 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.3791315543 Jun 27 06:26:58 PM PDT 24 Jun 27 06:27:04 PM PDT 24 439993078 ps
T320 /workspace/coverage/default/9.sram_ctrl_alert_test.372501355 Jun 27 06:27:01 PM PDT 24 Jun 27 06:27:06 PM PDT 24 65479809 ps
T321 /workspace/coverage/default/22.sram_ctrl_lc_escalation.1424699673 Jun 27 06:27:25 PM PDT 24 Jun 27 06:27:47 PM PDT 24 431230642 ps
T322 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.4242544617 Jun 27 06:27:25 PM PDT 24 Jun 27 06:33:02 PM PDT 24 27091247253 ps
T323 /workspace/coverage/default/8.sram_ctrl_ram_cfg.717598496 Jun 27 06:27:00 PM PDT 24 Jun 27 06:27:05 PM PDT 24 44156116 ps
T324 /workspace/coverage/default/45.sram_ctrl_mem_walk.296885940 Jun 27 06:29:21 PM PDT 24 Jun 27 06:29:35 PM PDT 24 1700324941 ps
T325 /workspace/coverage/default/6.sram_ctrl_partial_access.471256450 Jun 27 06:26:54 PM PDT 24 Jun 27 06:27:34 PM PDT 24 593014794 ps
T326 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.2596088567 Jun 27 06:28:56 PM PDT 24 Jun 27 06:29:01 PM PDT 24 63486403 ps
T327 /workspace/coverage/default/38.sram_ctrl_alert_test.3231228865 Jun 27 06:28:44 PM PDT 24 Jun 27 06:28:49 PM PDT 24 42122020 ps
T328 /workspace/coverage/default/9.sram_ctrl_regwen.3016160707 Jun 27 06:27:07 PM PDT 24 Jun 27 06:39:32 PM PDT 24 3352566615 ps
T329 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1098901536 Jun 27 06:27:00 PM PDT 24 Jun 27 06:33:01 PM PDT 24 9721766440 ps
T330 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.2713159351 Jun 27 06:27:23 PM PDT 24 Jun 27 06:27:47 PM PDT 24 191073801 ps
T331 /workspace/coverage/default/27.sram_ctrl_lc_escalation.1652950715 Jun 27 06:27:41 PM PDT 24 Jun 27 06:28:05 PM PDT 24 2536125602 ps
T332 /workspace/coverage/default/24.sram_ctrl_max_throughput.3840118989 Jun 27 06:27:26 PM PDT 24 Jun 27 06:28:09 PM PDT 24 528046319 ps
T333 /workspace/coverage/default/23.sram_ctrl_max_throughput.2310132032 Jun 27 06:27:34 PM PDT 24 Jun 27 06:28:52 PM PDT 24 474651302 ps
T334 /workspace/coverage/default/24.sram_ctrl_regwen.3602448479 Jun 27 06:27:26 PM PDT 24 Jun 27 06:38:53 PM PDT 24 10467759453 ps
T335 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.3067882237 Jun 27 06:27:23 PM PDT 24 Jun 27 06:27:58 PM PDT 24 81507406 ps
T336 /workspace/coverage/default/23.sram_ctrl_mem_walk.3379213228 Jun 27 06:27:34 PM PDT 24 Jun 27 06:28:00 PM PDT 24 137081149 ps
T337 /workspace/coverage/default/14.sram_ctrl_partial_access.1339900843 Jun 27 06:26:59 PM PDT 24 Jun 27 06:28:42 PM PDT 24 655422195 ps
T338 /workspace/coverage/default/31.sram_ctrl_mem_walk.3545393190 Jun 27 06:27:58 PM PDT 24 Jun 27 06:28:26 PM PDT 24 2976635814 ps
T339 /workspace/coverage/default/5.sram_ctrl_mem_walk.3919500642 Jun 27 06:26:33 PM PDT 24 Jun 27 06:26:50 PM PDT 24 2613025614 ps
T340 /workspace/coverage/default/37.sram_ctrl_executable.742428235 Jun 27 06:28:40 PM PDT 24 Jun 27 06:36:05 PM PDT 24 6176967093 ps
T341 /workspace/coverage/default/29.sram_ctrl_mem_walk.3485120238 Jun 27 06:27:37 PM PDT 24 Jun 27 06:27:59 PM PDT 24 331937342 ps
T342 /workspace/coverage/default/39.sram_ctrl_ram_cfg.3206137123 Jun 27 06:28:43 PM PDT 24 Jun 27 06:28:48 PM PDT 24 45006169 ps
T343 /workspace/coverage/default/1.sram_ctrl_executable.2533254362 Jun 27 06:26:36 PM PDT 24 Jun 27 06:27:50 PM PDT 24 2641361677 ps
T344 /workspace/coverage/default/6.sram_ctrl_alert_test.1199062313 Jun 27 06:26:38 PM PDT 24 Jun 27 06:26:44 PM PDT 24 26187958 ps
T345 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.1963371008 Jun 27 06:28:10 PM PDT 24 Jun 27 06:32:02 PM PDT 24 1428872437 ps
T346 /workspace/coverage/default/25.sram_ctrl_mem_walk.414138007 Jun 27 06:27:38 PM PDT 24 Jun 27 06:28:06 PM PDT 24 1836530110 ps
T347 /workspace/coverage/default/38.sram_ctrl_executable.3484059376 Jun 27 06:28:40 PM PDT 24 Jun 27 06:37:13 PM PDT 24 22979281233 ps
T348 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.2371240129 Jun 27 06:27:59 PM PDT 24 Jun 27 06:30:18 PM PDT 24 1338483223 ps
T349 /workspace/coverage/default/6.sram_ctrl_smoke.4047532426 Jun 27 06:26:40 PM PDT 24 Jun 27 06:28:01 PM PDT 24 418352999 ps
T350 /workspace/coverage/default/26.sram_ctrl_mem_walk.2831864999 Jun 27 06:27:46 PM PDT 24 Jun 27 06:28:08 PM PDT 24 94826830 ps
T351 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.2507906816 Jun 27 06:27:33 PM PDT 24 Jun 27 06:35:57 PM PDT 24 17985129607 ps
T352 /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.2675490290 Jun 27 06:28:28 PM PDT 24 Jun 27 06:29:46 PM PDT 24 490849422 ps
T353 /workspace/coverage/default/36.sram_ctrl_multiple_keys.930355828 Jun 27 06:28:26 PM PDT 24 Jun 27 06:44:35 PM PDT 24 22010080549 ps
T354 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.426379852 Jun 27 06:29:42 PM PDT 24 Jun 27 06:38:40 PM PDT 24 2468329532 ps
T355 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1483017636 Jun 27 06:27:18 PM PDT 24 Jun 27 06:37:25 PM PDT 24 122672936113 ps
T356 /workspace/coverage/default/14.sram_ctrl_mem_walk.155438357 Jun 27 06:27:19 PM PDT 24 Jun 27 06:27:42 PM PDT 24 616021165 ps
T357 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2869402050 Jun 27 06:29:23 PM PDT 24 Jun 27 06:29:28 PM PDT 24 173081072 ps
T358 /workspace/coverage/default/36.sram_ctrl_bijection.3560497945 Jun 27 06:28:27 PM PDT 24 Jun 27 06:29:17 PM PDT 24 772555609 ps
T359 /workspace/coverage/default/29.sram_ctrl_alert_test.1503506815 Jun 27 06:27:45 PM PDT 24 Jun 27 06:28:03 PM PDT 24 12361534 ps
T360 /workspace/coverage/default/35.sram_ctrl_lc_escalation.1738284948 Jun 27 06:28:10 PM PDT 24 Jun 27 06:28:29 PM PDT 24 691510551 ps
T361 /workspace/coverage/default/34.sram_ctrl_alert_test.3478946012 Jun 27 06:28:09 PM PDT 24 Jun 27 06:28:23 PM PDT 24 54394367 ps
T362 /workspace/coverage/default/32.sram_ctrl_stress_all.1252600717 Jun 27 06:27:57 PM PDT 24 Jun 27 08:34:53 PM PDT 24 64467599695 ps
T363 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.3890629814 Jun 27 06:28:01 PM PDT 24 Jun 27 06:33:01 PM PDT 24 6412853317 ps
T364 /workspace/coverage/default/18.sram_ctrl_multiple_keys.528926606 Jun 27 06:27:16 PM PDT 24 Jun 27 06:39:43 PM PDT 24 4069310488 ps
T365 /workspace/coverage/default/3.sram_ctrl_partial_access.3957833150 Jun 27 06:26:33 PM PDT 24 Jun 27 06:26:54 PM PDT 24 4679403732 ps
T366 /workspace/coverage/default/7.sram_ctrl_smoke.2067083484 Jun 27 06:26:42 PM PDT 24 Jun 27 06:26:49 PM PDT 24 105892919 ps
T367 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.49625759 Jun 27 06:27:40 PM PDT 24 Jun 27 06:39:22 PM PDT 24 5785289193 ps
T368 /workspace/coverage/default/33.sram_ctrl_alert_test.1858833350 Jun 27 06:28:09 PM PDT 24 Jun 27 06:28:23 PM PDT 24 28431422 ps
T369 /workspace/coverage/default/11.sram_ctrl_lc_escalation.235729222 Jun 27 06:27:03 PM PDT 24 Jun 27 06:27:12 PM PDT 24 480473901 ps
T370 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.1349008679 Jun 27 06:27:25 PM PDT 24 Jun 27 06:32:52 PM PDT 24 12069052768 ps
T371 /workspace/coverage/default/18.sram_ctrl_alert_test.2825214991 Jun 27 06:27:24 PM PDT 24 Jun 27 06:27:43 PM PDT 24 52331679 ps
T372 /workspace/coverage/default/45.sram_ctrl_lc_escalation.4131403360 Jun 27 06:29:25 PM PDT 24 Jun 27 06:29:32 PM PDT 24 295705864 ps
T42 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2012693233 Jun 27 06:26:59 PM PDT 24 Jun 27 06:27:13 PM PDT 24 1814880367 ps
T373 /workspace/coverage/default/25.sram_ctrl_ram_cfg.840609489 Jun 27 06:27:39 PM PDT 24 Jun 27 06:27:57 PM PDT 24 28977008 ps
T374 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.87207726 Jun 27 06:27:56 PM PDT 24 Jun 27 06:35:05 PM PDT 24 22438185673 ps
T375 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.2329632355 Jun 27 06:27:05 PM PDT 24 Jun 27 06:31:43 PM PDT 24 10857449498 ps
T376 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.2368131571 Jun 27 06:26:38 PM PDT 24 Jun 27 06:51:21 PM PDT 24 19987962599 ps
T377 /workspace/coverage/default/31.sram_ctrl_multiple_keys.84553260 Jun 27 06:27:57 PM PDT 24 Jun 27 06:47:18 PM PDT 24 55384360794 ps
T378 /workspace/coverage/default/3.sram_ctrl_lc_escalation.740815094 Jun 27 06:26:36 PM PDT 24 Jun 27 06:26:48 PM PDT 24 1132693416 ps
T379 /workspace/coverage/default/9.sram_ctrl_bijection.2408514810 Jun 27 06:26:57 PM PDT 24 Jun 27 06:28:25 PM PDT 24 30759789919 ps
T380 /workspace/coverage/default/5.sram_ctrl_ram_cfg.945628926 Jun 27 06:26:36 PM PDT 24 Jun 27 06:26:42 PM PDT 24 27206969 ps
T381 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.43864932 Jun 27 06:26:37 PM PDT 24 Jun 27 06:26:44 PM PDT 24 43923217 ps
T382 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1561409581 Jun 27 06:26:59 PM PDT 24 Jun 27 06:28:33 PM PDT 24 966818764 ps
T383 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.3685281637 Jun 27 06:27:54 PM PDT 24 Jun 27 06:28:14 PM PDT 24 374672543 ps
T384 /workspace/coverage/default/13.sram_ctrl_ram_cfg.2816301469 Jun 27 06:27:02 PM PDT 24 Jun 27 06:27:08 PM PDT 24 29184483 ps
T385 /workspace/coverage/default/21.sram_ctrl_alert_test.2528548330 Jun 27 06:27:24 PM PDT 24 Jun 27 06:27:43 PM PDT 24 14131967 ps
T386 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2966036359 Jun 27 06:28:42 PM PDT 24 Jun 27 06:31:47 PM PDT 24 7152103322 ps
T387 /workspace/coverage/default/17.sram_ctrl_mem_walk.2447902687 Jun 27 06:27:19 PM PDT 24 Jun 27 06:27:47 PM PDT 24 478507100 ps
T388 /workspace/coverage/default/32.sram_ctrl_ram_cfg.3135575948 Jun 27 06:28:00 PM PDT 24 Jun 27 06:28:17 PM PDT 24 28307943 ps
T389 /workspace/coverage/default/30.sram_ctrl_alert_test.2081633709 Jun 27 06:27:47 PM PDT 24 Jun 27 06:28:05 PM PDT 24 12162719 ps
T390 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.188400995 Jun 27 06:29:00 PM PDT 24 Jun 27 06:33:43 PM PDT 24 3306523838 ps
T391 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2493656760 Jun 27 06:27:28 PM PDT 24 Jun 27 06:32:34 PM PDT 24 15709153521 ps
T392 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.3993911039 Jun 27 06:29:24 PM PDT 24 Jun 27 06:31:53 PM PDT 24 1513447899 ps
T393 /workspace/coverage/default/17.sram_ctrl_executable.2408997024 Jun 27 06:27:19 PM PDT 24 Jun 27 06:59:03 PM PDT 24 32848711458 ps
T108 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3787439068 Jun 27 06:26:40 PM PDT 24 Jun 27 06:27:52 PM PDT 24 6433905447 ps
T394 /workspace/coverage/default/45.sram_ctrl_regwen.1075105081 Jun 27 06:29:21 PM PDT 24 Jun 27 06:42:19 PM PDT 24 4513854144 ps
T395 /workspace/coverage/default/6.sram_ctrl_ram_cfg.4231067600 Jun 27 06:26:42 PM PDT 24 Jun 27 06:26:46 PM PDT 24 85707048 ps
T396 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.2589989916 Jun 27 06:27:16 PM PDT 24 Jun 27 06:30:52 PM PDT 24 8268814362 ps
T397 /workspace/coverage/default/6.sram_ctrl_lc_escalation.2168381259 Jun 27 06:26:39 PM PDT 24 Jun 27 06:26:52 PM PDT 24 4314071652 ps
T398 /workspace/coverage/default/28.sram_ctrl_partial_access.1570882075 Jun 27 06:27:45 PM PDT 24 Jun 27 06:28:15 PM PDT 24 326787583 ps
T399 /workspace/coverage/default/12.sram_ctrl_alert_test.977414904 Jun 27 06:27:05 PM PDT 24 Jun 27 06:27:14 PM PDT 24 11831170 ps
T400 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.1550044183 Jun 27 06:28:28 PM PDT 24 Jun 27 06:38:03 PM PDT 24 63928389905 ps
T401 /workspace/coverage/default/39.sram_ctrl_multiple_keys.1727548549 Jun 27 06:28:42 PM PDT 24 Jun 27 06:33:11 PM PDT 24 6489116148 ps
T402 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.1095787145 Jun 27 06:27:03 PM PDT 24 Jun 27 06:27:12 PM PDT 24 114067506 ps
T403 /workspace/coverage/default/49.sram_ctrl_alert_test.2836426429 Jun 27 06:29:41 PM PDT 24 Jun 27 06:29:44 PM PDT 24 13628451 ps
T404 /workspace/coverage/default/0.sram_ctrl_bijection.2550427701 Jun 27 06:26:26 PM PDT 24 Jun 27 06:27:31 PM PDT 24 932659775 ps
T405 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2767936257 Jun 27 06:27:41 PM PDT 24 Jun 27 06:32:20 PM PDT 24 15297945067 ps
T406 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.3796164712 Jun 27 06:29:20 PM PDT 24 Jun 27 06:29:26 PM PDT 24 44575703 ps
T407 /workspace/coverage/default/48.sram_ctrl_mem_walk.723904868 Jun 27 06:29:40 PM PDT 24 Jun 27 06:29:54 PM PDT 24 1140062410 ps
T408 /workspace/coverage/default/4.sram_ctrl_bijection.1576415396 Jun 27 06:26:36 PM PDT 24 Jun 27 06:27:34 PM PDT 24 4774699803 ps
T409 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.3931610764 Jun 27 06:27:56 PM PDT 24 Jun 27 06:33:24 PM PDT 24 23583738692 ps
T410 /workspace/coverage/default/40.sram_ctrl_regwen.1276597 Jun 27 06:28:43 PM PDT 24 Jun 27 06:52:28 PM PDT 24 17819957505 ps
T411 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.3947797940 Jun 27 06:28:57 PM PDT 24 Jun 27 06:33:39 PM PDT 24 10995436941 ps
T412 /workspace/coverage/default/36.sram_ctrl_partial_access.690813184 Jun 27 06:28:25 PM PDT 24 Jun 27 06:28:44 PM PDT 24 478370548 ps
T413 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.915034081 Jun 27 06:26:35 PM PDT 24 Jun 27 06:26:44 PM PDT 24 113682535 ps
T414 /workspace/coverage/default/10.sram_ctrl_bijection.2019117701 Jun 27 06:26:59 PM PDT 24 Jun 27 06:27:27 PM PDT 24 1025264875 ps
T415 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.1109970166 Jun 27 06:26:25 PM PDT 24 Jun 27 06:26:36 PM PDT 24 105040137 ps
T416 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.3717262224 Jun 27 06:26:36 PM PDT 24 Jun 27 06:33:51 PM PDT 24 36613084228 ps
T417 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.2871917381 Jun 27 06:27:05 PM PDT 24 Jun 27 06:42:00 PM PDT 24 4189532283 ps
T418 /workspace/coverage/default/10.sram_ctrl_multiple_keys.645756367 Jun 27 06:26:59 PM PDT 24 Jun 27 06:46:05 PM PDT 24 2734778532 ps
T419 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.3112999162 Jun 27 06:27:44 PM PDT 24 Jun 27 06:31:34 PM PDT 24 9829470146 ps
T420 /workspace/coverage/default/33.sram_ctrl_mem_walk.1165866655 Jun 27 06:28:09 PM PDT 24 Jun 27 06:28:34 PM PDT 24 1844251401 ps
T421 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1511343232 Jun 27 06:26:59 PM PDT 24 Jun 27 06:27:04 PM PDT 24 39582054 ps
T422 /workspace/coverage/default/18.sram_ctrl_smoke.687220420 Jun 27 06:27:17 PM PDT 24 Jun 27 06:28:10 PM PDT 24 133404894 ps
T423 /workspace/coverage/default/9.sram_ctrl_lc_escalation.3544267273 Jun 27 06:26:58 PM PDT 24 Jun 27 06:27:07 PM PDT 24 3399424485 ps
T424 /workspace/coverage/default/44.sram_ctrl_executable.2432610548 Jun 27 06:29:00 PM PDT 24 Jun 27 06:43:22 PM PDT 24 11371602423 ps
T425 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3392452230 Jun 27 06:27:25 PM PDT 24 Jun 27 06:37:11 PM PDT 24 2197537105 ps
T426 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.1833401446 Jun 27 06:27:05 PM PDT 24 Jun 27 06:31:45 PM PDT 24 2920404289 ps
T427 /workspace/coverage/default/38.sram_ctrl_bijection.3918882506 Jun 27 06:28:44 PM PDT 24 Jun 27 06:29:47 PM PDT 24 1802475684 ps
T428 /workspace/coverage/default/14.sram_ctrl_bijection.3800440840 Jun 27 06:27:05 PM PDT 24 Jun 27 06:27:45 PM PDT 24 6407313417 ps
T429 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3350621946 Jun 27 06:27:24 PM PDT 24 Jun 27 06:29:29 PM PDT 24 3698869713 ps
T430 /workspace/coverage/default/47.sram_ctrl_ram_cfg.2472193162 Jun 27 06:29:19 PM PDT 24 Jun 27 06:29:22 PM PDT 24 68671973 ps
T431 /workspace/coverage/default/26.sram_ctrl_executable.580406271 Jun 27 06:27:45 PM PDT 24 Jun 27 06:40:00 PM PDT 24 1758318277 ps
T432 /workspace/coverage/default/15.sram_ctrl_executable.4284650364 Jun 27 06:27:19 PM PDT 24 Jun 27 06:36:26 PM PDT 24 11037142457 ps
T433 /workspace/coverage/default/28.sram_ctrl_mem_walk.3368678886 Jun 27 06:27:49 PM PDT 24 Jun 27 06:28:13 PM PDT 24 459070917 ps
T434 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.841780920 Jun 27 06:27:25 PM PDT 24 Jun 27 06:27:49 PM PDT 24 196387856 ps
T435 /workspace/coverage/default/29.sram_ctrl_bijection.2600061566 Jun 27 06:27:49 PM PDT 24 Jun 27 06:28:35 PM PDT 24 1514764684 ps
T436 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.3235883245 Jun 27 06:27:23 PM PDT 24 Jun 27 06:52:16 PM PDT 24 11599635962 ps
T437 /workspace/coverage/default/19.sram_ctrl_regwen.3823265769 Jun 27 06:27:24 PM PDT 24 Jun 27 06:37:39 PM PDT 24 1983515193 ps
T438 /workspace/coverage/default/22.sram_ctrl_smoke.479372359 Jun 27 06:27:24 PM PDT 24 Jun 27 06:28:14 PM PDT 24 327679673 ps
T439 /workspace/coverage/default/7.sram_ctrl_max_throughput.3135939942 Jun 27 06:26:37 PM PDT 24 Jun 27 06:27:35 PM PDT 24 399302475 ps
T440 /workspace/coverage/default/12.sram_ctrl_multiple_keys.1486697720 Jun 27 06:27:05 PM PDT 24 Jun 27 06:39:30 PM PDT 24 8398705042 ps
T441 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1307234912 Jun 27 06:27:05 PM PDT 24 Jun 27 06:28:17 PM PDT 24 34503461600 ps
T442 /workspace/coverage/default/33.sram_ctrl_lc_escalation.3503939437 Jun 27 06:27:55 PM PDT 24 Jun 27 06:28:15 PM PDT 24 279313887 ps
T443 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1177644643 Jun 27 06:29:41 PM PDT 24 Jun 27 06:31:55 PM PDT 24 616393734 ps
T444 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.3297927820 Jun 27 06:26:35 PM PDT 24 Jun 27 06:26:59 PM PDT 24 86195818 ps
T445 /workspace/coverage/default/47.sram_ctrl_mem_walk.2338555308 Jun 27 06:29:22 PM PDT 24 Jun 27 06:29:32 PM PDT 24 1382902395 ps
T446 /workspace/coverage/default/9.sram_ctrl_mem_walk.2375979660 Jun 27 06:27:06 PM PDT 24 Jun 27 06:27:25 PM PDT 24 906235352 ps
T447 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1627374439 Jun 27 06:26:38 PM PDT 24 Jun 27 06:28:08 PM PDT 24 123126361 ps
T448 /workspace/coverage/default/5.sram_ctrl_smoke.877015502 Jun 27 06:26:39 PM PDT 24 Jun 27 06:27:00 PM PDT 24 764162789 ps
T449 /workspace/coverage/default/37.sram_ctrl_ram_cfg.517610499 Jun 27 06:28:43 PM PDT 24 Jun 27 06:28:48 PM PDT 24 64572217 ps
T450 /workspace/coverage/default/49.sram_ctrl_regwen.2480268720 Jun 27 06:29:41 PM PDT 24 Jun 27 06:38:38 PM PDT 24 13114903112 ps
T451 /workspace/coverage/default/17.sram_ctrl_partial_access.3821463214 Jun 27 06:27:24 PM PDT 24 Jun 27 06:29:17 PM PDT 24 709234139 ps
T452 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.3915592700 Jun 27 06:27:23 PM PDT 24 Jun 27 06:36:31 PM PDT 24 2623601324 ps
T453 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.4143032198 Jun 27 06:29:41 PM PDT 24 Jun 27 06:36:34 PM PDT 24 4323918585 ps
T454 /workspace/coverage/default/46.sram_ctrl_alert_test.3838200385 Jun 27 06:29:23 PM PDT 24 Jun 27 06:29:27 PM PDT 24 20207092 ps
T455 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.4083127895 Jun 27 06:29:40 PM PDT 24 Jun 27 06:35:37 PM PDT 24 31354655904 ps
T456 /workspace/coverage/default/41.sram_ctrl_max_throughput.1046273266 Jun 27 06:28:42 PM PDT 24 Jun 27 06:28:54 PM PDT 24 234335437 ps
T457 /workspace/coverage/default/29.sram_ctrl_ram_cfg.4120944382 Jun 27 06:27:59 PM PDT 24 Jun 27 06:28:15 PM PDT 24 79500572 ps
T458 /workspace/coverage/default/15.sram_ctrl_alert_test.4180108145 Jun 27 06:27:19 PM PDT 24 Jun 27 06:27:37 PM PDT 24 23755947 ps
T459 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.1974420990 Jun 27 06:27:16 PM PDT 24 Jun 27 06:32:19 PM PDT 24 6271185163 ps
T460 /workspace/coverage/default/20.sram_ctrl_mem_walk.3620974235 Jun 27 06:27:33 PM PDT 24 Jun 27 06:28:01 PM PDT 24 177393761 ps
T461 /workspace/coverage/default/44.sram_ctrl_smoke.1134469846 Jun 27 06:28:56 PM PDT 24 Jun 27 06:29:22 PM PDT 24 352610806 ps
T40 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3757347296 Jun 27 06:27:01 PM PDT 24 Jun 27 06:27:21 PM PDT 24 554667766 ps
T462 /workspace/coverage/default/44.sram_ctrl_multiple_keys.854084786 Jun 27 06:29:00 PM PDT 24 Jun 27 06:36:19 PM PDT 24 1703972559 ps
T463 /workspace/coverage/default/30.sram_ctrl_stress_all.699689062 Jun 27 06:27:46 PM PDT 24 Jun 27 07:12:32 PM PDT 24 14947343589 ps
T464 /workspace/coverage/default/12.sram_ctrl_bijection.1620077987 Jun 27 06:27:02 PM PDT 24 Jun 27 06:27:45 PM PDT 24 1819152074 ps
T465 /workspace/coverage/default/28.sram_ctrl_lc_escalation.514852425 Jun 27 06:27:44 PM PDT 24 Jun 27 06:28:02 PM PDT 24 111676864 ps
T466 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.774743811 Jun 27 06:27:41 PM PDT 24 Jun 27 06:33:50 PM PDT 24 1105952263 ps
T467 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.2656536416 Jun 27 06:29:40 PM PDT 24 Jun 27 06:29:45 PM PDT 24 381661770 ps
T468 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3835209319 Jun 27 06:28:58 PM PDT 24 Jun 27 06:29:32 PM PDT 24 355692296 ps
T469 /workspace/coverage/default/3.sram_ctrl_multiple_keys.648446028 Jun 27 06:26:35 PM PDT 24 Jun 27 06:38:00 PM PDT 24 23819822827 ps
T470 /workspace/coverage/default/7.sram_ctrl_mem_walk.3529103002 Jun 27 06:26:43 PM PDT 24 Jun 27 06:26:55 PM PDT 24 139629335 ps
T471 /workspace/coverage/default/14.sram_ctrl_executable.425644105 Jun 27 06:27:14 PM PDT 24 Jun 27 06:45:02 PM PDT 24 7764583410 ps
T472 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.1101338557 Jun 27 06:28:27 PM PDT 24 Jun 27 06:34:14 PM PDT 24 32054580627 ps
T473 /workspace/coverage/default/26.sram_ctrl_partial_access.3558154091 Jun 27 06:27:37 PM PDT 24 Jun 27 06:29:53 PM PDT 24 652935498 ps
T474 /workspace/coverage/default/34.sram_ctrl_mem_walk.4196931339 Jun 27 06:28:12 PM PDT 24 Jun 27 06:28:28 PM PDT 24 140729360 ps
T475 /workspace/coverage/default/17.sram_ctrl_ram_cfg.2915373549 Jun 27 06:27:16 PM PDT 24 Jun 27 06:27:33 PM PDT 24 54492325 ps
T476 /workspace/coverage/default/16.sram_ctrl_partial_access.2127798434 Jun 27 06:27:19 PM PDT 24 Jun 27 06:28:00 PM PDT 24 15413137094 ps
T477 /workspace/coverage/default/26.sram_ctrl_alert_test.3081159201 Jun 27 06:27:37 PM PDT 24 Jun 27 06:27:54 PM PDT 24 40639647 ps
T478 /workspace/coverage/default/21.sram_ctrl_partial_access.2240075303 Jun 27 06:27:23 PM PDT 24 Jun 27 06:27:57 PM PDT 24 373756651 ps
T479 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.2292206945 Jun 27 06:27:03 PM PDT 24 Jun 27 06:28:49 PM PDT 24 1114580708 ps
T15 /workspace/coverage/default/3.sram_ctrl_sec_cm.2922835749 Jun 27 06:26:33 PM PDT 24 Jun 27 06:26:40 PM PDT 24 155208333 ps
T480 /workspace/coverage/default/20.sram_ctrl_ram_cfg.1526963738 Jun 27 06:27:33 PM PDT 24 Jun 27 06:27:52 PM PDT 24 86595051 ps
T481 /workspace/coverage/default/18.sram_ctrl_ram_cfg.4037464686 Jun 27 06:27:24 PM PDT 24 Jun 27 06:27:43 PM PDT 24 90907072 ps
T482 /workspace/coverage/default/10.sram_ctrl_alert_test.3458071742 Jun 27 06:26:59 PM PDT 24 Jun 27 06:27:03 PM PDT 24 137948103 ps
T483 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.432548441 Jun 27 06:26:32 PM PDT 24 Jun 27 06:29:20 PM PDT 24 6435078325 ps
T484 /workspace/coverage/default/3.sram_ctrl_smoke.1975284549 Jun 27 06:26:35 PM PDT 24 Jun 27 06:26:43 PM PDT 24 90146496 ps
T485 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.1488159177 Jun 27 06:27:22 PM PDT 24 Jun 27 06:40:07 PM PDT 24 2917172720 ps
T486 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.4160344299 Jun 27 06:26:48 PM PDT 24 Jun 27 06:36:32 PM PDT 24 24719022618 ps
T487 /workspace/coverage/default/10.sram_ctrl_regwen.1744069284 Jun 27 06:27:04 PM PDT 24 Jun 27 06:35:22 PM PDT 24 1629632757 ps
T488 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.3983200300 Jun 27 06:27:06 PM PDT 24 Jun 27 06:27:17 PM PDT 24 66846257 ps
T489 /workspace/coverage/default/34.sram_ctrl_bijection.1739138987 Jun 27 06:28:09 PM PDT 24 Jun 27 06:28:39 PM PDT 24 758935389 ps
T490 /workspace/coverage/default/42.sram_ctrl_ram_cfg.2641352832 Jun 27 06:29:03 PM PDT 24 Jun 27 06:29:06 PM PDT 24 81411451 ps
T491 /workspace/coverage/default/32.sram_ctrl_alert_test.151214211 Jun 27 06:27:59 PM PDT 24 Jun 27 06:28:15 PM PDT 24 92314676 ps
T492 /workspace/coverage/default/5.sram_ctrl_max_throughput.3857340630 Jun 27 06:26:34 PM PDT 24 Jun 27 06:28:34 PM PDT 24 184905630 ps
T493 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1936317056 Jun 27 06:29:01 PM PDT 24 Jun 27 06:29:21 PM PDT 24 840147317 ps
T494 /workspace/coverage/default/25.sram_ctrl_multiple_keys.2277314006 Jun 27 06:27:25 PM PDT 24 Jun 27 06:52:39 PM PDT 24 14642472604 ps
T495 /workspace/coverage/default/21.sram_ctrl_bijection.3654578904 Jun 27 06:27:22 PM PDT 24 Jun 27 06:29:10 PM PDT 24 90099464604 ps
T496 /workspace/coverage/default/25.sram_ctrl_regwen.1975266814 Jun 27 06:27:36 PM PDT 24 Jun 27 06:54:20 PM PDT 24 146516409763 ps
T497 /workspace/coverage/default/48.sram_ctrl_bijection.3289599493 Jun 27 06:29:22 PM PDT 24 Jun 27 06:29:54 PM PDT 24 1872587443 ps
T498 /workspace/coverage/default/36.sram_ctrl_regwen.1454354436 Jun 27 06:28:26 PM PDT 24 Jun 27 06:37:44 PM PDT 24 2724376788 ps
T499 /workspace/coverage/default/9.sram_ctrl_partial_access.3293025874 Jun 27 06:27:04 PM PDT 24 Jun 27 06:27:27 PM PDT 24 1206556579 ps
T500 /workspace/coverage/default/11.sram_ctrl_multiple_keys.1446638813 Jun 27 06:27:01 PM PDT 24 Jun 27 06:28:53 PM PDT 24 12685376124 ps
T501 /workspace/coverage/default/1.sram_ctrl_max_throughput.999496467 Jun 27 06:26:24 PM PDT 24 Jun 27 06:26:32 PM PDT 24 34926359 ps
T502 /workspace/coverage/default/35.sram_ctrl_alert_test.2268913535 Jun 27 06:28:26 PM PDT 24 Jun 27 06:28:30 PM PDT 24 14545077 ps
T503 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.98856576 Jun 27 06:27:16 PM PDT 24 Jun 27 06:29:25 PM PDT 24 1171215507 ps
T504 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.1070075205 Jun 27 06:27:24 PM PDT 24 Jun 27 06:30:15 PM PDT 24 3230463637 ps
T505 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.1305603703 Jun 27 06:27:28 PM PDT 24 Jun 27 06:28:00 PM PDT 24 70621115 ps
T506 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2286434481 Jun 27 06:26:39 PM PDT 24 Jun 27 06:29:13 PM PDT 24 610706943 ps
T507 /workspace/coverage/default/48.sram_ctrl_stress_all.873139969 Jun 27 06:29:40 PM PDT 24 Jun 27 07:16:15 PM PDT 24 121333940738 ps
T508 /workspace/coverage/default/4.sram_ctrl_lc_escalation.176884295 Jun 27 06:26:30 PM PDT 24 Jun 27 06:26:43 PM PDT 24 807500126 ps
T84 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.3409079593 Jun 27 06:26:58 PM PDT 24 Jun 27 06:27:05 PM PDT 24 485763809 ps
T509 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.1759866939 Jun 27 06:27:41 PM PDT 24 Jun 27 06:48:48 PM PDT 24 4874701861 ps
T510 /workspace/coverage/default/35.sram_ctrl_multiple_keys.1079649599 Jun 27 06:28:09 PM PDT 24 Jun 27 06:45:57 PM PDT 24 3472279545 ps
T511 /workspace/coverage/default/3.sram_ctrl_executable.3139219869 Jun 27 06:26:32 PM PDT 24 Jun 27 06:45:19 PM PDT 24 89876234489 ps
T512 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.3904204948 Jun 27 06:28:27 PM PDT 24 Jun 27 06:28:34 PM PDT 24 72006016 ps
T513 /workspace/coverage/default/10.sram_ctrl_stress_all.1474374032 Jun 27 06:27:08 PM PDT 24 Jun 27 07:26:29 PM PDT 24 243151476674 ps
T514 /workspace/coverage/default/18.sram_ctrl_regwen.102129229 Jun 27 06:27:24 PM PDT 24 Jun 27 06:45:27 PM PDT 24 66935331146 ps
T515 /workspace/coverage/default/25.sram_ctrl_stress_all.4108724219 Jun 27 06:27:39 PM PDT 24 Jun 27 07:14:36 PM PDT 24 27322608065 ps
T516 /workspace/coverage/default/31.sram_ctrl_alert_test.3440593165 Jun 27 06:27:59 PM PDT 24 Jun 27 06:28:16 PM PDT 24 24052656 ps
T517 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.3874609367 Jun 27 06:27:41 PM PDT 24 Jun 27 06:28:01 PM PDT 24 948153758 ps
T518 /workspace/coverage/default/4.sram_ctrl_stress_all.1173212573 Jun 27 06:26:43 PM PDT 24 Jun 27 06:55:55 PM PDT 24 93948937061 ps
T519 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.3170271418 Jun 27 06:27:58 PM PDT 24 Jun 27 06:51:09 PM PDT 24 91249388851 ps
T520 /workspace/coverage/default/7.sram_ctrl_ram_cfg.1510756214 Jun 27 06:26:43 PM PDT 24 Jun 27 06:26:46 PM PDT 24 121115124 ps
T521 /workspace/coverage/default/28.sram_ctrl_regwen.2131841752 Jun 27 06:27:44 PM PDT 24 Jun 27 06:40:49 PM PDT 24 57290171295 ps
T522 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1550677995 Jun 27 06:27:17 PM PDT 24 Jun 27 06:28:16 PM PDT 24 113207332 ps
T523 /workspace/coverage/default/2.sram_ctrl_bijection.2464223633 Jun 27 06:26:31 PM PDT 24 Jun 27 06:27:07 PM PDT 24 3211465047 ps
T524 /workspace/coverage/default/47.sram_ctrl_stress_all.2237588650 Jun 27 06:29:23 PM PDT 24 Jun 27 06:37:09 PM PDT 24 7372157544 ps
T525 /workspace/coverage/default/34.sram_ctrl_smoke.1196791047 Jun 27 06:28:11 PM PDT 24 Jun 27 06:28:56 PM PDT 24 578500480 ps
T526 /workspace/coverage/default/16.sram_ctrl_alert_test.1833756762 Jun 27 06:27:20 PM PDT 24 Jun 27 06:27:38 PM PDT 24 19175609 ps
T527 /workspace/coverage/default/39.sram_ctrl_mem_walk.1412826716 Jun 27 06:28:43 PM PDT 24 Jun 27 06:28:53 PM PDT 24 1324544278 ps
T528 /workspace/coverage/default/36.sram_ctrl_alert_test.3036243582 Jun 27 06:28:27 PM PDT 24 Jun 27 06:28:31 PM PDT 24 28963777 ps
T529 /workspace/coverage/default/21.sram_ctrl_mem_walk.2038094015 Jun 27 06:27:24 PM PDT 24 Jun 27 06:27:48 PM PDT 24 262549420 ps
T530 /workspace/coverage/default/11.sram_ctrl_mem_walk.3351966965 Jun 27 06:27:00 PM PDT 24 Jun 27 06:27:14 PM PDT 24 348359068 ps
T531 /workspace/coverage/default/39.sram_ctrl_partial_access.1373423433 Jun 27 06:28:43 PM PDT 24 Jun 27 06:28:48 PM PDT 24 1270308903 ps
T532 /workspace/coverage/default/2.sram_ctrl_ram_cfg.2880887173 Jun 27 06:26:32 PM PDT 24 Jun 27 06:26:38 PM PDT 24 45466207 ps
T533 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.3459770592 Jun 27 06:28:40 PM PDT 24 Jun 27 06:34:23 PM PDT 24 57529236404 ps
T534 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.2775504066 Jun 27 06:28:39 PM PDT 24 Jun 27 06:29:14 PM PDT 24 98267898 ps
T535 /workspace/coverage/default/33.sram_ctrl_max_throughput.3390366910 Jun 27 06:27:56 PM PDT 24 Jun 27 06:28:47 PM PDT 24 180785163 ps
T536 /workspace/coverage/default/7.sram_ctrl_alert_test.2794483824 Jun 27 06:27:06 PM PDT 24 Jun 27 06:27:16 PM PDT 24 15396380 ps
T537 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.1763746012 Jun 27 06:29:00 PM PDT 24 Jun 27 06:33:09 PM PDT 24 10768273655 ps
T538 /workspace/coverage/default/12.sram_ctrl_stress_all.1651720735 Jun 27 06:27:06 PM PDT 24 Jun 27 06:58:16 PM PDT 24 115167764921 ps
T539 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.134853954 Jun 27 06:27:36 PM PDT 24 Jun 27 06:27:55 PM PDT 24 487129508 ps
T540 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.195940868 Jun 27 06:28:59 PM PDT 24 Jun 27 06:29:08 PM PDT 24 176169706 ps
T541 /workspace/coverage/default/44.sram_ctrl_alert_test.1662726991 Jun 27 06:29:20 PM PDT 24 Jun 27 06:29:23 PM PDT 24 39125157 ps
T542 /workspace/coverage/default/27.sram_ctrl_mem_walk.4059089433 Jun 27 06:27:44 PM PDT 24 Jun 27 06:28:12 PM PDT 24 2700413637 ps
T543 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.1515908378 Jun 27 06:27:20 PM PDT 24 Jun 27 06:27:40 PM PDT 24 161064649 ps
T544 /workspace/coverage/default/10.sram_ctrl_ram_cfg.2095878545 Jun 27 06:27:02 PM PDT 24 Jun 27 06:27:08 PM PDT 24 44469029 ps
T545 /workspace/coverage/default/34.sram_ctrl_partial_access.2101824869 Jun 27 06:28:08 PM PDT 24 Jun 27 06:28:38 PM PDT 24 355812845 ps
T546 /workspace/coverage/default/23.sram_ctrl_stress_all.2637514152 Jun 27 06:27:26 PM PDT 24 Jun 27 07:05:04 PM PDT 24 36201595587 ps
T547 /workspace/coverage/default/4.sram_ctrl_regwen.613646125 Jun 27 06:26:36 PM PDT 24 Jun 27 06:29:35 PM PDT 24 11738228378 ps
T548 /workspace/coverage/default/43.sram_ctrl_lc_escalation.2674024146 Jun 27 06:28:58 PM PDT 24 Jun 27 06:29:08 PM PDT 24 1906468343 ps
T549 /workspace/coverage/default/48.sram_ctrl_partial_access.2951297266 Jun 27 06:29:22 PM PDT 24 Jun 27 06:29:30 PM PDT 24 414437603 ps
T550 /workspace/coverage/default/49.sram_ctrl_stress_all.2881108091 Jun 27 06:29:40 PM PDT 24 Jun 27 07:05:10 PM PDT 24 113801275497 ps
T551 /workspace/coverage/default/8.sram_ctrl_lc_escalation.671359085 Jun 27 06:27:03 PM PDT 24 Jun 27 06:27:17 PM PDT 24 696325201 ps
T552 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1681305440 Jun 27 06:29:21 PM PDT 24 Jun 27 06:30:01 PM PDT 24 5104639683 ps
T553 /workspace/coverage/default/7.sram_ctrl_bijection.3628833990 Jun 27 06:26:48 PM PDT 24 Jun 27 06:27:35 PM PDT 24 1985852218 ps
T109 /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.1651599112 Jun 27 06:27:11 PM PDT 24 Jun 27 06:29:16 PM PDT 24 1870014356 ps
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