Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1024
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
71.69 71.69 92.20 92.20 67.42 67.42 84.60 84.60 33.33 33.33 81.40 81.40 93.51 93.51 49.36 49.36 /workspace/coverage/default/41.sram_ctrl_stress_all.2723871712
87.96 16.27 97.29 5.08 84.95 17.54 95.56 10.96 71.43 38.10 90.10 8.70 95.43 1.92 80.99 31.63 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.2545577112
92.65 4.68 98.73 1.44 85.07 0.12 95.56 0.00 100.00 28.57 92.75 2.66 95.43 0.00 80.99 0.00 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.773732048
94.07 1.43 99.07 0.34 88.15 3.08 98.44 2.88 100.00 0.00 94.93 2.17 96.02 0.59 81.90 0.91 /workspace/coverage/default/0.sram_ctrl_sec_cm.1712523584
95.17 1.10 99.07 0.00 89.93 1.78 98.44 0.00 100.00 0.00 95.89 0.97 96.02 0.00 86.84 4.94 /workspace/coverage/default/29.sram_ctrl_stress_all.2490539547
96.01 0.84 99.07 0.00 90.52 0.59 98.44 0.00 100.00 0.00 95.89 0.00 96.02 0.00 92.14 5.30 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3808453087
96.38 0.37 99.07 0.00 90.52 0.00 98.44 0.00 100.00 0.00 96.14 0.24 96.17 0.15 94.33 2.19 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1435140049
96.56 0.18 99.07 0.00 90.52 0.00 98.51 0.07 100.00 0.00 96.14 0.00 97.35 1.18 94.33 0.00 /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.4141632486
96.73 0.17 99.07 0.00 90.64 0.12 98.68 0.17 100.00 0.00 96.14 0.00 97.35 0.00 95.25 0.91 /workspace/coverage/default/13.sram_ctrl_stress_all.3751873949
96.88 0.15 99.07 0.00 90.64 0.00 98.68 0.00 100.00 0.00 96.14 0.00 98.23 0.88 95.43 0.18 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.2116134821
97.01 0.13 99.15 0.08 90.64 0.00 99.51 0.83 100.00 0.00 96.14 0.00 98.23 0.00 95.43 0.00 /workspace/coverage/default/11.sram_ctrl_ram_cfg.949948567
97.14 0.13 99.15 0.00 90.64 0.00 99.65 0.14 100.00 0.00 96.14 0.00 98.97 0.74 95.43 0.00 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1464480657
97.24 0.10 99.15 0.00 90.64 0.00 99.65 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.16 0.73 /workspace/coverage/default/42.sram_ctrl_multiple_keys.2257333516
97.30 0.06 99.15 0.00 91.00 0.36 99.72 0.07 100.00 0.00 96.14 0.00 98.97 0.00 96.16 0.00 /workspace/coverage/default/20.sram_ctrl_alert_test.433812686
97.36 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.53 0.37 /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1001913418
97.38 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.71 0.18 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1031079060
97.41 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.89 0.18 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.4230475868
97.44 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.07 0.18 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1498429664
97.46 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3622985212
97.49 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.44 0.18 /workspace/coverage/default/0.sram_ctrl_regwen.336768676
97.51 0.02 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.15 97.44 0.00 /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3589736040

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.485270996
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2507020839
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1436060276
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3891257015
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3218278387
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3457171531
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.82928025
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2368974641
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1588862790
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.743633026
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2508172191
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3860574903
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3992847672
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3750453630
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1317726981
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.921035632
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2173658503
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.142124527
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.290043483
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1218359928
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2208369011
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1102741276
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.4141742394
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2032017848
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1508363315
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3266295441
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.989797881
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2094490475
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2976869896
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1186639120
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.737511110
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1140065207
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1384273313
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2196327569
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3014885629
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2799670352
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2881489542
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.909108598
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.2861462953
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3949791365
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.301934216
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.126579864
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1729637064
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2991502797
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.852194396
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.892949479
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.289919609
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1702322601
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.560983975
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3349785732
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3935901108
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1065909642
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3520197293
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1655671933
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.339064213
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3123803902
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2609860785
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1488941666
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3300171612
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1399313129
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.288941416
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3644144128
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.4193452038
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2371843758
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1245537676
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1253747340
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.463676646
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.4259054944
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.16616120
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3752083171
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1544492712
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1956998125
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1983516002
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2564282180
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1542338671
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1128967409
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1296627555
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2924390424
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1330404897
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1722640384
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.4039873661
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2387475656
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3452816580
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1344214230
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2940165108
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3568529207
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2071103263
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.551708646
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1471986233
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3713540184
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3577710334
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1242475662
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.56914670
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2391985181
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3652664703
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3115124113
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3590961206
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1977714765
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1202682151
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.163683335
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2812967450
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.455034200
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2219958782
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.785364870
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3265033669
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3594671466
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1296818050
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1194479530
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.594329511
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3621780773
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2966884090
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2024903229
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1218540769
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1500689962
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3361772791
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3440766887
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.310330947
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1212364266
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.62936416
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1110892608
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3544815059
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.973299070
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3657363348
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.886316905
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3622623713
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2146016105
/workspace/coverage/default/0.sram_ctrl_alert_test.2302413826
/workspace/coverage/default/0.sram_ctrl_bijection.2550427701
/workspace/coverage/default/0.sram_ctrl_executable.2822323821
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1414502145
/workspace/coverage/default/0.sram_ctrl_max_throughput.2595694531
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1109970166
/workspace/coverage/default/0.sram_ctrl_mem_walk.2629067736
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1690445358
/workspace/coverage/default/0.sram_ctrl_partial_access.1307225538
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2520487729
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1822518410
/workspace/coverage/default/0.sram_ctrl_smoke.3172854365
/workspace/coverage/default/0.sram_ctrl_stress_all.570993904
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1204419733
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2500886775
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.39969196
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2482874868
/workspace/coverage/default/1.sram_ctrl_alert_test.3687865970
/workspace/coverage/default/1.sram_ctrl_bijection.1712238743
/workspace/coverage/default/1.sram_ctrl_executable.2533254362
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3387522547
/workspace/coverage/default/1.sram_ctrl_max_throughput.999496467
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2905611170
/workspace/coverage/default/1.sram_ctrl_mem_walk.3962240385
/workspace/coverage/default/1.sram_ctrl_multiple_keys.377981357
/workspace/coverage/default/1.sram_ctrl_partial_access.977399102
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.873972514
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2551624138
/workspace/coverage/default/1.sram_ctrl_regwen.373832365
/workspace/coverage/default/1.sram_ctrl_sec_cm.1520330818
/workspace/coverage/default/1.sram_ctrl_smoke.3002382771
/workspace/coverage/default/1.sram_ctrl_stress_all.1471180890
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1340886246
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.4096273849
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.776270903
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2292206945
/workspace/coverage/default/10.sram_ctrl_alert_test.3458071742
/workspace/coverage/default/10.sram_ctrl_bijection.2019117701
/workspace/coverage/default/10.sram_ctrl_executable.3663758409
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1913868081
/workspace/coverage/default/10.sram_ctrl_max_throughput.4220745842
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2419300482
/workspace/coverage/default/10.sram_ctrl_mem_walk.3853844560
/workspace/coverage/default/10.sram_ctrl_multiple_keys.645756367
/workspace/coverage/default/10.sram_ctrl_partial_access.3295478228
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3867949959
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2095878545
/workspace/coverage/default/10.sram_ctrl_regwen.1744069284
/workspace/coverage/default/10.sram_ctrl_smoke.1609912989
/workspace/coverage/default/10.sram_ctrl_stress_all.1474374032
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1587861035
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2839000506
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2762384076
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3271708095
/workspace/coverage/default/11.sram_ctrl_alert_test.666701388
/workspace/coverage/default/11.sram_ctrl_bijection.1090934609
/workspace/coverage/default/11.sram_ctrl_executable.3609662664
/workspace/coverage/default/11.sram_ctrl_lc_escalation.235729222
/workspace/coverage/default/11.sram_ctrl_max_throughput.1236821234
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.566642101
/workspace/coverage/default/11.sram_ctrl_mem_walk.3351966965
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1446638813
/workspace/coverage/default/11.sram_ctrl_partial_access.1903470596
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1098901536
/workspace/coverage/default/11.sram_ctrl_regwen.1411796327
/workspace/coverage/default/11.sram_ctrl_smoke.199768337
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.1651599112
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1561409581
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1511343232
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3400371998
/workspace/coverage/default/12.sram_ctrl_alert_test.977414904
/workspace/coverage/default/12.sram_ctrl_bijection.1620077987
/workspace/coverage/default/12.sram_ctrl_executable.3547678495
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2115612263
/workspace/coverage/default/12.sram_ctrl_max_throughput.2349573543
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/workspace/coverage/default/43.sram_ctrl_lc_escalation.2674024146
/workspace/coverage/default/43.sram_ctrl_max_throughput.1498749171
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.195940868
/workspace/coverage/default/43.sram_ctrl_mem_walk.84995618
/workspace/coverage/default/43.sram_ctrl_multiple_keys.725368615
/workspace/coverage/default/43.sram_ctrl_partial_access.2318938163
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.4107167094
/workspace/coverage/default/43.sram_ctrl_ram_cfg.405518486
/workspace/coverage/default/43.sram_ctrl_regwen.102853817
/workspace/coverage/default/43.sram_ctrl_smoke.1027675612
/workspace/coverage/default/43.sram_ctrl_stress_all.1760421217
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3354799511
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.188400995
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3835209319
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3982218238
/workspace/coverage/default/44.sram_ctrl_alert_test.1662726991
/workspace/coverage/default/44.sram_ctrl_bijection.3743216180
/workspace/coverage/default/44.sram_ctrl_executable.2432610548
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2002290929
/workspace/coverage/default/44.sram_ctrl_max_throughput.3025036500
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3219160545
/workspace/coverage/default/44.sram_ctrl_mem_walk.484974844
/workspace/coverage/default/44.sram_ctrl_multiple_keys.854084786
/workspace/coverage/default/44.sram_ctrl_partial_access.3925520441
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3431025457
/workspace/coverage/default/44.sram_ctrl_ram_cfg.609888672
/workspace/coverage/default/44.sram_ctrl_regwen.398683962
/workspace/coverage/default/44.sram_ctrl_smoke.1134469846
/workspace/coverage/default/44.sram_ctrl_stress_all.2387698463
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1473578167
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1763746012
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3005264908
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3209078527
/workspace/coverage/default/45.sram_ctrl_alert_test.1568795996
/workspace/coverage/default/45.sram_ctrl_bijection.783691514
/workspace/coverage/default/45.sram_ctrl_executable.3724542082
/workspace/coverage/default/45.sram_ctrl_lc_escalation.4131403360
/workspace/coverage/default/45.sram_ctrl_max_throughput.3984485251
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2031980438
/workspace/coverage/default/45.sram_ctrl_mem_walk.296885940
/workspace/coverage/default/45.sram_ctrl_multiple_keys.307547102
/workspace/coverage/default/45.sram_ctrl_partial_access.816664041
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.846604995
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1499161986
/workspace/coverage/default/45.sram_ctrl_regwen.1075105081
/workspace/coverage/default/45.sram_ctrl_smoke.1907349091
/workspace/coverage/default/45.sram_ctrl_stress_all.873589362
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.652061670
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.171533388
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1146797634
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2420884986
/workspace/coverage/default/46.sram_ctrl_alert_test.3838200385
/workspace/coverage/default/46.sram_ctrl_bijection.2586009142
/workspace/coverage/default/46.sram_ctrl_executable.835954498
/workspace/coverage/default/46.sram_ctrl_lc_escalation.4260105337
/workspace/coverage/default/46.sram_ctrl_max_throughput.1986661837
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3796164712
/workspace/coverage/default/46.sram_ctrl_mem_walk.244504698
/workspace/coverage/default/46.sram_ctrl_multiple_keys.185663846
/workspace/coverage/default/46.sram_ctrl_partial_access.2767917156
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2893786936
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3922393207
/workspace/coverage/default/46.sram_ctrl_regwen.13062562
/workspace/coverage/default/46.sram_ctrl_smoke.526848516
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1681305440
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3993911039
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2869402050
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2138878057
/workspace/coverage/default/47.sram_ctrl_alert_test.3517032348
/workspace/coverage/default/47.sram_ctrl_bijection.723900408
/workspace/coverage/default/47.sram_ctrl_executable.1664911746
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1875978470
/workspace/coverage/default/47.sram_ctrl_max_throughput.2604525260
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3586005110
/workspace/coverage/default/47.sram_ctrl_mem_walk.2338555308
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1240600281
/workspace/coverage/default/47.sram_ctrl_partial_access.3228936142
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3514726937
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2472193162
/workspace/coverage/default/47.sram_ctrl_regwen.658351120
/workspace/coverage/default/47.sram_ctrl_smoke.2523777466
/workspace/coverage/default/47.sram_ctrl_stress_all.2237588650
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2575029448
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3642306371
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1749245171
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.4179289089
/workspace/coverage/default/48.sram_ctrl_alert_test.2309147560
/workspace/coverage/default/48.sram_ctrl_bijection.3289599493
/workspace/coverage/default/48.sram_ctrl_executable.3694181897
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3374600316
/workspace/coverage/default/48.sram_ctrl_max_throughput.1006759528
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2656536416
/workspace/coverage/default/48.sram_ctrl_mem_walk.723904868
/workspace/coverage/default/48.sram_ctrl_multiple_keys.4023859843
/workspace/coverage/default/48.sram_ctrl_partial_access.2951297266
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1699886676
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3218560725
/workspace/coverage/default/48.sram_ctrl_regwen.309548208
/workspace/coverage/default/48.sram_ctrl_smoke.3313296605
/workspace/coverage/default/48.sram_ctrl_stress_all.873139969
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3932118346
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2149141848
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.426379852
/workspace/coverage/default/49.sram_ctrl_alert_test.2836426429
/workspace/coverage/default/49.sram_ctrl_bijection.1059520285
/workspace/coverage/default/49.sram_ctrl_executable.2870558054
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2764725972
/workspace/coverage/default/49.sram_ctrl_max_throughput.701712793
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1998197755
/workspace/coverage/default/49.sram_ctrl_mem_walk.3237372664
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3286145127
/workspace/coverage/default/49.sram_ctrl_partial_access.2763022228
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.4083127895
/workspace/coverage/default/49.sram_ctrl_ram_cfg.4004231011
/workspace/coverage/default/49.sram_ctrl_regwen.2480268720
/workspace/coverage/default/49.sram_ctrl_smoke.1639850315
/workspace/coverage/default/49.sram_ctrl_stress_all.2881108091
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1739907961
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.4143032198
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1177644643
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2421422213
/workspace/coverage/default/5.sram_ctrl_alert_test.894574899
/workspace/coverage/default/5.sram_ctrl_bijection.577725888
/workspace/coverage/default/5.sram_ctrl_executable.2396800985
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3975533125
/workspace/coverage/default/5.sram_ctrl_max_throughput.3857340630
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.237968561
/workspace/coverage/default/5.sram_ctrl_mem_walk.3919500642
/workspace/coverage/default/5.sram_ctrl_multiple_keys.4162407661
/workspace/coverage/default/5.sram_ctrl_partial_access.1988533150
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.222786285
/workspace/coverage/default/5.sram_ctrl_ram_cfg.945628926
/workspace/coverage/default/5.sram_ctrl_regwen.1417606937
/workspace/coverage/default/5.sram_ctrl_smoke.877015502
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3514731622
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3005654843
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.343787876
/workspace/coverage/default/6.sram_ctrl_alert_test.1199062313
/workspace/coverage/default/6.sram_ctrl_bijection.349899872
/workspace/coverage/default/6.sram_ctrl_executable.2515345719
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2168381259
/workspace/coverage/default/6.sram_ctrl_max_throughput.3377003824
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2918616260
/workspace/coverage/default/6.sram_ctrl_mem_walk.2880734400
/workspace/coverage/default/6.sram_ctrl_multiple_keys.4071881802
/workspace/coverage/default/6.sram_ctrl_partial_access.471256450
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1389459279
/workspace/coverage/default/6.sram_ctrl_ram_cfg.4231067600
/workspace/coverage/default/6.sram_ctrl_regwen.149646126
/workspace/coverage/default/6.sram_ctrl_smoke.4047532426
/workspace/coverage/default/6.sram_ctrl_stress_all.4233868087
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.895710600
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1627374439
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2368131571
/workspace/coverage/default/7.sram_ctrl_alert_test.2794483824
/workspace/coverage/default/7.sram_ctrl_bijection.3628833990
/workspace/coverage/default/7.sram_ctrl_executable.298549670
/workspace/coverage/default/7.sram_ctrl_lc_escalation.961221634
/workspace/coverage/default/7.sram_ctrl_max_throughput.3135939942
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3791315543
/workspace/coverage/default/7.sram_ctrl_mem_walk.3529103002
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1713552395
/workspace/coverage/default/7.sram_ctrl_partial_access.1289615663
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.4160344299
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1510756214
/workspace/coverage/default/7.sram_ctrl_regwen.1331796357
/workspace/coverage/default/7.sram_ctrl_smoke.2067083484
/workspace/coverage/default/7.sram_ctrl_stress_all.616386860
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3680416261
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.349737084
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2286434481
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.919299411
/workspace/coverage/default/8.sram_ctrl_alert_test.2635747323
/workspace/coverage/default/8.sram_ctrl_bijection.92674396
/workspace/coverage/default/8.sram_ctrl_executable.3748032225
/workspace/coverage/default/8.sram_ctrl_lc_escalation.671359085
/workspace/coverage/default/8.sram_ctrl_max_throughput.1687199260
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1351893306
/workspace/coverage/default/8.sram_ctrl_mem_walk.2972499625
/workspace/coverage/default/8.sram_ctrl_multiple_keys.555716177
/workspace/coverage/default/8.sram_ctrl_partial_access.785021678
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.123341378
/workspace/coverage/default/8.sram_ctrl_ram_cfg.717598496
/workspace/coverage/default/8.sram_ctrl_regwen.1558001420
/workspace/coverage/default/8.sram_ctrl_smoke.925161227
/workspace/coverage/default/8.sram_ctrl_stress_all.113161795
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2012693233
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2972566354
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1811097601
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2871917381
/workspace/coverage/default/9.sram_ctrl_alert_test.372501355
/workspace/coverage/default/9.sram_ctrl_bijection.2408514810
/workspace/coverage/default/9.sram_ctrl_executable.3061803556
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3544267273
/workspace/coverage/default/9.sram_ctrl_max_throughput.3741475534
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3409079593
/workspace/coverage/default/9.sram_ctrl_mem_walk.2375979660
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3213618134
/workspace/coverage/default/9.sram_ctrl_partial_access.3293025874
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.533206456
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1458052157
/workspace/coverage/default/9.sram_ctrl_regwen.3016160707
/workspace/coverage/default/9.sram_ctrl_smoke.1581466862
/workspace/coverage/default/9.sram_ctrl_stress_all.33302053
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2682351326
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.325061806



Total test records in report: 1024
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/34.sram_ctrl_lc_escalation.2587950247 Jun 27 06:28:08 PM PDT 24 Jun 27 06:28:26 PM PDT 24 761299310 ps
T2 /workspace/coverage/default/29.sram_ctrl_regwen.3250447125 Jun 27 06:27:50 PM PDT 24 Jun 27 06:39:33 PM PDT 24 28042451425 ps
T3 /workspace/coverage/default/39.sram_ctrl_alert_test.2467366621 Jun 27 06:28:41 PM PDT 24 Jun 27 06:28:44 PM PDT 24 14059955 ps
T10 /workspace/coverage/default/35.sram_ctrl_ram_cfg.1830207467 Jun 27 06:28:12 PM PDT 24 Jun 27 06:28:24 PM PDT 24 28417537 ps
T5 /workspace/coverage/default/9.sram_ctrl_max_throughput.3741475534 Jun 27 06:26:57 PM PDT 24 Jun 27 06:29:37 PM PDT 24 139970137 ps
T4 /workspace/coverage/default/44.sram_ctrl_partial_access.3925520441 Jun 27 06:29:04 PM PDT 24 Jun 27 06:29:22 PM PDT 24 295652197 ps
T11 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.4179289089 Jun 27 06:29:44 PM PDT 24 Jun 27 06:41:59 PM PDT 24 22110907701 ps
T12 /workspace/coverage/default/3.sram_ctrl_alert_test.523781781 Jun 27 06:26:34 PM PDT 24 Jun 27 06:26:40 PM PDT 24 13955775 ps
T7 /workspace/coverage/default/41.sram_ctrl_stress_all.2723871712 Jun 27 06:29:00 PM PDT 24 Jun 27 06:39:50 PM PDT 24 6473485424 ps
T6 /workspace/coverage/default/28.sram_ctrl_bijection.2454190057 Jun 27 06:27:40 PM PDT 24 Jun 27 06:29:14 PM PDT 24 14086298689 ps
T32 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.533206456 Jun 27 06:27:00 PM PDT 24 Jun 27 06:31:17 PM PDT 24 10080843587 ps
T20 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1435140049 Jun 27 06:27:23 PM PDT 24 Jun 27 06:31:14 PM PDT 24 8157895112 ps
T19 /workspace/coverage/default/22.sram_ctrl_multiple_keys.1359915422 Jun 27 06:27:17 PM PDT 24 Jun 27 06:46:32 PM PDT 24 3686274292 ps
T9 /workspace/coverage/default/0.sram_ctrl_sec_cm.1712523584 Jun 27 06:26:24 PM PDT 24 Jun 27 06:26:35 PM PDT 24 248503324 ps
T23 /workspace/coverage/default/21.sram_ctrl_regwen.3028648351 Jun 27 06:27:24 PM PDT 24 Jun 27 06:44:55 PM PDT 24 3956256896 ps
T28 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.606401339 Jun 27 06:28:57 PM PDT 24 Jun 27 06:51:03 PM PDT 24 5045343880 ps
T21 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1723328827 Jun 27 06:28:46 PM PDT 24 Jun 27 06:40:20 PM PDT 24 9485859523 ps
T24 /workspace/coverage/default/11.sram_ctrl_ram_cfg.949948567 Jun 27 06:26:58 PM PDT 24 Jun 27 06:27:01 PM PDT 24 81990804 ps
T16 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.2545577112 Jun 27 06:28:08 PM PDT 24 Jun 27 06:45:58 PM PDT 24 2474856488 ps
T29 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3956258786 Jun 27 06:27:28 PM PDT 24 Jun 27 06:27:49 PM PDT 24 40569920 ps
T25 /workspace/coverage/default/15.sram_ctrl_ram_cfg.1840914733 Jun 27 06:27:16 PM PDT 24 Jun 27 06:27:33 PM PDT 24 26440184 ps
T30 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.2905611170 Jun 27 06:26:37 PM PDT 24 Jun 27 06:26:45 PM PDT 24 172914976 ps
T31 /workspace/coverage/default/15.sram_ctrl_bijection.1389923327 Jun 27 06:27:20 PM PDT 24 Jun 27 06:28:38 PM PDT 24 13880304013 ps
T34 /workspace/coverage/default/4.sram_ctrl_partial_access.2089599026 Jun 27 06:26:34 PM PDT 24 Jun 27 06:27:20 PM PDT 24 386786976 ps
T49 /workspace/coverage/default/6.sram_ctrl_max_throughput.3377003824 Jun 27 06:26:34 PM PDT 24 Jun 27 06:27:06 PM PDT 24 157220710 ps
T50 /workspace/coverage/default/43.sram_ctrl_mem_walk.84995618 Jun 27 06:29:01 PM PDT 24 Jun 27 06:29:12 PM PDT 24 135356908 ps
T154 /workspace/coverage/default/35.sram_ctrl_max_throughput.537847589 Jun 27 06:28:12 PM PDT 24 Jun 27 06:29:10 PM PDT 24 95550808 ps
T8 /workspace/coverage/default/47.sram_ctrl_lc_escalation.1875978470 Jun 27 06:29:23 PM PDT 24 Jun 27 06:29:34 PM PDT 24 774034994 ps
T18 /workspace/coverage/default/49.sram_ctrl_lc_escalation.2764725972 Jun 27 06:29:39 PM PDT 24 Jun 27 06:29:46 PM PDT 24 1049827645 ps
T13 /workspace/coverage/default/47.sram_ctrl_alert_test.3517032348 Jun 27 06:29:23 PM PDT 24 Jun 27 06:29:27 PM PDT 24 38664068 ps
T33 /workspace/coverage/default/24.sram_ctrl_executable.2959712954 Jun 27 06:27:26 PM PDT 24 Jun 27 06:35:33 PM PDT 24 7965229461 ps
T17 /workspace/coverage/default/29.sram_ctrl_stress_all.2490539547 Jun 27 06:27:46 PM PDT 24 Jun 27 07:14:53 PM PDT 24 41778485062 ps
T132 /workspace/coverage/default/4.sram_ctrl_alert_test.3375961099 Jun 27 06:26:42 PM PDT 24 Jun 27 06:26:46 PM PDT 24 21312702 ps
T35 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.3307612385 Jun 27 06:26:45 PM PDT 24 Jun 27 06:28:42 PM PDT 24 766310247 ps
T97 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.895710600 Jun 27 06:26:48 PM PDT 24 Jun 27 06:31:02 PM PDT 24 2588881376 ps
T36 /workspace/coverage/default/20.sram_ctrl_executable.1517413917 Jun 27 06:27:28 PM PDT 24 Jun 27 06:45:03 PM PDT 24 20205723294 ps
T37 /workspace/coverage/default/24.sram_ctrl_mem_walk.2573229262 Jun 27 06:27:41 PM PDT 24 Jun 27 06:28:09 PM PDT 24 665964522 ps
T62 /workspace/coverage/default/33.sram_ctrl_stress_all.3731877536 Jun 27 06:28:10 PM PDT 24 Jun 27 07:11:44 PM PDT 24 29280691736 ps
T155 /workspace/coverage/default/20.sram_ctrl_max_throughput.177406781 Jun 27 06:27:28 PM PDT 24 Jun 27 06:29:26 PM PDT 24 504583340 ps
T148 /workspace/coverage/default/34.sram_ctrl_executable.2447563781 Jun 27 06:28:08 PM PDT 24 Jun 27 06:40:51 PM PDT 24 8500470894 ps
T77 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.1143541632 Jun 27 06:26:36 PM PDT 24 Jun 27 06:50:35 PM PDT 24 8650169777 ps
T156 /workspace/coverage/default/36.sram_ctrl_max_throughput.3943856058 Jun 27 06:28:29 PM PDT 24 Jun 27 06:28:45 PM PDT 24 67418673 ps
T136 /workspace/coverage/default/8.sram_ctrl_executable.3748032225 Jun 27 06:27:05 PM PDT 24 Jun 27 06:37:35 PM PDT 24 2324423427 ps
T141 /workspace/coverage/default/42.sram_ctrl_multiple_keys.2257333516 Jun 27 06:28:57 PM PDT 24 Jun 27 06:40:53 PM PDT 24 12598091823 ps
T98 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2893786936 Jun 27 06:29:22 PM PDT 24 Jun 27 06:34:36 PM PDT 24 16773399713 ps
T63 /workspace/coverage/default/13.sram_ctrl_stress_all.3751873949 Jun 27 06:27:06 PM PDT 24 Jun 27 07:08:41 PM PDT 24 36664725829 ps
T157 /workspace/coverage/default/19.sram_ctrl_partial_access.1535456276 Jun 27 06:27:24 PM PDT 24 Jun 27 06:27:55 PM PDT 24 639975848 ps
T99 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.177619025 Jun 27 06:27:49 PM PDT 24 Jun 27 06:34:20 PM PDT 24 7938922407 ps
T150 /workspace/coverage/default/7.sram_ctrl_regwen.1331796357 Jun 27 06:26:57 PM PDT 24 Jun 27 06:29:47 PM PDT 24 4945409507 ps
T133 /workspace/coverage/default/8.sram_ctrl_stress_all.113161795 Jun 27 06:27:01 PM PDT 24 Jun 27 07:02:02 PM PDT 24 49901192359 ps
T158 /workspace/coverage/default/46.sram_ctrl_multiple_keys.185663846 Jun 27 06:29:22 PM PDT 24 Jun 27 06:38:07 PM PDT 24 4066421296 ps
T140 /workspace/coverage/default/8.sram_ctrl_smoke.925161227 Jun 27 06:27:07 PM PDT 24 Jun 27 06:27:24 PM PDT 24 196882814 ps
T159 /workspace/coverage/default/28.sram_ctrl_alert_test.168935117 Jun 27 06:27:58 PM PDT 24 Jun 27 06:28:14 PM PDT 24 13620503 ps
T160 /workspace/coverage/default/15.sram_ctrl_lc_escalation.3457389428 Jun 27 06:27:16 PM PDT 24 Jun 27 06:27:37 PM PDT 24 720359559 ps
T41 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.2116134821 Jun 27 06:27:19 PM PDT 24 Jun 27 06:27:42 PM PDT 24 179417841 ps
T152 /workspace/coverage/default/0.sram_ctrl_multiple_keys.1690445358 Jun 27 06:26:18 PM PDT 24 Jun 27 06:49:19 PM PDT 24 10206139782 ps
T78 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.536201591 Jun 27 06:27:41 PM PDT 24 Jun 27 06:48:37 PM PDT 24 3715674460 ps
T161 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1693441829 Jun 27 06:27:08 PM PDT 24 Jun 27 06:29:23 PM PDT 24 1655105490 ps
T79 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.482228690 Jun 27 06:27:24 PM PDT 24 Jun 27 06:36:28 PM PDT 24 7029312686 ps
T162 /workspace/coverage/default/17.sram_ctrl_smoke.332099319 Jun 27 06:27:16 PM PDT 24 Jun 27 06:27:50 PM PDT 24 3659644066 ps
T80 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.2444966201 Jun 27 06:27:59 PM PDT 24 Jun 27 06:29:01 PM PDT 24 308914533 ps
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T163 /workspace/coverage/default/23.sram_ctrl_bijection.348328720 Jun 27 06:27:34 PM PDT 24 Jun 27 06:28:18 PM PDT 24 3074809623 ps
T139 /workspace/coverage/default/38.sram_ctrl_multiple_keys.4133973441 Jun 27 06:28:41 PM PDT 24 Jun 27 06:54:49 PM PDT 24 50374053446 ps
T44 /workspace/coverage/default/38.sram_ctrl_mem_walk.1501344576 Jun 27 06:28:41 PM PDT 24 Jun 27 06:28:50 PM PDT 24 336134957 ps
T164 /workspace/coverage/default/13.sram_ctrl_alert_test.1141513116 Jun 27 06:27:04 PM PDT 24 Jun 27 06:27:11 PM PDT 24 32405416 ps
T165 /workspace/coverage/default/14.sram_ctrl_max_throughput.1342235732 Jun 27 06:27:17 PM PDT 24 Jun 27 06:30:10 PM PDT 24 210588402 ps
T145 /workspace/coverage/default/38.sram_ctrl_stress_all.890735617 Jun 27 06:28:40 PM PDT 24 Jun 27 07:27:22 PM PDT 24 49209279190 ps
T81 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.566642101 Jun 27 06:27:00 PM PDT 24 Jun 27 06:27:09 PM PDT 24 151212686 ps
T147 /workspace/coverage/default/43.sram_ctrl_stress_all.1760421217 Jun 27 06:28:57 PM PDT 24 Jun 27 06:30:00 PM PDT 24 48877395782 ps
T166 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.919299411 Jun 27 06:27:02 PM PDT 24 Jun 27 06:40:40 PM PDT 24 5586655486 ps
T144 /workspace/coverage/default/45.sram_ctrl_multiple_keys.307547102 Jun 27 06:29:21 PM PDT 24 Jun 27 06:43:31 PM PDT 24 14886776144 ps
T134 /workspace/coverage/default/44.sram_ctrl_regwen.398683962 Jun 27 06:29:04 PM PDT 24 Jun 27 06:41:57 PM PDT 24 11464067565 ps
T146 /workspace/coverage/default/23.sram_ctrl_regwen.283605690 Jun 27 06:27:33 PM PDT 24 Jun 27 06:40:20 PM PDT 24 12031554847 ps
T149 /workspace/coverage/default/0.sram_ctrl_stress_all.570993904 Jun 27 06:26:25 PM PDT 24 Jun 27 07:00:30 PM PDT 24 200713276675 ps
T151 /workspace/coverage/default/13.sram_ctrl_lc_escalation.3584447101 Jun 27 06:27:08 PM PDT 24 Jun 27 06:27:26 PM PDT 24 976740653 ps
T167 /workspace/coverage/default/37.sram_ctrl_mem_walk.2011608732 Jun 27 06:28:43 PM PDT 24 Jun 27 06:28:52 PM PDT 24 271884867 ps
T168 /workspace/coverage/default/41.sram_ctrl_multiple_keys.203703273 Jun 27 06:28:41 PM PDT 24 Jun 27 06:40:47 PM PDT 24 35809883368 ps
T137 /workspace/coverage/default/39.sram_ctrl_stress_all.1589327922 Jun 27 06:28:45 PM PDT 24 Jun 27 07:11:22 PM PDT 24 9627769196 ps
T100 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.4096273849 Jun 27 06:26:22 PM PDT 24 Jun 27 06:30:28 PM PDT 24 20630227079 ps
T101 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.2972566354 Jun 27 06:26:56 PM PDT 24 Jun 27 06:31:18 PM PDT 24 10931898572 ps
T169 /workspace/coverage/default/40.sram_ctrl_ram_cfg.226632203 Jun 27 06:28:44 PM PDT 24 Jun 27 06:28:49 PM PDT 24 41121647 ps
T170 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.325061806 Jun 27 06:27:08 PM PDT 24 Jun 27 06:28:46 PM PDT 24 153426757 ps
T171 /workspace/coverage/default/27.sram_ctrl_smoke.950088744 Jun 27 06:27:40 PM PDT 24 Jun 27 06:28:30 PM PDT 24 2074095775 ps
T46 /workspace/coverage/default/35.sram_ctrl_mem_walk.2928730879 Jun 27 06:28:11 PM PDT 24 Jun 27 06:28:35 PM PDT 24 886366298 ps
T172 /workspace/coverage/default/27.sram_ctrl_multiple_keys.1424072395 Jun 27 06:27:46 PM PDT 24 Jun 27 06:35:20 PM PDT 24 34274174893 ps
T22 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1464480657 Jun 27 06:27:21 PM PDT 24 Jun 27 06:28:39 PM PDT 24 1310322602 ps
T116 /workspace/coverage/default/12.sram_ctrl_regwen.775376386 Jun 27 06:27:07 PM PDT 24 Jun 27 06:34:43 PM PDT 24 1923806835 ps
T117 /workspace/coverage/default/42.sram_ctrl_regwen.2081064023 Jun 27 06:29:00 PM PDT 24 Jun 27 06:45:49 PM PDT 24 14126445045 ps
T47 /workspace/coverage/default/46.sram_ctrl_mem_walk.244504698 Jun 27 06:29:26 PM PDT 24 Jun 27 06:29:40 PM PDT 24 1303574473 ps
T118 /workspace/coverage/default/25.sram_ctrl_max_throughput.4059426581 Jun 27 06:27:32 PM PDT 24 Jun 27 06:27:57 PM PDT 24 73116705 ps
T102 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.3068662834 Jun 27 06:26:38 PM PDT 24 Jun 27 06:26:48 PM PDT 24 559212153 ps
T14 /workspace/coverage/default/4.sram_ctrl_sec_cm.596652280 Jun 27 06:26:34 PM PDT 24 Jun 27 06:26:41 PM PDT 24 96268550 ps
T119 /workspace/coverage/default/4.sram_ctrl_max_throughput.3258273039 Jun 27 06:26:32 PM PDT 24 Jun 27 06:28:51 PM PDT 24 586651544 ps
T120 /workspace/coverage/default/21.sram_ctrl_executable.3610848505 Jun 27 06:27:21 PM PDT 24 Jun 27 06:32:32 PM PDT 24 6832272580 ps
T82 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.581149607 Jun 27 06:27:24 PM PDT 24 Jun 27 06:27:47 PM PDT 24 270886270 ps
T43 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.3453692890 Jun 27 06:28:40 PM PDT 24 Jun 27 06:28:48 PM PDT 24 686336881 ps
T173 /workspace/coverage/default/32.sram_ctrl_multiple_keys.2230636315 Jun 27 06:27:56 PM PDT 24 Jun 27 06:37:45 PM PDT 24 29839045892 ps
T174 /workspace/coverage/default/19.sram_ctrl_multiple_keys.2035416991 Jun 27 06:27:25 PM PDT 24 Jun 27 06:38:14 PM PDT 24 6494432107 ps
T175 /workspace/coverage/default/38.sram_ctrl_partial_access.2162453818 Jun 27 06:28:41 PM PDT 24 Jun 27 06:28:46 PM PDT 24 59038890 ps
T176 /workspace/coverage/default/40.sram_ctrl_alert_test.3775201457 Jun 27 06:28:40 PM PDT 24 Jun 27 06:28:42 PM PDT 24 13327034 ps
T48 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.3450601637 Jun 27 06:27:26 PM PDT 24 Jun 27 06:27:51 PM PDT 24 804997792 ps
T177 /workspace/coverage/default/14.sram_ctrl_ram_cfg.406520684 Jun 27 06:27:15 PM PDT 24 Jun 27 06:27:33 PM PDT 24 28230740 ps
T178 /workspace/coverage/default/10.sram_ctrl_smoke.1609912989 Jun 27 06:26:59 PM PDT 24 Jun 27 06:27:22 PM PDT 24 4899060212 ps
T179 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.1351893306 Jun 27 06:26:59 PM PDT 24 Jun 27 06:27:09 PM PDT 24 2101572710 ps
T103 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.1656169906 Jun 27 06:27:18 PM PDT 24 Jun 27 06:27:40 PM PDT 24 343874280 ps
T180 /workspace/coverage/default/21.sram_ctrl_multiple_keys.3584007416 Jun 27 06:27:29 PM PDT 24 Jun 27 06:35:37 PM PDT 24 32861230559 ps
T181 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2669213997 Jun 27 06:27:26 PM PDT 24 Jun 27 06:29:51 PM PDT 24 162462841 ps
T182 /workspace/coverage/default/42.sram_ctrl_bijection.713394876 Jun 27 06:28:57 PM PDT 24 Jun 27 06:29:29 PM PDT 24 947221390 ps
T183 /workspace/coverage/default/11.sram_ctrl_bijection.1090934609 Jun 27 06:27:00 PM PDT 24 Jun 27 06:28:14 PM PDT 24 4018294481 ps
T51 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.652061670 Jun 27 06:29:23 PM PDT 24 Jun 27 06:30:54 PM PDT 24 6957645797 ps
T184 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.2853725198 Jun 27 06:27:46 PM PDT 24 Jun 27 06:28:09 PM PDT 24 57142471 ps
T138 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3455097108 Jun 27 06:27:55 PM PDT 24 Jun 27 06:32:01 PM PDT 24 17534591632 ps
T185 /workspace/coverage/default/37.sram_ctrl_smoke.1167657599 Jun 27 06:28:27 PM PDT 24 Jun 27 06:28:33 PM PDT 24 33806395 ps
T186 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.2801643774 Jun 27 06:28:57 PM PDT 24 Jun 27 06:35:09 PM PDT 24 9001802645 ps
T187 /workspace/coverage/default/37.sram_ctrl_max_throughput.4164318237 Jun 27 06:28:27 PM PDT 24 Jun 27 06:28:33 PM PDT 24 147678284 ps
T188 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3005264908 Jun 27 06:29:04 PM PDT 24 Jun 27 06:29:25 PM PDT 24 339818752 ps
T45 /workspace/coverage/default/1.sram_ctrl_mem_walk.3962240385 Jun 27 06:26:30 PM PDT 24 Jun 27 06:26:42 PM PDT 24 1385552459 ps
T189 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.3271708095 Jun 27 06:27:03 PM PDT 24 Jun 27 06:36:24 PM PDT 24 2095446351 ps
T190 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.2839000506 Jun 27 06:27:00 PM PDT 24 Jun 27 06:29:17 PM PDT 24 1504867601 ps
T191 /workspace/coverage/default/43.sram_ctrl_bijection.1741849145 Jun 27 06:29:01 PM PDT 24 Jun 27 06:30:00 PM PDT 24 2522889515 ps
T192 /workspace/coverage/default/15.sram_ctrl_partial_access.4029538559 Jun 27 06:27:18 PM PDT 24 Jun 27 06:27:49 PM PDT 24 567057186 ps
T193 /workspace/coverage/default/18.sram_ctrl_bijection.425298727 Jun 27 06:27:19 PM PDT 24 Jun 27 06:28:32 PM PDT 24 7106964232 ps
T194 /workspace/coverage/default/12.sram_ctrl_lc_escalation.2115612263 Jun 27 06:27:05 PM PDT 24 Jun 27 06:27:19 PM PDT 24 1657092401 ps
T195 /workspace/coverage/default/45.sram_ctrl_max_throughput.3984485251 Jun 27 06:29:24 PM PDT 24 Jun 27 06:30:46 PM PDT 24 419280229 ps
T196 /workspace/coverage/default/5.sram_ctrl_multiple_keys.4162407661 Jun 27 06:26:34 PM PDT 24 Jun 27 06:31:27 PM PDT 24 8342358582 ps
T197 /workspace/coverage/default/2.sram_ctrl_partial_access.2143431281 Jun 27 06:26:36 PM PDT 24 Jun 27 06:26:50 PM PDT 24 1830964274 ps
T198 /workspace/coverage/default/24.sram_ctrl_ram_cfg.3280223952 Jun 27 06:27:38 PM PDT 24 Jun 27 06:27:56 PM PDT 24 86927606 ps
T199 /workspace/coverage/default/21.sram_ctrl_max_throughput.3647993290 Jun 27 06:27:24 PM PDT 24 Jun 27 06:29:49 PM PDT 24 135729163 ps
T200 /workspace/coverage/default/30.sram_ctrl_partial_access.2693179005 Jun 27 06:27:47 PM PDT 24 Jun 27 06:30:06 PM PDT 24 337073059 ps
T201 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.596324869 Jun 27 06:27:17 PM PDT 24 Jun 27 06:27:39 PM PDT 24 174939998 ps
T202 /workspace/coverage/default/49.sram_ctrl_bijection.1059520285 Jun 27 06:29:40 PM PDT 24 Jun 27 06:31:05 PM PDT 24 19219246970 ps
T203 /workspace/coverage/default/26.sram_ctrl_ram_cfg.3334859383 Jun 27 06:27:41 PM PDT 24 Jun 27 06:27:59 PM PDT 24 156138517 ps
T204 /workspace/coverage/default/10.sram_ctrl_mem_walk.3853844560 Jun 27 06:26:58 PM PDT 24 Jun 27 06:27:04 PM PDT 24 285703084 ps
T205 /workspace/coverage/default/19.sram_ctrl_lc_escalation.250615083 Jun 27 06:27:25 PM PDT 24 Jun 27 06:27:52 PM PDT 24 797967856 ps
T206 /workspace/coverage/default/2.sram_ctrl_stress_all.3329410021 Jun 27 06:26:43 PM PDT 24 Jun 27 06:46:42 PM PDT 24 24505503358 ps
T207 /workspace/coverage/default/6.sram_ctrl_executable.2515345719 Jun 27 06:26:54 PM PDT 24 Jun 27 06:39:31 PM PDT 24 6885014459 ps
T208 /workspace/coverage/default/12.sram_ctrl_smoke.14574500 Jun 27 06:27:11 PM PDT 24 Jun 27 06:27:31 PM PDT 24 63321473 ps
T209 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.790979122 Jun 27 06:28:56 PM PDT 24 Jun 27 06:31:09 PM PDT 24 595965754 ps
T210 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1307688674 Jun 27 06:27:20 PM PDT 24 Jun 27 06:35:53 PM PDT 24 35613984301 ps
T211 /workspace/coverage/default/28.sram_ctrl_max_throughput.3855964036 Jun 27 06:27:29 PM PDT 24 Jun 27 06:30:03 PM PDT 24 609040639 ps
T212 /workspace/coverage/default/27.sram_ctrl_executable.4158138382 Jun 27 06:27:40 PM PDT 24 Jun 27 06:32:26 PM PDT 24 22146796500 ps
T213 /workspace/coverage/default/47.sram_ctrl_executable.1664911746 Jun 27 06:29:27 PM PDT 24 Jun 27 06:46:26 PM PDT 24 6455210415 ps
T214 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.3750501955 Jun 27 06:28:25 PM PDT 24 Jun 27 06:36:30 PM PDT 24 2337423459 ps
T215 /workspace/coverage/default/32.sram_ctrl_max_throughput.1978909107 Jun 27 06:28:03 PM PDT 24 Jun 27 06:28:33 PM PDT 24 124803545 ps
T216 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.3355029665 Jun 27 06:28:40 PM PDT 24 Jun 27 06:32:14 PM PDT 24 2300194131 ps
T217 /workspace/coverage/default/31.sram_ctrl_stress_all.2070856729 Jun 27 06:27:55 PM PDT 24 Jun 27 06:52:20 PM PDT 24 40246943999 ps
T218 /workspace/coverage/default/31.sram_ctrl_partial_access.3086456430 Jun 27 06:27:58 PM PDT 24 Jun 27 06:29:04 PM PDT 24 1755669420 ps
T219 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2762384076 Jun 27 06:26:59 PM PDT 24 Jun 27 06:27:16 PM PDT 24 311773741 ps
T220 /workspace/coverage/default/47.sram_ctrl_bijection.723900408 Jun 27 06:29:21 PM PDT 24 Jun 27 06:30:30 PM PDT 24 8409150584 ps
T221 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3867949959 Jun 27 06:26:58 PM PDT 24 Jun 27 06:31:32 PM PDT 24 10504881318 ps
T222 /workspace/coverage/default/23.sram_ctrl_executable.3751721974 Jun 27 06:27:24 PM PDT 24 Jun 27 06:36:34 PM PDT 24 996666489 ps
T52 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.1153017064 Jun 27 06:26:36 PM PDT 24 Jun 27 06:26:45 PM PDT 24 199427080 ps
T223 /workspace/coverage/default/0.sram_ctrl_lc_escalation.1414502145 Jun 27 06:26:22 PM PDT 24 Jun 27 06:26:34 PM PDT 24 1961448700 ps
T224 /workspace/coverage/default/43.sram_ctrl_alert_test.170380259 Jun 27 06:29:01 PM PDT 24 Jun 27 06:29:04 PM PDT 24 17622957 ps
T225 /workspace/coverage/default/39.sram_ctrl_max_throughput.3635332183 Jun 27 06:28:42 PM PDT 24 Jun 27 06:29:05 PM PDT 24 185404644 ps
T226 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.153336248 Jun 27 06:27:40 PM PDT 24 Jun 27 06:30:37 PM PDT 24 2315139396 ps
T53 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3729199429 Jun 27 06:27:16 PM PDT 24 Jun 27 06:30:02 PM PDT 24 1761552194 ps
T227 /workspace/coverage/default/40.sram_ctrl_mem_walk.86453911 Jun 27 06:28:42 PM PDT 24 Jun 27 06:28:54 PM PDT 24 139334327 ps
T228 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.1532510750 Jun 27 06:28:45 PM PDT 24 Jun 27 06:30:06 PM PDT 24 478101228 ps
T229 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.1665544949 Jun 27 06:27:24 PM PDT 24 Jun 27 06:28:52 PM PDT 24 1453144961 ps
T142 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3514726937 Jun 27 06:29:19 PM PDT 24 Jun 27 06:35:44 PM PDT 24 17169410904 ps
T38 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.773732048 Jun 27 06:27:57 PM PDT 24 Jun 27 06:28:55 PM PDT 24 2903097843 ps
T230 /workspace/coverage/default/0.sram_ctrl_partial_access.1307225538 Jun 27 06:26:22 PM PDT 24 Jun 27 06:26:44 PM PDT 24 666280770 ps
T231 /workspace/coverage/default/35.sram_ctrl_bijection.987711911 Jun 27 06:28:11 PM PDT 24 Jun 27 06:28:51 PM PDT 24 1645569801 ps
T232 /workspace/coverage/default/36.sram_ctrl_ram_cfg.2361124407 Jun 27 06:28:26 PM PDT 24 Jun 27 06:28:30 PM PDT 24 28633101 ps
T233 /workspace/coverage/default/46.sram_ctrl_partial_access.2767917156 Jun 27 06:29:22 PM PDT 24 Jun 27 06:29:34 PM PDT 24 327005651 ps
T234 /workspace/coverage/default/7.sram_ctrl_partial_access.1289615663 Jun 27 06:26:48 PM PDT 24 Jun 27 06:27:03 PM PDT 24 840518377 ps
T59 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.4232754932 Jun 27 06:27:40 PM PDT 24 Jun 27 06:41:09 PM PDT 24 9904907947 ps
T235 /workspace/coverage/default/2.sram_ctrl_multiple_keys.339748528 Jun 27 06:26:33 PM PDT 24 Jun 27 06:40:26 PM PDT 24 37692924558 ps
T60 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.148876489 Jun 27 06:27:24 PM PDT 24 Jun 27 06:37:24 PM PDT 24 8535506528 ps
T236 /workspace/coverage/default/30.sram_ctrl_lc_escalation.3638377987 Jun 27 06:27:45 PM PDT 24 Jun 27 06:28:11 PM PDT 24 5182797445 ps
T237 /workspace/coverage/default/28.sram_ctrl_smoke.1303745726 Jun 27 06:27:41 PM PDT 24 Jun 27 06:28:56 PM PDT 24 554952801 ps
T238 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3825366634 Jun 27 06:28:41 PM PDT 24 Jun 27 06:32:37 PM PDT 24 3188518058 ps
T239 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.3400371998 Jun 27 06:26:58 PM PDT 24 Jun 27 06:31:28 PM PDT 24 926158448 ps
T240 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1389459279 Jun 27 06:26:54 PM PDT 24 Jun 27 06:31:20 PM PDT 24 14961665559 ps
T241 /workspace/coverage/default/32.sram_ctrl_mem_walk.3162568095 Jun 27 06:27:59 PM PDT 24 Jun 27 06:28:21 PM PDT 24 230994002 ps
T135 /workspace/coverage/default/36.sram_ctrl_executable.960142058 Jun 27 06:28:26 PM PDT 24 Jun 27 06:50:11 PM PDT 24 17624909900 ps
T242 /workspace/coverage/default/35.sram_ctrl_smoke.702503075 Jun 27 06:28:11 PM PDT 24 Jun 27 06:28:32 PM PDT 24 1883373661 ps
T243 /workspace/coverage/default/23.sram_ctrl_lc_escalation.1545709009 Jun 27 06:27:33 PM PDT 24 Jun 27 06:27:56 PM PDT 24 794325858 ps
T244 /workspace/coverage/default/2.sram_ctrl_smoke.4183616923 Jun 27 06:26:31 PM PDT 24 Jun 27 06:26:44 PM PDT 24 390458105 ps
T245 /workspace/coverage/default/3.sram_ctrl_bijection.1890992503 Jun 27 06:26:33 PM PDT 24 Jun 27 06:27:11 PM PDT 24 6328543891 ps
T246 /workspace/coverage/default/37.sram_ctrl_stress_all.1244416548 Jun 27 06:28:46 PM PDT 24 Jun 27 07:14:19 PM PDT 24 458084046402 ps
T247 /workspace/coverage/default/31.sram_ctrl_regwen.659967523 Jun 27 06:27:59 PM PDT 24 Jun 27 06:30:17 PM PDT 24 362388687 ps
T248 /workspace/coverage/default/0.sram_ctrl_regwen.336768676 Jun 27 06:26:24 PM PDT 24 Jun 27 06:36:44 PM PDT 24 23921436460 ps
T249 /workspace/coverage/default/5.sram_ctrl_regwen.1417606937 Jun 27 06:26:40 PM PDT 24 Jun 27 06:33:11 PM PDT 24 14393062705 ps
T250 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.3711944902 Jun 27 06:27:24 PM PDT 24 Jun 27 06:29:12 PM PDT 24 856946849 ps
T251 /workspace/coverage/default/36.sram_ctrl_stress_all.1867237019 Jun 27 06:28:31 PM PDT 24 Jun 27 06:53:35 PM PDT 24 82855035862 ps
T252 /workspace/coverage/default/41.sram_ctrl_smoke.2616684425 Jun 27 06:28:46 PM PDT 24 Jun 27 06:31:19 PM PDT 24 4327421259 ps
T253 /workspace/coverage/default/16.sram_ctrl_executable.1566416794 Jun 27 06:27:18 PM PDT 24 Jun 27 06:35:00 PM PDT 24 1532653605 ps
T61 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1314059778 Jun 27 06:28:42 PM PDT 24 Jun 27 06:28:52 PM PDT 24 190467239 ps
T254 /workspace/coverage/default/39.sram_ctrl_regwen.1129829728 Jun 27 06:28:41 PM PDT 24 Jun 27 06:44:34 PM PDT 24 91202326898 ps
T255 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.3628965562 Jun 27 06:28:40 PM PDT 24 Jun 27 06:28:45 PM PDT 24 118969557 ps
T256 /workspace/coverage/default/37.sram_ctrl_multiple_keys.333531437 Jun 27 06:28:26 PM PDT 24 Jun 27 06:37:27 PM PDT 24 8669400894 ps
T257 /workspace/coverage/default/5.sram_ctrl_alert_test.894574899 Jun 27 06:26:33 PM PDT 24 Jun 27 06:26:38 PM PDT 24 14433311 ps
T258 /workspace/coverage/default/28.sram_ctrl_multiple_keys.3030923330 Jun 27 06:27:28 PM PDT 24 Jun 27 06:34:26 PM PDT 24 8074037059 ps
T259 /workspace/coverage/default/27.sram_ctrl_regwen.1171312289 Jun 27 06:27:47 PM PDT 24 Jun 27 06:32:39 PM PDT 24 16605134420 ps
T260 /workspace/coverage/default/20.sram_ctrl_alert_test.433812686 Jun 27 06:27:33 PM PDT 24 Jun 27 06:27:51 PM PDT 24 14485778 ps
T261 /workspace/coverage/default/2.sram_ctrl_lc_escalation.210412902 Jun 27 06:26:35 PM PDT 24 Jun 27 06:26:43 PM PDT 24 467676378 ps
T262 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.4132391179 Jun 27 06:27:41 PM PDT 24 Jun 27 06:31:34 PM PDT 24 4520995648 ps
T263 /workspace/coverage/default/15.sram_ctrl_smoke.238203573 Jun 27 06:27:17 PM PDT 24 Jun 27 06:29:28 PM PDT 24 2730906991 ps
T264 /workspace/coverage/default/26.sram_ctrl_multiple_keys.2628582577 Jun 27 06:27:45 PM PDT 24 Jun 27 06:35:59 PM PDT 24 46875207261 ps
T39 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.1207450673 Jun 27 06:27:30 PM PDT 24 Jun 27 06:28:29 PM PDT 24 1297504374 ps
T265 /workspace/coverage/default/46.sram_ctrl_max_throughput.1986661837 Jun 27 06:29:21 PM PDT 24 Jun 27 06:31:56 PM PDT 24 1857000279 ps
T266 /workspace/coverage/default/28.sram_ctrl_stress_all.1573995645 Jun 27 06:27:40 PM PDT 24 Jun 27 06:47:20 PM PDT 24 23445353165 ps
T267 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.1715273905 Jun 27 06:27:59 PM PDT 24 Jun 27 06:28:21 PM PDT 24 376472090 ps
T268 /workspace/coverage/default/19.sram_ctrl_alert_test.2285720336 Jun 27 06:27:25 PM PDT 24 Jun 27 06:27:44 PM PDT 24 51229972 ps
T269 /workspace/coverage/default/49.sram_ctrl_mem_walk.3237372664 Jun 27 06:29:40 PM PDT 24 Jun 27 06:29:48 PM PDT 24 237399996 ps
T270 /workspace/coverage/default/44.sram_ctrl_stress_all.2387698463 Jun 27 06:29:19 PM PDT 24 Jun 27 07:01:32 PM PDT 24 5336241347 ps
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T272 /workspace/coverage/default/43.sram_ctrl_smoke.1027675612 Jun 27 06:28:58 PM PDT 24 Jun 27 06:29:18 PM PDT 24 711046304 ps
T273 /workspace/coverage/default/8.sram_ctrl_alert_test.2635747323 Jun 27 06:27:02 PM PDT 24 Jun 27 06:27:08 PM PDT 24 23267378 ps
T274 /workspace/coverage/default/16.sram_ctrl_mem_walk.4069663234 Jun 27 06:27:19 PM PDT 24 Jun 27 06:27:43 PM PDT 24 334544699 ps
T275 /workspace/coverage/default/41.sram_ctrl_mem_walk.4205864921 Jun 27 06:28:57 PM PDT 24 Jun 27 06:29:11 PM PDT 24 177477950 ps
T276 /workspace/coverage/default/19.sram_ctrl_stress_all.86076509 Jun 27 06:27:24 PM PDT 24 Jun 27 06:53:54 PM PDT 24 9707476298 ps
T277 /workspace/coverage/default/33.sram_ctrl_regwen.285180585 Jun 27 06:28:10 PM PDT 24 Jun 27 06:31:34 PM PDT 24 4862148749 ps
T278 /workspace/coverage/default/4.sram_ctrl_ram_cfg.441943244 Jun 27 06:26:35 PM PDT 24 Jun 27 06:26:42 PM PDT 24 96772872 ps
T279 /workspace/coverage/default/16.sram_ctrl_multiple_keys.2778474629 Jun 27 06:27:19 PM PDT 24 Jun 27 06:39:56 PM PDT 24 3756143956 ps
T280 /workspace/coverage/default/30.sram_ctrl_smoke.2071378297 Jun 27 06:27:58 PM PDT 24 Jun 27 06:28:25 PM PDT 24 400920260 ps
T281 /workspace/coverage/default/7.sram_ctrl_lc_escalation.961221634 Jun 27 06:26:34 PM PDT 24 Jun 27 06:26:45 PM PDT 24 438658184 ps
T282 /workspace/coverage/default/0.sram_ctrl_smoke.3172854365 Jun 27 06:26:23 PM PDT 24 Jun 27 06:26:45 PM PDT 24 1652263230 ps
T283 /workspace/coverage/default/18.sram_ctrl_mem_walk.3154805411 Jun 27 06:27:24 PM PDT 24 Jun 27 06:27:54 PM PDT 24 2740128768 ps
T284 /workspace/coverage/default/46.sram_ctrl_regwen.13062562 Jun 27 06:29:20 PM PDT 24 Jun 27 06:35:38 PM PDT 24 9433259077 ps
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T286 /workspace/coverage/default/23.sram_ctrl_alert_test.1719634475 Jun 27 06:27:41 PM PDT 24 Jun 27 06:27:58 PM PDT 24 35294706 ps
T287 /workspace/coverage/default/19.sram_ctrl_executable.2382699782 Jun 27 06:27:24 PM PDT 24 Jun 27 06:28:44 PM PDT 24 603695429 ps
T288 /workspace/coverage/default/30.sram_ctrl_ram_cfg.921132068 Jun 27 06:27:58 PM PDT 24 Jun 27 06:28:15 PM PDT 24 84825634 ps
T289 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.1496053954 Jun 27 06:27:24 PM PDT 24 Jun 27 06:33:16 PM PDT 24 1010214131 ps
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T291 /workspace/coverage/default/25.sram_ctrl_alert_test.144098820 Jun 27 06:27:36 PM PDT 24 Jun 27 06:27:54 PM PDT 24 145153251 ps
T292 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.4047982575 Jun 27 06:28:10 PM PDT 24 Jun 27 06:34:34 PM PDT 24 5434554191 ps
T293 /workspace/coverage/default/35.sram_ctrl_regwen.2609851920 Jun 27 06:28:11 PM PDT 24 Jun 27 06:33:56 PM PDT 24 3714283638 ps
T294 /workspace/coverage/default/41.sram_ctrl_lc_escalation.620659542 Jun 27 06:28:56 PM PDT 24 Jun 27 06:29:04 PM PDT 24 477678492 ps
T295 /workspace/coverage/default/1.sram_ctrl_lc_escalation.3387522547 Jun 27 06:26:32 PM PDT 24 Jun 27 06:26:41 PM PDT 24 1122945770 ps
T296 /workspace/coverage/default/11.sram_ctrl_max_throughput.1236821234 Jun 27 06:27:01 PM PDT 24 Jun 27 06:27:46 PM PDT 24 93585898 ps
T297 /workspace/coverage/default/4.sram_ctrl_smoke.98997479 Jun 27 06:26:38 PM PDT 24 Jun 27 06:27:10 PM PDT 24 101284932 ps
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T298 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.2482874868 Jun 27 06:26:33 PM PDT 24 Jun 27 06:43:53 PM PDT 24 2652419904 ps
T299 /workspace/coverage/default/39.sram_ctrl_executable.153237016 Jun 27 06:28:43 PM PDT 24 Jun 27 06:42:03 PM PDT 24 55522558619 ps
T300 /workspace/coverage/default/15.sram_ctrl_max_throughput.1801905658 Jun 27 06:27:15 PM PDT 24 Jun 27 06:28:51 PM PDT 24 506315149 ps
T301 /workspace/coverage/default/13.sram_ctrl_executable.638491158 Jun 27 06:27:03 PM PDT 24 Jun 27 06:28:25 PM PDT 24 704065626 ps
T302 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3207327428 Jun 27 06:27:54 PM PDT 24 Jun 27 06:28:49 PM PDT 24 392234807 ps
T303 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.3762602217 Jun 27 06:28:42 PM PDT 24 Jun 27 06:28:50 PM PDT 24 716518280 ps
T304 /workspace/coverage/default/9.sram_ctrl_executable.3061803556 Jun 27 06:26:59 PM PDT 24 Jun 27 06:43:37 PM PDT 24 8372992233 ps
T305 /workspace/coverage/default/2.sram_ctrl_alert_test.2842174193 Jun 27 06:26:34 PM PDT 24 Jun 27 06:26:40 PM PDT 24 18879280 ps
T306 /workspace/coverage/default/2.sram_ctrl_max_throughput.2063840876 Jun 27 06:26:31 PM PDT 24 Jun 27 06:26:37 PM PDT 24 41378307 ps
T307 /workspace/coverage/default/18.sram_ctrl_executable.3866937770 Jun 27 06:27:24 PM PDT 24 Jun 27 06:41:26 PM PDT 24 7784024190 ps
T308 /workspace/coverage/default/43.sram_ctrl_ram_cfg.405518486 Jun 27 06:28:57 PM PDT 24 Jun 27 06:29:02 PM PDT 24 87175045 ps
T309 /workspace/coverage/default/16.sram_ctrl_ram_cfg.2521370050 Jun 27 06:27:19 PM PDT 24 Jun 27 06:27:37 PM PDT 24 37817789 ps
T310 /workspace/coverage/default/2.sram_ctrl_regwen.3998582569 Jun 27 06:26:34 PM PDT 24 Jun 27 06:32:01 PM PDT 24 1755121362 ps
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