Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1026
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
74.94 74.94 93.05 93.05 76.78 76.78 95.15 95.15 33.33 33.33 83.57 83.57 93.51 93.51 49.18 49.18 /workspace/coverage/default/10.sram_ctrl_stress_all.546993413
91.06 16.12 98.47 5.42 84.95 8.18 95.77 0.62 100.00 66.67 92.75 9.18 95.43 1.92 70.02 20.84 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.4158077964
94.05 2.99 98.47 0.00 86.97 2.01 97.50 1.73 100.00 0.00 93.48 0.72 95.43 0.00 86.47 16.45 /workspace/coverage/default/23.sram_ctrl_regwen.1793628881
95.03 0.98 98.64 0.17 87.80 0.83 97.71 0.21 100.00 0.00 94.20 0.72 95.43 0.00 91.41 4.94 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2069955798
95.60 0.58 98.81 0.17 89.57 1.78 98.13 0.42 100.00 0.00 94.93 0.72 96.02 0.59 91.77 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.3502748131
96.11 0.50 99.07 0.25 90.64 1.07 98.61 0.49 100.00 0.00 95.89 0.97 96.02 0.00 92.50 0.73 /workspace/coverage/default/20.sram_ctrl_alert_test.1094048884
96.44 0.33 99.07 0.00 90.64 0.00 98.61 0.00 100.00 0.00 95.89 0.00 96.17 0.15 94.70 2.19 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.2604385251
96.64 0.20 99.07 0.00 90.64 0.00 98.68 0.07 100.00 0.00 95.89 0.00 97.49 1.33 94.70 0.00 /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.365572770
96.82 0.18 99.07 0.00 90.64 0.00 98.68 0.00 100.00 0.00 95.89 0.00 98.38 0.88 95.06 0.37 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.3049289504
96.97 0.16 99.07 0.00 90.76 0.12 98.68 0.00 100.00 0.00 96.14 0.24 99.12 0.74 95.06 0.00 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3730606094
97.12 0.14 99.15 0.08 90.76 0.00 99.58 0.90 100.00 0.00 96.14 0.00 99.12 0.00 95.06 0.00 /workspace/coverage/default/12.sram_ctrl_ram_cfg.1668688754
97.25 0.14 99.15 0.00 91.00 0.24 99.58 0.00 100.00 0.00 96.14 0.00 99.12 0.00 95.80 0.73 /workspace/coverage/default/24.sram_ctrl_lc_escalation.1945133230
97.36 0.10 99.15 0.00 91.00 0.00 99.58 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.53 0.73 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2541057396
97.41 0.05 99.15 0.00 91.00 0.00 99.58 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.89 0.37 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.3564635106
97.46 0.05 99.15 0.00 91.00 0.00 99.72 0.14 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.18 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2670209303
97.48 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2996453657
97.51 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3724184887

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3223778553
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.812563373
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3212330023
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.4108416468
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2934281453
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3358798550
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.618600037
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1064264692
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.264113247
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1363661085
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1199228203
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3841981364
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3689814593
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3990491551
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.783660049
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1380066782
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3140832713
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1746338315
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2893274546
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2894786410
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1299221378
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1178885480
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.4188968834
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1132377778
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2275881932
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.764335857
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1969417901
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.4178686975
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1939832302
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2777533135
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.848077527
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.601343889
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1705770161
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.386289808
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2445787622
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.4129893358
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3942926392
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1597000463
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.2834786935
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1193374682
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.588410389
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3726415696
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.18304854
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.54108934
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.638545297
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1581269223
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.355923344
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.831767022
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2857666635
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1250218261
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.857967076
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2996426174
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.737695089
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2062005024
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.4212921268
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2709725209
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1220894059
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.287045939
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.922351413
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.231500881
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3355826170
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3320126100
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1494692587
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2327528019
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3933549440
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1533335673
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.673476377
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.4165849533
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2560581341
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2438485929
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3903378160
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.4189731313
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.618325946
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2866380691
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.35303073
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.4190809164
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1225657204
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.672818131
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2010819222
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.626295742
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2164600520
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2577043021
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.964264399
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1124044558
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3114143243
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3877419406
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.4239978627
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2207471530
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.317677268
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1978329152
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3073774426
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3811320762
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.4218564932
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1710751434
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3639363540
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2411084930
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3242124972
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.205753265
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2939245846
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2137090052
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2853168908
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.741590102
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.263353950
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2554444308
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.4177098207
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1331922112
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.1969002231
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.4259620235
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2382534130
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3902691672
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3114636268
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1177348780
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3826495440
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2116815508
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3297757229
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1823244480
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3761538738
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2150231028
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1045816066
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2865772181
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.851031110
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3680586099
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1976219999
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3240191387
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1720430549
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.44411554
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3262379994
/workspace/coverage/default/0.sram_ctrl_alert_test.3272540093
/workspace/coverage/default/0.sram_ctrl_bijection.40862584
/workspace/coverage/default/0.sram_ctrl_executable.883275303
/workspace/coverage/default/0.sram_ctrl_lc_escalation.413639770
/workspace/coverage/default/0.sram_ctrl_max_throughput.2087304940
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3167242517
/workspace/coverage/default/0.sram_ctrl_mem_walk.2041793869
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1153934251
/workspace/coverage/default/0.sram_ctrl_partial_access.1862531658
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3141232135
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2247802310
/workspace/coverage/default/0.sram_ctrl_regwen.1004881179
/workspace/coverage/default/0.sram_ctrl_smoke.1092483658
/workspace/coverage/default/0.sram_ctrl_stress_all.1677064392
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3381760489
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.445598644
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3519283028
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2306719750
/workspace/coverage/default/1.sram_ctrl_alert_test.197678559
/workspace/coverage/default/1.sram_ctrl_bijection.1532302020
/workspace/coverage/default/1.sram_ctrl_executable.1193122018
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1503338124
/workspace/coverage/default/1.sram_ctrl_max_throughput.2083004877
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2704113532
/workspace/coverage/default/1.sram_ctrl_mem_walk.3534898313
/workspace/coverage/default/1.sram_ctrl_multiple_keys.4058796228
/workspace/coverage/default/1.sram_ctrl_partial_access.278939811
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.199503791
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2445707418
/workspace/coverage/default/1.sram_ctrl_regwen.2848850462
/workspace/coverage/default/1.sram_ctrl_sec_cm.1812326399
/workspace/coverage/default/1.sram_ctrl_smoke.4022549998
/workspace/coverage/default/1.sram_ctrl_stress_all.1446514310
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2036564987
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.347922442
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.688660295
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3991334540
/workspace/coverage/default/10.sram_ctrl_alert_test.1588711568
/workspace/coverage/default/10.sram_ctrl_bijection.3039723853
/workspace/coverage/default/10.sram_ctrl_executable.2813942281
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1741388574
/workspace/coverage/default/10.sram_ctrl_max_throughput.3541109904
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.113247838
/workspace/coverage/default/10.sram_ctrl_mem_walk.67140141
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2376121670
/workspace/coverage/default/10.sram_ctrl_partial_access.1883236674
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3785895963
/workspace/coverage/default/10.sram_ctrl_ram_cfg.4166874794
/workspace/coverage/default/10.sram_ctrl_regwen.1684186026
/workspace/coverage/default/10.sram_ctrl_smoke.2928929674
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1185142747
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1748785484
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1448346444
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1429438895
/workspace/coverage/default/11.sram_ctrl_alert_test.1428918291
/workspace/coverage/default/11.sram_ctrl_bijection.195419761
/workspace/coverage/default/11.sram_ctrl_executable.2085629889
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1700281877
/workspace/coverage/default/11.sram_ctrl_max_throughput.1516748104
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1641907851
/workspace/coverage/default/11.sram_ctrl_mem_walk.4069803672
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3354829449
/workspace/coverage/default/11.sram_ctrl_partial_access.1723522817
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1233409600
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3683059101
/workspace/coverage/default/11.sram_ctrl_regwen.773517465
/workspace/coverage/default/11.sram_ctrl_smoke.800851348
/workspace/coverage/default/11.sram_ctrl_stress_all.509301272
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.387570120
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.911911417
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2305319802
/workspace/coverage/default/12.sram_ctrl_alert_test.3510073140
/workspace/coverage/default/12.sram_ctrl_bijection.1131442511
/workspace/coverage/default/12.sram_ctrl_executable.2096948256
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1155914658
/workspace/coverage/default/12.sram_ctrl_max_throughput.1261469193
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2054455359
/workspace/coverage/default/12.sram_ctrl_mem_walk.1014574711
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2385192763
/workspace/coverage/default/12.sram_ctrl_partial_access.2377143318
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.2970173197
/workspace/coverage/default/12.sram_ctrl_regwen.461544292
/workspace/coverage/default/12.sram_ctrl_smoke.3795482305
/workspace/coverage/default/12.sram_ctrl_stress_all.1525712565
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.424562077
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.2608347476
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/workspace/coverage/default/43.sram_ctrl_stress_all.3805244232
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3041008638
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1781397174
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.686208551
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3039015864
/workspace/coverage/default/44.sram_ctrl_alert_test.1281335407
/workspace/coverage/default/44.sram_ctrl_bijection.924154814
/workspace/coverage/default/44.sram_ctrl_executable.4225727170
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1393958068
/workspace/coverage/default/44.sram_ctrl_max_throughput.1952825904
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.902113075
/workspace/coverage/default/44.sram_ctrl_mem_walk.1115217140
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2712519079
/workspace/coverage/default/44.sram_ctrl_partial_access.4116677937
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3772845562
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3183853378
/workspace/coverage/default/44.sram_ctrl_regwen.2005241184
/workspace/coverage/default/44.sram_ctrl_smoke.3383173247
/workspace/coverage/default/44.sram_ctrl_stress_all.3790829301
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2703185645
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2346159429
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2822561691
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.942530276
/workspace/coverage/default/45.sram_ctrl_alert_test.3391360067
/workspace/coverage/default/45.sram_ctrl_bijection.1690303566
/workspace/coverage/default/45.sram_ctrl_executable.257444193
/workspace/coverage/default/45.sram_ctrl_lc_escalation.288263190
/workspace/coverage/default/45.sram_ctrl_max_throughput.219682278
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1716482007
/workspace/coverage/default/45.sram_ctrl_mem_walk.3114274381
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1584321384
/workspace/coverage/default/45.sram_ctrl_partial_access.3189699943
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.102770733
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3929383118
/workspace/coverage/default/45.sram_ctrl_regwen.2402846006
/workspace/coverage/default/45.sram_ctrl_smoke.2356404238
/workspace/coverage/default/45.sram_ctrl_stress_all.1351201939
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3074362694
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2074805867
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1634538189
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.478868147
/workspace/coverage/default/46.sram_ctrl_alert_test.3209148094
/workspace/coverage/default/46.sram_ctrl_bijection.2366331991
/workspace/coverage/default/46.sram_ctrl_executable.1585028109
/workspace/coverage/default/46.sram_ctrl_lc_escalation.4099079956
/workspace/coverage/default/46.sram_ctrl_max_throughput.785426515
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1854660758
/workspace/coverage/default/46.sram_ctrl_mem_walk.1809957002
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3458319336
/workspace/coverage/default/46.sram_ctrl_partial_access.1299067346
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3668474740
/workspace/coverage/default/46.sram_ctrl_ram_cfg.314549331
/workspace/coverage/default/46.sram_ctrl_regwen.1049002679
/workspace/coverage/default/46.sram_ctrl_smoke.1042417464
/workspace/coverage/default/46.sram_ctrl_stress_all.3457760050
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2185148942
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2211488544
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.152182252
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.407319433
/workspace/coverage/default/47.sram_ctrl_alert_test.3131681321
/workspace/coverage/default/47.sram_ctrl_bijection.2218242251
/workspace/coverage/default/47.sram_ctrl_executable.3024783387
/workspace/coverage/default/47.sram_ctrl_lc_escalation.4261480172
/workspace/coverage/default/47.sram_ctrl_max_throughput.3243065297
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.4193415680
/workspace/coverage/default/47.sram_ctrl_mem_walk.2826240171
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1848454037
/workspace/coverage/default/47.sram_ctrl_partial_access.2397499006
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1657632767
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3413384167
/workspace/coverage/default/47.sram_ctrl_regwen.3225351833
/workspace/coverage/default/47.sram_ctrl_smoke.2183467416
/workspace/coverage/default/47.sram_ctrl_stress_all.1057573385
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3042152989
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3636163101
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2706479381
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.4052457562
/workspace/coverage/default/48.sram_ctrl_alert_test.1568213115
/workspace/coverage/default/48.sram_ctrl_bijection.2180365213
/workspace/coverage/default/48.sram_ctrl_executable.2216381494
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3293177786
/workspace/coverage/default/48.sram_ctrl_max_throughput.1944467806
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.4288691168
/workspace/coverage/default/48.sram_ctrl_mem_walk.1150204200
/workspace/coverage/default/48.sram_ctrl_multiple_keys.4158282458
/workspace/coverage/default/48.sram_ctrl_partial_access.1695086634
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1497678149
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3865942706
/workspace/coverage/default/48.sram_ctrl_regwen.3203225061
/workspace/coverage/default/48.sram_ctrl_smoke.3262698036
/workspace/coverage/default/48.sram_ctrl_stress_all.2398307662
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3834517559
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.336751968
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3225184027
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2265702406
/workspace/coverage/default/49.sram_ctrl_alert_test.700768429
/workspace/coverage/default/49.sram_ctrl_bijection.2544828334
/workspace/coverage/default/49.sram_ctrl_executable.2621418830
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2177398826
/workspace/coverage/default/49.sram_ctrl_max_throughput.3697232561
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2700482000
/workspace/coverage/default/49.sram_ctrl_mem_walk.3251614694
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1024394912
/workspace/coverage/default/49.sram_ctrl_partial_access.434821057
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1343756138
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3072942863
/workspace/coverage/default/49.sram_ctrl_regwen.2699306371
/workspace/coverage/default/49.sram_ctrl_smoke.4280877598
/workspace/coverage/default/49.sram_ctrl_stress_all.2694962087
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3758181731
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3645902972
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2985728125
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.782466896
/workspace/coverage/default/5.sram_ctrl_alert_test.2233556794
/workspace/coverage/default/5.sram_ctrl_bijection.3233768451
/workspace/coverage/default/5.sram_ctrl_executable.4165608626
/workspace/coverage/default/5.sram_ctrl_lc_escalation.4231825738
/workspace/coverage/default/5.sram_ctrl_max_throughput.602345879
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3292598670
/workspace/coverage/default/5.sram_ctrl_mem_walk.2233486988
/workspace/coverage/default/5.sram_ctrl_multiple_keys.815276112
/workspace/coverage/default/5.sram_ctrl_partial_access.3566804599
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.860641054
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3092862461
/workspace/coverage/default/5.sram_ctrl_regwen.2439150591
/workspace/coverage/default/5.sram_ctrl_smoke.1632973475
/workspace/coverage/default/5.sram_ctrl_stress_all.210811402
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2687831056
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2961397440
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1790546245
/workspace/coverage/default/6.sram_ctrl_alert_test.3466567550
/workspace/coverage/default/6.sram_ctrl_bijection.71235333
/workspace/coverage/default/6.sram_ctrl_executable.4178008210
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3054918718
/workspace/coverage/default/6.sram_ctrl_max_throughput.751128749
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2692826098
/workspace/coverage/default/6.sram_ctrl_mem_walk.188642885
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2484710584
/workspace/coverage/default/6.sram_ctrl_partial_access.1371145785
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3500068751
/workspace/coverage/default/6.sram_ctrl_ram_cfg.138972077
/workspace/coverage/default/6.sram_ctrl_regwen.4207685405
/workspace/coverage/default/6.sram_ctrl_smoke.1024574739
/workspace/coverage/default/6.sram_ctrl_stress_all.901628524
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.687305726
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2184125990
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.949277791
/workspace/coverage/default/7.sram_ctrl_alert_test.3275223726
/workspace/coverage/default/7.sram_ctrl_bijection.170261005
/workspace/coverage/default/7.sram_ctrl_executable.447559341
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1473041457
/workspace/coverage/default/7.sram_ctrl_max_throughput.1986332337
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2991632684
/workspace/coverage/default/7.sram_ctrl_mem_walk.2794433525
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3019623557
/workspace/coverage/default/7.sram_ctrl_partial_access.1185259464
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1541016034
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3911471195
/workspace/coverage/default/7.sram_ctrl_regwen.2518059050
/workspace/coverage/default/7.sram_ctrl_smoke.1503937963
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1567719323
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1229906418
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.400170994
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2850622975
/workspace/coverage/default/8.sram_ctrl_alert_test.1322509938
/workspace/coverage/default/8.sram_ctrl_bijection.216389651
/workspace/coverage/default/8.sram_ctrl_executable.2791851846
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3183828821
/workspace/coverage/default/8.sram_ctrl_max_throughput.3915552454
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2411095380
/workspace/coverage/default/8.sram_ctrl_mem_walk.2422071875
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1015134787
/workspace/coverage/default/8.sram_ctrl_partial_access.2574057634
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.732235129
/workspace/coverage/default/8.sram_ctrl_ram_cfg.526076085
/workspace/coverage/default/8.sram_ctrl_regwen.308283880
/workspace/coverage/default/8.sram_ctrl_smoke.2925045697
/workspace/coverage/default/8.sram_ctrl_stress_all.2210111315
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.4185333069
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3802871401
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3411169737
/workspace/coverage/default/9.sram_ctrl_alert_test.2424207024
/workspace/coverage/default/9.sram_ctrl_bijection.780044644
/workspace/coverage/default/9.sram_ctrl_executable.1676298118
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3250007966
/workspace/coverage/default/9.sram_ctrl_max_throughput.3980083522
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1340174749
/workspace/coverage/default/9.sram_ctrl_mem_walk.2388887290
/workspace/coverage/default/9.sram_ctrl_multiple_keys.620757573
/workspace/coverage/default/9.sram_ctrl_partial_access.3248221911
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2327780259
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3791415569
/workspace/coverage/default/9.sram_ctrl_regwen.2038948260
/workspace/coverage/default/9.sram_ctrl_smoke.4041261154
/workspace/coverage/default/9.sram_ctrl_stress_all.3219232496
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.529314329
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1724915792
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.434703396



Total test records in report: 1026
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.4219157276 Jun 29 06:56:43 PM PDT 24 Jun 29 06:56:48 PM PDT 24 264923311 ps
T2 /workspace/coverage/default/0.sram_ctrl_max_throughput.2087304940 Jun 29 06:53:56 PM PDT 24 Jun 29 06:54:21 PM PDT 24 289363960 ps
T3 /workspace/coverage/default/34.sram_ctrl_max_throughput.703655930 Jun 29 06:56:03 PM PDT 24 Jun 29 06:56:21 PM PDT 24 80861376 ps
T4 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.3049289504 Jun 29 06:55:45 PM PDT 24 Jun 29 07:18:07 PM PDT 24 4038509104 ps
T5 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.1168472139 Jun 29 06:56:18 PM PDT 24 Jun 29 06:56:22 PM PDT 24 108781102 ps
T9 /workspace/coverage/default/9.sram_ctrl_partial_access.3248221911 Jun 29 06:54:13 PM PDT 24 Jun 29 06:54:51 PM PDT 24 453860294 ps
T10 /workspace/coverage/default/47.sram_ctrl_partial_access.2397499006 Jun 29 06:57:16 PM PDT 24 Jun 29 06:57:21 PM PDT 24 1342779831 ps
T11 /workspace/coverage/default/43.sram_ctrl_max_throughput.552629107 Jun 29 06:56:52 PM PDT 24 Jun 29 06:56:56 PM PDT 24 154615939 ps
T6 /workspace/coverage/default/10.sram_ctrl_stress_all.546993413 Jun 29 06:54:19 PM PDT 24 Jun 29 08:20:13 PM PDT 24 12748289475 ps
T12 /workspace/coverage/default/20.sram_ctrl_alert_test.1094048884 Jun 29 06:55:00 PM PDT 24 Jun 29 06:55:01 PM PDT 24 120589079 ps
T18 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3041008638 Jun 29 06:56:54 PM PDT 24 Jun 29 07:09:00 PM PDT 24 2283632614 ps
T40 /workspace/coverage/default/1.sram_ctrl_multiple_keys.4058796228 Jun 29 06:53:57 PM PDT 24 Jun 29 07:18:41 PM PDT 24 3410609469 ps
T38 /workspace/coverage/default/37.sram_ctrl_mem_walk.2486253833 Jun 29 06:56:17 PM PDT 24 Jun 29 06:56:24 PM PDT 24 347043812 ps
T41 /workspace/coverage/default/40.sram_ctrl_mem_walk.1107073184 Jun 29 06:56:35 PM PDT 24 Jun 29 06:56:46 PM PDT 24 1839002855 ps
T13 /workspace/coverage/default/42.sram_ctrl_alert_test.2594587392 Jun 29 06:56:53 PM PDT 24 Jun 29 06:56:54 PM PDT 24 51580645 ps
T24 /workspace/coverage/default/47.sram_ctrl_ram_cfg.3413384167 Jun 29 06:57:20 PM PDT 24 Jun 29 06:57:21 PM PDT 24 78404054 ps
T19 /workspace/coverage/default/23.sram_ctrl_regwen.1793628881 Jun 29 06:55:01 PM PDT 24 Jun 29 07:15:41 PM PDT 24 55156740863 ps
T39 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.3319707510 Jun 29 06:55:17 PM PDT 24 Jun 29 06:55:20 PM PDT 24 161576793 ps
T67 /workspace/coverage/default/29.sram_ctrl_bijection.3340575781 Jun 29 06:55:29 PM PDT 24 Jun 29 06:55:55 PM PDT 24 7356543683 ps
T7 /workspace/coverage/default/34.sram_ctrl_lc_escalation.125812885 Jun 29 06:56:04 PM PDT 24 Jun 29 06:56:12 PM PDT 24 6385797143 ps
T44 /workspace/coverage/default/7.sram_ctrl_regwen.2518059050 Jun 29 06:54:12 PM PDT 24 Jun 29 07:14:46 PM PDT 24 22479279612 ps
T25 /workspace/coverage/default/0.sram_ctrl_ram_cfg.2247802310 Jun 29 06:53:49 PM PDT 24 Jun 29 06:53:51 PM PDT 24 31417593 ps
T50 /workspace/coverage/default/21.sram_ctrl_mem_walk.2905177506 Jun 29 06:54:58 PM PDT 24 Jun 29 06:55:04 PM PDT 24 189415605 ps
T20 /workspace/coverage/default/28.sram_ctrl_regwen.1460633861 Jun 29 06:55:33 PM PDT 24 Jun 29 07:14:14 PM PDT 24 57990626159 ps
T152 /workspace/coverage/default/33.sram_ctrl_partial_access.287121929 Jun 29 06:55:54 PM PDT 24 Jun 29 06:56:07 PM PDT 24 219035847 ps
T77 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.445598644 Jun 29 06:53:49 PM PDT 24 Jun 29 06:59:47 PM PDT 24 3612024060 ps
T26 /workspace/coverage/default/1.sram_ctrl_ram_cfg.2445707418 Jun 29 06:53:56 PM PDT 24 Jun 29 06:53:58 PM PDT 24 26139842 ps
T78 /workspace/coverage/default/0.sram_ctrl_partial_access.1862531658 Jun 29 06:53:48 PM PDT 24 Jun 29 06:54:04 PM PDT 24 291060052 ps
T42 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.72625689 Jun 29 06:54:57 PM PDT 24 Jun 29 06:55:42 PM PDT 24 2558265617 ps
T48 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.3723473218 Jun 29 06:55:16 PM PDT 24 Jun 29 06:55:22 PM PDT 24 92173447 ps
T8 /workspace/coverage/default/24.sram_ctrl_lc_escalation.1945133230 Jun 29 06:55:09 PM PDT 24 Jun 29 06:55:18 PM PDT 24 2988991491 ps
T94 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.2604385251 Jun 29 06:54:08 PM PDT 24 Jun 29 06:57:51 PM PDT 24 17792562930 ps
T49 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.1084987523 Jun 29 06:55:39 PM PDT 24 Jun 29 06:55:43 PM PDT 24 213405789 ps
T95 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.1465431796 Jun 29 06:54:33 PM PDT 24 Jun 29 06:57:22 PM PDT 24 3746855597 ps
T96 /workspace/coverage/default/34.sram_ctrl_executable.2458404341 Jun 29 06:56:04 PM PDT 24 Jun 29 07:12:25 PM PDT 24 97907976273 ps
T151 /workspace/coverage/default/48.sram_ctrl_mem_walk.1150204200 Jun 29 06:57:29 PM PDT 24 Jun 29 06:57:34 PM PDT 24 77509553 ps
T22 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.4158077964 Jun 29 06:54:06 PM PDT 24 Jun 29 06:54:22 PM PDT 24 2077499281 ps
T153 /workspace/coverage/default/48.sram_ctrl_bijection.2180365213 Jun 29 06:57:22 PM PDT 24 Jun 29 06:58:04 PM PDT 24 1754521045 ps
T154 /workspace/coverage/default/25.sram_ctrl_partial_access.2841599776 Jun 29 06:55:15 PM PDT 24 Jun 29 06:56:11 PM PDT 24 266154162 ps
T62 /workspace/coverage/default/13.sram_ctrl_regwen.3463259118 Jun 29 06:54:30 PM PDT 24 Jun 29 07:26:25 PM PDT 24 166635078318 ps
T141 /workspace/coverage/default/11.sram_ctrl_executable.2085629889 Jun 29 06:54:18 PM PDT 24 Jun 29 07:11:57 PM PDT 24 50717601763 ps
T14 /workspace/coverage/default/44.sram_ctrl_alert_test.1281335407 Jun 29 06:57:01 PM PDT 24 Jun 29 06:57:02 PM PDT 24 24475691 ps
T63 /workspace/coverage/default/20.sram_ctrl_stress_all.1030212940 Jun 29 06:54:56 PM PDT 24 Jun 29 06:58:11 PM PDT 24 17720006371 ps
T82 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.1916103840 Jun 29 06:54:45 PM PDT 24 Jun 29 06:54:50 PM PDT 24 125861705 ps
T83 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.2704113532 Jun 29 06:53:51 PM PDT 24 Jun 29 06:53:54 PM PDT 24 161214938 ps
T150 /workspace/coverage/default/11.sram_ctrl_stress_all.509301272 Jun 29 06:54:20 PM PDT 24 Jun 29 06:56:56 PM PDT 24 8571512926 ps
T21 /workspace/coverage/default/27.sram_ctrl_lc_escalation.1723351674 Jun 29 06:55:22 PM PDT 24 Jun 29 06:55:30 PM PDT 24 1061332530 ps
T43 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.949277791 Jun 29 06:54:11 PM PDT 24 Jun 29 07:17:03 PM PDT 24 3577007150 ps
T68 /workspace/coverage/default/28.sram_ctrl_stress_all.1111946137 Jun 29 06:55:32 PM PDT 24 Jun 29 07:17:57 PM PDT 24 43339634709 ps
T84 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.4005298329 Jun 29 06:55:31 PM PDT 24 Jun 29 07:13:24 PM PDT 24 3069570176 ps
T155 /workspace/coverage/default/45.sram_ctrl_max_throughput.219682278 Jun 29 06:57:13 PM PDT 24 Jun 29 06:59:30 PM PDT 24 135100498 ps
T156 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.686208551 Jun 29 06:56:53 PM PDT 24 Jun 29 06:58:45 PM PDT 24 514824225 ps
T23 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2670209303 Jun 29 06:54:12 PM PDT 24 Jun 29 06:59:06 PM PDT 24 1189897963 ps
T145 /workspace/coverage/default/32.sram_ctrl_multiple_keys.3629521099 Jun 29 06:55:46 PM PDT 24 Jun 29 07:03:26 PM PDT 24 16932376151 ps
T157 /workspace/coverage/default/25.sram_ctrl_max_throughput.3038349912 Jun 29 06:55:07 PM PDT 24 Jun 29 06:56:05 PM PDT 24 195580023 ps
T158 /workspace/coverage/default/29.sram_ctrl_max_throughput.3065385764 Jun 29 06:55:31 PM PDT 24 Jun 29 06:55:34 PM PDT 24 154840712 ps
T159 /workspace/coverage/default/0.sram_ctrl_lc_escalation.413639770 Jun 29 06:53:52 PM PDT 24 Jun 29 06:54:00 PM PDT 24 3123536449 ps
T160 /workspace/coverage/default/9.sram_ctrl_alert_test.2424207024 Jun 29 06:54:20 PM PDT 24 Jun 29 06:54:22 PM PDT 24 12304206 ps
T161 /workspace/coverage/default/22.sram_ctrl_smoke.1688597901 Jun 29 06:54:58 PM PDT 24 Jun 29 06:55:11 PM PDT 24 597907849 ps
T51 /workspace/coverage/default/9.sram_ctrl_mem_walk.2388887290 Jun 29 06:54:20 PM PDT 24 Jun 29 06:54:27 PM PDT 24 2493605747 ps
T162 /workspace/coverage/default/27.sram_ctrl_partial_access.4143604893 Jun 29 06:55:22 PM PDT 24 Jun 29 06:55:33 PM PDT 24 439384859 ps
T163 /workspace/coverage/default/36.sram_ctrl_lc_escalation.3402361655 Jun 29 06:56:09 PM PDT 24 Jun 29 06:56:17 PM PDT 24 619472406 ps
T164 /workspace/coverage/default/34.sram_ctrl_alert_test.2437436303 Jun 29 06:56:04 PM PDT 24 Jun 29 06:56:06 PM PDT 24 50657180 ps
T149 /workspace/coverage/default/12.sram_ctrl_regwen.461544292 Jun 29 06:54:29 PM PDT 24 Jun 29 07:09:45 PM PDT 24 9801457524 ps
T165 /workspace/coverage/default/27.sram_ctrl_multiple_keys.4194068991 Jun 29 06:55:23 PM PDT 24 Jun 29 07:07:54 PM PDT 24 2650332375 ps
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T147 /workspace/coverage/default/39.sram_ctrl_smoke.3288119927 Jun 29 06:56:25 PM PDT 24 Jun 29 06:58:56 PM PDT 24 3061592910 ps
T102 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2374484997 Jun 29 06:55:51 PM PDT 24 Jun 29 07:03:15 PM PDT 24 65507559276 ps
T168 /workspace/coverage/default/7.sram_ctrl_executable.447559341 Jun 29 06:54:20 PM PDT 24 Jun 29 06:54:47 PM PDT 24 1254117875 ps
T143 /workspace/coverage/default/42.sram_ctrl_executable.3456609582 Jun 29 06:56:44 PM PDT 24 Jun 29 07:21:25 PM PDT 24 35864045847 ps
T169 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.3439244726 Jun 29 06:54:45 PM PDT 24 Jun 29 06:56:06 PM PDT 24 517129245 ps
T170 /workspace/coverage/default/35.sram_ctrl_partial_access.12324189 Jun 29 06:56:04 PM PDT 24 Jun 29 06:56:18 PM PDT 24 665251778 ps
T171 /workspace/coverage/default/25.sram_ctrl_alert_test.3433300895 Jun 29 06:55:16 PM PDT 24 Jun 29 06:55:17 PM PDT 24 25153141 ps
T172 /workspace/coverage/default/13.sram_ctrl_partial_access.3675881386 Jun 29 06:54:33 PM PDT 24 Jun 29 06:54:49 PM PDT 24 721746345 ps
T126 /workspace/coverage/default/25.sram_ctrl_lc_escalation.19453908 Jun 29 06:55:08 PM PDT 24 Jun 29 06:55:18 PM PDT 24 1679277691 ps
T173 /workspace/coverage/default/15.sram_ctrl_lc_escalation.3033776730 Jun 29 06:54:39 PM PDT 24 Jun 29 06:54:46 PM PDT 24 1371645535 ps
T174 /workspace/coverage/default/4.sram_ctrl_multiple_keys.319505283 Jun 29 06:53:56 PM PDT 24 Jun 29 07:01:25 PM PDT 24 8075067227 ps
T175 /workspace/coverage/default/5.sram_ctrl_alert_test.2233556794 Jun 29 06:54:03 PM PDT 24 Jun 29 06:54:04 PM PDT 24 21527527 ps
T139 /workspace/coverage/default/38.sram_ctrl_regwen.4009943963 Jun 29 06:56:25 PM PDT 24 Jun 29 07:21:05 PM PDT 24 13268772942 ps
T176 /workspace/coverage/default/20.sram_ctrl_multiple_keys.1614558902 Jun 29 06:54:52 PM PDT 24 Jun 29 06:57:15 PM PDT 24 8797240568 ps
T177 /workspace/coverage/default/36.sram_ctrl_executable.1788726731 Jun 29 06:56:17 PM PDT 24 Jun 29 06:58:54 PM PDT 24 19242864220 ps
T140 /workspace/coverage/default/48.sram_ctrl_executable.2216381494 Jun 29 06:57:31 PM PDT 24 Jun 29 07:13:22 PM PDT 24 15236087499 ps
T178 /workspace/coverage/default/30.sram_ctrl_multiple_keys.354076013 Jun 29 06:55:41 PM PDT 24 Jun 29 06:57:25 PM PDT 24 1520004133 ps
T179 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.216061744 Jun 29 06:56:44 PM PDT 24 Jun 29 07:20:32 PM PDT 24 2921393621 ps
T52 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.1829856872 Jun 29 06:55:54 PM PDT 24 Jun 29 07:04:47 PM PDT 24 1732920250 ps
T180 /workspace/coverage/default/40.sram_ctrl_max_throughput.1421126893 Jun 29 06:56:33 PM PDT 24 Jun 29 06:58:02 PM PDT 24 221462632 ps
T181 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.1429438895 Jun 29 06:54:17 PM PDT 24 Jun 29 06:57:35 PM PDT 24 1012296396 ps
T182 /workspace/coverage/default/26.sram_ctrl_lc_escalation.1580572430 Jun 29 06:55:18 PM PDT 24 Jun 29 06:55:22 PM PDT 24 318300075 ps
T53 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1567719323 Jun 29 06:54:10 PM PDT 24 Jun 29 06:59:32 PM PDT 24 3312888608 ps
T148 /workspace/coverage/default/44.sram_ctrl_multiple_keys.2712519079 Jun 29 06:56:59 PM PDT 24 Jun 29 07:26:14 PM PDT 24 37203202965 ps
T183 /workspace/coverage/default/4.sram_ctrl_max_throughput.2907864137 Jun 29 06:53:54 PM PDT 24 Jun 29 06:55:48 PM PDT 24 514576349 ps
T103 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.3890394777 Jun 29 06:56:34 PM PDT 24 Jun 29 06:56:37 PM PDT 24 81345118 ps
T184 /workspace/coverage/default/38.sram_ctrl_max_throughput.2414583328 Jun 29 06:56:25 PM PDT 24 Jun 29 06:56:28 PM PDT 24 73087615 ps
T104 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.859310930 Jun 29 06:54:45 PM PDT 24 Jun 29 06:58:43 PM PDT 24 17916614439 ps
T142 /workspace/coverage/default/40.sram_ctrl_executable.2056176650 Jun 29 06:56:36 PM PDT 24 Jun 29 07:10:21 PM PDT 24 2312538093 ps
T185 /workspace/coverage/default/17.sram_ctrl_lc_escalation.1283646763 Jun 29 06:54:40 PM PDT 24 Jun 29 06:54:45 PM PDT 24 306881627 ps
T186 /workspace/coverage/default/12.sram_ctrl_max_throughput.1261469193 Jun 29 06:54:19 PM PDT 24 Jun 29 06:55:53 PM PDT 24 129697501 ps
T187 /workspace/coverage/default/8.sram_ctrl_regwen.308283880 Jun 29 06:54:14 PM PDT 24 Jun 29 07:11:27 PM PDT 24 14886680123 ps
T188 /workspace/coverage/default/6.sram_ctrl_smoke.1024574739 Jun 29 06:54:09 PM PDT 24 Jun 29 06:54:21 PM PDT 24 706554149 ps
T189 /workspace/coverage/default/10.sram_ctrl_partial_access.1883236674 Jun 29 06:54:21 PM PDT 24 Jun 29 06:55:01 PM PDT 24 523665246 ps
T190 /workspace/coverage/default/46.sram_ctrl_max_throughput.785426515 Jun 29 06:57:15 PM PDT 24 Jun 29 06:59:36 PM PDT 24 260217558 ps
T191 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.1790546245 Jun 29 06:54:04 PM PDT 24 Jun 29 07:01:18 PM PDT 24 6073626592 ps
T192 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2655642638 Jun 29 06:54:36 PM PDT 24 Jun 29 06:54:49 PM PDT 24 143221875 ps
T193 /workspace/coverage/default/17.sram_ctrl_partial_access.2084010179 Jun 29 06:54:37 PM PDT 24 Jun 29 06:54:54 PM PDT 24 1099416740 ps
T194 /workspace/coverage/default/29.sram_ctrl_regwen.769752495 Jun 29 06:55:33 PM PDT 24 Jun 29 07:28:47 PM PDT 24 17430168459 ps
T105 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.1780160369 Jun 29 06:53:59 PM PDT 24 Jun 29 06:56:04 PM PDT 24 4896437397 ps
T195 /workspace/coverage/default/23.sram_ctrl_mem_walk.3837362435 Jun 29 06:55:02 PM PDT 24 Jun 29 06:55:13 PM PDT 24 444338213 ps
T196 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3980180264 Jun 29 06:55:25 PM PDT 24 Jun 29 06:56:31 PM PDT 24 853920198 ps
T197 /workspace/coverage/default/32.sram_ctrl_stress_all.647609489 Jun 29 06:55:55 PM PDT 24 Jun 29 07:10:09 PM PDT 24 88725240866 ps
T198 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.732235129 Jun 29 06:54:12 PM PDT 24 Jun 29 06:59:25 PM PDT 24 4518915585 ps
T199 /workspace/coverage/default/39.sram_ctrl_stress_all.489735224 Jun 29 06:56:36 PM PDT 24 Jun 29 07:48:42 PM PDT 24 25800418051 ps
T200 /workspace/coverage/default/24.sram_ctrl_alert_test.3922482022 Jun 29 06:55:07 PM PDT 24 Jun 29 06:55:08 PM PDT 24 17921232 ps
T201 /workspace/coverage/default/27.sram_ctrl_alert_test.691879416 Jun 29 06:55:25 PM PDT 24 Jun 29 06:55:26 PM PDT 24 19318591 ps
T202 /workspace/coverage/default/19.sram_ctrl_max_throughput.1557783703 Jun 29 06:54:47 PM PDT 24 Jun 29 06:55:30 PM PDT 24 1570704929 ps
T54 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1852140524 Jun 29 06:54:35 PM PDT 24 Jun 29 07:01:40 PM PDT 24 2817754665 ps
T203 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.3636163101 Jun 29 06:57:15 PM PDT 24 Jun 29 07:02:32 PM PDT 24 3363863830 ps
T204 /workspace/coverage/default/12.sram_ctrl_ram_cfg.1668688754 Jun 29 06:54:28 PM PDT 24 Jun 29 06:54:30 PM PDT 24 74668852 ps
T205 /workspace/coverage/default/19.sram_ctrl_ram_cfg.1139421551 Jun 29 06:54:47 PM PDT 24 Jun 29 06:54:48 PM PDT 24 55465462 ps
T206 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.2720913106 Jun 29 06:55:54 PM PDT 24 Jun 29 06:59:56 PM PDT 24 4766015792 ps
T207 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.3196979914 Jun 29 06:56:52 PM PDT 24 Jun 29 06:56:55 PM PDT 24 101237590 ps
T55 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2703185645 Jun 29 06:57:02 PM PDT 24 Jun 29 07:07:18 PM PDT 24 3337681612 ps
T208 /workspace/coverage/default/3.sram_ctrl_stress_all.1147156136 Jun 29 06:54:00 PM PDT 24 Jun 29 07:43:45 PM PDT 24 8221896207 ps
T209 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.2074805867 Jun 29 06:57:15 PM PDT 24 Jun 29 07:01:06 PM PDT 24 4644458899 ps
T210 /workspace/coverage/default/18.sram_ctrl_bijection.3990385940 Jun 29 06:54:38 PM PDT 24 Jun 29 06:55:51 PM PDT 24 4469341212 ps
T211 /workspace/coverage/default/41.sram_ctrl_stress_all.4267004244 Jun 29 06:56:47 PM PDT 24 Jun 29 07:29:18 PM PDT 24 22495495150 ps
T212 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.926581093 Jun 29 06:55:38 PM PDT 24 Jun 29 07:00:04 PM PDT 24 5411074993 ps
T213 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3127773589 Jun 29 06:55:50 PM PDT 24 Jun 29 06:56:42 PM PDT 24 750644044 ps
T214 /workspace/coverage/default/1.sram_ctrl_alert_test.197678559 Jun 29 06:53:53 PM PDT 24 Jun 29 06:53:55 PM PDT 24 11594273 ps
T215 /workspace/coverage/default/49.sram_ctrl_stress_all.2694962087 Jun 29 06:57:39 PM PDT 24 Jun 29 07:21:03 PM PDT 24 47723665614 ps
T216 /workspace/coverage/default/35.sram_ctrl_bijection.4131297766 Jun 29 06:56:02 PM PDT 24 Jun 29 06:57:10 PM PDT 24 1005245882 ps
T217 /workspace/coverage/default/41.sram_ctrl_alert_test.52565072 Jun 29 06:56:49 PM PDT 24 Jun 29 06:56:50 PM PDT 24 14775444 ps
T56 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.2800244319 Jun 29 06:54:40 PM PDT 24 Jun 29 06:54:44 PM PDT 24 707800594 ps
T218 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.1304342319 Jun 29 06:56:27 PM PDT 24 Jun 29 06:57:46 PM PDT 24 138748878 ps
T219 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2108515757 Jun 29 06:54:27 PM PDT 24 Jun 29 06:56:10 PM PDT 24 567772668 ps
T220 /workspace/coverage/default/6.sram_ctrl_alert_test.3466567550 Jun 29 06:54:07 PM PDT 24 Jun 29 06:54:08 PM PDT 24 22060993 ps
T221 /workspace/coverage/default/19.sram_ctrl_lc_escalation.3682954265 Jun 29 06:54:46 PM PDT 24 Jun 29 06:54:52 PM PDT 24 4055981644 ps
T222 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.1790415041 Jun 29 06:55:01 PM PDT 24 Jun 29 07:14:46 PM PDT 24 2911821879 ps
T223 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.1924114125 Jun 29 06:55:14 PM PDT 24 Jun 29 06:56:51 PM PDT 24 1817972826 ps
T224 /workspace/coverage/default/48.sram_ctrl_ram_cfg.3865942706 Jun 29 06:57:30 PM PDT 24 Jun 29 06:57:31 PM PDT 24 109753006 ps
T225 /workspace/coverage/default/11.sram_ctrl_alert_test.1428918291 Jun 29 06:54:20 PM PDT 24 Jun 29 06:54:22 PM PDT 24 11929650 ps
T226 /workspace/coverage/default/23.sram_ctrl_stress_all.175735058 Jun 29 06:54:59 PM PDT 24 Jun 29 07:55:45 PM PDT 24 7510476493 ps
T227 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.2152903973 Jun 29 06:56:10 PM PDT 24 Jun 29 06:57:55 PM PDT 24 640596954 ps
T228 /workspace/coverage/default/49.sram_ctrl_smoke.4280877598 Jun 29 06:57:32 PM PDT 24 Jun 29 07:00:11 PM PDT 24 2731737116 ps
T229 /workspace/coverage/default/16.sram_ctrl_lc_escalation.2652916883 Jun 29 06:54:38 PM PDT 24 Jun 29 06:54:47 PM PDT 24 2723323598 ps
T230 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2260889961 Jun 29 06:55:03 PM PDT 24 Jun 29 06:55:29 PM PDT 24 93418974 ps
T231 /workspace/coverage/default/23.sram_ctrl_bijection.3856151875 Jun 29 06:55:13 PM PDT 24 Jun 29 06:55:46 PM PDT 24 979450052 ps
T146 /workspace/coverage/default/43.sram_ctrl_stress_all.3805244232 Jun 29 06:56:53 PM PDT 24 Jun 29 08:08:15 PM PDT 24 54787075643 ps
T232 /workspace/coverage/default/1.sram_ctrl_mem_walk.3534898313 Jun 29 06:53:50 PM PDT 24 Jun 29 06:53:56 PM PDT 24 332665718 ps
T233 /workspace/coverage/default/47.sram_ctrl_stress_all.1057573385 Jun 29 06:57:23 PM PDT 24 Jun 29 07:35:29 PM PDT 24 14776029797 ps
T234 /workspace/coverage/default/11.sram_ctrl_mem_walk.4069803672 Jun 29 06:54:20 PM PDT 24 Jun 29 06:54:31 PM PDT 24 446819445 ps
T235 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.2268844600 Jun 29 06:56:43 PM PDT 24 Jun 29 07:01:58 PM PDT 24 3421982303 ps
T236 /workspace/coverage/default/4.sram_ctrl_smoke.2523543728 Jun 29 06:53:57 PM PDT 24 Jun 29 06:54:33 PM PDT 24 452603514 ps
T237 /workspace/coverage/default/18.sram_ctrl_lc_escalation.2528611118 Jun 29 06:54:47 PM PDT 24 Jun 29 06:54:51 PM PDT 24 1679829008 ps
T238 /workspace/coverage/default/33.sram_ctrl_executable.3889707868 Jun 29 06:55:54 PM PDT 24 Jun 29 07:22:19 PM PDT 24 61185192291 ps
T239 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.2623178137 Jun 29 06:55:26 PM PDT 24 Jun 29 06:57:39 PM PDT 24 1391960845 ps
T240 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.1615043206 Jun 29 06:55:38 PM PDT 24 Jun 29 07:02:50 PM PDT 24 2354747572 ps
T241 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3722346636 Jun 29 06:55:34 PM PDT 24 Jun 29 06:55:39 PM PDT 24 148621258 ps
T242 /workspace/coverage/default/5.sram_ctrl_max_throughput.602345879 Jun 29 06:54:15 PM PDT 24 Jun 29 06:54:40 PM PDT 24 162386268 ps
T64 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.3297417435 Jun 29 06:54:57 PM PDT 24 Jun 29 07:03:48 PM PDT 24 4344695117 ps
T243 /workspace/coverage/default/5.sram_ctrl_mem_walk.2233486988 Jun 29 06:54:05 PM PDT 24 Jun 29 06:54:17 PM PDT 24 2725114466 ps
T15 /workspace/coverage/default/2.sram_ctrl_sec_cm.215120361 Jun 29 06:53:55 PM PDT 24 Jun 29 06:53:57 PM PDT 24 451887258 ps
T29 /workspace/coverage/default/26.sram_ctrl_bijection.1948021125 Jun 29 06:55:16 PM PDT 24 Jun 29 06:56:39 PM PDT 24 13885205891 ps
T30 /workspace/coverage/default/21.sram_ctrl_stress_all.444680216 Jun 29 06:54:59 PM PDT 24 Jun 29 07:28:28 PM PDT 24 6579703873 ps
T31 /workspace/coverage/default/41.sram_ctrl_regwen.3653724433 Jun 29 06:56:43 PM PDT 24 Jun 29 07:32:52 PM PDT 24 22778994865 ps
T32 /workspace/coverage/default/47.sram_ctrl_regwen.3225351833 Jun 29 06:57:20 PM PDT 24 Jun 29 07:12:38 PM PDT 24 38511576646 ps
T33 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.610137577 Jun 29 06:54:42 PM PDT 24 Jun 29 07:01:43 PM PDT 24 1945601108 ps
T34 /workspace/coverage/default/41.sram_ctrl_executable.4278768585 Jun 29 06:56:44 PM PDT 24 Jun 29 07:17:07 PM PDT 24 175645949381 ps
T35 /workspace/coverage/default/1.sram_ctrl_partial_access.278939811 Jun 29 06:53:52 PM PDT 24 Jun 29 06:53:58 PM PDT 24 225091959 ps
T36 /workspace/coverage/default/20.sram_ctrl_regwen.2579486706 Jun 29 06:55:02 PM PDT 24 Jun 29 07:12:13 PM PDT 24 68683541545 ps
T37 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.3918883904 Jun 29 06:55:17 PM PDT 24 Jun 29 07:08:01 PM PDT 24 3095861009 ps
T244 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2027807245 Jun 29 06:54:27 PM PDT 24 Jun 29 06:54:29 PM PDT 24 167890977 ps
T245 /workspace/coverage/default/4.sram_ctrl_ram_cfg.266533049 Jun 29 06:54:07 PM PDT 24 Jun 29 06:54:08 PM PDT 24 32912008 ps
T246 /workspace/coverage/default/20.sram_ctrl_mem_walk.3031417503 Jun 29 06:54:59 PM PDT 24 Jun 29 06:55:05 PM PDT 24 102370155 ps
T247 /workspace/coverage/default/43.sram_ctrl_lc_escalation.3150579877 Jun 29 06:56:56 PM PDT 24 Jun 29 06:57:04 PM PDT 24 2128089580 ps
T248 /workspace/coverage/default/43.sram_ctrl_ram_cfg.3326923736 Jun 29 06:56:53 PM PDT 24 Jun 29 06:56:54 PM PDT 24 131983743 ps
T249 /workspace/coverage/default/10.sram_ctrl_lc_escalation.1741388574 Jun 29 06:54:18 PM PDT 24 Jun 29 06:54:22 PM PDT 24 274089068 ps
T144 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.2970173197 Jun 29 06:54:23 PM PDT 24 Jun 29 07:02:37 PM PDT 24 18675705755 ps
T250 /workspace/coverage/default/29.sram_ctrl_multiple_keys.704655857 Jun 29 06:55:32 PM PDT 24 Jun 29 07:18:09 PM PDT 24 12432713539 ps
T251 /workspace/coverage/default/6.sram_ctrl_max_throughput.751128749 Jun 29 06:54:04 PM PDT 24 Jun 29 06:55:35 PM PDT 24 129654544 ps
T252 /workspace/coverage/default/35.sram_ctrl_executable.2763664175 Jun 29 06:56:08 PM PDT 24 Jun 29 06:59:32 PM PDT 24 11516642974 ps
T253 /workspace/coverage/default/38.sram_ctrl_executable.1495816427 Jun 29 06:56:35 PM PDT 24 Jun 29 07:10:42 PM PDT 24 10531066251 ps
T254 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.640870100 Jun 29 06:56:25 PM PDT 24 Jun 29 07:22:51 PM PDT 24 17297308019 ps
T255 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2869076142 Jun 29 06:54:42 PM PDT 24 Jun 29 07:03:41 PM PDT 24 20814673001 ps
T256 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.706644258 Jun 29 06:53:58 PM PDT 24 Jun 29 06:54:00 PM PDT 24 72984590 ps
T257 /workspace/coverage/default/31.sram_ctrl_bijection.3501379847 Jun 29 06:55:38 PM PDT 24 Jun 29 06:57:01 PM PDT 24 10168577641 ps
T65 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.959946226 Jun 29 06:54:54 PM PDT 24 Jun 29 06:57:43 PM PDT 24 2538868718 ps
T115 /workspace/coverage/default/43.sram_ctrl_regwen.2696702207 Jun 29 06:56:53 PM PDT 24 Jun 29 07:00:30 PM PDT 24 505121965 ps
T116 /workspace/coverage/default/48.sram_ctrl_smoke.3262698036 Jun 29 06:57:21 PM PDT 24 Jun 29 06:57:24 PM PDT 24 443644618 ps
T117 /workspace/coverage/default/27.sram_ctrl_ram_cfg.1165155575 Jun 29 06:55:21 PM PDT 24 Jun 29 06:55:22 PM PDT 24 73730459 ps
T118 /workspace/coverage/default/11.sram_ctrl_smoke.800851348 Jun 29 06:54:18 PM PDT 24 Jun 29 06:54:32 PM PDT 24 438068564 ps
T119 /workspace/coverage/default/11.sram_ctrl_max_throughput.1516748104 Jun 29 06:54:31 PM PDT 24 Jun 29 06:54:49 PM PDT 24 85669404 ps
T120 /workspace/coverage/default/20.sram_ctrl_bijection.3095838442 Jun 29 06:54:52 PM PDT 24 Jun 29 06:56:09 PM PDT 24 15129847884 ps
T121 /workspace/coverage/default/23.sram_ctrl_smoke.2792010696 Jun 29 06:55:03 PM PDT 24 Jun 29 06:55:07 PM PDT 24 164783961 ps
T122 /workspace/coverage/default/38.sram_ctrl_bijection.2552640324 Jun 29 06:56:25 PM PDT 24 Jun 29 06:57:21 PM PDT 24 3241677238 ps
T123 /workspace/coverage/default/18.sram_ctrl_alert_test.1324158671 Jun 29 06:54:47 PM PDT 24 Jun 29 06:54:48 PM PDT 24 11888650 ps
T258 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.1879613709 Jun 29 06:55:54 PM PDT 24 Jun 29 06:55:59 PM PDT 24 90603501 ps
T259 /workspace/coverage/default/26.sram_ctrl_ram_cfg.3294067606 Jun 29 06:55:15 PM PDT 24 Jun 29 06:55:16 PM PDT 24 77311877 ps
T260 /workspace/coverage/default/20.sram_ctrl_smoke.3823483594 Jun 29 06:54:46 PM PDT 24 Jun 29 06:55:51 PM PDT 24 242281155 ps
T261 /workspace/coverage/default/2.sram_ctrl_stress_all.3934108172 Jun 29 06:53:57 PM PDT 24 Jun 29 06:55:58 PM PDT 24 2866696758 ps
T262 /workspace/coverage/default/32.sram_ctrl_smoke.3802675437 Jun 29 06:55:47 PM PDT 24 Jun 29 06:55:58 PM PDT 24 250541366 ps
T263 /workspace/coverage/default/35.sram_ctrl_smoke.872762123 Jun 29 06:56:04 PM PDT 24 Jun 29 06:56:17 PM PDT 24 901064880 ps
T264 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.597594977 Jun 29 06:55:09 PM PDT 24 Jun 29 06:56:30 PM PDT 24 142250766 ps
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T266 /workspace/coverage/default/6.sram_ctrl_bijection.71235333 Jun 29 06:54:09 PM PDT 24 Jun 29 06:55:39 PM PDT 24 28758586906 ps
T267 /workspace/coverage/default/45.sram_ctrl_regwen.2402846006 Jun 29 06:57:14 PM PDT 24 Jun 29 07:18:07 PM PDT 24 42183068843 ps
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T269 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.1864947057 Jun 29 06:56:45 PM PDT 24 Jun 29 07:16:59 PM PDT 24 35435283360 ps
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T272 /workspace/coverage/default/12.sram_ctrl_lc_escalation.1155914658 Jun 29 06:54:36 PM PDT 24 Jun 29 06:54:43 PM PDT 24 1021008206 ps
T273 /workspace/coverage/default/8.sram_ctrl_multiple_keys.1015134787 Jun 29 06:54:17 PM PDT 24 Jun 29 07:07:46 PM PDT 24 13044852601 ps
T274 /workspace/coverage/default/3.sram_ctrl_lc_escalation.3309337674 Jun 29 06:53:55 PM PDT 24 Jun 29 06:54:05 PM PDT 24 664597823 ps
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T279 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.199503791 Jun 29 06:53:48 PM PDT 24 Jun 29 07:01:38 PM PDT 24 12161665201 ps
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T282 /workspace/coverage/default/49.sram_ctrl_partial_access.434821057 Jun 29 06:57:30 PM PDT 24 Jun 29 06:57:35 PM PDT 24 119171982 ps
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T299 /workspace/coverage/default/48.sram_ctrl_lc_escalation.3293177786 Jun 29 06:57:30 PM PDT 24 Jun 29 06:57:36 PM PDT 24 1241939665 ps
T300 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.698964938 Jun 29 06:55:28 PM PDT 24 Jun 29 06:59:22 PM PDT 24 4570383875 ps
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T302 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.3851206112 Jun 29 06:55:02 PM PDT 24 Jun 29 07:11:01 PM PDT 24 2273988872 ps
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T304 /workspace/coverage/default/27.sram_ctrl_regwen.675824100 Jun 29 06:55:23 PM PDT 24 Jun 29 07:09:05 PM PDT 24 17027055118 ps
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T306 /workspace/coverage/default/21.sram_ctrl_bijection.679275305 Jun 29 06:54:59 PM PDT 24 Jun 29 06:56:30 PM PDT 24 21835270595 ps
T307 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.3331898250 Jun 29 06:55:50 PM PDT 24 Jun 29 07:01:01 PM PDT 24 6295895230 ps
T308 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3292598670 Jun 29 06:54:02 PM PDT 24 Jun 29 06:54:08 PM PDT 24 2883543040 ps
T309 /workspace/coverage/default/19.sram_ctrl_alert_test.916720326 Jun 29 06:54:48 PM PDT 24 Jun 29 06:54:49 PM PDT 24 22570173 ps
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