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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total test records in report: 1031
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T550 /workspace/coverage/default/24.sram_ctrl_lc_escalation.1067049400 Jul 05 05:18:27 PM PDT 24 Jul 05 05:18:30 PM PDT 24 398807498 ps
T551 /workspace/coverage/default/31.sram_ctrl_smoke.2120395028 Jul 05 05:19:18 PM PDT 24 Jul 05 05:21:33 PM PDT 24 522418169 ps
T552 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2117049800 Jul 05 05:16:58 PM PDT 24 Jul 05 05:17:35 PM PDT 24 1155616845 ps
T553 /workspace/coverage/default/46.sram_ctrl_ram_cfg.1103838568 Jul 05 05:21:15 PM PDT 24 Jul 05 05:21:16 PM PDT 24 30298038 ps
T554 /workspace/coverage/default/14.sram_ctrl_alert_test.3094766332 Jul 05 05:17:46 PM PDT 24 Jul 05 05:17:49 PM PDT 24 11938827 ps
T555 /workspace/coverage/default/45.sram_ctrl_lc_escalation.3718450548 Jul 05 05:20:58 PM PDT 24 Jul 05 05:21:04 PM PDT 24 1641003682 ps
T556 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.3806309160 Jul 05 05:21:35 PM PDT 24 Jul 05 05:27:45 PM PDT 24 3802958571 ps
T557 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.2327929619 Jul 05 05:18:19 PM PDT 24 Jul 05 05:18:25 PM PDT 24 623371657 ps
T558 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.362953485 Jul 05 05:20:33 PM PDT 24 Jul 05 05:47:12 PM PDT 24 23513174002 ps
T559 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.887497070 Jul 05 05:19:40 PM PDT 24 Jul 05 05:22:53 PM PDT 24 2618313486 ps
T560 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.2421992216 Jul 05 05:17:55 PM PDT 24 Jul 05 05:18:05 PM PDT 24 339776775 ps
T561 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.352941888 Jul 05 05:17:47 PM PDT 24 Jul 05 05:28:21 PM PDT 24 12666014503 ps
T562 /workspace/coverage/default/29.sram_ctrl_partial_access.2016046763 Jul 05 05:18:52 PM PDT 24 Jul 05 05:19:04 PM PDT 24 228914486 ps
T563 /workspace/coverage/default/17.sram_ctrl_multiple_keys.1439731113 Jul 05 05:17:44 PM PDT 24 Jul 05 05:36:01 PM PDT 24 177152333784 ps
T564 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.248033229 Jul 05 05:18:00 PM PDT 24 Jul 05 05:24:11 PM PDT 24 5248383469 ps
T565 /workspace/coverage/default/16.sram_ctrl_stress_all.720691776 Jul 05 05:17:41 PM PDT 24 Jul 05 05:28:45 PM PDT 24 3690079504 ps
T566 /workspace/coverage/default/29.sram_ctrl_bijection.1695180767 Jul 05 05:18:53 PM PDT 24 Jul 05 05:19:08 PM PDT 24 296964592 ps
T567 /workspace/coverage/default/24.sram_ctrl_bijection.3357220399 Jul 05 05:18:25 PM PDT 24 Jul 05 05:19:35 PM PDT 24 7174100825 ps
T568 /workspace/coverage/default/28.sram_ctrl_mem_walk.2457126796 Jul 05 05:18:44 PM PDT 24 Jul 05 05:18:49 PM PDT 24 97013755 ps
T569 /workspace/coverage/default/33.sram_ctrl_executable.3805592563 Jul 05 05:19:19 PM PDT 24 Jul 05 05:32:40 PM PDT 24 45569625723 ps
T570 /workspace/coverage/default/46.sram_ctrl_lc_escalation.1016147657 Jul 05 05:21:12 PM PDT 24 Jul 05 05:21:17 PM PDT 24 938174494 ps
T571 /workspace/coverage/default/28.sram_ctrl_lc_escalation.3788547208 Jul 05 05:18:48 PM PDT 24 Jul 05 05:18:57 PM PDT 24 2638091349 ps
T572 /workspace/coverage/default/22.sram_ctrl_max_throughput.1631288364 Jul 05 05:18:15 PM PDT 24 Jul 05 05:18:37 PM PDT 24 168733296 ps
T573 /workspace/coverage/default/5.sram_ctrl_max_throughput.3065647237 Jul 05 05:17:18 PM PDT 24 Jul 05 05:18:35 PM PDT 24 117896606 ps
T574 /workspace/coverage/default/49.sram_ctrl_multiple_keys.2038586647 Jul 05 05:21:35 PM PDT 24 Jul 05 05:34:01 PM PDT 24 7702479021 ps
T575 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.404725451 Jul 05 05:19:38 PM PDT 24 Jul 05 05:19:44 PM PDT 24 333594635 ps
T576 /workspace/coverage/default/44.sram_ctrl_partial_access.981957943 Jul 05 05:21:01 PM PDT 24 Jul 05 05:21:08 PM PDT 24 126557402 ps
T577 /workspace/coverage/default/20.sram_ctrl_regwen.958290478 Jul 05 05:18:05 PM PDT 24 Jul 05 05:29:00 PM PDT 24 19664124853 ps
T578 /workspace/coverage/default/0.sram_ctrl_regwen.3280699347 Jul 05 05:17:03 PM PDT 24 Jul 05 05:20:01 PM PDT 24 9811221510 ps
T579 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.908354739 Jul 05 05:20:14 PM PDT 24 Jul 05 05:33:18 PM PDT 24 6249054745 ps
T580 /workspace/coverage/default/4.sram_ctrl_regwen.3382747340 Jul 05 05:17:21 PM PDT 24 Jul 05 05:24:58 PM PDT 24 8739634332 ps
T581 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.540944556 Jul 05 05:17:38 PM PDT 24 Jul 05 05:17:43 PM PDT 24 100072663 ps
T582 /workspace/coverage/default/27.sram_ctrl_lc_escalation.4132597131 Jul 05 05:18:39 PM PDT 24 Jul 05 05:18:44 PM PDT 24 1027856692 ps
T583 /workspace/coverage/default/7.sram_ctrl_max_throughput.1497635688 Jul 05 05:17:28 PM PDT 24 Jul 05 05:18:07 PM PDT 24 242798745 ps
T584 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.2041608667 Jul 05 05:17:09 PM PDT 24 Jul 05 05:23:20 PM PDT 24 20047395041 ps
T585 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.3059293592 Jul 05 05:18:10 PM PDT 24 Jul 05 05:18:16 PM PDT 24 443787229 ps
T586 /workspace/coverage/default/47.sram_ctrl_executable.3651963895 Jul 05 05:21:22 PM PDT 24 Jul 05 05:30:18 PM PDT 24 2722319111 ps
T587 /workspace/coverage/default/29.sram_ctrl_multiple_keys.2851145357 Jul 05 05:18:52 PM PDT 24 Jul 05 05:39:40 PM PDT 24 15554465307 ps
T588 /workspace/coverage/default/44.sram_ctrl_stress_all.2928536754 Jul 05 05:21:01 PM PDT 24 Jul 05 05:50:49 PM PDT 24 92994812085 ps
T589 /workspace/coverage/default/15.sram_ctrl_regwen.1136849156 Jul 05 05:17:42 PM PDT 24 Jul 05 05:41:26 PM PDT 24 3065102224 ps
T590 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3673332853 Jul 05 05:20:18 PM PDT 24 Jul 05 05:21:03 PM PDT 24 477808091 ps
T591 /workspace/coverage/default/16.sram_ctrl_lc_escalation.3669458387 Jul 05 05:17:44 PM PDT 24 Jul 05 05:17:54 PM PDT 24 1543127819 ps
T592 /workspace/coverage/default/15.sram_ctrl_access_during_key_req.3546011141 Jul 05 05:17:56 PM PDT 24 Jul 05 05:31:11 PM PDT 24 10771456200 ps
T593 /workspace/coverage/default/25.sram_ctrl_bijection.188494041 Jul 05 05:18:30 PM PDT 24 Jul 05 05:18:58 PM PDT 24 488477804 ps
T594 /workspace/coverage/default/5.sram_ctrl_bijection.1036018902 Jul 05 05:17:20 PM PDT 24 Jul 05 05:17:56 PM PDT 24 7001475143 ps
T595 /workspace/coverage/default/5.sram_ctrl_ram_cfg.918447345 Jul 05 05:17:17 PM PDT 24 Jul 05 05:17:19 PM PDT 24 62079916 ps
T596 /workspace/coverage/default/4.sram_ctrl_lc_escalation.2217368878 Jul 05 05:17:08 PM PDT 24 Jul 05 05:17:12 PM PDT 24 664359868 ps
T597 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.2304402130 Jul 05 05:20:46 PM PDT 24 Jul 05 05:38:35 PM PDT 24 34351072988 ps
T598 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.1240065327 Jul 05 05:17:32 PM PDT 24 Jul 05 05:17:38 PM PDT 24 192853586 ps
T599 /workspace/coverage/default/34.sram_ctrl_executable.295199619 Jul 05 05:19:26 PM PDT 24 Jul 05 05:21:41 PM PDT 24 363113112 ps
T600 /workspace/coverage/default/39.sram_ctrl_executable.384723307 Jul 05 05:20:13 PM PDT 24 Jul 05 05:37:34 PM PDT 24 53688692388 ps
T601 /workspace/coverage/default/31.sram_ctrl_max_throughput.2681551501 Jul 05 05:19:06 PM PDT 24 Jul 05 05:19:32 PM PDT 24 161599955 ps
T602 /workspace/coverage/default/20.sram_ctrl_alert_test.2569641023 Jul 05 05:18:11 PM PDT 24 Jul 05 05:18:13 PM PDT 24 54404060 ps
T603 /workspace/coverage/default/47.sram_ctrl_ram_cfg.3069793624 Jul 05 05:21:20 PM PDT 24 Jul 05 05:21:21 PM PDT 24 27431028 ps
T604 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.1833335762 Jul 05 05:21:14 PM PDT 24 Jul 05 05:21:20 PM PDT 24 332953026 ps
T605 /workspace/coverage/default/32.sram_ctrl_smoke.4236349553 Jul 05 05:19:14 PM PDT 24 Jul 05 05:19:34 PM PDT 24 1524663420 ps
T606 /workspace/coverage/default/2.sram_ctrl_mem_walk.1052137897 Jul 05 05:17:08 PM PDT 24 Jul 05 05:17:19 PM PDT 24 427198736 ps
T607 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.2269042545 Jul 05 05:20:06 PM PDT 24 Jul 05 05:21:57 PM PDT 24 7854765913 ps
T608 /workspace/coverage/default/47.sram_ctrl_lc_escalation.3354659179 Jul 05 05:21:22 PM PDT 24 Jul 05 05:21:28 PM PDT 24 901696069 ps
T609 /workspace/coverage/default/8.sram_ctrl_partial_access.984845889 Jul 05 05:17:24 PM PDT 24 Jul 05 05:17:27 PM PDT 24 35966787 ps
T610 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.1826971200 Jul 05 05:17:30 PM PDT 24 Jul 05 05:25:16 PM PDT 24 1783646817 ps
T611 /workspace/coverage/default/7.sram_ctrl_bijection.1239120470 Jul 05 05:17:20 PM PDT 24 Jul 05 05:18:40 PM PDT 24 4763104795 ps
T612 /workspace/coverage/default/33.sram_ctrl_multiple_keys.3238243517 Jul 05 05:19:24 PM PDT 24 Jul 05 05:23:18 PM PDT 24 4947866051 ps
T613 /workspace/coverage/default/46.sram_ctrl_executable.4221949063 Jul 05 05:21:13 PM PDT 24 Jul 05 05:42:03 PM PDT 24 78336607321 ps
T101 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.1834728015 Jul 05 05:19:01 PM PDT 24 Jul 05 05:19:50 PM PDT 24 1567930830 ps
T25 /workspace/coverage/default/4.sram_ctrl_sec_cm.467853625 Jul 05 05:17:17 PM PDT 24 Jul 05 05:17:20 PM PDT 24 475731656 ps
T614 /workspace/coverage/default/1.sram_ctrl_multiple_keys.1200403851 Jul 05 05:16:58 PM PDT 24 Jul 05 05:20:26 PM PDT 24 675120022 ps
T615 /workspace/coverage/default/40.sram_ctrl_regwen.4038465611 Jul 05 05:20:20 PM PDT 24 Jul 05 05:35:53 PM PDT 24 16749131852 ps
T616 /workspace/coverage/default/19.sram_ctrl_multiple_keys.505088806 Jul 05 05:17:59 PM PDT 24 Jul 05 05:37:02 PM PDT 24 14933035712 ps
T617 /workspace/coverage/default/31.sram_ctrl_stress_all.3279935009 Jul 05 05:19:12 PM PDT 24 Jul 05 06:38:11 PM PDT 24 454636774119 ps
T618 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3529720545 Jul 05 05:17:24 PM PDT 24 Jul 05 05:17:30 PM PDT 24 191720647 ps
T619 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.1347588822 Jul 05 05:19:29 PM PDT 24 Jul 05 05:24:39 PM PDT 24 3338380845 ps
T620 /workspace/coverage/default/13.sram_ctrl_mem_walk.3272073762 Jul 05 05:17:39 PM PDT 24 Jul 05 05:17:46 PM PDT 24 447358741 ps
T621 /workspace/coverage/default/32.sram_ctrl_bijection.2978503050 Jul 05 05:19:09 PM PDT 24 Jul 05 05:20:25 PM PDT 24 13996726909 ps
T622 /workspace/coverage/default/24.sram_ctrl_multiple_keys.465116977 Jul 05 05:18:21 PM PDT 24 Jul 05 05:32:20 PM PDT 24 13200975856 ps
T81 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.2620607870 Jul 05 05:17:44 PM PDT 24 Jul 05 05:17:52 PM PDT 24 364962107 ps
T623 /workspace/coverage/default/43.sram_ctrl_regwen.3094212831 Jul 05 05:20:45 PM PDT 24 Jul 05 05:28:11 PM PDT 24 3232267956 ps
T624 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2832053748 Jul 05 05:20:30 PM PDT 24 Jul 05 05:20:33 PM PDT 24 140667664 ps
T625 /workspace/coverage/default/1.sram_ctrl_ram_cfg.1268689936 Jul 05 05:17:00 PM PDT 24 Jul 05 05:17:04 PM PDT 24 108324350 ps
T626 /workspace/coverage/default/18.sram_ctrl_bijection.1056733032 Jul 05 05:17:51 PM PDT 24 Jul 05 05:18:31 PM PDT 24 1133897205 ps
T627 /workspace/coverage/default/48.sram_ctrl_stress_all.1462470395 Jul 05 05:21:34 PM PDT 24 Jul 05 06:18:24 PM PDT 24 12343904209 ps
T628 /workspace/coverage/default/35.sram_ctrl_lc_escalation.3143966223 Jul 05 05:19:34 PM PDT 24 Jul 05 05:19:37 PM PDT 24 806038016 ps
T629 /workspace/coverage/default/16.sram_ctrl_bijection.1303584920 Jul 05 05:17:43 PM PDT 24 Jul 05 05:18:44 PM PDT 24 2876125083 ps
T630 /workspace/coverage/default/36.sram_ctrl_ram_cfg.3404590357 Jul 05 05:19:46 PM PDT 24 Jul 05 05:19:47 PM PDT 24 84362111 ps
T631 /workspace/coverage/default/19.sram_ctrl_smoke.462016626 Jul 05 05:17:56 PM PDT 24 Jul 05 05:18:08 PM PDT 24 1286995300 ps
T632 /workspace/coverage/default/17.sram_ctrl_mem_walk.248410276 Jul 05 05:17:48 PM PDT 24 Jul 05 05:17:56 PM PDT 24 477935817 ps
T633 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.3209199947 Jul 05 05:19:05 PM PDT 24 Jul 05 05:37:24 PM PDT 24 3774369417 ps
T634 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.3546033470 Jul 05 05:17:34 PM PDT 24 Jul 05 05:42:24 PM PDT 24 13523510090 ps
T635 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.3422174397 Jul 05 05:17:08 PM PDT 24 Jul 05 05:21:36 PM PDT 24 21740672486 ps
T636 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1948764598 Jul 05 05:17:28 PM PDT 24 Jul 05 05:22:41 PM PDT 24 2457026272 ps
T637 /workspace/coverage/default/42.sram_ctrl_stress_all.1212695691 Jul 05 05:20:37 PM PDT 24 Jul 05 05:54:38 PM PDT 24 18169905330 ps
T638 /workspace/coverage/default/2.sram_ctrl_executable.793022228 Jul 05 05:17:13 PM PDT 24 Jul 05 05:29:39 PM PDT 24 2450015285 ps
T639 /workspace/coverage/default/7.sram_ctrl_mem_walk.111355192 Jul 05 05:17:28 PM PDT 24 Jul 05 05:17:41 PM PDT 24 704243585 ps
T640 /workspace/coverage/default/22.sram_ctrl_stress_all.589371400 Jul 05 05:18:15 PM PDT 24 Jul 05 06:09:35 PM PDT 24 64870853264 ps
T641 /workspace/coverage/default/27.sram_ctrl_partial_access.1756053850 Jul 05 05:18:39 PM PDT 24 Jul 05 05:18:57 PM PDT 24 373720450 ps
T642 /workspace/coverage/default/3.sram_ctrl_smoke.3505039903 Jul 05 05:17:14 PM PDT 24 Jul 05 05:17:32 PM PDT 24 954383739 ps
T643 /workspace/coverage/default/7.sram_ctrl_alert_test.3786282491 Jul 05 05:17:22 PM PDT 24 Jul 05 05:17:25 PM PDT 24 20844876 ps
T644 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.940172154 Jul 05 05:17:12 PM PDT 24 Jul 05 05:17:19 PM PDT 24 591009235 ps
T645 /workspace/coverage/default/13.sram_ctrl_bijection.2962268004 Jul 05 05:17:40 PM PDT 24 Jul 05 05:18:57 PM PDT 24 18900507901 ps
T646 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2755441727 Jul 05 05:18:58 PM PDT 24 Jul 05 05:20:09 PM PDT 24 6064241461 ps
T647 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.465103490 Jul 05 05:17:34 PM PDT 24 Jul 05 05:29:11 PM PDT 24 1695837996 ps
T648 /workspace/coverage/default/36.sram_ctrl_bijection.3782348629 Jul 05 05:19:39 PM PDT 24 Jul 05 05:20:44 PM PDT 24 4122419567 ps
T649 /workspace/coverage/default/22.sram_ctrl_regwen.3225892459 Jul 05 05:18:17 PM PDT 24 Jul 05 05:27:11 PM PDT 24 2173902921 ps
T650 /workspace/coverage/default/48.sram_ctrl_mem_walk.991123700 Jul 05 05:21:34 PM PDT 24 Jul 05 05:21:41 PM PDT 24 1619543074 ps
T651 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.434872814 Jul 05 05:18:16 PM PDT 24 Jul 05 05:18:25 PM PDT 24 76100988 ps
T652 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.790053594 Jul 05 05:17:40 PM PDT 24 Jul 05 05:19:22 PM PDT 24 1337445509 ps
T653 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.232536652 Jul 05 05:17:36 PM PDT 24 Jul 05 05:18:49 PM PDT 24 618694746 ps
T654 /workspace/coverage/default/16.sram_ctrl_mem_walk.1094116267 Jul 05 05:17:50 PM PDT 24 Jul 05 05:17:57 PM PDT 24 237250486 ps
T655 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.1981946733 Jul 05 05:19:14 PM PDT 24 Jul 05 05:20:16 PM PDT 24 442310415 ps
T656 /workspace/coverage/default/29.sram_ctrl_regwen.792155598 Jul 05 05:19:00 PM PDT 24 Jul 05 05:24:45 PM PDT 24 14108817686 ps
T657 /workspace/coverage/default/28.sram_ctrl_partial_access.476860652 Jul 05 05:18:44 PM PDT 24 Jul 05 05:19:40 PM PDT 24 621295712 ps
T658 /workspace/coverage/default/17.sram_ctrl_alert_test.3354414927 Jul 05 05:17:50 PM PDT 24 Jul 05 05:17:53 PM PDT 24 36396911 ps
T659 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.1347694566 Jul 05 05:20:30 PM PDT 24 Jul 05 05:22:55 PM PDT 24 20526201623 ps
T660 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.1453994723 Jul 05 05:17:01 PM PDT 24 Jul 05 05:22:59 PM PDT 24 1160241211 ps
T661 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2966178107 Jul 05 05:19:18 PM PDT 24 Jul 05 05:26:49 PM PDT 24 36277221241 ps
T662 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1151925995 Jul 05 05:21:45 PM PDT 24 Jul 05 05:29:02 PM PDT 24 116576223511 ps
T663 /workspace/coverage/default/41.sram_ctrl_regwen.2872115029 Jul 05 05:20:33 PM PDT 24 Jul 05 05:32:47 PM PDT 24 22456031634 ps
T664 /workspace/coverage/default/8.sram_ctrl_mem_walk.2900527770 Jul 05 05:17:27 PM PDT 24 Jul 05 05:17:35 PM PDT 24 240241191 ps
T665 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.3154468645 Jul 05 05:17:38 PM PDT 24 Jul 05 05:22:30 PM PDT 24 16537634102 ps
T666 /workspace/coverage/default/14.sram_ctrl_partial_access.1467601547 Jul 05 05:17:44 PM PDT 24 Jul 05 05:17:59 PM PDT 24 454538404 ps
T667 /workspace/coverage/default/4.sram_ctrl_multiple_keys.3390300203 Jul 05 05:17:12 PM PDT 24 Jul 05 05:28:18 PM PDT 24 13767048570 ps
T668 /workspace/coverage/default/13.sram_ctrl_ram_cfg.3152707939 Jul 05 05:17:37 PM PDT 24 Jul 05 05:17:39 PM PDT 24 28170145 ps
T669 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2464146344 Jul 05 05:17:37 PM PDT 24 Jul 05 05:18:55 PM PDT 24 473130711 ps
T670 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.2826903577 Jul 05 05:17:13 PM PDT 24 Jul 05 05:37:24 PM PDT 24 4086496477 ps
T671 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.4214859268 Jul 05 05:21:05 PM PDT 24 Jul 05 05:26:21 PM PDT 24 3382488768 ps
T672 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2454948195 Jul 05 05:20:47 PM PDT 24 Jul 05 05:21:10 PM PDT 24 307824976 ps
T673 /workspace/coverage/default/40.sram_ctrl_max_throughput.1724751731 Jul 05 05:20:19 PM PDT 24 Jul 05 05:21:27 PM PDT 24 378004988 ps
T674 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.729545745 Jul 05 05:19:11 PM PDT 24 Jul 05 05:24:32 PM PDT 24 12681610760 ps
T675 /workspace/coverage/default/21.sram_ctrl_bijection.2613267911 Jul 05 05:18:10 PM PDT 24 Jul 05 05:18:45 PM PDT 24 1969855010 ps
T676 /workspace/coverage/default/3.sram_ctrl_partial_access.1140005366 Jul 05 05:17:04 PM PDT 24 Jul 05 05:17:23 PM PDT 24 450285857 ps
T677 /workspace/coverage/default/15.sram_ctrl_mem_walk.3313015964 Jul 05 05:17:42 PM PDT 24 Jul 05 05:17:49 PM PDT 24 666629626 ps
T678 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.2576651245 Jul 05 05:18:02 PM PDT 24 Jul 05 05:26:32 PM PDT 24 35852751645 ps
T679 /workspace/coverage/default/19.sram_ctrl_mem_walk.3991150837 Jul 05 05:17:58 PM PDT 24 Jul 05 05:18:05 PM PDT 24 225623946 ps
T680 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2537811031 Jul 05 05:18:35 PM PDT 24 Jul 05 05:20:04 PM PDT 24 2537736618 ps
T681 /workspace/coverage/default/19.sram_ctrl_partial_access.1541213291 Jul 05 05:17:57 PM PDT 24 Jul 05 05:18:19 PM PDT 24 1044993861 ps
T102 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3069111662 Jul 05 05:17:31 PM PDT 24 Jul 05 05:20:48 PM PDT 24 8130023937 ps
T682 /workspace/coverage/default/11.sram_ctrl_stress_all.2729688884 Jul 05 05:17:30 PM PDT 24 Jul 05 05:47:48 PM PDT 24 109580842124 ps
T683 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.27612064 Jul 05 05:21:57 PM PDT 24 Jul 05 05:22:01 PM PDT 24 187726684 ps
T684 /workspace/coverage/default/38.sram_ctrl_lc_escalation.3221087578 Jul 05 05:20:02 PM PDT 24 Jul 05 05:20:05 PM PDT 24 676009912 ps
T685 /workspace/coverage/default/20.sram_ctrl_multiple_keys.1499623371 Jul 05 05:18:02 PM PDT 24 Jul 05 05:33:42 PM PDT 24 9346238627 ps
T686 /workspace/coverage/default/32.sram_ctrl_partial_access.3251536350 Jul 05 05:19:12 PM PDT 24 Jul 05 05:19:48 PM PDT 24 755696729 ps
T687 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.4119517367 Jul 05 05:21:43 PM PDT 24 Jul 05 05:24:21 PM PDT 24 20138236155 ps
T688 /workspace/coverage/default/7.sram_ctrl_regwen.377501261 Jul 05 05:17:21 PM PDT 24 Jul 05 05:35:09 PM PDT 24 24175858895 ps
T689 /workspace/coverage/default/46.sram_ctrl_partial_access.1793893573 Jul 05 05:21:04 PM PDT 24 Jul 05 05:21:41 PM PDT 24 789471166 ps
T690 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.637892291 Jul 05 05:18:39 PM PDT 24 Jul 05 05:31:48 PM PDT 24 14130681884 ps
T691 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.1311429014 Jul 05 05:17:39 PM PDT 24 Jul 05 05:21:04 PM PDT 24 4045589854 ps
T692 /workspace/coverage/default/24.sram_ctrl_smoke.3254738564 Jul 05 05:18:25 PM PDT 24 Jul 05 05:19:31 PM PDT 24 220565915 ps
T693 /workspace/coverage/default/41.sram_ctrl_bijection.1564079203 Jul 05 05:20:27 PM PDT 24 Jul 05 05:21:27 PM PDT 24 911302878 ps
T694 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.2572908351 Jul 05 05:19:01 PM PDT 24 Jul 05 05:19:22 PM PDT 24 164897527 ps
T695 /workspace/coverage/default/40.sram_ctrl_partial_access.2017626615 Jul 05 05:20:20 PM PDT 24 Jul 05 05:21:23 PM PDT 24 1744164333 ps
T696 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.2033209574 Jul 05 05:17:22 PM PDT 24 Jul 05 05:38:05 PM PDT 24 15057256266 ps
T697 /workspace/coverage/default/5.sram_ctrl_lc_escalation.1095393797 Jul 05 05:17:27 PM PDT 24 Jul 05 05:17:40 PM PDT 24 8092693259 ps
T698 /workspace/coverage/default/25.sram_ctrl_ram_cfg.2454716453 Jul 05 05:18:38 PM PDT 24 Jul 05 05:18:40 PM PDT 24 26593115 ps
T699 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.4000473932 Jul 05 05:20:26 PM PDT 24 Jul 05 05:28:03 PM PDT 24 33281183371 ps
T700 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.1841183280 Jul 05 05:16:58 PM PDT 24 Jul 05 05:24:50 PM PDT 24 2407557551 ps
T701 /workspace/coverage/default/4.sram_ctrl_ram_cfg.3577558552 Jul 05 05:17:14 PM PDT 24 Jul 05 05:17:17 PM PDT 24 136119847 ps
T702 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3199845734 Jul 05 05:18:45 PM PDT 24 Jul 05 05:23:55 PM PDT 24 2741635565 ps
T703 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2676257844 Jul 05 05:19:07 PM PDT 24 Jul 05 05:21:06 PM PDT 24 563160028 ps
T704 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.1833286285 Jul 05 05:18:44 PM PDT 24 Jul 05 05:18:53 PM PDT 24 128089763 ps
T705 /workspace/coverage/default/39.sram_ctrl_alert_test.2830109625 Jul 05 05:20:12 PM PDT 24 Jul 05 05:20:14 PM PDT 24 32440836 ps
T706 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.2052476320 Jul 05 05:20:31 PM PDT 24 Jul 05 05:23:16 PM PDT 24 3403622904 ps
T707 /workspace/coverage/default/19.sram_ctrl_regwen.4303172 Jul 05 05:17:56 PM PDT 24 Jul 05 05:25:01 PM PDT 24 1595836827 ps
T708 /workspace/coverage/default/3.sram_ctrl_stress_all.836098335 Jul 05 05:17:05 PM PDT 24 Jul 05 05:43:05 PM PDT 24 19316390001 ps
T709 /workspace/coverage/default/23.sram_ctrl_executable.1065419647 Jul 05 05:18:17 PM PDT 24 Jul 05 05:36:41 PM PDT 24 87957896487 ps
T710 /workspace/coverage/default/16.sram_ctrl_partial_access.732967981 Jul 05 05:17:57 PM PDT 24 Jul 05 05:18:22 PM PDT 24 376826675 ps
T711 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.2186522156 Jul 05 05:18:03 PM PDT 24 Jul 05 05:18:11 PM PDT 24 180238563 ps
T712 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1427159220 Jul 05 05:17:29 PM PDT 24 Jul 05 05:18:34 PM PDT 24 900054136 ps
T713 /workspace/coverage/default/27.sram_ctrl_smoke.2674586805 Jul 05 05:18:37 PM PDT 24 Jul 05 05:18:49 PM PDT 24 2162796073 ps
T714 /workspace/coverage/default/11.sram_ctrl_lc_escalation.872322576 Jul 05 05:17:33 PM PDT 24 Jul 05 05:17:37 PM PDT 24 198277661 ps
T715 /workspace/coverage/default/20.sram_ctrl_partial_access.2600385492 Jul 05 05:18:02 PM PDT 24 Jul 05 05:18:49 PM PDT 24 519055836 ps
T716 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.1655780925 Jul 05 05:17:59 PM PDT 24 Jul 05 05:18:03 PM PDT 24 199777476 ps
T717 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.2424250265 Jul 05 05:19:33 PM PDT 24 Jul 05 05:21:50 PM PDT 24 7667890770 ps
T718 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3256471858 Jul 05 05:17:15 PM PDT 24 Jul 05 05:21:53 PM PDT 24 14534855699 ps
T719 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.2362129869 Jul 05 05:20:31 PM PDT 24 Jul 05 05:20:38 PM PDT 24 3042716874 ps
T720 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.2536781988 Jul 05 05:17:35 PM PDT 24 Jul 05 05:21:57 PM PDT 24 17014968145 ps
T721 /workspace/coverage/default/37.sram_ctrl_stress_all.256671041 Jul 05 05:19:54 PM PDT 24 Jul 05 05:49:13 PM PDT 24 42630475150 ps
T722 /workspace/coverage/default/42.sram_ctrl_lc_escalation.2891057132 Jul 05 05:20:33 PM PDT 24 Jul 05 05:20:44 PM PDT 24 1020978667 ps
T103 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1359977095 Jul 05 05:20:32 PM PDT 24 Jul 05 05:23:55 PM PDT 24 10274647914 ps
T723 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.1188785170 Jul 05 05:17:49 PM PDT 24 Jul 05 05:20:33 PM PDT 24 447357521 ps
T724 /workspace/coverage/default/1.sram_ctrl_executable.900027243 Jul 05 05:17:03 PM PDT 24 Jul 05 05:21:08 PM PDT 24 3366239533 ps
T725 /workspace/coverage/default/17.sram_ctrl_executable.2264526148 Jul 05 05:17:49 PM PDT 24 Jul 05 05:30:10 PM PDT 24 32125579306 ps
T726 /workspace/coverage/default/3.sram_ctrl_multiple_keys.1639159151 Jul 05 05:17:08 PM PDT 24 Jul 05 05:28:57 PM PDT 24 36344515620 ps
T727 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.2825435359 Jul 05 05:17:40 PM PDT 24 Jul 05 05:22:57 PM PDT 24 6369555669 ps
T728 /workspace/coverage/default/2.sram_ctrl_alert_test.3711804993 Jul 05 05:17:10 PM PDT 24 Jul 05 05:17:12 PM PDT 24 55309036 ps
T729 /workspace/coverage/default/25.sram_ctrl_regwen.941598243 Jul 05 05:18:33 PM PDT 24 Jul 05 05:42:13 PM PDT 24 13309618598 ps
T26 /workspace/coverage/default/1.sram_ctrl_sec_cm.2709160015 Jul 05 05:17:14 PM PDT 24 Jul 05 05:17:17 PM PDT 24 319130240 ps
T730 /workspace/coverage/default/35.sram_ctrl_executable.4107895823 Jul 05 05:19:31 PM PDT 24 Jul 05 05:39:39 PM PDT 24 9090203165 ps
T731 /workspace/coverage/default/24.sram_ctrl_mem_walk.3415409244 Jul 05 05:18:24 PM PDT 24 Jul 05 05:18:30 PM PDT 24 311831434 ps
T732 /workspace/coverage/default/38.sram_ctrl_partial_access.3695901818 Jul 05 05:19:57 PM PDT 24 Jul 05 05:20:23 PM PDT 24 1535245701 ps
T733 /workspace/coverage/default/16.sram_ctrl_smoke.324756403 Jul 05 05:17:46 PM PDT 24 Jul 05 05:18:01 PM PDT 24 215764635 ps
T734 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.675394597 Jul 05 05:17:10 PM PDT 24 Jul 05 05:17:15 PM PDT 24 331818547 ps
T735 /workspace/coverage/default/15.sram_ctrl_multiple_keys.3372629130 Jul 05 05:17:35 PM PDT 24 Jul 05 05:27:05 PM PDT 24 2008398567 ps
T736 /workspace/coverage/default/36.sram_ctrl_partial_access.1731295121 Jul 05 05:19:46 PM PDT 24 Jul 05 05:20:08 PM PDT 24 5900357405 ps
T737 /workspace/coverage/default/0.sram_ctrl_executable.2140503029 Jul 05 05:17:03 PM PDT 24 Jul 05 05:32:45 PM PDT 24 6243204070 ps
T738 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.3666139372 Jul 05 05:18:09 PM PDT 24 Jul 05 05:19:13 PM PDT 24 1855822905 ps
T739 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.3176014054 Jul 05 05:18:44 PM PDT 24 Jul 05 05:21:59 PM PDT 24 7999742213 ps
T740 /workspace/coverage/default/39.sram_ctrl_multiple_keys.2829937796 Jul 05 05:20:09 PM PDT 24 Jul 05 05:39:25 PM PDT 24 3245354466 ps
T741 /workspace/coverage/default/1.sram_ctrl_partial_access.2247476172 Jul 05 05:17:03 PM PDT 24 Jul 05 05:19:26 PM PDT 24 230680948 ps
T742 /workspace/coverage/default/42.sram_ctrl_ram_cfg.1613588562 Jul 05 05:20:41 PM PDT 24 Jul 05 05:20:42 PM PDT 24 28181498 ps
T743 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3524058269 Jul 05 05:19:46 PM PDT 24 Jul 05 05:26:52 PM PDT 24 70140426771 ps
T744 /workspace/coverage/default/48.sram_ctrl_alert_test.3648792848 Jul 05 05:21:35 PM PDT 24 Jul 05 05:21:36 PM PDT 24 13163134 ps
T745 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.2847694672 Jul 05 05:18:38 PM PDT 24 Jul 05 05:18:42 PM PDT 24 90775528 ps
T746 /workspace/coverage/default/44.sram_ctrl_multiple_keys.2541727862 Jul 05 05:20:53 PM PDT 24 Jul 05 05:29:12 PM PDT 24 3770307362 ps
T747 /workspace/coverage/default/0.sram_ctrl_smoke.347849466 Jul 05 05:17:15 PM PDT 24 Jul 05 05:17:32 PM PDT 24 2952379966 ps
T748 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.3180518703 Jul 05 05:18:31 PM PDT 24 Jul 05 05:23:10 PM PDT 24 25264189441 ps
T749 /workspace/coverage/default/46.sram_ctrl_bijection.1808833517 Jul 05 05:21:06 PM PDT 24 Jul 05 05:22:06 PM PDT 24 3525161828 ps
T750 /workspace/coverage/default/49.sram_ctrl_ram_cfg.890621782 Jul 05 05:21:43 PM PDT 24 Jul 05 05:21:45 PM PDT 24 29058080 ps
T751 /workspace/coverage/default/8.sram_ctrl_bijection.3509731980 Jul 05 05:17:30 PM PDT 24 Jul 05 05:18:29 PM PDT 24 3186548800 ps
T752 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.4155053247 Jul 05 05:20:10 PM PDT 24 Jul 05 05:22:37 PM PDT 24 210748644 ps
T753 /workspace/coverage/default/9.sram_ctrl_alert_test.524658957 Jul 05 05:17:34 PM PDT 24 Jul 05 05:17:36 PM PDT 24 12307569 ps
T754 /workspace/coverage/default/37.sram_ctrl_partial_access.1528419395 Jul 05 05:19:45 PM PDT 24 Jul 05 05:19:51 PM PDT 24 414073345 ps
T755 /workspace/coverage/default/17.sram_ctrl_partial_access.2608653418 Jul 05 05:17:49 PM PDT 24 Jul 05 05:19:26 PM PDT 24 189485077 ps
T756 /workspace/coverage/default/34.sram_ctrl_smoke.521464359 Jul 05 05:19:28 PM PDT 24 Jul 05 05:19:41 PM PDT 24 1315934943 ps
T757 /workspace/coverage/default/17.sram_ctrl_bijection.981185315 Jul 05 05:17:49 PM PDT 24 Jul 05 05:18:18 PM PDT 24 783461120 ps
T758 /workspace/coverage/default/30.sram_ctrl_lc_escalation.524701930 Jul 05 05:18:58 PM PDT 24 Jul 05 05:19:02 PM PDT 24 283867967 ps
T759 /workspace/coverage/default/44.sram_ctrl_alert_test.3076050543 Jul 05 05:20:59 PM PDT 24 Jul 05 05:21:00 PM PDT 24 47040658 ps
T760 /workspace/coverage/default/4.sram_ctrl_executable.1275421447 Jul 05 05:17:13 PM PDT 24 Jul 05 05:28:19 PM PDT 24 7153718318 ps
T761 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3955054677 Jul 05 05:21:13 PM PDT 24 Jul 05 05:25:42 PM PDT 24 20374342974 ps
T762 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1660068474 Jul 05 05:21:28 PM PDT 24 Jul 05 05:21:49 PM PDT 24 1248475731 ps
T763 /workspace/coverage/default/48.sram_ctrl_partial_access.560050150 Jul 05 05:21:28 PM PDT 24 Jul 05 05:21:32 PM PDT 24 174783701 ps
T764 /workspace/coverage/default/19.sram_ctrl_alert_test.3983832364 Jul 05 05:18:04 PM PDT 24 Jul 05 05:18:06 PM PDT 24 24920762 ps
T765 /workspace/coverage/default/46.sram_ctrl_alert_test.3046952832 Jul 05 05:21:14 PM PDT 24 Jul 05 05:21:15 PM PDT 24 23166135 ps
T766 /workspace/coverage/default/25.sram_ctrl_smoke.1250873296 Jul 05 05:18:30 PM PDT 24 Jul 05 05:19:51 PM PDT 24 405853260 ps
T767 /workspace/coverage/default/26.sram_ctrl_executable.1244656233 Jul 05 05:18:39 PM PDT 24 Jul 05 05:33:40 PM PDT 24 5552249072 ps
T768 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.2093442030 Jul 05 05:17:06 PM PDT 24 Jul 05 05:29:24 PM PDT 24 5499605917 ps
T769 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.4287459716 Jul 05 05:18:31 PM PDT 24 Jul 05 05:39:08 PM PDT 24 13167553499 ps
T770 /workspace/coverage/default/20.sram_ctrl_mem_walk.537202834 Jul 05 05:18:03 PM PDT 24 Jul 05 05:18:11 PM PDT 24 348609106 ps
T771 /workspace/coverage/default/37.sram_ctrl_smoke.2931669277 Jul 05 05:19:47 PM PDT 24 Jul 05 05:20:04 PM PDT 24 66810315 ps
T772 /workspace/coverage/default/20.sram_ctrl_ram_cfg.1341323919 Jul 05 05:18:02 PM PDT 24 Jul 05 05:18:04 PM PDT 24 46744239 ps
T773 /workspace/coverage/default/18.sram_ctrl_partial_access.169049326 Jul 05 05:17:49 PM PDT 24 Jul 05 05:19:03 PM PDT 24 167085048 ps
T774 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.1039263793 Jul 05 05:17:01 PM PDT 24 Jul 05 05:22:10 PM PDT 24 10580845494 ps
T775 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.2942635379 Jul 05 05:19:48 PM PDT 24 Jul 05 05:19:51 PM PDT 24 93962039 ps
T776 /workspace/coverage/default/17.sram_ctrl_lc_escalation.1109948621 Jul 05 05:17:48 PM PDT 24 Jul 05 05:17:56 PM PDT 24 1750245544 ps
T777 /workspace/coverage/default/3.sram_ctrl_executable.3200793503 Jul 05 05:17:14 PM PDT 24 Jul 05 05:31:17 PM PDT 24 4802239452 ps
T778 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2377051162 Jul 05 05:17:22 PM PDT 24 Jul 05 05:17:30 PM PDT 24 68526707 ps
T779 /workspace/coverage/default/27.sram_ctrl_bijection.3628275742 Jul 05 05:18:37 PM PDT 24 Jul 05 05:18:55 PM PDT 24 769735436 ps
T780 /workspace/coverage/default/28.sram_ctrl_alert_test.881127931 Jul 05 05:18:45 PM PDT 24 Jul 05 05:18:47 PM PDT 24 13315570 ps
T781 /workspace/coverage/default/0.sram_ctrl_bijection.2983752281 Jul 05 05:16:59 PM PDT 24 Jul 05 05:18:13 PM PDT 24 3847269988 ps
T782 /workspace/coverage/default/47.sram_ctrl_regwen.1836280520 Jul 05 05:21:20 PM PDT 24 Jul 05 05:36:48 PM PDT 24 50553635038 ps
T783 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.2983162205 Jul 05 05:21:30 PM PDT 24 Jul 05 05:39:33 PM PDT 24 6600766308 ps
T784 /workspace/coverage/default/47.sram_ctrl_stress_all.891551179 Jul 05 05:21:30 PM PDT 24 Jul 05 05:43:06 PM PDT 24 91997648211 ps
T785 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.1656421279 Jul 05 05:18:51 PM PDT 24 Jul 05 05:23:13 PM PDT 24 2529599041 ps
T786 /workspace/coverage/default/23.sram_ctrl_smoke.2455164720 Jul 05 05:18:16 PM PDT 24 Jul 05 05:19:09 PM PDT 24 564783197 ps
T787 /workspace/coverage/default/39.sram_ctrl_mem_walk.149463362 Jul 05 05:20:12 PM PDT 24 Jul 05 05:20:25 PM PDT 24 1748883631 ps
T788 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1445937237 Jul 05 05:17:21 PM PDT 24 Jul 05 05:23:46 PM PDT 24 5011473263 ps
T789 /workspace/coverage/default/14.sram_ctrl_lc_escalation.3836718598 Jul 05 05:17:43 PM PDT 24 Jul 05 05:17:53 PM PDT 24 3317662500 ps
T790 /workspace/coverage/default/3.sram_ctrl_max_throughput.3715335538 Jul 05 05:17:13 PM PDT 24 Jul 05 05:17:20 PM PDT 24 142287499 ps
T791 /workspace/coverage/default/11.sram_ctrl_max_throughput.715222775 Jul 05 05:17:30 PM PDT 24 Jul 05 05:18:24 PM PDT 24 111469410 ps
T792 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.729035312 Jul 05 05:19:30 PM PDT 24 Jul 05 05:22:21 PM PDT 24 2424198448 ps
T793 /workspace/coverage/default/6.sram_ctrl_lc_escalation.2418268100 Jul 05 05:17:14 PM PDT 24 Jul 05 05:17:23 PM PDT 24 1013275560 ps
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