Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1031
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
84.53 84.53 95.93 95.93 81.87 81.87 91.85 91.85 71.43 71.43 86.71 86.71 94.25 94.25 69.65 69.65 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1079834847
90.34 5.81 97.71 1.78 87.20 5.33 97.64 5.79 80.95 9.52 92.27 5.56 95.43 1.18 81.17 11.52 /workspace/coverage/default/10.sram_ctrl_stress_all.4121069147
93.89 3.55 98.73 1.02 87.32 0.12 97.78 0.14 100.00 19.05 94.20 1.93 96.17 0.74 83.00 1.83 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.2653485113
94.89 1.01 98.90 0.17 88.15 0.83 97.99 0.21 100.00 0.00 94.93 0.72 96.17 0.00 88.12 5.12 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1299225647
95.63 0.74 99.07 0.17 90.17 2.01 98.75 0.76 100.00 0.00 95.65 0.72 96.76 0.59 89.03 0.91 /workspace/coverage/default/2.sram_ctrl_sec_cm.2966513437
96.18 0.55 99.07 0.00 90.17 0.00 98.75 0.00 100.00 0.00 95.65 0.00 96.76 0.00 92.87 3.84 /workspace/coverage/default/21.sram_ctrl_stress_all.2345809450
96.52 0.34 99.07 0.00 90.17 0.00 98.75 0.00 100.00 0.00 95.89 0.24 96.90 0.15 94.88 2.01 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1207448684
96.76 0.24 99.07 0.00 90.52 0.36 98.75 0.00 100.00 0.00 96.14 0.24 97.79 0.88 95.06 0.18 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.3956026373
96.95 0.19 99.07 0.00 90.52 0.00 98.75 0.00 100.00 0.00 96.14 0.00 99.12 1.33 95.06 0.00 /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.463442089
97.08 0.13 99.15 0.08 90.52 0.00 99.58 0.83 100.00 0.00 96.14 0.00 99.12 0.00 95.06 0.00 /workspace/coverage/default/0.sram_ctrl_ram_cfg.1590908196
97.19 0.10 99.15 0.00 90.52 0.00 99.58 0.00 100.00 0.00 96.14 0.00 99.12 0.00 95.80 0.73 /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3334198330
97.27 0.09 99.15 0.00 90.88 0.36 99.65 0.07 100.00 0.00 96.14 0.00 99.12 0.00 95.98 0.18 /workspace/coverage/default/0.sram_ctrl_alert_test.55528412
97.34 0.07 99.15 0.00 91.00 0.12 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.34 0.37 /workspace/coverage/default/30.sram_ctrl_regwen.3719813149
97.39 0.05 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.71 0.37 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3142147428
97.45 0.05 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.37 /workspace/coverage/default/13.sram_ctrl_stress_all.3379512829
97.47 0.03 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1681724574
97.50 0.03 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/default/12.sram_ctrl_lc_escalation.1697406017
97.51 0.01 99.15 0.00 91.00 0.00 99.72 0.07 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.00 /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.945637908

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1892376695
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3224461758
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.4000012898
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3570926932
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3686931257
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3238897015
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2965320274
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.352348766
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.4194162049
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3994842611
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2067837615
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.454591661
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2215376318
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2964874846
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3567713169
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1094164911
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2782992436
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.577587583
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1531857019
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2014251831
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.353892056
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1070360879
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1279950665
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1922360713
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.4086370560
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.22847118
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3435749865
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3193460522
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2597304340
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.135162076
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.60691241
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3857099611
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.978110680
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3103201192
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3929476129
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.631612481
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1279593399
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2496196270
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.2535334163
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.827974601
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1380898583
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2524104691
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2782729005
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.254693205
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3786822944
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2022555700
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2093080115
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1454330336
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1610242602
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3351288497
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.882394031
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.3898771759
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3351439040
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1073176365
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2766450195
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.256361947
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.4180377386
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2439773722
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1148721573
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1161254787
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.489709707
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3309267193
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3190008415
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3435851680
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.706019449
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2844195340
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3080080864
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.4017463774
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1190733793
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3687364812
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.800459239
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2635821238
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2555478796
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.4184135212
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.27414948
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3293211138
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3039674940
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.271863400
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2400949619
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2591814180
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.759211939
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2247582960
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.517509988
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.629279571
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3458127619
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3415595771
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.545054656
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3995549988
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3196732858
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.344772901
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2958243198
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3674997531
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2421455499
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.4225968938
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1924654358
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3255900672
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1865611747
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.585971271
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2313922487
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1302381267
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1537506784
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2532970757
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3247160140
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3285754087
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.4103563045
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1610338067
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2918402254
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.582043479
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.399624728
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3616021313
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.122077761
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.973890000
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2459996011
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.4292385944
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2645901513
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.4290463331
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2382921496
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3195423711
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2760572602
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3583293635
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.59418989
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3971049464
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2656324049
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3601799541
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.4004989880
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1792799987
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1453994723
/workspace/coverage/default/0.sram_ctrl_bijection.2983752281
/workspace/coverage/default/0.sram_ctrl_executable.2140503029
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1614400369
/workspace/coverage/default/0.sram_ctrl_max_throughput.1358676374
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.4223687188
/workspace/coverage/default/0.sram_ctrl_mem_walk.2312772921
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1387740375
/workspace/coverage/default/0.sram_ctrl_partial_access.1698754647
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.964401260
/workspace/coverage/default/0.sram_ctrl_regwen.3280699347
/workspace/coverage/default/0.sram_ctrl_sec_cm.364628978
/workspace/coverage/default/0.sram_ctrl_smoke.347849466
/workspace/coverage/default/0.sram_ctrl_stress_all.3554759217
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2117049800
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.28890835
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1846683130
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1841183280
/workspace/coverage/default/1.sram_ctrl_alert_test.3483088452
/workspace/coverage/default/1.sram_ctrl_bijection.1906285008
/workspace/coverage/default/1.sram_ctrl_executable.900027243
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3930825092
/workspace/coverage/default/1.sram_ctrl_max_throughput.1540721066
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.4215224844
/workspace/coverage/default/1.sram_ctrl_mem_walk.2702858907
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1200403851
/workspace/coverage/default/1.sram_ctrl_partial_access.2247476172
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1406294539
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1268689936
/workspace/coverage/default/1.sram_ctrl_regwen.1038862859
/workspace/coverage/default/1.sram_ctrl_sec_cm.2709160015
/workspace/coverage/default/1.sram_ctrl_smoke.2542329784
/workspace/coverage/default/1.sram_ctrl_stress_all.3014465679
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2969569228
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1039263793
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3899916102
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3546033470
/workspace/coverage/default/10.sram_ctrl_alert_test.2573450922
/workspace/coverage/default/10.sram_ctrl_bijection.762662859
/workspace/coverage/default/10.sram_ctrl_executable.3935110646
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2915276959
/workspace/coverage/default/10.sram_ctrl_max_throughput.26169455
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.540944556
/workspace/coverage/default/10.sram_ctrl_mem_walk.4052884342
/workspace/coverage/default/10.sram_ctrl_multiple_keys.4157931248
/workspace/coverage/default/10.sram_ctrl_partial_access.1904313436
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3397973701
/workspace/coverage/default/10.sram_ctrl_ram_cfg.762478539
/workspace/coverage/default/10.sram_ctrl_regwen.663738201
/workspace/coverage/default/10.sram_ctrl_smoke.427974925
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3205146978
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.200329775
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1427159220
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2241633369
/workspace/coverage/default/11.sram_ctrl_alert_test.930731415
/workspace/coverage/default/11.sram_ctrl_bijection.1110212530
/workspace/coverage/default/11.sram_ctrl_executable.4098079969
/workspace/coverage/default/11.sram_ctrl_lc_escalation.872322576
/workspace/coverage/default/11.sram_ctrl_max_throughput.715222775
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.639241444
/workspace/coverage/default/11.sram_ctrl_mem_walk.1917728092
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2461729478
/workspace/coverage/default/11.sram_ctrl_partial_access.2760571183
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1076934831
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3839744347
/workspace/coverage/default/11.sram_ctrl_regwen.2836963202
/workspace/coverage/default/11.sram_ctrl_smoke.1428200978
/workspace/coverage/default/11.sram_ctrl_stress_all.2729688884
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.994558345
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2536781988
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1622658671
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3740190490
/workspace/coverage/default/12.sram_ctrl_alert_test.82039370
/workspace/coverage/default/12.sram_ctrl_bijection.2890738959
/workspace/coverage/default/12.sram_ctrl_executable.396630956
/workspace/coverage/default/12.sram_ctrl_max_throughput.2356778327
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1492693220
/workspace/coverage/default/12.sram_ctrl_mem_walk.368881845
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1545822797
/workspace/coverage/default/12.sram_ctrl_partial_access.1383545819
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1800420398
/workspace/coverage/default/12.sram_ctrl_ram_cfg.1066848617
/workspace/coverage/default/12.sram_ctrl_regwen.752612231
/workspace/coverage/default/12.sram_ctrl_smoke.2506119451
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/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2248363055
/workspace/coverage/default/43.sram_ctrl_mem_walk.1374590773
/workspace/coverage/default/43.sram_ctrl_multiple_keys.1859565568
/workspace/coverage/default/43.sram_ctrl_partial_access.115586977
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3170854980
/workspace/coverage/default/43.sram_ctrl_ram_cfg.1802636037
/workspace/coverage/default/43.sram_ctrl_regwen.3094212831
/workspace/coverage/default/43.sram_ctrl_smoke.2362810321
/workspace/coverage/default/43.sram_ctrl_stress_all.2449845290
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3939915423
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.207723175
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2454948195
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3805022318
/workspace/coverage/default/44.sram_ctrl_alert_test.3076050543
/workspace/coverage/default/44.sram_ctrl_bijection.3595806618
/workspace/coverage/default/44.sram_ctrl_executable.3478224758
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1761590271
/workspace/coverage/default/44.sram_ctrl_max_throughput.423598216
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.4043507615
/workspace/coverage/default/44.sram_ctrl_mem_walk.4250509551
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2541727862
/workspace/coverage/default/44.sram_ctrl_partial_access.981957943
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1679495121
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1262483857
/workspace/coverage/default/44.sram_ctrl_regwen.1148760556
/workspace/coverage/default/44.sram_ctrl_smoke.729487635
/workspace/coverage/default/44.sram_ctrl_stress_all.2928536754
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.10130712
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2670025856
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2391120721
/workspace/coverage/default/45.sram_ctrl_alert_test.4221499992
/workspace/coverage/default/45.sram_ctrl_bijection.1759601189
/workspace/coverage/default/45.sram_ctrl_executable.686397169
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3718450548
/workspace/coverage/default/45.sram_ctrl_max_throughput.2283930304
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1885821704
/workspace/coverage/default/45.sram_ctrl_mem_walk.1919112522
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3357954171
/workspace/coverage/default/45.sram_ctrl_partial_access.3889420727
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2954437651
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1525860595
/workspace/coverage/default/45.sram_ctrl_regwen.1898665408
/workspace/coverage/default/45.sram_ctrl_smoke.2562075399
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.153095766
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3296583030
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3649644129
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1389601088
/workspace/coverage/default/46.sram_ctrl_alert_test.3046952832
/workspace/coverage/default/46.sram_ctrl_bijection.1808833517
/workspace/coverage/default/46.sram_ctrl_executable.4221949063
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1016147657
/workspace/coverage/default/46.sram_ctrl_max_throughput.4072830502
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1833335762
/workspace/coverage/default/46.sram_ctrl_mem_walk.1131155937
/workspace/coverage/default/46.sram_ctrl_multiple_keys.4045054683
/workspace/coverage/default/46.sram_ctrl_partial_access.1793893573
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3955054677
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1103838568
/workspace/coverage/default/46.sram_ctrl_regwen.1606822486
/workspace/coverage/default/46.sram_ctrl_smoke.948745298
/workspace/coverage/default/46.sram_ctrl_stress_all.823941572
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1866842839
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.4214859268
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2266302392
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2434005704
/workspace/coverage/default/47.sram_ctrl_alert_test.3696938730
/workspace/coverage/default/47.sram_ctrl_bijection.1826011603
/workspace/coverage/default/47.sram_ctrl_executable.3651963895
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3354659179
/workspace/coverage/default/47.sram_ctrl_max_throughput.2634275034
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.608308705
/workspace/coverage/default/47.sram_ctrl_mem_walk.2077965043
/workspace/coverage/default/47.sram_ctrl_multiple_keys.96770220
/workspace/coverage/default/47.sram_ctrl_partial_access.1552696043
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3819496362
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3069793624
/workspace/coverage/default/47.sram_ctrl_regwen.1836280520
/workspace/coverage/default/47.sram_ctrl_smoke.4190540277
/workspace/coverage/default/47.sram_ctrl_stress_all.891551179
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.4198002693
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.246208042
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.878354971
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2983162205
/workspace/coverage/default/48.sram_ctrl_alert_test.3648792848
/workspace/coverage/default/48.sram_ctrl_bijection.2041797219
/workspace/coverage/default/48.sram_ctrl_executable.2386917014
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1801253156
/workspace/coverage/default/48.sram_ctrl_max_throughput.999961784
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.4178632829
/workspace/coverage/default/48.sram_ctrl_mem_walk.991123700
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3321859467
/workspace/coverage/default/48.sram_ctrl_partial_access.560050150
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3523153102
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3761707064
/workspace/coverage/default/48.sram_ctrl_regwen.3420256201
/workspace/coverage/default/48.sram_ctrl_smoke.2628559257
/workspace/coverage/default/48.sram_ctrl_stress_all.1462470395
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.4012247934
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2328809600
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1660068474
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.277619590
/workspace/coverage/default/49.sram_ctrl_alert_test.536030877
/workspace/coverage/default/49.sram_ctrl_bijection.67201066
/workspace/coverage/default/49.sram_ctrl_executable.1721159470
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1093535176
/workspace/coverage/default/49.sram_ctrl_max_throughput.3353107402
/workspace/coverage/default/49.sram_ctrl_mem_walk.3738319011
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2038586647
/workspace/coverage/default/49.sram_ctrl_partial_access.1008425728
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1151925995
/workspace/coverage/default/49.sram_ctrl_ram_cfg.890621782
/workspace/coverage/default/49.sram_ctrl_regwen.3306460273
/workspace/coverage/default/49.sram_ctrl_smoke.3178027798
/workspace/coverage/default/49.sram_ctrl_stress_all.118331464
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.4119517367
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3806309160
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.267501849
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2826903577
/workspace/coverage/default/5.sram_ctrl_alert_test.3164764879
/workspace/coverage/default/5.sram_ctrl_bijection.1036018902
/workspace/coverage/default/5.sram_ctrl_executable.550649272
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1095393797
/workspace/coverage/default/5.sram_ctrl_max_throughput.3065647237
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1888896813
/workspace/coverage/default/5.sram_ctrl_mem_walk.1404211611
/workspace/coverage/default/5.sram_ctrl_multiple_keys.831885077
/workspace/coverage/default/5.sram_ctrl_partial_access.2571427190
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2058331990
/workspace/coverage/default/5.sram_ctrl_ram_cfg.918447345
/workspace/coverage/default/5.sram_ctrl_regwen.3472698546
/workspace/coverage/default/5.sram_ctrl_smoke.1090319657
/workspace/coverage/default/5.sram_ctrl_stress_all.3519643597
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1404382927
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.549533148
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3529720545
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.803207280
/workspace/coverage/default/6.sram_ctrl_alert_test.577733630
/workspace/coverage/default/6.sram_ctrl_bijection.1101675624
/workspace/coverage/default/6.sram_ctrl_executable.793742918
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2418268100
/workspace/coverage/default/6.sram_ctrl_max_throughput.4015478077
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2493000843
/workspace/coverage/default/6.sram_ctrl_mem_walk.3714863134
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2840004159
/workspace/coverage/default/6.sram_ctrl_partial_access.3305403531
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3256471858
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2721765827
/workspace/coverage/default/6.sram_ctrl_regwen.873483760
/workspace/coverage/default/6.sram_ctrl_smoke.1167678991
/workspace/coverage/default/6.sram_ctrl_stress_all.1824153878
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.474150567
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3962853061
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1679359855
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1758933890
/workspace/coverage/default/7.sram_ctrl_alert_test.3786282491
/workspace/coverage/default/7.sram_ctrl_bijection.1239120470
/workspace/coverage/default/7.sram_ctrl_executable.3372723272
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3852149052
/workspace/coverage/default/7.sram_ctrl_max_throughput.1497635688
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3218060913
/workspace/coverage/default/7.sram_ctrl_mem_walk.111355192
/workspace/coverage/default/7.sram_ctrl_multiple_keys.958723462
/workspace/coverage/default/7.sram_ctrl_partial_access.257187435
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1445937237
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2807179553
/workspace/coverage/default/7.sram_ctrl_regwen.377501261
/workspace/coverage/default/7.sram_ctrl_smoke.2689159623
/workspace/coverage/default/7.sram_ctrl_stress_all.3088420212
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.497553895
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2346251075
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.165385190
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1826971200
/workspace/coverage/default/8.sram_ctrl_alert_test.3675842443
/workspace/coverage/default/8.sram_ctrl_bijection.3509731980
/workspace/coverage/default/8.sram_ctrl_executable.1272536327
/workspace/coverage/default/8.sram_ctrl_lc_escalation.796676434
/workspace/coverage/default/8.sram_ctrl_max_throughput.712239142
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.4080686657
/workspace/coverage/default/8.sram_ctrl_mem_walk.2900527770
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3180464176
/workspace/coverage/default/8.sram_ctrl_partial_access.984845889
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3780823337
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1019812490
/workspace/coverage/default/8.sram_ctrl_regwen.3224166897
/workspace/coverage/default/8.sram_ctrl_smoke.445217087
/workspace/coverage/default/8.sram_ctrl_stress_all.2229123212
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3069111662
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.4255808435
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2431927625
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2033209574
/workspace/coverage/default/9.sram_ctrl_alert_test.524658957
/workspace/coverage/default/9.sram_ctrl_bijection.506672107
/workspace/coverage/default/9.sram_ctrl_executable.2670931740
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1729642631
/workspace/coverage/default/9.sram_ctrl_max_throughput.3688744564
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1240065327
/workspace/coverage/default/9.sram_ctrl_mem_walk.2293398446
/workspace/coverage/default/9.sram_ctrl_multiple_keys.172450110
/workspace/coverage/default/9.sram_ctrl_partial_access.3347241943
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.583601435
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3719131731
/workspace/coverage/default/9.sram_ctrl_regwen.1024683049
/workspace/coverage/default/9.sram_ctrl_smoke.401797834
/workspace/coverage/default/9.sram_ctrl_stress_all.1259411464
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1948764598
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.164467096
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2377051162



Total test records in report: 1031
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1079834847 Jul 05 05:19:27 PM PDT 24 Jul 05 05:19:53 PM PDT 24 2739354788 ps
T2 /workspace/coverage/default/0.sram_ctrl_alert_test.55528412 Jul 05 05:17:02 PM PDT 24 Jul 05 05:17:05 PM PDT 24 11945768 ps
T3 /workspace/coverage/default/10.sram_ctrl_stress_all.4121069147 Jul 05 05:17:29 PM PDT 24 Jul 05 05:42:15 PM PDT 24 42887380709 ps
T4 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.2628449534 Jul 05 05:18:38 PM PDT 24 Jul 05 05:18:42 PM PDT 24 328013823 ps
T8 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.2689262617 Jul 05 05:18:16 PM PDT 24 Jul 05 05:22:09 PM PDT 24 5296707290 ps
T9 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.4165735448 Jul 05 05:18:54 PM PDT 24 Jul 05 05:20:17 PM PDT 24 1336165829 ps
T10 /workspace/coverage/default/12.sram_ctrl_ram_cfg.1066848617 Jul 05 05:17:35 PM PDT 24 Jul 05 05:17:37 PM PDT 24 74248678 ps
T5 /workspace/coverage/default/1.sram_ctrl_regwen.1038862859 Jul 05 05:17:04 PM PDT 24 Jul 05 05:20:07 PM PDT 24 401586204 ps
T11 /workspace/coverage/default/47.sram_ctrl_mem_walk.2077965043 Jul 05 05:21:28 PM PDT 24 Jul 05 05:21:36 PM PDT 24 333979139 ps
T12 /workspace/coverage/default/9.sram_ctrl_bijection.506672107 Jul 05 05:17:33 PM PDT 24 Jul 05 05:18:04 PM PDT 24 21615054132 ps
T21 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.3464553750 Jul 05 05:18:11 PM PDT 24 Jul 05 05:19:50 PM PDT 24 16552568623 ps
T13 /workspace/coverage/default/4.sram_ctrl_alert_test.1551833089 Jul 05 05:17:28 PM PDT 24 Jul 05 05:17:31 PM PDT 24 33507293 ps
T36 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.4153228934 Jul 05 05:19:33 PM PDT 24 Jul 05 05:19:39 PM PDT 24 304664217 ps
T37 /workspace/coverage/default/43.sram_ctrl_mem_walk.1374590773 Jul 05 05:20:45 PM PDT 24 Jul 05 05:20:58 PM PDT 24 792566568 ps
T39 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.1758933890 Jul 05 05:17:32 PM PDT 24 Jul 05 05:30:51 PM PDT 24 2013153032 ps
T58 /workspace/coverage/default/37.sram_ctrl_max_throughput.771858335 Jul 05 05:19:48 PM PDT 24 Jul 05 05:19:55 PM PDT 24 55856776 ps
T23 /workspace/coverage/default/34.sram_ctrl_ram_cfg.3836027124 Jul 05 05:19:31 PM PDT 24 Jul 05 05:19:32 PM PDT 24 73109631 ps
T6 /workspace/coverage/default/49.sram_ctrl_lc_escalation.1093535176 Jul 05 05:21:43 PM PDT 24 Jul 05 05:21:48 PM PDT 24 497109117 ps
T7 /workspace/coverage/default/30.sram_ctrl_stress_all.4073581672 Jul 05 05:19:08 PM PDT 24 Jul 05 06:14:29 PM PDT 24 287847643332 ps
T22 /workspace/coverage/default/0.sram_ctrl_stress_all.3554759217 Jul 05 05:16:57 PM PDT 24 Jul 05 06:02:41 PM PDT 24 34518287929 ps
T38 /workspace/coverage/default/0.sram_ctrl_mem_walk.2312772921 Jul 05 05:17:03 PM PDT 24 Jul 05 05:17:17 PM PDT 24 2728365225 ps
T96 /workspace/coverage/default/41.sram_ctrl_multiple_keys.2871639364 Jul 05 05:20:21 PM PDT 24 Jul 05 05:37:10 PM PDT 24 19930954909 ps
T55 /workspace/coverage/default/9.sram_ctrl_regwen.1024683049 Jul 05 05:17:28 PM PDT 24 Jul 05 05:31:45 PM PDT 24 16266514779 ps
T72 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1207448684 Jul 05 05:17:43 PM PDT 24 Jul 05 05:24:32 PM PDT 24 16766063757 ps
T137 /workspace/coverage/default/16.sram_ctrl_max_throughput.1339254588 Jul 05 05:17:42 PM PDT 24 Jul 05 05:19:02 PM PDT 24 120529469 ps
T73 /workspace/coverage/default/34.sram_ctrl_multiple_keys.2064720948 Jul 05 05:19:24 PM PDT 24 Jul 05 05:34:20 PM PDT 24 47483122910 ps
T138 /workspace/coverage/default/1.sram_ctrl_bijection.1906285008 Jul 05 05:16:59 PM PDT 24 Jul 05 05:17:46 PM PDT 24 20075106095 ps
T139 /workspace/coverage/default/10.sram_ctrl_multiple_keys.4157931248 Jul 05 05:17:28 PM PDT 24 Jul 05 05:21:35 PM PDT 24 1088886737 ps
T18 /workspace/coverage/default/27.sram_ctrl_regwen.2344066146 Jul 05 05:18:37 PM PDT 24 Jul 05 05:32:47 PM PDT 24 53353974108 ps
T140 /workspace/coverage/default/2.sram_ctrl_multiple_keys.1500743421 Jul 05 05:17:17 PM PDT 24 Jul 05 05:36:34 PM PDT 24 48462583489 ps
T24 /workspace/coverage/default/15.sram_ctrl_ram_cfg.957840904 Jul 05 05:17:48 PM PDT 24 Jul 05 05:17:51 PM PDT 24 71234251 ps
T59 /workspace/coverage/default/21.sram_ctrl_stress_all.2345809450 Jul 05 05:18:12 PM PDT 24 Jul 05 06:25:38 PM PDT 24 11356590833 ps
T60 /workspace/coverage/default/0.sram_ctrl_lc_escalation.1614400369 Jul 05 05:16:58 PM PDT 24 Jul 05 05:17:06 PM PDT 24 810894880 ps
T92 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2633506077 Jul 05 05:18:09 PM PDT 24 Jul 05 05:26:05 PM PDT 24 96561001029 ps
T61 /workspace/coverage/default/21.sram_ctrl_lc_escalation.1981516218 Jul 05 05:18:08 PM PDT 24 Jul 05 05:18:16 PM PDT 24 981925949 ps
T141 /workspace/coverage/default/31.sram_ctrl_ram_cfg.1812616749 Jul 05 05:19:18 PM PDT 24 Jul 05 05:19:19 PM PDT 24 183281775 ps
T134 /workspace/coverage/default/41.sram_ctrl_executable.267371881 Jul 05 05:20:32 PM PDT 24 Jul 05 05:30:55 PM PDT 24 8632843748 ps
T93 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.549533148 Jul 05 05:17:15 PM PDT 24 Jul 05 05:18:49 PM PDT 24 989736412 ps
T136 /workspace/coverage/default/11.sram_ctrl_executable.4098079969 Jul 05 05:17:30 PM PDT 24 Jul 05 05:17:38 PM PDT 24 262782931 ps
T142 /workspace/coverage/default/41.sram_ctrl_max_throughput.1188693134 Jul 05 05:20:26 PM PDT 24 Jul 05 05:20:44 PM PDT 24 308377353 ps
T94 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.2002252692 Jul 05 05:19:25 PM PDT 24 Jul 05 05:23:24 PM PDT 24 2649951392 ps
T126 /workspace/coverage/default/18.sram_ctrl_regwen.145672961 Jul 05 05:17:58 PM PDT 24 Jul 05 05:32:16 PM PDT 24 82102854000 ps
T14 /workspace/coverage/default/11.sram_ctrl_alert_test.930731415 Jul 05 05:17:32 PM PDT 24 Jul 05 05:17:34 PM PDT 24 16306351 ps
T143 /workspace/coverage/default/9.sram_ctrl_ram_cfg.3719131731 Jul 05 05:17:24 PM PDT 24 Jul 05 05:17:26 PM PDT 24 108829983 ps
T20 /workspace/coverage/default/41.sram_ctrl_stress_all.3753722003 Jul 05 05:20:31 PM PDT 24 Jul 05 05:48:05 PM PDT 24 23971904731 ps
T144 /workspace/coverage/default/4.sram_ctrl_partial_access.1362670337 Jul 05 05:17:10 PM PDT 24 Jul 05 05:18:53 PM PDT 24 1471341780 ps
T130 /workspace/coverage/default/21.sram_ctrl_executable.3664960438 Jul 05 05:18:08 PM PDT 24 Jul 05 05:28:51 PM PDT 24 8114791923 ps
T45 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.2454040168 Jul 05 05:17:53 PM PDT 24 Jul 05 05:31:04 PM PDT 24 2531592160 ps
T145 /workspace/coverage/default/23.sram_ctrl_alert_test.1083000401 Jul 05 05:18:27 PM PDT 24 Jul 05 05:18:29 PM PDT 24 14754547 ps
T146 /workspace/coverage/default/10.sram_ctrl_bijection.762662859 Jul 05 05:17:31 PM PDT 24 Jul 05 05:18:17 PM PDT 24 704859733 ps
T147 /workspace/coverage/default/25.sram_ctrl_alert_test.2172185329 Jul 05 05:18:38 PM PDT 24 Jul 05 05:18:40 PM PDT 24 27624095 ps
T148 /workspace/coverage/default/23.sram_ctrl_partial_access.342595998 Jul 05 05:18:19 PM PDT 24 Jul 05 05:19:20 PM PDT 24 2101462855 ps
T149 /workspace/coverage/default/12.sram_ctrl_max_throughput.2356778327 Jul 05 05:17:37 PM PDT 24 Jul 05 05:18:50 PM PDT 24 126893736 ps
T132 /workspace/coverage/default/31.sram_ctrl_multiple_keys.2849520693 Jul 05 05:19:07 PM PDT 24 Jul 05 05:26:51 PM PDT 24 10089491340 ps
T78 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.1283682515 Jul 05 05:20:12 PM PDT 24 Jul 05 05:20:19 PM PDT 24 64292282 ps
T46 /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.1644559818 Jul 05 05:17:13 PM PDT 24 Jul 05 05:21:09 PM PDT 24 2540339443 ps
T79 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.3956026373 Jul 05 05:21:43 PM PDT 24 Jul 05 05:21:50 PM PDT 24 597309266 ps
T47 /workspace/coverage/default/11.sram_ctrl_mem_walk.1917728092 Jul 05 05:17:28 PM PDT 24 Jul 05 05:17:36 PM PDT 24 4853127721 ps
T135 /workspace/coverage/default/12.sram_ctrl_lc_escalation.1697406017 Jul 05 05:17:36 PM PDT 24 Jul 05 05:17:45 PM PDT 24 1673080327 ps
T150 /workspace/coverage/default/0.sram_ctrl_max_throughput.1358676374 Jul 05 05:16:56 PM PDT 24 Jul 05 05:18:25 PM PDT 24 478450276 ps
T151 /workspace/coverage/default/28.sram_ctrl_ram_cfg.3557127826 Jul 05 05:18:45 PM PDT 24 Jul 05 05:18:46 PM PDT 24 29553320 ps
T15 /workspace/coverage/default/2.sram_ctrl_sec_cm.2966513437 Jul 05 05:17:13 PM PDT 24 Jul 05 05:17:17 PM PDT 24 454755462 ps
T27 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.3205140208 Jul 05 05:19:29 PM PDT 24 Jul 05 05:19:35 PM PDT 24 690575208 ps
T28 /workspace/coverage/default/13.sram_ctrl_executable.955842460 Jul 05 05:17:34 PM PDT 24 Jul 05 05:40:22 PM PDT 24 3968515129 ps
T29 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.508156353 Jul 05 05:17:08 PM PDT 24 Jul 05 05:19:50 PM PDT 24 6400801032 ps
T30 /workspace/coverage/default/12.sram_ctrl_alert_test.82039370 Jul 05 05:17:38 PM PDT 24 Jul 05 05:17:40 PM PDT 24 21998336 ps
T31 /workspace/coverage/default/29.sram_ctrl_smoke.521540452 Jul 05 05:18:45 PM PDT 24 Jul 05 05:18:48 PM PDT 24 156789320 ps
T32 /workspace/coverage/default/9.sram_ctrl_lc_escalation.1729642631 Jul 05 05:17:18 PM PDT 24 Jul 05 05:17:23 PM PDT 24 1236584374 ps
T33 /workspace/coverage/default/21.sram_ctrl_mem_walk.3817612673 Jul 05 05:18:09 PM PDT 24 Jul 05 05:18:16 PM PDT 24 2480122929 ps
T34 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.1447643897 Jul 05 05:17:41 PM PDT 24 Jul 05 05:21:31 PM PDT 24 2411381433 ps
T35 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.639241444 Jul 05 05:17:41 PM PDT 24 Jul 05 05:17:45 PM PDT 24 112388746 ps
T133 /workspace/coverage/default/13.sram_ctrl_smoke.576095442 Jul 05 05:17:43 PM PDT 24 Jul 05 05:19:19 PM PDT 24 554781111 ps
T152 /workspace/coverage/default/23.sram_ctrl_max_throughput.3727228926 Jul 05 05:18:17 PM PDT 24 Jul 05 05:18:39 PM PDT 24 124325502 ps
T48 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2517690624 Jul 05 05:20:38 PM PDT 24 Jul 05 05:25:54 PM PDT 24 3478134956 ps
T153 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.267501849 Jul 05 05:21:42 PM PDT 24 Jul 05 05:23:21 PM PDT 24 159030373 ps
T19 /workspace/coverage/default/30.sram_ctrl_regwen.3719813149 Jul 05 05:18:58 PM PDT 24 Jul 05 05:45:16 PM PDT 24 23709283044 ps
T154 /workspace/coverage/default/2.sram_ctrl_partial_access.984262418 Jul 05 05:17:05 PM PDT 24 Jul 05 05:18:36 PM PDT 24 553743891 ps
T110 /workspace/coverage/default/6.sram_ctrl_stress_all.1824153878 Jul 05 05:17:18 PM PDT 24 Jul 05 05:21:57 PM PDT 24 1632839886 ps
T131 /workspace/coverage/default/12.sram_ctrl_multiple_keys.1545822797 Jul 05 05:17:29 PM PDT 24 Jul 05 05:40:18 PM PDT 24 29059108587 ps
T155 /workspace/coverage/default/30.sram_ctrl_smoke.3677083070 Jul 05 05:19:00 PM PDT 24 Jul 05 05:19:23 PM PDT 24 291238185 ps
T42 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.2653485113 Jul 05 05:17:41 PM PDT 24 Jul 05 05:17:59 PM PDT 24 2057623645 ps
T49 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1404382927 Jul 05 05:17:19 PM PDT 24 Jul 05 05:18:40 PM PDT 24 1817210634 ps
T105 /workspace/coverage/default/8.sram_ctrl_executable.1272536327 Jul 05 05:17:22 PM PDT 24 Jul 05 05:32:06 PM PDT 24 15164549241 ps
T40 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.3326483332 Jul 05 05:20:17 PM PDT 24 Jul 05 05:23:04 PM PDT 24 1293617016 ps
T106 /workspace/coverage/default/0.sram_ctrl_ram_cfg.1590908196 Jul 05 05:17:04 PM PDT 24 Jul 05 05:17:08 PM PDT 24 130506889 ps
T95 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.710286861 Jul 05 05:18:33 PM PDT 24 Jul 05 05:23:39 PM PDT 24 11784786686 ps
T107 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3397973701 Jul 05 05:17:27 PM PDT 24 Jul 05 05:22:01 PM PDT 24 12882372535 ps
T50 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.154289042 Jul 05 05:19:07 PM PDT 24 Jul 05 05:19:13 PM PDT 24 90991447 ps
T108 /workspace/coverage/default/34.sram_ctrl_stress_all.4094511169 Jul 05 05:19:31 PM PDT 24 Jul 05 06:27:38 PM PDT 24 557740812827 ps
T109 /workspace/coverage/default/31.sram_ctrl_lc_escalation.3485718300 Jul 05 05:19:04 PM PDT 24 Jul 05 05:19:08 PM PDT 24 2332929412 ps
T156 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3819496362 Jul 05 05:21:20 PM PDT 24 Jul 05 05:28:08 PM PDT 24 15636809790 ps
T157 /workspace/coverage/default/46.sram_ctrl_smoke.948745298 Jul 05 05:21:06 PM PDT 24 Jul 05 05:21:17 PM PDT 24 519320227 ps
T158 /workspace/coverage/default/45.sram_ctrl_executable.686397169 Jul 05 05:21:04 PM PDT 24 Jul 05 05:30:23 PM PDT 24 7839380538 ps
T159 /workspace/coverage/default/29.sram_ctrl_mem_walk.3439501836 Jul 05 05:19:01 PM PDT 24 Jul 05 05:19:15 PM PDT 24 2623232555 ps
T160 /workspace/coverage/default/14.sram_ctrl_executable.4263670383 Jul 05 05:18:10 PM PDT 24 Jul 05 05:32:11 PM PDT 24 7526002115 ps
T161 /workspace/coverage/default/30.sram_ctrl_bijection.1171712948 Jul 05 05:19:00 PM PDT 24 Jul 05 05:19:42 PM PDT 24 2715174818 ps
T162 /workspace/coverage/default/19.sram_ctrl_executable.2875817544 Jul 05 05:17:58 PM PDT 24 Jul 05 05:21:12 PM PDT 24 6666638574 ps
T163 /workspace/coverage/default/26.sram_ctrl_ram_cfg.3564462802 Jul 05 05:18:40 PM PDT 24 Jul 05 05:18:42 PM PDT 24 27848838 ps
T164 /workspace/coverage/default/48.sram_ctrl_lc_escalation.1801253156 Jul 05 05:21:33 PM PDT 24 Jul 05 05:21:40 PM PDT 24 1856148864 ps
T165 /workspace/coverage/default/44.sram_ctrl_regwen.1148760556 Jul 05 05:20:50 PM PDT 24 Jul 05 05:40:56 PM PDT 24 3456954381 ps
T41 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.1056203571 Jul 05 05:19:58 PM PDT 24 Jul 05 05:42:28 PM PDT 24 19852641606 ps
T166 /workspace/coverage/default/16.sram_ctrl_multiple_keys.3014762720 Jul 05 05:17:44 PM PDT 24 Jul 05 05:35:07 PM PDT 24 4609643992 ps
T167 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.4193886790 Jul 05 05:17:10 PM PDT 24 Jul 05 05:18:51 PM PDT 24 568488072 ps
T168 /workspace/coverage/default/4.sram_ctrl_mem_walk.3544303234 Jul 05 05:17:21 PM PDT 24 Jul 05 05:17:28 PM PDT 24 1174888756 ps
T169 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.1936637523 Jul 05 05:17:43 PM PDT 24 Jul 05 05:17:47 PM PDT 24 404756153 ps
T170 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.4043507615 Jul 05 05:20:58 PM PDT 24 Jul 05 05:21:04 PM PDT 24 154010449 ps
T171 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2316774258 Jul 05 05:19:25 PM PDT 24 Jul 05 05:21:31 PM PDT 24 305719350 ps
T172 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.1340134078 Jul 05 05:19:43 PM PDT 24 Jul 05 05:24:57 PM PDT 24 6191023677 ps
T173 /workspace/coverage/default/5.sram_ctrl_executable.550649272 Jul 05 05:17:18 PM PDT 24 Jul 05 05:23:45 PM PDT 24 1842810006 ps
T174 /workspace/coverage/default/14.sram_ctrl_regwen.2464645803 Jul 05 05:17:33 PM PDT 24 Jul 05 05:35:46 PM PDT 24 49273592661 ps
T111 /workspace/coverage/default/35.sram_ctrl_stress_all.3450534283 Jul 05 05:19:38 PM PDT 24 Jul 05 06:03:12 PM PDT 24 79790587689 ps
T175 /workspace/coverage/default/19.sram_ctrl_stress_all.3914439414 Jul 05 05:18:01 PM PDT 24 Jul 05 05:56:43 PM PDT 24 35055134491 ps
T56 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3939915423 Jul 05 05:20:44 PM PDT 24 Jul 05 05:20:57 PM PDT 24 1482294563 ps
T176 /workspace/coverage/default/45.sram_ctrl_regwen.1898665408 Jul 05 05:21:06 PM PDT 24 Jul 05 05:37:05 PM PDT 24 5613749707 ps
T177 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.1376089531 Jul 05 05:18:19 PM PDT 24 Jul 05 05:18:26 PM PDT 24 2388370332 ps
T178 /workspace/coverage/default/18.sram_ctrl_stress_all.2269678581 Jul 05 05:18:01 PM PDT 24 Jul 05 05:55:49 PM PDT 24 165101661414 ps
T179 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.2583652555 Jul 05 05:17:57 PM PDT 24 Jul 05 05:18:47 PM PDT 24 485087445 ps
T180 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.734186117 Jul 05 05:17:57 PM PDT 24 Jul 05 05:19:49 PM PDT 24 374025883 ps
T181 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2266302392 Jul 05 05:21:13 PM PDT 24 Jul 05 05:21:52 PM PDT 24 103856357 ps
T182 /workspace/coverage/default/49.sram_ctrl_smoke.3178027798 Jul 05 05:21:35 PM PDT 24 Jul 05 05:21:53 PM PDT 24 3148759329 ps
T183 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.1910816669 Jul 05 05:18:14 PM PDT 24 Jul 05 05:21:56 PM PDT 24 8535865660 ps
T184 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.890226823 Jul 05 05:17:12 PM PDT 24 Jul 05 05:26:25 PM PDT 24 27013942254 ps
T185 /workspace/coverage/default/23.sram_ctrl_ram_cfg.157763753 Jul 05 05:18:18 PM PDT 24 Jul 05 05:18:20 PM PDT 24 99479665 ps
T186 /workspace/coverage/default/16.sram_ctrl_alert_test.369347750 Jul 05 05:17:42 PM PDT 24 Jul 05 05:17:44 PM PDT 24 16552949 ps
T187 /workspace/coverage/default/26.sram_ctrl_max_throughput.2983787180 Jul 05 05:18:32 PM PDT 24 Jul 05 05:18:57 PM PDT 24 88044005 ps
T188 /workspace/coverage/default/38.sram_ctrl_ram_cfg.2987539032 Jul 05 05:19:59 PM PDT 24 Jul 05 05:20:01 PM PDT 24 47710055 ps
T189 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.164467096 Jul 05 05:17:28 PM PDT 24 Jul 05 05:22:28 PM PDT 24 12918455799 ps
T190 /workspace/coverage/default/47.sram_ctrl_partial_access.1552696043 Jul 05 05:21:21 PM PDT 24 Jul 05 05:24:04 PM PDT 24 1250249286 ps
T191 /workspace/coverage/default/2.sram_ctrl_regwen.4213614018 Jul 05 05:17:08 PM PDT 24 Jul 05 05:34:36 PM PDT 24 24274034782 ps
T192 /workspace/coverage/default/23.sram_ctrl_lc_escalation.457245873 Jul 05 05:18:16 PM PDT 24 Jul 05 05:18:20 PM PDT 24 251513298 ps
T57 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.4198002693 Jul 05 05:21:29 PM PDT 24 Jul 05 05:21:40 PM PDT 24 289200743 ps
T193 /workspace/coverage/default/37.sram_ctrl_alert_test.3945090842 Jul 05 05:19:52 PM PDT 24 Jul 05 05:19:53 PM PDT 24 15975828 ps
T194 /workspace/coverage/default/9.sram_ctrl_partial_access.3347241943 Jul 05 05:17:32 PM PDT 24 Jul 05 05:19:59 PM PDT 24 676959803 ps
T195 /workspace/coverage/default/15.sram_ctrl_smoke.1778136090 Jul 05 05:17:43 PM PDT 24 Jul 05 05:17:57 PM PDT 24 606861024 ps
T196 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3001817172 Jul 05 05:20:05 PM PDT 24 Jul 05 05:28:08 PM PDT 24 73786861705 ps
T197 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1846683130 Jul 05 05:17:05 PM PDT 24 Jul 05 05:19:27 PM PDT 24 622296340 ps
T198 /workspace/coverage/default/41.sram_ctrl_mem_walk.3267731642 Jul 05 05:20:34 PM PDT 24 Jul 05 05:20:40 PM PDT 24 237488709 ps
T199 /workspace/coverage/default/2.sram_ctrl_lc_escalation.2255543910 Jul 05 05:17:10 PM PDT 24 Jul 05 05:17:16 PM PDT 24 513947631 ps
T200 /workspace/coverage/default/41.sram_ctrl_alert_test.514649048 Jul 05 05:20:31 PM PDT 24 Jul 05 05:20:32 PM PDT 24 95752363 ps
T201 /workspace/coverage/default/18.sram_ctrl_max_throughput.3454769636 Jul 05 05:17:50 PM PDT 24 Jul 05 05:20:00 PM PDT 24 515779846 ps
T202 /workspace/coverage/default/21.sram_ctrl_alert_test.1847460269 Jul 05 05:18:09 PM PDT 24 Jul 05 05:18:11 PM PDT 24 15730323 ps
T203 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.1888896813 Jul 05 05:17:24 PM PDT 24 Jul 05 05:17:28 PM PDT 24 80009326 ps
T204 /workspace/coverage/default/26.sram_ctrl_partial_access.1147288080 Jul 05 05:18:33 PM PDT 24 Jul 05 05:18:39 PM PDT 24 435111217 ps
T205 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.3837628414 Jul 05 05:19:19 PM PDT 24 Jul 05 05:33:59 PM PDT 24 9616881766 ps
T206 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3588193512 Jul 05 05:18:39 PM PDT 24 Jul 05 05:20:20 PM PDT 24 209588064 ps
T207 /workspace/coverage/default/20.sram_ctrl_max_throughput.2948076607 Jul 05 05:18:02 PM PDT 24 Jul 05 05:18:11 PM PDT 24 217237364 ps
T208 /workspace/coverage/default/12.sram_ctrl_executable.396630956 Jul 05 05:17:36 PM PDT 24 Jul 05 05:43:33 PM PDT 24 30950928792 ps
T209 /workspace/coverage/default/15.sram_ctrl_bijection.3552475808 Jul 05 05:17:44 PM PDT 24 Jul 05 05:18:33 PM PDT 24 5858898180 ps
T210 /workspace/coverage/default/10.sram_ctrl_lc_escalation.2915276959 Jul 05 05:17:35 PM PDT 24 Jul 05 05:17:40 PM PDT 24 1001998673 ps
T211 /workspace/coverage/default/18.sram_ctrl_smoke.3234614319 Jul 05 05:17:48 PM PDT 24 Jul 05 05:18:04 PM PDT 24 255348774 ps
T212 /workspace/coverage/default/1.sram_ctrl_max_throughput.1540721066 Jul 05 05:16:58 PM PDT 24 Jul 05 05:17:13 PM PDT 24 69826306 ps
T213 /workspace/coverage/default/8.sram_ctrl_smoke.445217087 Jul 05 05:17:24 PM PDT 24 Jul 05 05:18:15 PM PDT 24 1333434676 ps
T214 /workspace/coverage/default/17.sram_ctrl_max_throughput.4282708912 Jul 05 05:17:46 PM PDT 24 Jul 05 05:18:01 PM PDT 24 142368871 ps
T215 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.3412111710 Jul 05 05:20:38 PM PDT 24 Jul 05 05:20:41 PM PDT 24 47272383 ps
T216 /workspace/coverage/default/29.sram_ctrl_ram_cfg.219511583 Jul 05 05:18:59 PM PDT 24 Jul 05 05:19:00 PM PDT 24 78346841 ps
T217 /workspace/coverage/default/10.sram_ctrl_partial_access.1904313436 Jul 05 05:17:37 PM PDT 24 Jul 05 05:17:40 PM PDT 24 44284684 ps
T218 /workspace/coverage/default/46.sram_ctrl_stress_all.823941572 Jul 05 05:21:13 PM PDT 24 Jul 05 06:01:46 PM PDT 24 25032540308 ps
T97 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3205146978 Jul 05 05:17:38 PM PDT 24 Jul 05 05:18:27 PM PDT 24 3460596733 ps
T43 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.4012247934 Jul 05 05:21:42 PM PDT 24 Jul 05 05:22:06 PM PDT 24 1540700838 ps
T219 /workspace/coverage/default/39.sram_ctrl_regwen.743685955 Jul 05 05:20:10 PM PDT 24 Jul 05 05:30:32 PM PDT 24 31260580668 ps
T127 /workspace/coverage/default/20.sram_ctrl_executable.711877685 Jul 05 05:18:03 PM PDT 24 Jul 05 05:47:49 PM PDT 24 52524276135 ps
T220 /workspace/coverage/default/36.sram_ctrl_alert_test.4290138984 Jul 05 05:19:44 PM PDT 24 Jul 05 05:19:45 PM PDT 24 15986115 ps
T221 /workspace/coverage/default/28.sram_ctrl_executable.1408274740 Jul 05 05:18:47 PM PDT 24 Jul 05 05:40:18 PM PDT 24 52932059735 ps
T222 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.10130712 Jul 05 05:20:53 PM PDT 24 Jul 05 05:27:00 PM PDT 24 58230148180 ps
T223 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2431927625 Jul 05 05:17:22 PM PDT 24 Jul 05 05:17:25 PM PDT 24 141783404 ps
T224 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.1163236122 Jul 05 05:20:01 PM PDT 24 Jul 05 05:26:32 PM PDT 24 28782694323 ps
T225 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.4215224844 Jul 05 05:17:00 PM PDT 24 Jul 05 05:17:06 PM PDT 24 443763956 ps
T226 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.1926150152 Jul 05 05:18:15 PM PDT 24 Jul 05 05:26:27 PM PDT 24 2996515022 ps
T227 /workspace/coverage/default/25.sram_ctrl_mem_walk.1465548757 Jul 05 05:18:30 PM PDT 24 Jul 05 05:18:45 PM PDT 24 4024845124 ps
T228 /workspace/coverage/default/5.sram_ctrl_multiple_keys.831885077 Jul 05 05:17:20 PM PDT 24 Jul 05 05:32:19 PM PDT 24 51010886157 ps
T229 /workspace/coverage/default/39.sram_ctrl_bijection.1609030991 Jul 05 05:20:06 PM PDT 24 Jul 05 05:21:05 PM PDT 24 13664134659 ps
T230 /workspace/coverage/default/13.sram_ctrl_lc_escalation.3363738204 Jul 05 05:17:36 PM PDT 24 Jul 05 05:17:47 PM PDT 24 3437165262 ps
T231 /workspace/coverage/default/30.sram_ctrl_mem_walk.2005194466 Jul 05 05:18:57 PM PDT 24 Jul 05 05:19:04 PM PDT 24 1432549831 ps
T232 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.3914512809 Jul 05 05:18:20 PM PDT 24 Jul 05 05:22:53 PM PDT 24 5553228138 ps
T233 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.608308705 Jul 05 05:21:28 PM PDT 24 Jul 05 05:21:32 PM PDT 24 191116040 ps
T234 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.4172688154 Jul 05 05:17:08 PM PDT 24 Jul 05 05:22:14 PM PDT 24 22657154121 ps
T235 /workspace/coverage/default/49.sram_ctrl_bijection.67201066 Jul 05 05:21:40 PM PDT 24 Jul 05 05:22:33 PM PDT 24 13019461357 ps
T236 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1509552181 Jul 05 05:17:38 PM PDT 24 Jul 05 05:24:32 PM PDT 24 5356491703 ps
T237 /workspace/coverage/default/44.sram_ctrl_max_throughput.423598216 Jul 05 05:20:52 PM PDT 24 Jul 05 05:20:55 PM PDT 24 219152381 ps
T238 /workspace/coverage/default/49.sram_ctrl_regwen.3306460273 Jul 05 05:21:41 PM PDT 24 Jul 05 05:45:53 PM PDT 24 41611853031 ps
T239 /workspace/coverage/default/26.sram_ctrl_regwen.1677622311 Jul 05 05:18:41 PM PDT 24 Jul 05 05:43:02 PM PDT 24 140574216484 ps
T240 /workspace/coverage/default/34.sram_ctrl_mem_walk.137255782 Jul 05 05:19:32 PM PDT 24 Jul 05 05:19:44 PM PDT 24 688539821 ps
T241 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1622658671 Jul 05 05:17:40 PM PDT 24 Jul 05 05:17:42 PM PDT 24 65574966 ps
T242 /workspace/coverage/default/40.sram_ctrl_mem_walk.3991606455 Jul 05 05:20:17 PM PDT 24 Jul 05 05:20:23 PM PDT 24 243437448 ps
T243 /workspace/coverage/default/9.sram_ctrl_multiple_keys.172450110 Jul 05 05:17:24 PM PDT 24 Jul 05 05:30:45 PM PDT 24 4324443777 ps
T244 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1083950326 Jul 05 05:20:13 PM PDT 24 Jul 05 05:23:47 PM PDT 24 948025641 ps
T245 /workspace/coverage/default/37.sram_ctrl_executable.3408312752 Jul 05 05:19:44 PM PDT 24 Jul 05 05:37:37 PM PDT 24 25111634229 ps
T246 /workspace/coverage/default/7.sram_ctrl_smoke.2689159623 Jul 05 05:17:15 PM PDT 24 Jul 05 05:17:58 PM PDT 24 359299243 ps
T247 /workspace/coverage/default/44.sram_ctrl_executable.3478224758 Jul 05 05:20:53 PM PDT 24 Jul 05 05:31:54 PM PDT 24 10548384315 ps
T248 /workspace/coverage/default/43.sram_ctrl_multiple_keys.1859565568 Jul 05 05:20:37 PM PDT 24 Jul 05 05:38:42 PM PDT 24 20204011373 ps
T128 /workspace/coverage/default/23.sram_ctrl_stress_all.1561281577 Jul 05 05:18:20 PM PDT 24 Jul 05 06:15:11 PM PDT 24 50710180723 ps
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T303 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3478957682 Jul 05 05:17:50 PM PDT 24 Jul 05 05:24:03 PM PDT 24 58429872586 ps
T304 /workspace/coverage/default/40.sram_ctrl_lc_escalation.68333972 Jul 05 05:20:19 PM PDT 24 Jul 05 05:20:28 PM PDT 24 2773546889 ps
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