| T550 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.533255368 |
|
|
Jul 10 05:16:52 PM PDT 24 |
Jul 10 05:23:40 PM PDT 24 |
16610371434 ps |
| T551 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2032951362 |
|
|
Jul 10 05:16:53 PM PDT 24 |
Jul 10 05:22:02 PM PDT 24 |
41312280130 ps |
| T552 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.1512535540 |
|
|
Jul 10 05:18:27 PM PDT 24 |
Jul 10 05:20:08 PM PDT 24 |
1186244622 ps |
| T553 |
/workspace/coverage/default/17.sram_ctrl_partial_access.1498157638 |
|
|
Jul 10 05:16:50 PM PDT 24 |
Jul 10 05:16:58 PM PDT 24 |
355920187 ps |
| T554 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2303480714 |
|
|
Jul 10 05:16:23 PM PDT 24 |
Jul 10 05:16:27 PM PDT 24 |
203176934 ps |
| T555 |
/workspace/coverage/default/25.sram_ctrl_partial_access.1638491376 |
|
|
Jul 10 05:17:24 PM PDT 24 |
Jul 10 05:18:42 PM PDT 24 |
905366633 ps |
| T556 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.4036386673 |
|
|
Jul 10 05:18:23 PM PDT 24 |
Jul 10 05:23:32 PM PDT 24 |
20701317827 ps |
| T557 |
/workspace/coverage/default/2.sram_ctrl_executable.4241605075 |
|
|
Jul 10 05:16:12 PM PDT 24 |
Jul 10 05:17:23 PM PDT 24 |
702161899 ps |
| T558 |
/workspace/coverage/default/31.sram_ctrl_bijection.3041944353 |
|
|
Jul 10 05:17:47 PM PDT 24 |
Jul 10 05:18:13 PM PDT 24 |
6673540811 ps |
| T559 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.2576153358 |
|
|
Jul 10 05:18:33 PM PDT 24 |
Jul 10 05:23:29 PM PDT 24 |
14084732081 ps |
| T560 |
/workspace/coverage/default/39.sram_ctrl_bijection.2246237342 |
|
|
Jul 10 05:18:38 PM PDT 24 |
Jul 10 05:19:50 PM PDT 24 |
4023787036 ps |
| T561 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.3285546170 |
|
|
Jul 10 05:16:47 PM PDT 24 |
Jul 10 05:23:16 PM PDT 24 |
1841250877 ps |
| T562 |
/workspace/coverage/default/6.sram_ctrl_regwen.1095307222 |
|
|
Jul 10 05:16:22 PM PDT 24 |
Jul 10 05:17:48 PM PDT 24 |
599220691 ps |
| T563 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.2365138686 |
|
|
Jul 10 05:17:09 PM PDT 24 |
Jul 10 05:19:38 PM PDT 24 |
269129501 ps |
| T564 |
/workspace/coverage/default/49.sram_ctrl_stress_all.1090407647 |
|
|
Jul 10 05:20:02 PM PDT 24 |
Jul 10 05:43:19 PM PDT 24 |
28177613924 ps |
| T565 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3113658970 |
|
|
Jul 10 05:16:25 PM PDT 24 |
Jul 10 05:20:23 PM PDT 24 |
6058812746 ps |
| T566 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.177702115 |
|
|
Jul 10 05:17:42 PM PDT 24 |
Jul 10 05:21:31 PM PDT 24 |
9812349167 ps |
| T567 |
/workspace/coverage/default/8.sram_ctrl_alert_test.1527976463 |
|
|
Jul 10 05:16:31 PM PDT 24 |
Jul 10 05:16:35 PM PDT 24 |
50315712 ps |
| T568 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.3518865250 |
|
|
Jul 10 05:16:50 PM PDT 24 |
Jul 10 05:17:01 PM PDT 24 |
1982894572 ps |
| T569 |
/workspace/coverage/default/30.sram_ctrl_alert_test.4188772144 |
|
|
Jul 10 05:17:47 PM PDT 24 |
Jul 10 05:17:49 PM PDT 24 |
14141187 ps |
| T570 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.965771963 |
|
|
Jul 10 05:18:54 PM PDT 24 |
Jul 10 05:24:10 PM PDT 24 |
16889041173 ps |
| T571 |
/workspace/coverage/default/47.sram_ctrl_partial_access.1314911211 |
|
|
Jul 10 05:19:43 PM PDT 24 |
Jul 10 05:22:31 PM PDT 24 |
2500417050 ps |
| T572 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.1668873224 |
|
|
Jul 10 05:16:19 PM PDT 24 |
Jul 10 05:31:20 PM PDT 24 |
20359121513 ps |
| T573 |
/workspace/coverage/default/27.sram_ctrl_stress_all.3338190540 |
|
|
Jul 10 05:17:35 PM PDT 24 |
Jul 10 05:33:12 PM PDT 24 |
11215565354 ps |
| T574 |
/workspace/coverage/default/31.sram_ctrl_stress_all.3207815223 |
|
|
Jul 10 05:17:46 PM PDT 24 |
Jul 10 06:29:25 PM PDT 24 |
46122753857 ps |
| T575 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1848781569 |
|
|
Jul 10 05:19:22 PM PDT 24 |
Jul 10 05:19:26 PM PDT 24 |
149557320 ps |
| T576 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.3041430330 |
|
|
Jul 10 05:19:54 PM PDT 24 |
Jul 10 05:20:00 PM PDT 24 |
249687653 ps |
| T577 |
/workspace/coverage/default/35.sram_ctrl_regwen.3305388074 |
|
|
Jul 10 05:18:16 PM PDT 24 |
Jul 10 05:29:06 PM PDT 24 |
6265060359 ps |
| T578 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.3328796329 |
|
|
Jul 10 05:17:00 PM PDT 24 |
Jul 10 05:17:02 PM PDT 24 |
76780717 ps |
| T579 |
/workspace/coverage/default/34.sram_ctrl_partial_access.360582123 |
|
|
Jul 10 05:18:14 PM PDT 24 |
Jul 10 05:18:22 PM PDT 24 |
1537532150 ps |
| T580 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.14370149 |
|
|
Jul 10 05:18:26 PM PDT 24 |
Jul 10 05:20:56 PM PDT 24 |
583805430 ps |
| T581 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3752463147 |
|
|
Jul 10 05:16:14 PM PDT 24 |
Jul 10 05:16:16 PM PDT 24 |
40645282 ps |
| T582 |
/workspace/coverage/default/23.sram_ctrl_bijection.1369855609 |
|
|
Jul 10 05:17:08 PM PDT 24 |
Jul 10 05:17:49 PM PDT 24 |
2389031699 ps |
| T583 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.987120412 |
|
|
Jul 10 05:16:47 PM PDT 24 |
Jul 10 05:18:08 PM PDT 24 |
3665419533 ps |
| T584 |
/workspace/coverage/default/9.sram_ctrl_stress_all.3724013405 |
|
|
Jul 10 05:16:29 PM PDT 24 |
Jul 10 05:51:33 PM PDT 24 |
158214787183 ps |
| T585 |
/workspace/coverage/default/45.sram_ctrl_bijection.3455007887 |
|
|
Jul 10 05:19:26 PM PDT 24 |
Jul 10 05:19:51 PM PDT 24 |
686161228 ps |
| T586 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2796606157 |
|
|
Jul 10 05:16:32 PM PDT 24 |
Jul 10 05:16:36 PM PDT 24 |
90155309 ps |
| T587 |
/workspace/coverage/default/6.sram_ctrl_smoke.976894188 |
|
|
Jul 10 05:16:23 PM PDT 24 |
Jul 10 05:16:33 PM PDT 24 |
408027122 ps |
| T588 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.3758424295 |
|
|
Jul 10 05:16:17 PM PDT 24 |
Jul 10 05:16:20 PM PDT 24 |
126270791 ps |
| T99 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1353774464 |
|
|
Jul 10 05:18:05 PM PDT 24 |
Jul 10 05:18:13 PM PDT 24 |
485827126 ps |
| T589 |
/workspace/coverage/default/35.sram_ctrl_alert_test.2882352206 |
|
|
Jul 10 05:18:18 PM PDT 24 |
Jul 10 05:18:20 PM PDT 24 |
43608940 ps |
| T590 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.1215846515 |
|
|
Jul 10 05:18:28 PM PDT 24 |
Jul 10 05:18:34 PM PDT 24 |
810198542 ps |
| T591 |
/workspace/coverage/default/6.sram_ctrl_executable.3903767802 |
|
|
Jul 10 05:16:21 PM PDT 24 |
Jul 10 05:37:10 PM PDT 24 |
53778018265 ps |
| T592 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.1335192674 |
|
|
Jul 10 05:17:08 PM PDT 24 |
Jul 10 05:17:15 PM PDT 24 |
800641081 ps |
| T593 |
/workspace/coverage/default/45.sram_ctrl_alert_test.4110991869 |
|
|
Jul 10 05:19:31 PM PDT 24 |
Jul 10 05:19:33 PM PDT 24 |
12497941 ps |
| T594 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.2311816264 |
|
|
Jul 10 05:17:36 PM PDT 24 |
Jul 10 05:28:24 PM PDT 24 |
1812279274 ps |
| T595 |
/workspace/coverage/default/26.sram_ctrl_smoke.1142738678 |
|
|
Jul 10 05:17:23 PM PDT 24 |
Jul 10 05:17:31 PM PDT 24 |
104218586 ps |
| T596 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.667810889 |
|
|
Jul 10 05:16:50 PM PDT 24 |
Jul 10 05:16:59 PM PDT 24 |
276292134 ps |
| T597 |
/workspace/coverage/default/7.sram_ctrl_alert_test.1026699875 |
|
|
Jul 10 05:16:27 PM PDT 24 |
Jul 10 05:16:31 PM PDT 24 |
37752041 ps |
| T598 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.51173789 |
|
|
Jul 10 05:16:32 PM PDT 24 |
Jul 10 05:19:05 PM PDT 24 |
3994157241 ps |
| T599 |
/workspace/coverage/default/36.sram_ctrl_alert_test.1577200781 |
|
|
Jul 10 05:18:21 PM PDT 24 |
Jul 10 05:18:23 PM PDT 24 |
45230364 ps |
| T600 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.2318687160 |
|
|
Jul 10 05:19:05 PM PDT 24 |
Jul 10 05:42:05 PM PDT 24 |
14610271861 ps |
| T601 |
/workspace/coverage/default/25.sram_ctrl_alert_test.409489691 |
|
|
Jul 10 05:17:26 PM PDT 24 |
Jul 10 05:17:27 PM PDT 24 |
41572442 ps |
| T602 |
/workspace/coverage/default/48.sram_ctrl_bijection.3280458759 |
|
|
Jul 10 05:19:57 PM PDT 24 |
Jul 10 05:20:33 PM PDT 24 |
4591563519 ps |
| T603 |
/workspace/coverage/default/29.sram_ctrl_alert_test.3664915653 |
|
|
Jul 10 05:17:42 PM PDT 24 |
Jul 10 05:17:44 PM PDT 24 |
14349674 ps |
| T604 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.1780586510 |
|
|
Jul 10 05:16:27 PM PDT 24 |
Jul 10 05:16:41 PM PDT 24 |
572371236 ps |
| T605 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1256177938 |
|
|
Jul 10 05:16:48 PM PDT 24 |
Jul 10 05:24:19 PM PDT 24 |
1332552720 ps |
| T606 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1437373972 |
|
|
Jul 10 05:19:22 PM PDT 24 |
Jul 10 05:33:31 PM PDT 24 |
7772738993 ps |
| T607 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1914256751 |
|
|
Jul 10 05:19:27 PM PDT 24 |
Jul 10 05:24:13 PM PDT 24 |
3584030991 ps |
| T608 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2695001775 |
|
|
Jul 10 05:16:22 PM PDT 24 |
Jul 10 05:16:29 PM PDT 24 |
1426898025 ps |
| T609 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.249997671 |
|
|
Jul 10 05:16:25 PM PDT 24 |
Jul 10 05:41:04 PM PDT 24 |
15747746143 ps |
| T610 |
/workspace/coverage/default/49.sram_ctrl_partial_access.2303756174 |
|
|
Jul 10 05:19:58 PM PDT 24 |
Jul 10 05:20:16 PM PDT 24 |
325340213 ps |
| T611 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.60318513 |
|
|
Jul 10 05:17:58 PM PDT 24 |
Jul 10 05:27:05 PM PDT 24 |
4174937949 ps |
| T612 |
/workspace/coverage/default/40.sram_ctrl_smoke.430431864 |
|
|
Jul 10 05:18:55 PM PDT 24 |
Jul 10 05:20:19 PM PDT 24 |
671414157 ps |
| T613 |
/workspace/coverage/default/6.sram_ctrl_partial_access.2752028782 |
|
|
Jul 10 05:16:24 PM PDT 24 |
Jul 10 05:18:33 PM PDT 24 |
766812980 ps |
| T614 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3230465541 |
|
|
Jul 10 05:16:25 PM PDT 24 |
Jul 10 05:21:53 PM PDT 24 |
12541558611 ps |
| T615 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.3633711579 |
|
|
Jul 10 05:17:38 PM PDT 24 |
Jul 10 05:17:42 PM PDT 24 |
167663338 ps |
| T616 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.3251214728 |
|
|
Jul 10 05:17:38 PM PDT 24 |
Jul 10 05:17:51 PM PDT 24 |
4004600798 ps |
| T617 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.108893418 |
|
|
Jul 10 05:17:01 PM PDT 24 |
Jul 10 05:20:27 PM PDT 24 |
5824764124 ps |
| T618 |
/workspace/coverage/default/44.sram_ctrl_alert_test.2705020218 |
|
|
Jul 10 05:19:21 PM PDT 24 |
Jul 10 05:19:22 PM PDT 24 |
20183702 ps |
| T619 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.3665261560 |
|
|
Jul 10 05:17:41 PM PDT 24 |
Jul 10 05:21:10 PM PDT 24 |
7304030394 ps |
| T620 |
/workspace/coverage/default/47.sram_ctrl_smoke.1053046582 |
|
|
Jul 10 05:19:43 PM PDT 24 |
Jul 10 05:19:55 PM PDT 24 |
378271625 ps |
| T621 |
/workspace/coverage/default/2.sram_ctrl_regwen.2690388297 |
|
|
Jul 10 05:16:19 PM PDT 24 |
Jul 10 05:24:09 PM PDT 24 |
8324798977 ps |
| T622 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.4145831576 |
|
|
Jul 10 05:17:35 PM PDT 24 |
Jul 10 05:17:38 PM PDT 24 |
83219300 ps |
| T623 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.4280417557 |
|
|
Jul 10 05:16:28 PM PDT 24 |
Jul 10 05:16:44 PM PDT 24 |
166224183 ps |
| T624 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.1187857506 |
|
|
Jul 10 05:16:56 PM PDT 24 |
Jul 10 05:17:04 PM PDT 24 |
556247847 ps |
| T625 |
/workspace/coverage/default/39.sram_ctrl_alert_test.2366941954 |
|
|
Jul 10 05:18:54 PM PDT 24 |
Jul 10 05:18:55 PM PDT 24 |
24750624 ps |
| T626 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.541966472 |
|
|
Jul 10 05:17:42 PM PDT 24 |
Jul 10 05:19:43 PM PDT 24 |
359483827 ps |
| T627 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.3703411337 |
|
|
Jul 10 05:17:05 PM PDT 24 |
Jul 10 05:17:08 PM PDT 24 |
137578872 ps |
| T628 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.2593918468 |
|
|
Jul 10 05:18:45 PM PDT 24 |
Jul 10 05:18:49 PM PDT 24 |
101398232 ps |
| T629 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.2723139013 |
|
|
Jul 10 05:16:47 PM PDT 24 |
Jul 10 05:17:12 PM PDT 24 |
292353809 ps |
| T630 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.1853640410 |
|
|
Jul 10 05:19:05 PM PDT 24 |
Jul 10 05:46:10 PM PDT 24 |
185212323710 ps |
| T631 |
/workspace/coverage/default/13.sram_ctrl_alert_test.722232136 |
|
|
Jul 10 05:16:41 PM PDT 24 |
Jul 10 05:16:45 PM PDT 24 |
43274328 ps |
| T632 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1166196738 |
|
|
Jul 10 05:16:12 PM PDT 24 |
Jul 10 05:16:20 PM PDT 24 |
339440451 ps |
| T633 |
/workspace/coverage/default/0.sram_ctrl_alert_test.1696875387 |
|
|
Jul 10 05:16:05 PM PDT 24 |
Jul 10 05:16:12 PM PDT 24 |
64347090 ps |
| T634 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.1798795900 |
|
|
Jul 10 05:18:00 PM PDT 24 |
Jul 10 05:22:26 PM PDT 24 |
4121045818 ps |
| T635 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.3320984595 |
|
|
Jul 10 05:19:58 PM PDT 24 |
Jul 10 05:21:55 PM PDT 24 |
524854762 ps |
| T636 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.2740031958 |
|
|
Jul 10 05:16:39 PM PDT 24 |
Jul 10 05:21:27 PM PDT 24 |
6002719041 ps |
| T637 |
/workspace/coverage/default/47.sram_ctrl_bijection.1169647079 |
|
|
Jul 10 05:19:42 PM PDT 24 |
Jul 10 05:20:02 PM PDT 24 |
3965346970 ps |
| T638 |
/workspace/coverage/default/35.sram_ctrl_stress_all.2763438643 |
|
|
Jul 10 05:18:18 PM PDT 24 |
Jul 10 06:08:39 PM PDT 24 |
8882962969 ps |
| T100 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3480557410 |
|
|
Jul 10 05:16:18 PM PDT 24 |
Jul 10 05:17:07 PM PDT 24 |
1052115765 ps |
| T639 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.541777858 |
|
|
Jul 10 05:18:13 PM PDT 24 |
Jul 10 05:18:15 PM PDT 24 |
57771696 ps |
| T640 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.2022544826 |
|
|
Jul 10 05:19:05 PM PDT 24 |
Jul 10 05:28:24 PM PDT 24 |
13311829165 ps |
| T641 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.1663429571 |
|
|
Jul 10 05:16:53 PM PDT 24 |
Jul 10 05:18:05 PM PDT 24 |
103763571 ps |
| T642 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.919472678 |
|
|
Jul 10 05:16:27 PM PDT 24 |
Jul 10 05:19:13 PM PDT 24 |
1646517739 ps |
| T643 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.2931815727 |
|
|
Jul 10 05:17:07 PM PDT 24 |
Jul 10 05:17:14 PM PDT 24 |
3479925017 ps |
| T644 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.876550922 |
|
|
Jul 10 05:19:14 PM PDT 24 |
Jul 10 05:19:21 PM PDT 24 |
234494529 ps |
| T645 |
/workspace/coverage/default/20.sram_ctrl_bijection.4227192710 |
|
|
Jul 10 05:16:57 PM PDT 24 |
Jul 10 05:17:48 PM PDT 24 |
683886742 ps |
| T646 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.4255669836 |
|
|
Jul 10 05:16:43 PM PDT 24 |
Jul 10 05:38:23 PM PDT 24 |
37366786416 ps |
| T647 |
/workspace/coverage/default/10.sram_ctrl_partial_access.2701067444 |
|
|
Jul 10 05:16:29 PM PDT 24 |
Jul 10 05:17:56 PM PDT 24 |
357444201 ps |
| T648 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.97045733 |
|
|
Jul 10 05:18:27 PM PDT 24 |
Jul 10 05:18:29 PM PDT 24 |
30981725 ps |
| T649 |
/workspace/coverage/default/22.sram_ctrl_executable.1348226671 |
|
|
Jul 10 05:17:03 PM PDT 24 |
Jul 10 05:30:13 PM PDT 24 |
26510425519 ps |
| T650 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3782227411 |
|
|
Jul 10 05:16:35 PM PDT 24 |
Jul 10 05:36:43 PM PDT 24 |
14343506546 ps |
| T651 |
/workspace/coverage/default/38.sram_ctrl_bijection.664041645 |
|
|
Jul 10 05:18:30 PM PDT 24 |
Jul 10 05:19:15 PM PDT 24 |
2074532464 ps |
| T652 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.4186043390 |
|
|
Jul 10 05:16:38 PM PDT 24 |
Jul 10 05:16:48 PM PDT 24 |
2206930874 ps |
| T653 |
/workspace/coverage/default/8.sram_ctrl_regwen.396825769 |
|
|
Jul 10 05:16:33 PM PDT 24 |
Jul 10 05:26:42 PM PDT 24 |
2675536155 ps |
| T654 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.3479698677 |
|
|
Jul 10 05:16:23 PM PDT 24 |
Jul 10 05:17:08 PM PDT 24 |
351260803 ps |
| T655 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3523089458 |
|
|
Jul 10 05:16:40 PM PDT 24 |
Jul 10 05:16:46 PM PDT 24 |
70861876 ps |
| T656 |
/workspace/coverage/default/9.sram_ctrl_smoke.918499113 |
|
|
Jul 10 05:16:35 PM PDT 24 |
Jul 10 05:16:48 PM PDT 24 |
1745329825 ps |
| T657 |
/workspace/coverage/default/10.sram_ctrl_smoke.3122163265 |
|
|
Jul 10 05:16:31 PM PDT 24 |
Jul 10 05:16:44 PM PDT 24 |
620163942 ps |
| T658 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.126170030 |
|
|
Jul 10 05:16:06 PM PDT 24 |
Jul 10 05:17:32 PM PDT 24 |
420962472 ps |
| T659 |
/workspace/coverage/default/17.sram_ctrl_regwen.3323900079 |
|
|
Jul 10 05:16:47 PM PDT 24 |
Jul 10 05:35:46 PM PDT 24 |
43140721855 ps |
| T660 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2951193261 |
|
|
Jul 10 05:19:43 PM PDT 24 |
Jul 10 05:19:45 PM PDT 24 |
90446229 ps |
| T661 |
/workspace/coverage/default/1.sram_ctrl_partial_access.2624443887 |
|
|
Jul 10 05:16:05 PM PDT 24 |
Jul 10 05:17:50 PM PDT 24 |
1230149056 ps |
| T662 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.1419526662 |
|
|
Jul 10 05:19:18 PM PDT 24 |
Jul 10 05:21:27 PM PDT 24 |
446962579 ps |
| T663 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.1601072135 |
|
|
Jul 10 05:19:05 PM PDT 24 |
Jul 10 05:21:40 PM PDT 24 |
5916208739 ps |
| T664 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1279682548 |
|
|
Jul 10 05:16:04 PM PDT 24 |
Jul 10 05:20:09 PM PDT 24 |
1354595304 ps |
| T665 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.3176036588 |
|
|
Jul 10 05:17:25 PM PDT 24 |
Jul 10 05:17:30 PM PDT 24 |
941571383 ps |
| T666 |
/workspace/coverage/default/29.sram_ctrl_bijection.3287818456 |
|
|
Jul 10 05:17:36 PM PDT 24 |
Jul 10 05:18:59 PM PDT 24 |
7412327842 ps |
| T667 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.944778536 |
|
|
Jul 10 05:19:22 PM PDT 24 |
Jul 10 05:24:02 PM PDT 24 |
527239871 ps |
| T668 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.4091329394 |
|
|
Jul 10 05:17:29 PM PDT 24 |
Jul 10 05:24:09 PM PDT 24 |
28840580486 ps |
| T669 |
/workspace/coverage/default/21.sram_ctrl_bijection.374511935 |
|
|
Jul 10 05:17:00 PM PDT 24 |
Jul 10 05:17:34 PM PDT 24 |
1026707595 ps |
| T670 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.2504332040 |
|
|
Jul 10 05:19:05 PM PDT 24 |
Jul 10 05:19:19 PM PDT 24 |
64433967 ps |
| T671 |
/workspace/coverage/default/16.sram_ctrl_smoke.607192761 |
|
|
Jul 10 05:16:44 PM PDT 24 |
Jul 10 05:17:02 PM PDT 24 |
229647842 ps |
| T672 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3076277208 |
|
|
Jul 10 05:17:22 PM PDT 24 |
Jul 10 05:20:56 PM PDT 24 |
1938027460 ps |
| T673 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.2418295280 |
|
|
Jul 10 05:17:05 PM PDT 24 |
Jul 10 05:20:47 PM PDT 24 |
9105675980 ps |
| T674 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.227128841 |
|
|
Jul 10 05:18:03 PM PDT 24 |
Jul 10 05:29:03 PM PDT 24 |
9690326181 ps |
| T675 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.682198452 |
|
|
Jul 10 05:18:37 PM PDT 24 |
Jul 10 05:18:39 PM PDT 24 |
30308710 ps |
| T676 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.1182936097 |
|
|
Jul 10 05:16:53 PM PDT 24 |
Jul 10 05:18:30 PM PDT 24 |
606648967 ps |
| T677 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3627343645 |
|
|
Jul 10 05:19:28 PM PDT 24 |
Jul 10 05:25:19 PM PDT 24 |
83536403896 ps |
| T678 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.2117359151 |
|
|
Jul 10 05:16:47 PM PDT 24 |
Jul 10 05:21:14 PM PDT 24 |
1450430489 ps |
| T679 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.3138949711 |
|
|
Jul 10 05:17:53 PM PDT 24 |
Jul 10 05:17:59 PM PDT 24 |
65788676 ps |
| T680 |
/workspace/coverage/default/30.sram_ctrl_executable.786516246 |
|
|
Jul 10 05:17:39 PM PDT 24 |
Jul 10 05:25:50 PM PDT 24 |
5524414393 ps |
| T681 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.879084519 |
|
|
Jul 10 05:16:35 PM PDT 24 |
Jul 10 05:16:44 PM PDT 24 |
95974795 ps |
| T682 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.4008176270 |
|
|
Jul 10 05:16:39 PM PDT 24 |
Jul 10 05:17:28 PM PDT 24 |
663493073 ps |
| T683 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.671140910 |
|
|
Jul 10 05:17:25 PM PDT 24 |
Jul 10 05:25:12 PM PDT 24 |
67299150166 ps |
| T684 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.2535034161 |
|
|
Jul 10 05:16:17 PM PDT 24 |
Jul 10 05:16:20 PM PDT 24 |
45060110 ps |
| T685 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.509817397 |
|
|
Jul 10 05:19:30 PM PDT 24 |
Jul 10 05:25:51 PM PDT 24 |
21819784514 ps |
| T686 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.2328340103 |
|
|
Jul 10 05:17:47 PM PDT 24 |
Jul 10 05:17:58 PM PDT 24 |
251231728 ps |
| T687 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.3440435713 |
|
|
Jul 10 05:16:56 PM PDT 24 |
Jul 10 05:17:02 PM PDT 24 |
341718982 ps |
| T688 |
/workspace/coverage/default/25.sram_ctrl_smoke.3457122095 |
|
|
Jul 10 05:17:19 PM PDT 24 |
Jul 10 05:17:37 PM PDT 24 |
777694462 ps |
| T689 |
/workspace/coverage/default/30.sram_ctrl_regwen.2211498408 |
|
|
Jul 10 05:17:57 PM PDT 24 |
Jul 10 05:32:41 PM PDT 24 |
52726934629 ps |
| T690 |
/workspace/coverage/default/5.sram_ctrl_alert_test.647555868 |
|
|
Jul 10 05:16:26 PM PDT 24 |
Jul 10 05:16:30 PM PDT 24 |
15285220 ps |
| T691 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.168011519 |
|
|
Jul 10 05:19:53 PM PDT 24 |
Jul 10 05:19:57 PM PDT 24 |
328538220 ps |
| T692 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.2787923138 |
|
|
Jul 10 05:17:29 PM PDT 24 |
Jul 10 05:17:32 PM PDT 24 |
71354858 ps |
| T693 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1939235335 |
|
|
Jul 10 05:16:24 PM PDT 24 |
Jul 10 05:16:27 PM PDT 24 |
31436804 ps |
| T694 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.648473064 |
|
|
Jul 10 05:19:25 PM PDT 24 |
Jul 10 05:32:56 PM PDT 24 |
1799392441 ps |
| T695 |
/workspace/coverage/default/33.sram_ctrl_partial_access.1433229997 |
|
|
Jul 10 05:17:59 PM PDT 24 |
Jul 10 05:20:22 PM PDT 24 |
2619725724 ps |
| T696 |
/workspace/coverage/default/24.sram_ctrl_executable.738180992 |
|
|
Jul 10 05:17:19 PM PDT 24 |
Jul 10 05:30:49 PM PDT 24 |
14658473088 ps |
| T697 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.12979624 |
|
|
Jul 10 05:16:46 PM PDT 24 |
Jul 10 05:16:51 PM PDT 24 |
30442526 ps |
| T698 |
/workspace/coverage/default/38.sram_ctrl_stress_all.2704631703 |
|
|
Jul 10 05:18:36 PM PDT 24 |
Jul 10 06:05:45 PM PDT 24 |
9742329467 ps |
| T699 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.2566674005 |
|
|
Jul 10 05:18:20 PM PDT 24 |
Jul 10 05:18:32 PM PDT 24 |
461280620 ps |
| T700 |
/workspace/coverage/default/49.sram_ctrl_regwen.2784649961 |
|
|
Jul 10 05:20:00 PM PDT 24 |
Jul 10 05:37:14 PM PDT 24 |
2774170768 ps |
| T701 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.2227408593 |
|
|
Jul 10 05:17:59 PM PDT 24 |
Jul 10 05:18:27 PM PDT 24 |
156865929 ps |
| T101 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.3183125013 |
|
|
Jul 10 05:18:23 PM PDT 24 |
Jul 10 05:21:29 PM PDT 24 |
24600999023 ps |
| T702 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.3814921206 |
|
|
Jul 10 05:16:55 PM PDT 24 |
Jul 10 05:16:58 PM PDT 24 |
177391846 ps |
| T703 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.4114638088 |
|
|
Jul 10 05:17:31 PM PDT 24 |
Jul 10 05:28:12 PM PDT 24 |
11775273545 ps |
| T704 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2046664103 |
|
|
Jul 10 05:16:44 PM PDT 24 |
Jul 10 05:17:09 PM PDT 24 |
113617191 ps |
| T705 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.3057434095 |
|
|
Jul 10 05:18:56 PM PDT 24 |
Jul 10 05:19:23 PM PDT 24 |
335916118 ps |
| T706 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1403895502 |
|
|
Jul 10 05:16:03 PM PDT 24 |
Jul 10 05:18:42 PM PDT 24 |
168461529 ps |
| T707 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.580996521 |
|
|
Jul 10 05:18:28 PM PDT 24 |
Jul 10 05:18:34 PM PDT 24 |
90495282 ps |
| T708 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.843315770 |
|
|
Jul 10 05:20:02 PM PDT 24 |
Jul 10 05:20:08 PM PDT 24 |
244448445 ps |
| T709 |
/workspace/coverage/default/27.sram_ctrl_smoke.2089918071 |
|
|
Jul 10 05:17:35 PM PDT 24 |
Jul 10 05:17:47 PM PDT 24 |
320571882 ps |
| T710 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.1308406877 |
|
|
Jul 10 05:17:43 PM PDT 24 |
Jul 10 05:17:45 PM PDT 24 |
43539026 ps |
| T711 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2835670550 |
|
|
Jul 10 05:16:04 PM PDT 24 |
Jul 10 05:16:16 PM PDT 24 |
1512279305 ps |
| T712 |
/workspace/coverage/default/41.sram_ctrl_partial_access.3816915720 |
|
|
Jul 10 05:18:55 PM PDT 24 |
Jul 10 05:19:11 PM PDT 24 |
2779541278 ps |
| T713 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.1867680584 |
|
|
Jul 10 05:19:14 PM PDT 24 |
Jul 10 05:19:20 PM PDT 24 |
681544945 ps |
| T714 |
/workspace/coverage/default/35.sram_ctrl_bijection.2183194330 |
|
|
Jul 10 05:18:13 PM PDT 24 |
Jul 10 05:19:37 PM PDT 24 |
5404397209 ps |
| T715 |
/workspace/coverage/default/1.sram_ctrl_stress_all.3302615292 |
|
|
Jul 10 05:16:15 PM PDT 24 |
Jul 10 06:05:37 PM PDT 24 |
7409558074 ps |
| T716 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.720022662 |
|
|
Jul 10 05:18:22 PM PDT 24 |
Jul 10 05:26:19 PM PDT 24 |
18031217037 ps |
| T717 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.746596527 |
|
|
Jul 10 05:16:17 PM PDT 24 |
Jul 10 05:21:39 PM PDT 24 |
4531470564 ps |
| T718 |
/workspace/coverage/default/49.sram_ctrl_bijection.678896991 |
|
|
Jul 10 05:19:57 PM PDT 24 |
Jul 10 05:20:25 PM PDT 24 |
5515992027 ps |
| T719 |
/workspace/coverage/default/7.sram_ctrl_bijection.1217782852 |
|
|
Jul 10 05:16:24 PM PDT 24 |
Jul 10 05:17:13 PM PDT 24 |
1419300546 ps |
| T720 |
/workspace/coverage/default/9.sram_ctrl_regwen.2790052630 |
|
|
Jul 10 05:16:34 PM PDT 24 |
Jul 10 05:17:31 PM PDT 24 |
989962908 ps |
| T721 |
/workspace/coverage/default/15.sram_ctrl_stress_all.1008260333 |
|
|
Jul 10 05:16:46 PM PDT 24 |
Jul 10 06:51:45 PM PDT 24 |
15068043889 ps |
| T722 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.3736632485 |
|
|
Jul 10 05:17:37 PM PDT 24 |
Jul 10 05:41:47 PM PDT 24 |
11009768643 ps |
| T723 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.2227190368 |
|
|
Jul 10 05:18:48 PM PDT 24 |
Jul 10 05:18:50 PM PDT 24 |
94965061 ps |
| T724 |
/workspace/coverage/default/36.sram_ctrl_stress_all.1556632972 |
|
|
Jul 10 05:18:22 PM PDT 24 |
Jul 10 06:18:04 PM PDT 24 |
110857580577 ps |
| T725 |
/workspace/coverage/default/21.sram_ctrl_alert_test.98923388 |
|
|
Jul 10 05:17:08 PM PDT 24 |
Jul 10 05:17:09 PM PDT 24 |
12300026 ps |
| T726 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3627476838 |
|
|
Jul 10 05:16:04 PM PDT 24 |
Jul 10 05:23:18 PM PDT 24 |
36489165240 ps |
| T727 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1496801218 |
|
|
Jul 10 05:16:34 PM PDT 24 |
Jul 10 05:16:48 PM PDT 24 |
121982243 ps |
| T728 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.3519326587 |
|
|
Jul 10 05:16:43 PM PDT 24 |
Jul 10 05:16:51 PM PDT 24 |
157997410 ps |
| T729 |
/workspace/coverage/default/42.sram_ctrl_bijection.3023630000 |
|
|
Jul 10 05:19:03 PM PDT 24 |
Jul 10 05:20:09 PM PDT 24 |
1143339589 ps |
| T730 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.2635103762 |
|
|
Jul 10 05:16:48 PM PDT 24 |
Jul 10 05:16:53 PM PDT 24 |
36632223 ps |
| T731 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.1706982193 |
|
|
Jul 10 05:17:17 PM PDT 24 |
Jul 10 05:20:20 PM PDT 24 |
658804222 ps |
| T732 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.4056790507 |
|
|
Jul 10 05:18:18 PM PDT 24 |
Jul 10 05:18:21 PM PDT 24 |
87448136 ps |
| T733 |
/workspace/coverage/default/32.sram_ctrl_smoke.1167134176 |
|
|
Jul 10 05:17:48 PM PDT 24 |
Jul 10 05:18:10 PM PDT 24 |
3143923272 ps |
| T734 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.3863250098 |
|
|
Jul 10 05:17:52 PM PDT 24 |
Jul 10 05:22:04 PM PDT 24 |
22245807517 ps |
| T735 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1230425616 |
|
|
Jul 10 05:19:53 PM PDT 24 |
Jul 10 05:25:37 PM PDT 24 |
3025246570 ps |
| T736 |
/workspace/coverage/default/5.sram_ctrl_smoke.484186704 |
|
|
Jul 10 05:16:18 PM PDT 24 |
Jul 10 05:16:21 PM PDT 24 |
71034118 ps |
| T737 |
/workspace/coverage/default/0.sram_ctrl_stress_all.1826030621 |
|
|
Jul 10 05:16:04 PM PDT 24 |
Jul 10 05:30:35 PM PDT 24 |
72712084457 ps |
| T738 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.2755633884 |
|
|
Jul 10 05:17:21 PM PDT 24 |
Jul 10 05:17:27 PM PDT 24 |
470158668 ps |
| T739 |
/workspace/coverage/default/18.sram_ctrl_alert_test.1344502724 |
|
|
Jul 10 05:16:53 PM PDT 24 |
Jul 10 05:16:56 PM PDT 24 |
12015760 ps |
| T740 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.255293410 |
|
|
Jul 10 05:17:07 PM PDT 24 |
Jul 10 05:26:40 PM PDT 24 |
39763801251 ps |
| T741 |
/workspace/coverage/default/38.sram_ctrl_regwen.3538617411 |
|
|
Jul 10 05:18:32 PM PDT 24 |
Jul 10 05:19:16 PM PDT 24 |
3913311420 ps |
| T742 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1481646362 |
|
|
Jul 10 05:20:10 PM PDT 24 |
Jul 10 05:52:47 PM PDT 24 |
14569267412 ps |
| T743 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.2387832104 |
|
|
Jul 10 05:16:26 PM PDT 24 |
Jul 10 05:16:33 PM PDT 24 |
183766652 ps |
| T744 |
/workspace/coverage/default/6.sram_ctrl_stress_all.1416212317 |
|
|
Jul 10 05:16:26 PM PDT 24 |
Jul 10 06:49:53 PM PDT 24 |
616051555333 ps |
| T745 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3389814894 |
|
|
Jul 10 05:16:24 PM PDT 24 |
Jul 10 05:21:54 PM PDT 24 |
52368902949 ps |
| T746 |
/workspace/coverage/default/49.sram_ctrl_smoke.3248454162 |
|
|
Jul 10 05:19:58 PM PDT 24 |
Jul 10 05:20:48 PM PDT 24 |
2001474036 ps |
| T747 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.3413435159 |
|
|
Jul 10 05:17:40 PM PDT 24 |
Jul 10 05:21:43 PM PDT 24 |
389648021 ps |
| T748 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.926656695 |
|
|
Jul 10 05:17:12 PM PDT 24 |
Jul 10 05:21:37 PM PDT 24 |
9999787319 ps |
| T749 |
/workspace/coverage/default/29.sram_ctrl_regwen.2934052094 |
|
|
Jul 10 05:17:42 PM PDT 24 |
Jul 10 05:28:57 PM PDT 24 |
13764265184 ps |
| T750 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1540705296 |
|
|
Jul 10 05:16:05 PM PDT 24 |
Jul 10 05:20:04 PM PDT 24 |
2296781365 ps |
| T751 |
/workspace/coverage/default/18.sram_ctrl_bijection.78096392 |
|
|
Jul 10 05:16:49 PM PDT 24 |
Jul 10 05:17:30 PM PDT 24 |
576309836 ps |
| T752 |
/workspace/coverage/default/19.sram_ctrl_executable.1362746857 |
|
|
Jul 10 05:16:55 PM PDT 24 |
Jul 10 05:29:10 PM PDT 24 |
11239079541 ps |
| T753 |
/workspace/coverage/default/28.sram_ctrl_bijection.3767005932 |
|
|
Jul 10 05:17:39 PM PDT 24 |
Jul 10 05:18:16 PM PDT 24 |
7210307999 ps |
| T754 |
/workspace/coverage/default/15.sram_ctrl_regwen.843507766 |
|
|
Jul 10 05:16:57 PM PDT 24 |
Jul 10 05:21:24 PM PDT 24 |
1310446231 ps |
| T755 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3036500413 |
|
|
Jul 10 05:16:43 PM PDT 24 |
Jul 10 05:16:49 PM PDT 24 |
1011026930 ps |
| T756 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2508154402 |
|
|
Jul 10 05:17:48 PM PDT 24 |
Jul 10 05:21:39 PM PDT 24 |
6205150908 ps |
| T757 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.634565170 |
|
|
Jul 10 05:16:44 PM PDT 24 |
Jul 10 05:16:47 PM PDT 24 |
31659209 ps |
| T758 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.2100056671 |
|
|
Jul 10 05:17:00 PM PDT 24 |
Jul 10 05:17:05 PM PDT 24 |
222018959 ps |
| T759 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.1176166811 |
|
|
Jul 10 05:16:56 PM PDT 24 |
Jul 10 05:19:07 PM PDT 24 |
289401742 ps |
| T760 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.1183506182 |
|
|
Jul 10 05:18:43 PM PDT 24 |
Jul 10 05:23:52 PM PDT 24 |
16273348850 ps |
| T761 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.2782070634 |
|
|
Jul 10 05:16:45 PM PDT 24 |
Jul 10 05:16:59 PM PDT 24 |
449463626 ps |
| T762 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2815048922 |
|
|
Jul 10 05:16:27 PM PDT 24 |
Jul 10 05:16:39 PM PDT 24 |
243975323 ps |
| T763 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.3996327787 |
|
|
Jul 10 05:17:18 PM PDT 24 |
Jul 10 05:17:41 PM PDT 24 |
251430417 ps |
| T764 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1178332350 |
|
|
Jul 10 05:19:46 PM PDT 24 |
Jul 10 05:39:23 PM PDT 24 |
9870927891 ps |
| T765 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.2271762208 |
|
|
Jul 10 05:17:00 PM PDT 24 |
Jul 10 05:28:54 PM PDT 24 |
11916509428 ps |
| T766 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2963232147 |
|
|
Jul 10 05:19:47 PM PDT 24 |
Jul 10 05:19:49 PM PDT 24 |
175522021 ps |
| T767 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.2708762116 |
|
|
Jul 10 05:17:30 PM PDT 24 |
Jul 10 05:27:58 PM PDT 24 |
10693685797 ps |
| T768 |
/workspace/coverage/default/32.sram_ctrl_alert_test.54562565 |
|
|
Jul 10 05:18:05 PM PDT 24 |
Jul 10 05:18:06 PM PDT 24 |
29836597 ps |
| T769 |
/workspace/coverage/default/21.sram_ctrl_smoke.1020130529 |
|
|
Jul 10 05:17:01 PM PDT 24 |
Jul 10 05:17:19 PM PDT 24 |
3780612364 ps |
| T770 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.1854779193 |
|
|
Jul 10 05:17:58 PM PDT 24 |
Jul 10 05:17:59 PM PDT 24 |
38673073 ps |
| T771 |
/workspace/coverage/default/26.sram_ctrl_executable.4164320816 |
|
|
Jul 10 05:17:28 PM PDT 24 |
Jul 10 05:28:23 PM PDT 24 |
11808136764 ps |
| T772 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.1793410088 |
|
|
Jul 10 05:16:20 PM PDT 24 |
Jul 10 05:34:01 PM PDT 24 |
4293085639 ps |
| T773 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.1410974657 |
|
|
Jul 10 05:16:17 PM PDT 24 |
Jul 10 05:16:25 PM PDT 24 |
191961494 ps |
| T774 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1910261218 |
|
|
Jul 10 05:16:24 PM PDT 24 |
Jul 10 05:19:23 PM PDT 24 |
1821404603 ps |
| T102 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3585573850 |
|
|
Jul 10 05:17:09 PM PDT 24 |
Jul 10 05:17:39 PM PDT 24 |
570633170 ps |
| T775 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.2682728386 |
|
|
Jul 10 05:16:57 PM PDT 24 |
Jul 10 05:17:00 PM PDT 24 |
29708756 ps |
| T776 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.1434779528 |
|
|
Jul 10 05:17:32 PM PDT 24 |
Jul 10 05:17:34 PM PDT 24 |
30360796 ps |
| T777 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.670399345 |
|
|
Jul 10 05:19:38 PM PDT 24 |
Jul 10 05:19:57 PM PDT 24 |
161397662 ps |
| T778 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.4289120243 |
|
|
Jul 10 05:16:41 PM PDT 24 |
Jul 10 05:28:14 PM PDT 24 |
4281431650 ps |
| T779 |
/workspace/coverage/default/24.sram_ctrl_stress_all.3807941130 |
|
|
Jul 10 05:17:19 PM PDT 24 |
Jul 10 05:46:30 PM PDT 24 |
19618622759 ps |
| T780 |
/workspace/coverage/default/31.sram_ctrl_smoke.727466206 |
|
|
Jul 10 05:17:47 PM PDT 24 |
Jul 10 05:18:06 PM PDT 24 |
3027244616 ps |
| T781 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1849515445 |
|
|
Jul 10 05:19:21 PM PDT 24 |
Jul 10 05:32:56 PM PDT 24 |
17320137199 ps |
| T782 |
/workspace/coverage/default/16.sram_ctrl_partial_access.261565717 |
|
|
Jul 10 05:16:45 PM PDT 24 |
Jul 10 05:17:06 PM PDT 24 |
315281086 ps |
| T783 |
/workspace/coverage/default/46.sram_ctrl_smoke.1688932551 |
|
|
Jul 10 05:19:31 PM PDT 24 |
Jul 10 05:19:38 PM PDT 24 |
270513710 ps |
| T784 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.1085147261 |
|
|
Jul 10 05:19:41 PM PDT 24 |
Jul 10 05:19:54 PM PDT 24 |
1749528538 ps |
| T785 |
/workspace/coverage/default/12.sram_ctrl_regwen.1933353018 |
|
|
Jul 10 05:16:43 PM PDT 24 |
Jul 10 05:41:15 PM PDT 24 |
51633114359 ps |
| T786 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2620296112 |
|
|
Jul 10 05:19:32 PM PDT 24 |
Jul 10 05:19:36 PM PDT 24 |
96572425 ps |
| T787 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.1606145331 |
|
|
Jul 10 05:17:04 PM PDT 24 |
Jul 10 05:17:12 PM PDT 24 |
1196792783 ps |
| T788 |
/workspace/coverage/default/32.sram_ctrl_regwen.2751564469 |
|
|
Jul 10 05:17:57 PM PDT 24 |
Jul 10 05:39:55 PM PDT 24 |
14317941148 ps |
| T789 |
/workspace/coverage/default/10.sram_ctrl_executable.768216315 |
|
|
Jul 10 05:16:35 PM PDT 24 |
Jul 10 05:19:02 PM PDT 24 |
997713410 ps |
| T790 |
/workspace/coverage/default/4.sram_ctrl_partial_access.705213165 |
|
|
Jul 10 05:16:30 PM PDT 24 |
Jul 10 05:16:48 PM PDT 24 |
3880426204 ps |
| T791 |
/workspace/coverage/default/34.sram_ctrl_smoke.2175489641 |
|
|
Jul 10 05:18:12 PM PDT 24 |
Jul 10 05:20:46 PM PDT 24 |
740123295 ps |
| T792 |
/workspace/coverage/default/10.sram_ctrl_regwen.2173799124 |
|
|
Jul 10 05:16:30 PM PDT 24 |
Jul 10 05:18:39 PM PDT 24 |
11985004591 ps |
| T793 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.688776277 |
|
|
Jul 10 05:19:51 PM PDT 24 |
Jul 10 05:19:53 PM PDT 24 |
31832642 ps |
| T794 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.3770517358 |
|
|
Jul 10 05:16:13 PM PDT 24 |
Jul 10 05:18:45 PM PDT 24 |
1653422562 ps |
| T795 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.2053400678 |
|
|
Jul 10 05:16:41 PM PDT 24 |
Jul 10 05:21:23 PM PDT 24 |
12897570447 ps |