Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2421518159 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1585476054 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3817135543 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.848330503 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2313748796 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3800991126 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.200092234 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1980137262 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.881407416 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.4054087530 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1090724154 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1061976150 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2684531537 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.359726058 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3462722920 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1238592180 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1435349629 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3896501116 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.484125531 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1328917136 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.168303170 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.492115093 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.75095729 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2810036850 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2994246451 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2952605482 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1167763410 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1476314317 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.532423312 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3034104815 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1653918759 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2393079435 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.186117847 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.2725816101 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1476905198 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3320217675 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2966769830 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3222356896 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2690890459 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.165395343 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.129497208 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2758292040 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3131452208 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.142264563 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3724398052 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1128008144 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3785697042 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.63015326 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1132968234 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.955427349 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2597450657 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1613691963 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2119371812 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1030046793 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3205060967 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2976259392 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1429511984 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2443554699 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1006756172 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2644406602 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.503540966 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2704293650 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.396525080 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1273756230 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2005475805 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3770333421 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.417627667 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1914235521 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.491181056 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3876868815 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2914089537 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.756217727 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.4289565148 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.671911011 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.301000134 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2782228934 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3502422837 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3298619448 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3321470259 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.723983666 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2889123250 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2220697365 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.4283083496 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1619829201 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1565677620 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.568223617 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.206447274 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.4232083075 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2745882345 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2570546914 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2199421546 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1881820913 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3794206281 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.251392029 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.433535981 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2967755048 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2976422022 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2850087562 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2188412936 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.4112118118 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2621112128 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3885701338 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3101994601 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.4139216354 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.1737856619 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2103254636 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2615402483 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1948342951 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1923146379 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1336636147 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3705268399 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1926820329 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.4237344096 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.52529305 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1589988180 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.978037786 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.597001495 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.798805108 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.4199096236 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2601050343 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1880396892 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.4031784588 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3856340913 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3652829453 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1279682548 |
/workspace/coverage/default/0.sram_ctrl_alert_test.1696875387 |
/workspace/coverage/default/0.sram_ctrl_bijection.3307785502 |
/workspace/coverage/default/0.sram_ctrl_executable.3864756273 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1358664965 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.1661840615 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2161780275 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.4254136432 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.535136634 |
/workspace/coverage/default/0.sram_ctrl_partial_access.1017839903 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3627476838 |
/workspace/coverage/default/0.sram_ctrl_regwen.3123709775 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.2268219529 |
/workspace/coverage/default/0.sram_ctrl_smoke.38200404 |
/workspace/coverage/default/0.sram_ctrl_stress_all.1826030621 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.701300801 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.927006799 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1403895502 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.27665723 |
/workspace/coverage/default/1.sram_ctrl_alert_test.1765087760 |
/workspace/coverage/default/1.sram_ctrl_bijection.1434964909 |
/workspace/coverage/default/1.sram_ctrl_executable.2263651309 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2835670550 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.126170030 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1166196738 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.4104748844 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.764295583 |
/workspace/coverage/default/1.sram_ctrl_partial_access.2624443887 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1826109019 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3752463147 |
/workspace/coverage/default/1.sram_ctrl_regwen.2245606593 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.3484104717 |
/workspace/coverage/default/1.sram_ctrl_smoke.929520478 |
/workspace/coverage/default/1.sram_ctrl_stress_all.3302615292 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2914538626 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1540705296 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2507569740 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.508529188 |
/workspace/coverage/default/10.sram_ctrl_bijection.3088197148 |
/workspace/coverage/default/10.sram_ctrl_executable.768216315 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.856506476 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.4280417557 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2674403012 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.2312227413 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3807559552 |
/workspace/coverage/default/10.sram_ctrl_partial_access.2701067444 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.4187181488 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.150778364 |
/workspace/coverage/default/10.sram_ctrl_regwen.2173799124 |
/workspace/coverage/default/10.sram_ctrl_smoke.3122163265 |
/workspace/coverage/default/10.sram_ctrl_stress_all.2296500270 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2754131799 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.67677775 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1761148815 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2817677946 |
/workspace/coverage/default/11.sram_ctrl_alert_test.1969389055 |
/workspace/coverage/default/11.sram_ctrl_bijection.994017159 |
/workspace/coverage/default/11.sram_ctrl_executable.1188146735 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.4186043390 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.3761209153 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.188927276 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.4268993162 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3729609552 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2046664103 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.634565170 |
/workspace/coverage/default/11.sram_ctrl_smoke.3933207992 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2407206820 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1284975278 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3523089458 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3782227411 |
/workspace/coverage/default/12.sram_ctrl_alert_test.463722192 |
/workspace/coverage/default/12.sram_ctrl_bijection.3924548540 |
/workspace/coverage/default/12.sram_ctrl_executable.56568263 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.4265911624 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.2074844534 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3036500413 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.2762865186 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2185012245 |
/workspace/coverage/default/12.sram_ctrl_partial_access.1379643150 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3467788215 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.2488881329 |
/workspace/coverage/default/12.sram_ctrl_regwen.1933353018 |
/workspace/coverage/default/12.sram_ctrl_smoke.3909308857 |
/workspace/coverage/default/12.sram_ctrl_stress_all.1969420213 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.4289120243 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.2053400678 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3814735928 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.1179283065 |
/workspace/coverage/default/13.sram_ctrl_alert_test.722232136 |
/workspace/coverage/default/13.sram_ctrl_bijection.1583741904 |
/workspace/coverage/default/13.sram_ctrl_executable.738918917 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.1509344328 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.4008176270 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.264972965 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.3122275507 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.3850362094 |
/workspace/coverage/default/13.sram_ctrl_partial_access.2011171488 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.2669826207 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.2060057435 |
/workspace/coverage/default/13.sram_ctrl_regwen.2644075236 |
/workspace/coverage/default/13.sram_ctrl_smoke.2578373942 |
/workspace/coverage/default/13.sram_ctrl_stress_all.773244577 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3647614342 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.3585167253 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1415912184 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.1367849173 |
/workspace/coverage/default/14.sram_ctrl_alert_test.2312331765 |
/workspace/coverage/default/14.sram_ctrl_bijection.1069986762 |
/workspace/coverage/default/14.sram_ctrl_executable.4232205742 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.2907725661 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.4321330 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2431219076 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.3773298975 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.1626521591 |
/workspace/coverage/default/14.sram_ctrl_partial_access.2514428619 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3003970821 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.3651188840 |
/workspace/coverage/default/14.sram_ctrl_regwen.1910946966 |
/workspace/coverage/default/14.sram_ctrl_smoke.2674395736 |
/workspace/coverage/default/14.sram_ctrl_stress_all.3569364331 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.56086984 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.2740031958 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3201240933 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.378072529 |
/workspace/coverage/default/15.sram_ctrl_alert_test.2775893292 |
/workspace/coverage/default/15.sram_ctrl_bijection.3136605555 |
/workspace/coverage/default/15.sram_ctrl_executable.2651849692 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.1972065536 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.2683480961 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.3622680949 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.2782070634 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.4255669836 |
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/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1848781569 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.648473064 |
/workspace/coverage/default/45.sram_ctrl_alert_test.4110991869 |
/workspace/coverage/default/45.sram_ctrl_bijection.3455007887 |
/workspace/coverage/default/45.sram_ctrl_executable.3522039277 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3702737178 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.2977779364 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2620296112 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.1427732394 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.193866382 |
/workspace/coverage/default/45.sram_ctrl_partial_access.266925415 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3627343645 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1191312033 |
/workspace/coverage/default/45.sram_ctrl_regwen.2577755729 |
/workspace/coverage/default/45.sram_ctrl_smoke.381133937 |
/workspace/coverage/default/45.sram_ctrl_stress_all.2520337372 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3436267819 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1914256751 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1611997480 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3561098177 |
/workspace/coverage/default/46.sram_ctrl_alert_test.2573991166 |
/workspace/coverage/default/46.sram_ctrl_bijection.803090972 |
/workspace/coverage/default/46.sram_ctrl_executable.1376753602 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3964028594 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.235075093 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.4173081654 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.1085147261 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3096153192 |
/workspace/coverage/default/46.sram_ctrl_partial_access.3130905943 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2443350590 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2951193261 |
/workspace/coverage/default/46.sram_ctrl_regwen.1134221866 |
/workspace/coverage/default/46.sram_ctrl_smoke.1688932551 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2415279022 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.509817397 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.670399345 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.65483651 |
/workspace/coverage/default/47.sram_ctrl_alert_test.848333190 |
/workspace/coverage/default/47.sram_ctrl_bijection.1169647079 |
/workspace/coverage/default/47.sram_ctrl_executable.624445981 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.523370134 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3318725901 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.843315770 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1178332350 |
/workspace/coverage/default/47.sram_ctrl_partial_access.1314911211 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.206689886 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2963232147 |
/workspace/coverage/default/47.sram_ctrl_regwen.323237004 |
/workspace/coverage/default/47.sram_ctrl_smoke.1053046582 |
/workspace/coverage/default/47.sram_ctrl_stress_all.2821304633 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2772611600 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1467955408 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.8731202 |
/workspace/coverage/default/48.sram_ctrl_alert_test.2316983944 |
/workspace/coverage/default/48.sram_ctrl_bijection.3280458759 |
/workspace/coverage/default/48.sram_ctrl_executable.3899993274 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2739656582 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.4230104446 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.168011519 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.3041430330 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2645011794 |
/workspace/coverage/default/48.sram_ctrl_partial_access.3917187513 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2981042891 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.688776277 |
/workspace/coverage/default/48.sram_ctrl_regwen.1857759399 |
/workspace/coverage/default/48.sram_ctrl_smoke.1595758062 |
/workspace/coverage/default/48.sram_ctrl_stress_all.341840383 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1230425616 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2568243000 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.448943212 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2437137033 |
/workspace/coverage/default/49.sram_ctrl_alert_test.2862407223 |
/workspace/coverage/default/49.sram_ctrl_bijection.678896991 |
/workspace/coverage/default/49.sram_ctrl_executable.2291239095 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2839373081 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.3320984595 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1660580436 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.200155134 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1481646362 |
/workspace/coverage/default/49.sram_ctrl_partial_access.2303756174 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1975023491 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2996507131 |
/workspace/coverage/default/49.sram_ctrl_regwen.2784649961 |
/workspace/coverage/default/49.sram_ctrl_smoke.3248454162 |
/workspace/coverage/default/49.sram_ctrl_stress_all.1090407647 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1806468785 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2337566932 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.524894487 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1806481583 |
/workspace/coverage/default/5.sram_ctrl_alert_test.647555868 |
/workspace/coverage/default/5.sram_ctrl_bijection.3890219729 |
/workspace/coverage/default/5.sram_ctrl_executable.3065861138 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1415488027 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.2292777066 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2695001775 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.384247247 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.480446497 |
/workspace/coverage/default/5.sram_ctrl_partial_access.1507107721 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.746596527 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1939235335 |
/workspace/coverage/default/5.sram_ctrl_regwen.92793779 |
/workspace/coverage/default/5.sram_ctrl_smoke.484186704 |
/workspace/coverage/default/5.sram_ctrl_stress_all.3500938585 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2045880763 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.458401332 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2301880235 |
/workspace/coverage/default/6.sram_ctrl_alert_test.2808009047 |
/workspace/coverage/default/6.sram_ctrl_bijection.2632348721 |
/workspace/coverage/default/6.sram_ctrl_executable.3903767802 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3091679417 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.3905734482 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1801703770 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.83490898 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.4016926885 |
/workspace/coverage/default/6.sram_ctrl_partial_access.2752028782 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3326566920 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3283875564 |
/workspace/coverage/default/6.sram_ctrl_regwen.1095307222 |
/workspace/coverage/default/6.sram_ctrl_smoke.976894188 |
/workspace/coverage/default/6.sram_ctrl_stress_all.1416212317 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2815048922 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.466345123 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3038973680 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2928248204 |
/workspace/coverage/default/7.sram_ctrl_alert_test.1026699875 |
/workspace/coverage/default/7.sram_ctrl_bijection.1217782852 |
/workspace/coverage/default/7.sram_ctrl_executable.2883418158 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2447489506 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.3479698677 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2303480714 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1038059679 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1069778925 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2730291143 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3389814894 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1297116203 |
/workspace/coverage/default/7.sram_ctrl_regwen.837332545 |
/workspace/coverage/default/7.sram_ctrl_smoke.1426558925 |
/workspace/coverage/default/7.sram_ctrl_stress_all.75864533 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2508784048 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3113658970 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2839328648 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2439608164 |
/workspace/coverage/default/8.sram_ctrl_alert_test.1527976463 |
/workspace/coverage/default/8.sram_ctrl_bijection.1503659885 |
/workspace/coverage/default/8.sram_ctrl_executable.1740067277 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.4143453787 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.3117682820 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1436290968 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.1780586510 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.249997671 |
/workspace/coverage/default/8.sram_ctrl_partial_access.2763664845 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2876964360 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2796606157 |
/workspace/coverage/default/8.sram_ctrl_regwen.396825769 |
/workspace/coverage/default/8.sram_ctrl_smoke.1373259415 |
/workspace/coverage/default/8.sram_ctrl_stress_all.3493950274 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1910261218 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2748337536 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2788261653 |
/workspace/coverage/default/9.sram_ctrl_alert_test.3050878715 |
/workspace/coverage/default/9.sram_ctrl_bijection.3069806637 |
/workspace/coverage/default/9.sram_ctrl_executable.1019790662 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2354839657 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1496801218 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3260241347 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.879084519 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.51173789 |
/workspace/coverage/default/9.sram_ctrl_partial_access.51755437 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1763674156 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2389382498 |
/workspace/coverage/default/9.sram_ctrl_regwen.2790052630 |
/workspace/coverage/default/9.sram_ctrl_smoke.918499113 |
/workspace/coverage/default/9.sram_ctrl_stress_all.3724013405 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.215409813 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.919472678 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.832921603 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2888229987 |
|
|
Jul 10 05:19:42 PM PDT 24 |
Jul 10 05:19:50 PM PDT 24 |
654432528 ps |
T2 |
/workspace/coverage/default/34.sram_ctrl_alert_test.1323807486 |
|
|
Jul 10 05:18:13 PM PDT 24 |
Jul 10 05:18:15 PM PDT 24 |
15975511 ps |
T3 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.67677775 |
|
|
Jul 10 05:16:36 PM PDT 24 |
Jul 10 05:24:49 PM PDT 24 |
10591252965 ps |
T5 |
/workspace/coverage/default/15.sram_ctrl_bijection.3136605555 |
|
|
Jul 10 05:16:45 PM PDT 24 |
Jul 10 05:17:37 PM PDT 24 |
730405892 ps |
T4 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.524894487 |
|
|
Jul 10 05:20:10 PM PDT 24 |
Jul 10 05:20:12 PM PDT 24 |
245253809 ps |
T6 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.3845260295 |
|
|
Jul 10 05:17:20 PM PDT 24 |
Jul 10 05:17:23 PM PDT 24 |
429208865 ps |
T9 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.2650101476 |
|
|
Jul 10 05:19:11 PM PDT 24 |
Jul 10 05:19:15 PM PDT 24 |
184917262 ps |
T10 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2431219076 |
|
|
Jul 10 05:16:49 PM PDT 24 |
Jul 10 05:16:56 PM PDT 24 |
206650664 ps |
T11 |
/workspace/coverage/default/40.sram_ctrl_regwen.1625641192 |
|
|
Jul 10 05:18:48 PM PDT 24 |
Jul 10 05:41:19 PM PDT 24 |
14689283182 ps |
T12 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.1427732394 |
|
|
Jul 10 05:19:30 PM PDT 24 |
Jul 10 05:19:36 PM PDT 24 |
291808773 ps |
T37 |
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.3753417093 |
|
|
Jul 10 05:19:13 PM PDT 24 |
Jul 10 05:22:40 PM PDT 24 |
856608346 ps |
T41 |
/workspace/coverage/default/27.sram_ctrl_bijection.1430821007 |
|
|
Jul 10 05:17:31 PM PDT 24 |
Jul 10 05:18:42 PM PDT 24 |
4026174666 ps |
T18 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.662103241 |
|
|
Jul 10 05:18:57 PM PDT 24 |
Jul 10 05:20:28 PM PDT 24 |
1332423065 ps |
T46 |
/workspace/coverage/default/43.sram_ctrl_smoke.1240984753 |
|
|
Jul 10 05:19:13 PM PDT 24 |
Jul 10 05:19:23 PM PDT 24 |
370848388 ps |
T13 |
/workspace/coverage/default/26.sram_ctrl_alert_test.3562186765 |
|
|
Jul 10 05:17:29 PM PDT 24 |
Jul 10 05:17:31 PM PDT 24 |
13331042 ps |
T38 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1436290968 |
|
|
Jul 10 05:16:35 PM PDT 24 |
Jul 10 05:16:42 PM PDT 24 |
422703882 ps |
T21 |
/workspace/coverage/default/4.sram_ctrl_executable.4044329962 |
|
|
Jul 10 05:16:17 PM PDT 24 |
Jul 10 05:25:32 PM PDT 24 |
25432005660 ps |
T60 |
/workspace/coverage/default/48.sram_ctrl_partial_access.3917187513 |
|
|
Jul 10 05:19:53 PM PDT 24 |
Jul 10 05:21:02 PM PDT 24 |
459530914 ps |
T61 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1801703770 |
|
|
Jul 10 05:16:24 PM PDT 24 |
Jul 10 05:16:29 PM PDT 24 |
162453463 ps |
T39 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2788261653 |
|
|
Jul 10 05:16:27 PM PDT 24 |
Jul 10 05:24:28 PM PDT 24 |
3911483939 ps |
T7 |
/workspace/coverage/default/11.sram_ctrl_stress_all.3096981877 |
|
|
Jul 10 05:16:35 PM PDT 24 |
Jul 10 06:47:42 PM PDT 24 |
695843239880 ps |
T40 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.2420632703 |
|
|
Jul 10 05:16:08 PM PDT 24 |
Jul 10 05:31:18 PM PDT 24 |
2092528564 ps |
T55 |
/workspace/coverage/default/20.sram_ctrl_regwen.4021794791 |
|
|
Jul 10 05:16:56 PM PDT 24 |
Jul 10 05:18:34 PM PDT 24 |
20193823480 ps |
T44 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.3801835472 |
|
|
Jul 10 05:18:28 PM PDT 24 |
Jul 10 05:18:42 PM PDT 24 |
2705886604 ps |
T56 |
/workspace/coverage/default/24.sram_ctrl_regwen.3000857869 |
|
|
Jul 10 05:17:20 PM PDT 24 |
Jul 10 05:40:44 PM PDT 24 |
17888994866 ps |
T22 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.56086984 |
|
|
Jul 10 05:16:44 PM PDT 24 |
Jul 10 05:21:41 PM PDT 24 |
1610085691 ps |
T134 |
/workspace/coverage/default/29.sram_ctrl_partial_access.2727675716 |
|
|
Jul 10 05:17:42 PM PDT 24 |
Jul 10 05:18:48 PM PDT 24 |
2793159766 ps |
T23 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2622105910 |
|
|
Jul 10 05:18:43 PM PDT 24 |
Jul 10 05:21:33 PM PDT 24 |
875563045 ps |
T78 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.2306265758 |
|
|
Jul 10 05:17:58 PM PDT 24 |
Jul 10 05:18:04 PM PDT 24 |
174052985 ps |
T137 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.1259012887 |
|
|
Jul 10 05:17:36 PM PDT 24 |
Jul 10 05:22:05 PM PDT 24 |
3703649428 ps |
T8 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.2967901317 |
|
|
Jul 10 05:16:48 PM PDT 24 |
Jul 10 05:16:56 PM PDT 24 |
4331253231 ps |
T95 |
/workspace/coverage/default/43.sram_ctrl_partial_access.1538933312 |
|
|
Jul 10 05:19:11 PM PDT 24 |
Jul 10 05:19:14 PM PDT 24 |
125329279 ps |
T19 |
/workspace/coverage/default/4.sram_ctrl_stress_all.1968516116 |
|
|
Jul 10 05:16:19 PM PDT 24 |
Jul 10 06:14:50 PM PDT 24 |
10400049856 ps |
T62 |
/workspace/coverage/default/14.sram_ctrl_regwen.1910946966 |
|
|
Jul 10 05:16:45 PM PDT 24 |
Jul 10 05:43:44 PM PDT 24 |
37703378721 ps |
T90 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1763674156 |
|
|
Jul 10 05:16:29 PM PDT 24 |
Jul 10 05:25:31 PM PDT 24 |
180320528946 ps |
T20 |
/workspace/coverage/default/32.sram_ctrl_stress_all.169297710 |
|
|
Jul 10 05:18:01 PM PDT 24 |
Jul 10 05:27:40 PM PDT 24 |
17018202229 ps |
T135 |
/workspace/coverage/default/30.sram_ctrl_stress_all.815004816 |
|
|
Jul 10 05:17:47 PM PDT 24 |
Jul 10 05:45:24 PM PDT 24 |
26057698882 ps |
T79 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2817677946 |
|
|
Jul 10 05:16:43 PM PDT 24 |
Jul 10 05:19:06 PM PDT 24 |
2986024873 ps |
T133 |
/workspace/coverage/default/11.sram_ctrl_regwen.1718509479 |
|
|
Jul 10 05:16:39 PM PDT 24 |
Jul 10 05:31:14 PM PDT 24 |
48860755273 ps |
T42 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.2343720861 |
|
|
Jul 10 05:18:27 PM PDT 24 |
Jul 10 05:18:45 PM PDT 24 |
544469455 ps |
T136 |
/workspace/coverage/default/31.sram_ctrl_regwen.3693122671 |
|
|
Jul 10 05:17:46 PM PDT 24 |
Jul 10 05:30:05 PM PDT 24 |
2129138909 ps |
T47 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1806468785 |
|
|
Jul 10 05:20:04 PM PDT 24 |
Jul 10 05:34:24 PM PDT 24 |
3475652741 ps |
T138 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.268935587 |
|
|
Jul 10 05:18:46 PM PDT 24 |
Jul 10 05:18:50 PM PDT 24 |
293352762 ps |
T139 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.1153164599 |
|
|
Jul 10 05:17:28 PM PDT 24 |
Jul 10 05:17:31 PM PDT 24 |
160756256 ps |
T140 |
/workspace/coverage/default/2.sram_ctrl_smoke.1695629641 |
|
|
Jul 10 05:16:19 PM PDT 24 |
Jul 10 05:16:22 PM PDT 24 |
94431931 ps |
T141 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2185012245 |
|
|
Jul 10 05:16:41 PM PDT 24 |
Jul 10 05:27:03 PM PDT 24 |
2552169883 ps |
T80 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.3109338405 |
|
|
Jul 10 05:16:55 PM PDT 24 |
Jul 10 05:35:56 PM PDT 24 |
2775841500 ps |
T142 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1834650931 |
|
|
Jul 10 05:16:16 PM PDT 24 |
Jul 10 05:17:42 PM PDT 24 |
1048380937 ps |
T45 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.3622680949 |
|
|
Jul 10 05:16:51 PM PDT 24 |
Jul 10 05:16:58 PM PDT 24 |
202573395 ps |
T143 |
/workspace/coverage/default/14.sram_ctrl_partial_access.2514428619 |
|
|
Jul 10 05:16:39 PM PDT 24 |
Jul 10 05:16:59 PM PDT 24 |
3794246605 ps |
T15 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.3373305157 |
|
|
Jul 10 05:16:15 PM PDT 24 |
Jul 10 05:16:21 PM PDT 24 |
3032640254 ps |
T29 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.483449339 |
|
|
Jul 10 05:18:38 PM PDT 24 |
Jul 10 05:47:02 PM PDT 24 |
122220829731 ps |
T30 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.1661840615 |
|
|
Jul 10 05:16:04 PM PDT 24 |
Jul 10 05:18:27 PM PDT 24 |
139005036 ps |
T31 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.269451638 |
|
|
Jul 10 05:18:56 PM PDT 24 |
Jul 10 05:37:54 PM PDT 24 |
12589422067 ps |
T32 |
/workspace/coverage/default/24.sram_ctrl_bijection.1306729556 |
|
|
Jul 10 05:17:11 PM PDT 24 |
Jul 10 05:18:30 PM PDT 24 |
20755847365 ps |
T33 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.2351224461 |
|
|
Jul 10 05:17:31 PM PDT 24 |
Jul 10 05:22:15 PM PDT 24 |
25983421135 ps |
T34 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.3999328070 |
|
|
Jul 10 05:17:12 PM PDT 24 |
Jul 10 05:19:01 PM PDT 24 |
136514644 ps |
T14 |
/workspace/coverage/default/10.sram_ctrl_alert_test.1780778724 |
|
|
Jul 10 05:16:39 PM PDT 24 |
Jul 10 05:16:44 PM PDT 24 |
22102961 ps |
T35 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3467788215 |
|
|
Jul 10 05:16:42 PM PDT 24 |
Jul 10 05:23:10 PM PDT 24 |
7116909373 ps |
T36 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.1170173076 |
|
|
Jul 10 05:17:41 PM PDT 24 |
Jul 10 05:17:50 PM PDT 24 |
1490176559 ps |
T129 |
/workspace/coverage/default/2.sram_ctrl_stress_all.1617300883 |
|
|
Jul 10 05:16:13 PM PDT 24 |
Jul 10 06:14:35 PM PDT 24 |
257165003897 ps |
T144 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.721416984 |
|
|
Jul 10 05:16:48 PM PDT 24 |
Jul 10 05:17:25 PM PDT 24 |
203416829 ps |
T91 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.2662036898 |
|
|
Jul 10 05:16:45 PM PDT 24 |
Jul 10 05:22:25 PM PDT 24 |
9609409172 ps |
T145 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.4082597301 |
|
|
Jul 10 05:17:26 PM PDT 24 |
Jul 10 05:18:08 PM PDT 24 |
363619781 ps |
T146 |
/workspace/coverage/default/4.sram_ctrl_alert_test.3537949365 |
|
|
Jul 10 05:16:15 PM PDT 24 |
Jul 10 05:16:17 PM PDT 24 |
24778544 ps |
T24 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.219160717 |
|
|
Jul 10 05:18:23 PM PDT 24 |
Jul 10 05:18:25 PM PDT 24 |
28719602 ps |
T92 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3117499559 |
|
|
Jul 10 05:16:35 PM PDT 24 |
Jul 10 05:22:39 PM PDT 24 |
90634629450 ps |
T147 |
/workspace/coverage/default/41.sram_ctrl_executable.3171629040 |
|
|
Jul 10 05:19:04 PM PDT 24 |
Jul 10 05:30:24 PM PDT 24 |
16531787491 ps |
T148 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.8731202 |
|
|
Jul 10 05:19:51 PM PDT 24 |
Jul 10 05:20:40 PM PDT 24 |
179432834 ps |
T48 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.4067252793 |
|
|
Jul 10 05:16:10 PM PDT 24 |
Jul 10 05:16:18 PM PDT 24 |
100951262 ps |
T149 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.657463293 |
|
|
Jul 10 05:18:04 PM PDT 24 |
Jul 10 05:18:11 PM PDT 24 |
749613848 ps |
T117 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2447489506 |
|
|
Jul 10 05:16:26 PM PDT 24 |
Jul 10 05:16:38 PM PDT 24 |
772419641 ps |
T150 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1406681360 |
|
|
Jul 10 05:18:12 PM PDT 24 |
Jul 10 05:21:25 PM PDT 24 |
2529079276 ps |
T151 |
/workspace/coverage/default/26.sram_ctrl_bijection.2900606736 |
|
|
Jul 10 05:17:26 PM PDT 24 |
Jul 10 05:18:11 PM PDT 24 |
2465073444 ps |
T152 |
/workspace/coverage/default/15.sram_ctrl_alert_test.2775893292 |
|
|
Jul 10 05:16:47 PM PDT 24 |
Jul 10 05:16:51 PM PDT 24 |
13861318 ps |
T132 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.853661709 |
|
|
Jul 10 05:18:22 PM PDT 24 |
Jul 10 05:35:23 PM PDT 24 |
36031636075 ps |
T153 |
/workspace/coverage/default/3.sram_ctrl_partial_access.2111936957 |
|
|
Jul 10 05:16:10 PM PDT 24 |
Jul 10 05:16:31 PM PDT 24 |
2296199342 ps |
T49 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.3714047071 |
|
|
Jul 10 05:17:05 PM PDT 24 |
Jul 10 05:25:00 PM PDT 24 |
3350568106 ps |
T154 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.448943212 |
|
|
Jul 10 05:19:53 PM PDT 24 |
Jul 10 05:20:06 PM PDT 24 |
132711087 ps |
T155 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.1509344328 |
|
|
Jul 10 05:16:35 PM PDT 24 |
Jul 10 05:16:45 PM PDT 24 |
3590466670 ps |
T156 |
/workspace/coverage/default/18.sram_ctrl_executable.1382983642 |
|
|
Jul 10 05:16:48 PM PDT 24 |
Jul 10 05:44:56 PM PDT 24 |
46582716552 ps |
T157 |
/workspace/coverage/default/44.sram_ctrl_smoke.917326145 |
|
|
Jul 10 05:19:19 PM PDT 24 |
Jul 10 05:19:48 PM PDT 24 |
334891663 ps |
T25 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.3166046198 |
|
|
Jul 10 05:17:45 PM PDT 24 |
Jul 10 05:17:46 PM PDT 24 |
93967192 ps |
T158 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.3886283207 |
|
|
Jul 10 05:17:38 PM PDT 24 |
Jul 10 05:21:18 PM PDT 24 |
10481924136 ps |
T159 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.2269348872 |
|
|
Jul 10 05:18:23 PM PDT 24 |
Jul 10 05:43:44 PM PDT 24 |
9644612033 ps |
T160 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2839373081 |
|
|
Jul 10 05:19:57 PM PDT 24 |
Jul 10 05:20:06 PM PDT 24 |
595269577 ps |
T130 |
/workspace/coverage/default/19.sram_ctrl_regwen.1756434912 |
|
|
Jul 10 05:16:50 PM PDT 24 |
Jul 10 05:28:35 PM PDT 24 |
2249242068 ps |
T43 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.4280184241 |
|
|
Jul 10 05:17:46 PM PDT 24 |
Jul 10 05:18:19 PM PDT 24 |
2459446732 ps |
T161 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.188927276 |
|
|
Jul 10 05:16:41 PM PDT 24 |
Jul 10 05:16:50 PM PDT 24 |
628025080 ps |
T162 |
/workspace/coverage/default/19.sram_ctrl_partial_access.811711723 |
|
|
Jul 10 05:16:49 PM PDT 24 |
Jul 10 05:17:00 PM PDT 24 |
1441843624 ps |
T163 |
/workspace/coverage/default/29.sram_ctrl_executable.73993795 |
|
|
Jul 10 05:17:41 PM PDT 24 |
Jul 10 05:19:06 PM PDT 24 |
1168779344 ps |
T164 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.3512222361 |
|
|
Jul 10 05:17:30 PM PDT 24 |
Jul 10 05:17:37 PM PDT 24 |
412863619 ps |
T165 |
/workspace/coverage/default/22.sram_ctrl_bijection.335096613 |
|
|
Jul 10 05:17:04 PM PDT 24 |
Jul 10 05:18:06 PM PDT 24 |
3675250294 ps |
T166 |
/workspace/coverage/default/17.sram_ctrl_bijection.1949018150 |
|
|
Jul 10 05:16:57 PM PDT 24 |
Jul 10 05:18:00 PM PDT 24 |
3721764237 ps |
T57 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3220271416 |
|
|
Jul 10 05:16:53 PM PDT 24 |
Jul 10 05:22:02 PM PDT 24 |
7376542558 ps |
T167 |
/workspace/coverage/default/3.sram_ctrl_bijection.3303269030 |
|
|
Jul 10 05:16:10 PM PDT 24 |
Jul 10 05:17:13 PM PDT 24 |
1464847071 ps |
T168 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.466345123 |
|
|
Jul 10 05:16:30 PM PDT 24 |
Jul 10 05:19:26 PM PDT 24 |
7039073141 ps |
T58 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.1576245932 |
|
|
Jul 10 05:16:09 PM PDT 24 |
Jul 10 05:16:51 PM PDT 24 |
313971386 ps |
T169 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.175823817 |
|
|
Jul 10 05:16:15 PM PDT 24 |
Jul 10 05:16:22 PM PDT 24 |
688545044 ps |
T118 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.1643908509 |
|
|
Jul 10 05:19:05 PM PDT 24 |
Jul 10 05:19:12 PM PDT 24 |
577861768 ps |
T170 |
/workspace/coverage/default/33.sram_ctrl_executable.2851975028 |
|
|
Jul 10 05:18:03 PM PDT 24 |
Jul 10 05:41:40 PM PDT 24 |
4302159692 ps |
T171 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.2551426486 |
|
|
Jul 10 05:17:13 PM PDT 24 |
Jul 10 05:23:17 PM PDT 24 |
7406298371 ps |
T172 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.2630804973 |
|
|
Jul 10 05:18:17 PM PDT 24 |
Jul 10 05:20:14 PM PDT 24 |
135814212 ps |
T173 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.4254136432 |
|
|
Jul 10 05:16:04 PM PDT 24 |
Jul 10 05:16:16 PM PDT 24 |
242362921 ps |
T174 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.2360459764 |
|
|
Jul 10 05:18:21 PM PDT 24 |
Jul 10 05:18:29 PM PDT 24 |
755535162 ps |
T26 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.2279199852 |
|
|
Jul 10 05:17:37 PM PDT 24 |
Jul 10 05:17:39 PM PDT 24 |
29860082 ps |
T81 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.941420542 |
|
|
Jul 10 05:17:40 PM PDT 24 |
Jul 10 05:17:44 PM PDT 24 |
392628191 ps |
T175 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2996507131 |
|
|
Jul 10 05:19:57 PM PDT 24 |
Jul 10 05:19:59 PM PDT 24 |
213454843 ps |
T176 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.2529266588 |
|
|
Jul 10 05:16:19 PM PDT 24 |
Jul 10 05:16:24 PM PDT 24 |
106296268 ps |
T177 |
/workspace/coverage/default/39.sram_ctrl_smoke.331859058 |
|
|
Jul 10 05:18:37 PM PDT 24 |
Jul 10 05:18:55 PM PDT 24 |
266070249 ps |
T178 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.1794433227 |
|
|
Jul 10 05:17:29 PM PDT 24 |
Jul 10 05:19:06 PM PDT 24 |
135011099 ps |
T179 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3038973680 |
|
|
Jul 10 05:16:26 PM PDT 24 |
Jul 10 05:17:41 PM PDT 24 |
350864446 ps |
T180 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.3171138346 |
|
|
Jul 10 05:18:15 PM PDT 24 |
Jul 10 05:18:17 PM PDT 24 |
28144590 ps |
T181 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.3964395488 |
|
|
Jul 10 05:17:37 PM PDT 24 |
Jul 10 05:17:44 PM PDT 24 |
534246874 ps |
T182 |
/workspace/coverage/default/33.sram_ctrl_bijection.1236278907 |
|
|
Jul 10 05:17:59 PM PDT 24 |
Jul 10 05:19:19 PM PDT 24 |
4852177656 ps |
T183 |
/workspace/coverage/default/31.sram_ctrl_alert_test.202010005 |
|
|
Jul 10 05:17:48 PM PDT 24 |
Jul 10 05:17:51 PM PDT 24 |
12437945 ps |
T184 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.40216703 |
|
|
Jul 10 05:17:11 PM PDT 24 |
Jul 10 05:17:18 PM PDT 24 |
446568150 ps |
T185 |
/workspace/coverage/default/35.sram_ctrl_partial_access.3391238122 |
|
|
Jul 10 05:18:12 PM PDT 24 |
Jul 10 05:18:16 PM PDT 24 |
81549116 ps |
T186 |
/workspace/coverage/default/43.sram_ctrl_regwen.611453042 |
|
|
Jul 10 05:19:12 PM PDT 24 |
Jul 10 05:41:17 PM PDT 24 |
41424249814 ps |
T187 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.1260038917 |
|
|
Jul 10 05:19:14 PM PDT 24 |
Jul 10 05:19:18 PM PDT 24 |
659876400 ps |
T188 |
/workspace/coverage/default/19.sram_ctrl_alert_test.255851565 |
|
|
Jul 10 05:16:54 PM PDT 24 |
Jul 10 05:16:57 PM PDT 24 |
15447641 ps |
T189 |
/workspace/coverage/default/14.sram_ctrl_smoke.2674395736 |
|
|
Jul 10 05:16:45 PM PDT 24 |
Jul 10 05:16:54 PM PDT 24 |
418527321 ps |
T190 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2839328648 |
|
|
Jul 10 05:16:22 PM PDT 24 |
Jul 10 05:18:25 PM PDT 24 |
336805324 ps |
T191 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.810357576 |
|
|
Jul 10 05:16:05 PM PDT 24 |
Jul 10 05:16:12 PM PDT 24 |
120648993 ps |
T192 |
/workspace/coverage/default/46.sram_ctrl_bijection.803090972 |
|
|
Jul 10 05:19:31 PM PDT 24 |
Jul 10 05:20:37 PM PDT 24 |
3960304456 ps |
T193 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.971049212 |
|
|
Jul 10 05:16:49 PM PDT 24 |
Jul 10 05:30:37 PM PDT 24 |
19473658475 ps |
T194 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1611997480 |
|
|
Jul 10 05:19:26 PM PDT 24 |
Jul 10 05:22:12 PM PDT 24 |
156821895 ps |
T195 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.719357442 |
|
|
Jul 10 05:17:41 PM PDT 24 |
Jul 10 05:32:12 PM PDT 24 |
13800178584 ps |
T196 |
/workspace/coverage/default/18.sram_ctrl_smoke.3008553632 |
|
|
Jul 10 05:16:57 PM PDT 24 |
Jul 10 05:17:18 PM PDT 24 |
4790777887 ps |
T197 |
/workspace/coverage/default/13.sram_ctrl_smoke.2578373942 |
|
|
Jul 10 05:16:44 PM PDT 24 |
Jul 10 05:18:16 PM PDT 24 |
1059590337 ps |
T131 |
/workspace/coverage/default/27.sram_ctrl_executable.1313803192 |
|
|
Jul 10 05:17:30 PM PDT 24 |
Jul 10 05:35:46 PM PDT 24 |
9242527624 ps |
T59 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.2441410097 |
|
|
Jul 10 05:18:19 PM PDT 24 |
Jul 10 05:22:23 PM PDT 24 |
14541533827 ps |
T198 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.1180454532 |
|
|
Jul 10 05:17:11 PM PDT 24 |
Jul 10 05:22:33 PM PDT 24 |
1119642789 ps |
T199 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1415912184 |
|
|
Jul 10 05:16:41 PM PDT 24 |
Jul 10 05:17:00 PM PDT 24 |
156769443 ps |
T200 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.297873032 |
|
|
Jul 10 05:18:12 PM PDT 24 |
Jul 10 05:24:56 PM PDT 24 |
17533612917 ps |
T201 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1038059679 |
|
|
Jul 10 05:16:25 PM PDT 24 |
Jul 10 05:16:34 PM PDT 24 |
681550508 ps |
T202 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.3761209153 |
|
|
Jul 10 05:16:39 PM PDT 24 |
Jul 10 05:16:49 PM PDT 24 |
115712587 ps |
T203 |
/workspace/coverage/default/41.sram_ctrl_alert_test.3977361916 |
|
|
Jul 10 05:19:03 PM PDT 24 |
Jul 10 05:19:04 PM PDT 24 |
58066108 ps |
T204 |
/workspace/coverage/default/1.sram_ctrl_regwen.2245606593 |
|
|
Jul 10 05:16:05 PM PDT 24 |
Jul 10 05:29:40 PM PDT 24 |
45860896044 ps |
T205 |
/workspace/coverage/default/37.sram_ctrl_bijection.1566478658 |
|
|
Jul 10 05:18:22 PM PDT 24 |
Jul 10 05:19:02 PM PDT 24 |
617826980 ps |
T206 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.3041825079 |
|
|
Jul 10 05:16:56 PM PDT 24 |
Jul 10 05:33:51 PM PDT 24 |
104886493423 ps |
T16 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.4268552924 |
|
|
Jul 10 05:16:14 PM PDT 24 |
Jul 10 05:16:19 PM PDT 24 |
350565094 ps |
T207 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.3582083161 |
|
|
Jul 10 05:18:41 PM PDT 24 |
Jul 10 05:19:02 PM PDT 24 |
83230239 ps |
T208 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.1167507041 |
|
|
Jul 10 05:26:07 PM PDT 24 |
Jul 10 05:26:14 PM PDT 24 |
459369924 ps |
T209 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.30764644 |
|
|
Jul 10 05:16:10 PM PDT 24 |
Jul 10 05:42:19 PM PDT 24 |
82276815655 ps |
T210 |
/workspace/coverage/default/40.sram_ctrl_partial_access.3004188539 |
|
|
Jul 10 05:18:40 PM PDT 24 |
Jul 10 05:19:00 PM PDT 24 |
5917842449 ps |
T211 |
/workspace/coverage/default/45.sram_ctrl_executable.3522039277 |
|
|
Jul 10 05:19:26 PM PDT 24 |
Jul 10 05:25:49 PM PDT 24 |
2269603158 ps |
T212 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.3844553112 |
|
|
Jul 10 05:17:44 PM PDT 24 |
Jul 10 05:19:51 PM PDT 24 |
133621170 ps |
T213 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3539307153 |
|
|
Jul 10 05:16:16 PM PDT 24 |
Jul 10 05:22:18 PM PDT 24 |
116461974906 ps |
T214 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.193866382 |
|
|
Jul 10 05:19:27 PM PDT 24 |
Jul 10 05:32:01 PM PDT 24 |
4624523999 ps |
T215 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.3007585894 |
|
|
Jul 10 05:16:53 PM PDT 24 |
Jul 10 05:16:57 PM PDT 24 |
27677281 ps |
T216 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.3122275507 |
|
|
Jul 10 05:16:36 PM PDT 24 |
Jul 10 05:16:50 PM PDT 24 |
985727327 ps |
T217 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.2492096198 |
|
|
Jul 10 05:16:57 PM PDT 24 |
Jul 10 05:17:04 PM PDT 24 |
1574202693 ps |
T218 |
/workspace/coverage/default/32.sram_ctrl_bijection.3496461022 |
|
|
Jul 10 05:17:53 PM PDT 24 |
Jul 10 05:18:30 PM PDT 24 |
4303069537 ps |
T219 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.4205362224 |
|
|
Jul 10 05:17:43 PM PDT 24 |
Jul 10 05:33:12 PM PDT 24 |
3659174573 ps |
T220 |
/workspace/coverage/default/27.sram_ctrl_regwen.3506800615 |
|
|
Jul 10 05:17:30 PM PDT 24 |
Jul 10 05:31:18 PM PDT 24 |
6015849037 ps |
T221 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.3087113416 |
|
|
Jul 10 05:16:45 PM PDT 24 |
Jul 10 05:22:07 PM PDT 24 |
46335447845 ps |
T222 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.3804355831 |
|
|
Jul 10 05:17:09 PM PDT 24 |
Jul 10 05:19:36 PM PDT 24 |
859770338 ps |
T223 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3702737178 |
|
|
Jul 10 05:19:25 PM PDT 24 |
Jul 10 05:19:32 PM PDT 24 |
478071687 ps |
T224 |
/workspace/coverage/default/0.sram_ctrl_executable.3864756273 |
|
|
Jul 10 05:16:06 PM PDT 24 |
Jul 10 05:24:36 PM PDT 24 |
12242658832 ps |
T225 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.752217399 |
|
|
Jul 10 05:16:17 PM PDT 24 |
Jul 10 05:39:33 PM PDT 24 |
10028325247 ps |
T226 |
/workspace/coverage/default/0.sram_ctrl_partial_access.1017839903 |
|
|
Jul 10 05:16:05 PM PDT 24 |
Jul 10 05:16:32 PM PDT 24 |
435695978 ps |
T227 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2407206820 |
|
|
Jul 10 05:16:44 PM PDT 24 |
Jul 10 05:18:04 PM PDT 24 |
5205153219 ps |
T228 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.3374177330 |
|
|
Jul 10 05:17:36 PM PDT 24 |
Jul 10 05:17:43 PM PDT 24 |
521873475 ps |
T229 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.480446497 |
|
|
Jul 10 05:16:25 PM PDT 24 |
Jul 10 05:38:04 PM PDT 24 |
17977369658 ps |
T230 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3647614342 |
|
|
Jul 10 05:16:40 PM PDT 24 |
Jul 10 05:18:03 PM PDT 24 |
2385695519 ps |
T231 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.215409813 |
|
|
Jul 10 05:16:31 PM PDT 24 |
Jul 10 05:39:31 PM PDT 24 |
2264538926 ps |
T232 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.3281551475 |
|
|
Jul 10 05:16:45 PM PDT 24 |
Jul 10 05:16:57 PM PDT 24 |
540574734 ps |
T233 |
/workspace/coverage/default/33.sram_ctrl_stress_all.942248736 |
|
|
Jul 10 05:18:05 PM PDT 24 |
Jul 10 06:34:27 PM PDT 24 |
252579704278 ps |
T234 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.372507963 |
|
|
Jul 10 05:18:13 PM PDT 24 |
Jul 10 05:18:18 PM PDT 24 |
105217493 ps |
T235 |
/workspace/coverage/default/29.sram_ctrl_stress_all.2260372582 |
|
|
Jul 10 05:17:39 PM PDT 24 |
Jul 10 05:22:14 PM PDT 24 |
20973208987 ps |
T236 |
/workspace/coverage/default/30.sram_ctrl_partial_access.758720561 |
|
|
Jul 10 05:17:41 PM PDT 24 |
Jul 10 05:17:49 PM PDT 24 |
61564052 ps |
T237 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.80752755 |
|
|
Jul 10 05:18:25 PM PDT 24 |
Jul 10 05:18:31 PM PDT 24 |
336321267 ps |
T238 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3326974146 |
|
|
Jul 10 05:18:13 PM PDT 24 |
Jul 10 05:20:24 PM PDT 24 |
490465892 ps |
T239 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.963768982 |
|
|
Jul 10 05:18:18 PM PDT 24 |
Jul 10 05:30:33 PM PDT 24 |
3240526479 ps |
T240 |
/workspace/coverage/default/22.sram_ctrl_stress_all.3833192069 |
|
|
Jul 10 05:17:07 PM PDT 24 |
Jul 10 06:16:14 PM PDT 24 |
15716490310 ps |
T241 |
/workspace/coverage/default/44.sram_ctrl_partial_access.1116969891 |
|
|
Jul 10 05:19:17 PM PDT 24 |
Jul 10 05:19:23 PM PDT 24 |
194797712 ps |
T242 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.1978436894 |
|
|
Jul 10 05:18:55 PM PDT 24 |
Jul 10 05:18:57 PM PDT 24 |
55803161 ps |
T243 |
/workspace/coverage/default/45.sram_ctrl_regwen.2577755729 |
|
|
Jul 10 05:19:31 PM PDT 24 |
Jul 10 05:36:58 PM PDT 24 |
5486414189 ps |
T244 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.371261113 |
|
|
Jul 10 05:17:04 PM PDT 24 |
Jul 10 05:17:10 PM PDT 24 |
207094811 ps |
T245 |
/workspace/coverage/default/8.sram_ctrl_smoke.1373259415 |
|
|
Jul 10 05:16:24 PM PDT 24 |
Jul 10 05:17:10 PM PDT 24 |
3099151586 ps |
T246 |
/workspace/coverage/default/4.sram_ctrl_regwen.4124339516 |
|
|
Jul 10 05:16:15 PM PDT 24 |
Jul 10 05:36:02 PM PDT 24 |
6906564913 ps |
T96 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2914538626 |
|
|
Jul 10 05:16:08 PM PDT 24 |
Jul 10 05:19:51 PM PDT 24 |
12994893020 ps |
T104 |
/workspace/coverage/default/31.sram_ctrl_executable.46966322 |
|
|
Jul 10 05:17:46 PM PDT 24 |
Jul 10 05:40:04 PM PDT 24 |
27936969428 ps |
T105 |
/workspace/coverage/default/13.sram_ctrl_stress_all.773244577 |
|
|
Jul 10 05:16:45 PM PDT 24 |
Jul 10 06:34:25 PM PDT 24 |
12538641315 ps |
T106 |
/workspace/coverage/default/44.sram_ctrl_executable.1290738291 |
|
|
Jul 10 05:19:23 PM PDT 24 |
Jul 10 05:31:42 PM PDT 24 |
9976597735 ps |
T107 |
/workspace/coverage/default/36.sram_ctrl_bijection.472379817 |
|
|
Jul 10 05:18:21 PM PDT 24 |
Jul 10 05:18:51 PM PDT 24 |
10271330621 ps |
T108 |
/workspace/coverage/default/17.sram_ctrl_executable.3162974861 |
|
|
Jul 10 05:16:52 PM PDT 24 |
Jul 10 05:47:48 PM PDT 24 |
13616117234 ps |
T109 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2772611600 |
|
|
Jul 10 05:19:42 PM PDT 24 |
Jul 10 05:23:14 PM PDT 24 |
2135060337 ps |
T110 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2589456983 |
|
|
Jul 10 05:17:52 PM PDT 24 |
Jul 10 05:18:23 PM PDT 24 |
1713912252 ps |
T111 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.535136634 |
|
|
Jul 10 05:16:05 PM PDT 24 |
Jul 10 05:23:01 PM PDT 24 |
4214133009 ps |
T112 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.2150354864 |
|
|
Jul 10 05:18:42 PM PDT 24 |
Jul 10 05:18:56 PM PDT 24 |
83743503 ps |
T247 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2301880235 |
|
|
Jul 10 05:16:24 PM PDT 24 |
Jul 10 05:29:58 PM PDT 24 |
21169956115 ps |
T248 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.1645089319 |
|
|
Jul 10 05:17:19 PM PDT 24 |
Jul 10 05:36:25 PM PDT 24 |
4097077213 ps |
T249 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.3271601368 |
|
|
Jul 10 05:16:10 PM PDT 24 |
Jul 10 05:21:30 PM PDT 24 |
15203855520 ps |
T250 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.2854228795 |
|
|
Jul 10 05:17:02 PM PDT 24 |
Jul 10 05:30:25 PM PDT 24 |
18984039290 ps |
T251 |
/workspace/coverage/default/8.sram_ctrl_partial_access.2763664845 |
|
|
Jul 10 05:16:25 PM PDT 24 |
Jul 10 05:17:18 PM PDT 24 |
248224016 ps |
T252 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.1305783314 |
|
|
Jul 10 05:17:41 PM PDT 24 |
Jul 10 05:18:34 PM PDT 24 |
431305139 ps |
T253 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2045880763 |
|
|
Jul 10 05:16:25 PM PDT 24 |
Jul 10 05:22:25 PM PDT 24 |
14355523635 ps |
T254 |
/workspace/coverage/default/45.sram_ctrl_partial_access.266925415 |
|
|
Jul 10 05:19:25 PM PDT 24 |
Jul 10 05:19:38 PM PDT 24 |
405352949 ps |
T255 |
/workspace/coverage/default/5.sram_ctrl_executable.3065861138 |
|
|
Jul 10 05:16:20 PM PDT 24 |
Jul 10 05:21:14 PM PDT 24 |
1524378437 ps |
T256 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2739656582 |
|
|
Jul 10 05:19:52 PM PDT 24 |
Jul 10 05:20:00 PM PDT 24 |
541744144 ps |
T257 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.206689886 |
|
|
Jul 10 05:19:44 PM PDT 24 |
Jul 10 05:25:40 PM PDT 24 |
38650293870 ps |
T258 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.264972965 |
|
|
Jul 10 05:16:49 PM PDT 24 |
Jul 10 05:16:56 PM PDT 24 |
263221284 ps |
T259 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.1896584288 |
|
|
Jul 10 05:17:50 PM PDT 24 |
Jul 10 05:22:42 PM PDT 24 |
15300837131 ps |
T260 |
/workspace/coverage/default/23.sram_ctrl_partial_access.1139470930 |
|
|
Jul 10 05:17:07 PM PDT 24 |
Jul 10 05:18:42 PM PDT 24 |
967753824 ps |
T261 |
/workspace/coverage/default/47.sram_ctrl_executable.624445981 |
|
|
Jul 10 05:19:48 PM PDT 24 |
Jul 10 05:41:50 PM PDT 24 |
15843538655 ps |
T262 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.301505485 |
|
|
Jul 10 05:17:31 PM PDT 24 |
Jul 10 05:17:40 PM PDT 24 |
697228474 ps |
T263 |
/workspace/coverage/default/39.sram_ctrl_executable.4085126106 |
|
|
Jul 10 05:18:44 PM PDT 24 |
Jul 10 05:39:03 PM PDT 24 |
151773320746 ps |
T264 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.27665723 |
|
|
Jul 10 05:16:06 PM PDT 24 |
Jul 10 05:28:49 PM PDT 24 |
1365497234 ps |
T265 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.493283613 |
|
|
Jul 10 05:18:16 PM PDT 24 |
Jul 10 05:19:48 PM PDT 24 |
437607000 ps |
T266 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2337566932 |
|
|
Jul 10 05:20:09 PM PDT 24 |
Jul 10 05:24:22 PM PDT 24 |
14321172920 ps |
T267 |
/workspace/coverage/default/20.sram_ctrl_smoke.430438732 |
|
|
Jul 10 05:16:52 PM PDT 24 |
Jul 10 05:19:43 PM PDT 24 |
1372724184 ps |
T268 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.927006799 |
|
|
Jul 10 05:16:10 PM PDT 24 |
Jul 10 05:22:05 PM PDT 24 |
13230917478 ps |
T269 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.2880600426 |
|
|
Jul 10 05:17:07 PM PDT 24 |
Jul 10 05:21:26 PM PDT 24 |
2783923635 ps |
T270 |
/workspace/coverage/default/3.sram_ctrl_executable.1530998883 |
|
|
Jul 10 05:16:17 PM PDT 24 |
Jul 10 05:46:50 PM PDT 24 |
6699453992 ps |
T271 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.856506476 |
|
|
Jul 10 05:16:26 PM PDT 24 |
Jul 10 05:16:32 PM PDT 24 |
2314107202 ps |
T272 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2730291143 |
|
|
Jul 10 05:16:27 PM PDT 24 |
Jul 10 05:18:59 PM PDT 24 |
799491942 ps |
T273 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.297274945 |
|
|
Jul 10 05:17:27 PM PDT 24 |
Jul 10 05:18:06 PM PDT 24 |
190281230 ps |
T274 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.2288659765 |
|
|
Jul 10 05:18:42 PM PDT 24 |
Jul 10 05:18:46 PM PDT 24 |
1270296858 ps |
T275 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2568243000 |
|
|
Jul 10 05:20:01 PM PDT 24 |
Jul 10 05:25:12 PM PDT 24 |
14331117705 ps |
T276 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1191312033 |
|
|
Jul 10 05:19:30 PM PDT 24 |
Jul 10 05:19:32 PM PDT 24 |
65219879 ps |
T277 |
/workspace/coverage/default/22.sram_ctrl_smoke.498755348 |
|
|
Jul 10 05:17:04 PM PDT 24 |
Jul 10 05:19:36 PM PDT 24 |
1296746890 ps |
T278 |
/workspace/coverage/default/29.sram_ctrl_smoke.1412025666 |
|
|
Jul 10 05:17:37 PM PDT 24 |
Jul 10 05:18:09 PM PDT 24 |
98592428 ps |
T279 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.3686922629 |
|
|
Jul 10 05:18:31 PM PDT 24 |
Jul 10 05:18:43 PM PDT 24 |
949619905 ps |
T280 |
/workspace/coverage/default/15.sram_ctrl_smoke.929753777 |
|
|
Jul 10 05:16:45 PM PDT 24 |
Jul 10 05:17:23 PM PDT 24 |
85821476 ps |
T281 |
/workspace/coverage/default/37.sram_ctrl_regwen.924895619 |
|
|
Jul 10 05:18:28 PM PDT 24 |
Jul 10 05:24:19 PM PDT 24 |
21246457919 ps |
T282 |
/workspace/coverage/default/12.sram_ctrl_smoke.3909308857 |
|
|
Jul 10 05:16:39 PM PDT 24 |
Jul 10 05:16:50 PM PDT 24 |
144740914 ps |
T283 |
/workspace/coverage/default/11.sram_ctrl_executable.1188146735 |
|
|
Jul 10 05:16:38 PM PDT 24 |
Jul 10 05:45:28 PM PDT 24 |
77622749783 ps |
T284 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2437137033 |
|
|
Jul 10 05:20:10 PM PDT 24 |
Jul 10 05:31:23 PM PDT 24 |
2118969307 ps |
T285 |
/workspace/coverage/default/22.sram_ctrl_regwen.2739475944 |
|
|
Jul 10 05:17:02 PM PDT 24 |
Jul 10 05:24:41 PM PDT 24 |
53924090444 ps |
T286 |
/workspace/coverage/default/41.sram_ctrl_stress_all.435489406 |
|
|
Jul 10 05:19:10 PM PDT 24 |
Jul 10 05:32:12 PM PDT 24 |
16776219703 ps |
T287 |
/workspace/coverage/default/27.sram_ctrl_alert_test.3291814339 |
|
|
Jul 10 05:17:35 PM PDT 24 |
Jul 10 05:17:37 PM PDT 24 |
14614502 ps |
T288 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.3576859972 |
|
|
Jul 10 05:16:56 PM PDT 24 |
Jul 10 05:17:25 PM PDT 24 |
410112503 ps |
T289 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2415279022 |
|
|
Jul 10 05:19:45 PM PDT 24 |
Jul 10 05:21:07 PM PDT 24 |
1002056685 ps |
T290 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.790241530 |
|
|
Jul 10 05:18:37 PM PDT 24 |
Jul 10 05:18:43 PM PDT 24 |
696534307 ps |
T291 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.3848508996 |
|
|
Jul 10 05:17:43 PM PDT 24 |
Jul 10 05:17:49 PM PDT 24 |
563045670 ps |
T292 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.3700998269 |
|
|
Jul 10 05:16:56 PM PDT 24 |
Jul 10 05:19:05 PM PDT 24 |
540768787 ps |
T293 |
/workspace/coverage/default/16.sram_ctrl_alert_test.2922352268 |
|
|
Jul 10 05:16:50 PM PDT 24 |
Jul 10 05:16:55 PM PDT 24 |
42806889 ps |
T294 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1139491393 |
|
|
Jul 10 05:16:45 PM PDT 24 |
Jul 10 05:22:14 PM PDT 24 |
4394284182 ps |
T295 |
/workspace/coverage/default/5.sram_ctrl_stress_all.3500938585 |
|
|
Jul 10 05:16:25 PM PDT 24 |
Jul 10 06:05:34 PM PDT 24 |
34675847708 ps |
T296 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.3479254639 |
|
|
Jul 10 05:16:52 PM PDT 24 |
Jul 10 05:16:58 PM PDT 24 |
60670176 ps |
T297 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2748337536 |
|
|
Jul 10 05:16:26 PM PDT 24 |
Jul 10 05:17:13 PM PDT 24 |
216418554 ps |
T298 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2754131799 |
|
|
Jul 10 05:16:43 PM PDT 24 |
Jul 10 05:17:08 PM PDT 24 |
3692764999 ps |
T299 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.3919626222 |
|
|
Jul 10 05:19:04 PM PDT 24 |
Jul 10 05:19:08 PM PDT 24 |
102961286 ps |
T300 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.162179459 |
|
|
Jul 10 05:18:32 PM PDT 24 |
Jul 10 05:38:21 PM PDT 24 |
6924541625 ps |
T301 |
/workspace/coverage/default/32.sram_ctrl_executable.2129017580 |
|
|
Jul 10 05:17:53 PM PDT 24 |
Jul 10 05:32:07 PM PDT 24 |
16016806467 ps |
T302 |
/workspace/coverage/default/25.sram_ctrl_executable.257525230 |
|
|
Jul 10 05:17:26 PM PDT 24 |
Jul 10 05:27:38 PM PDT 24 |
6676160095 ps |
T303 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.1658882938 |
|
|
Jul 10 05:19:06 PM PDT 24 |
Jul 10 05:19:08 PM PDT 24 |
48678719 ps |
T304 |
/workspace/coverage/default/6.sram_ctrl_alert_test.2808009047 |
|
|
Jul 10 05:16:22 PM PDT 24 |
Jul 10 05:16:24 PM PDT 24 |
25270416 ps |