| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1358139449 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2388929801 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3064033315 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1072065179 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3187176526 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1288382038 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.235786590 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.4011750910 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2591144893 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3586989585 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.402704783 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3656752201 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.4007989833 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3332609100 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1510819183 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2020272456 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1403689335 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2216673382 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1860058546 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1446185416 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2270626601 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3528450975 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3916395967 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3764410861 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3635591829 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3309180133 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1550662861 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.268078048 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3802347868 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2177162536 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2196469676 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.398685485 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.981833404 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.4004149534 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3426850395 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1338538357 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2958901566 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1001029539 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1108143873 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1895677871 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.593672426 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.322594149 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3971868014 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.693355382 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.903732255 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3604180000 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1141130342 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1464433505 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3013815043 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1988727646 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2736110396 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2945511066 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.333497457 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.794960739 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2098936015 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.77370890 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.376611265 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3626013892 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3016687096 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.188076294 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2847528045 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1115988283 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3755011487 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.806222195 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3118410919 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3065860841 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.580773609 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2861288411 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1229317627 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3866879065 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3342711692 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2668398946 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2308406004 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3693867070 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3582712716 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1949099159 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2631333795 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.309674569 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2978960685 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3663863878 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.469762683 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1785377311 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1801272513 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.671858282 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1743486600 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3297976981 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.805709122 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2013609067 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2040539739 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2060052368 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.880365393 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3320242520 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2605709063 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2295593408 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2379685170 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2939220990 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.783496013 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2584549704 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.770416437 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1165452824 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.4062932382 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.185649994 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1827637990 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.44694509 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.334665904 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2896361690 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.225359969 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3807295295 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1542513627 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1085641893 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.4027132663 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.114291369 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3273930451 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.4034724822 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3793169502 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1086177555 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1855124196 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1090979463 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3458101228 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3780488138 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2612477156 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1543193781 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1726235348 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1113125231 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1396233452 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.4189998767 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.4228715255 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1889912086 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.4273214913 |
| /workspace/coverage/default/0.sram_ctrl_access_during_key_req.2940979372 |
| /workspace/coverage/default/0.sram_ctrl_alert_test.3511369519 |
| /workspace/coverage/default/0.sram_ctrl_bijection.1438820909 |
| /workspace/coverage/default/0.sram_ctrl_executable.2094641380 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.2839040099 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.733284418 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.1530652567 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.2001224818 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.272900234 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.2545120456 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1632773132 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.2132114822 |
| /workspace/coverage/default/0.sram_ctrl_regwen.2460190116 |
| /workspace/coverage/default/0.sram_ctrl_sec_cm.3362577956 |
| /workspace/coverage/default/0.sram_ctrl_smoke.3792157715 |
| /workspace/coverage/default/0.sram_ctrl_stress_all.2938229649 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.2421157684 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4181198035 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.4158646740 |
| /workspace/coverage/default/1.sram_ctrl_alert_test.3663244391 |
| /workspace/coverage/default/1.sram_ctrl_bijection.2185750490 |
| /workspace/coverage/default/1.sram_ctrl_executable.827487853 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.205055039 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.3898927481 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.1993989119 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.2108344175 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.847904171 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.1125545988 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.105695099 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.3369160043 |
| /workspace/coverage/default/1.sram_ctrl_regwen.1437477895 |
| /workspace/coverage/default/1.sram_ctrl_sec_cm.4209800495 |
| /workspace/coverage/default/1.sram_ctrl_smoke.1694612682 |
| /workspace/coverage/default/1.sram_ctrl_stress_all.4109113795 |
| /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2274789758 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.1688713286 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.165207066 |
| /workspace/coverage/default/10.sram_ctrl_access_during_key_req.351631935 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.3566900858 |
| /workspace/coverage/default/10.sram_ctrl_bijection.3504795979 |
| /workspace/coverage/default/10.sram_ctrl_executable.2096232049 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.839808745 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.2450241478 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.740400137 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.1927719200 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.1740733078 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.1260508321 |
| /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.867039069 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.2668137035 |
| /workspace/coverage/default/10.sram_ctrl_regwen.2113523206 |
| /workspace/coverage/default/10.sram_ctrl_smoke.2381383854 |
| /workspace/coverage/default/10.sram_ctrl_stress_all.1593142747 |
| /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3001257216 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.167225003 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.2748732799 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.4067435540 |
| /workspace/coverage/default/11.sram_ctrl_bijection.2331776332 |
| /workspace/coverage/default/11.sram_ctrl_executable.2247143418 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.4048873548 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.3638616583 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.189899016 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.3259920900 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.4287596809 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.2563617904 |
| /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2174796695 |
| /workspace/coverage/default/11.sram_ctrl_ram_cfg.583392803 |
| /workspace/coverage/default/11.sram_ctrl_regwen.3985535829 |
| /workspace/coverage/default/11.sram_ctrl_smoke.338370974 |
| /workspace/coverage/default/11.sram_ctrl_stress_all.717380054 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.900367533 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.2966892495 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.517326874 |
| /workspace/coverage/default/12.sram_ctrl_access_during_key_req.3237069936 |
| /workspace/coverage/default/12.sram_ctrl_alert_test.637668146 |
| /workspace/coverage/default/12.sram_ctrl_bijection.2448165105 |
| /workspace/coverage/default/12.sram_ctrl_executable.876646400 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.3904330024 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.1984414606 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.2136779338 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.2901253370 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.2922551129 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.2197664379 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3695107706 |
| /workspace/coverage/default/12.sram_ctrl_ram_cfg.3217573476 |
| /workspace/coverage/default/12.sram_ctrl_regwen.1767653193 |
| /workspace/coverage/default/12.sram_ctrl_smoke.2363226715 |
| /workspace/coverage/default/12.sram_ctrl_stress_all.1827383635 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.2069675851 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3717159107 |
| /workspace/coverage/default/13.sram_ctrl_access_during_key_req.2089050275 |
| /workspace/coverage/default/13.sram_ctrl_bijection.1332499997 |
| /workspace/coverage/default/13.sram_ctrl_executable.2554257928 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.3743021275 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.3633659803 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.3649066501 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.3153052194 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.3437605074 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.1784389065 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.290734840 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.1950446926 |
| /workspace/coverage/default/13.sram_ctrl_regwen.102367534 |
| /workspace/coverage/default/13.sram_ctrl_smoke.3364302163 |
| /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3596583077 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.3885283716 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.101849435 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.451410667 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.3270199350 |
| /workspace/coverage/default/14.sram_ctrl_bijection.1456037471 |
| /workspace/coverage/default/14.sram_ctrl_executable.1170145612 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.1746629903 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.3100358602 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.346763953 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.3023227848 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.33280640 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.2747328110 |
| /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.4149891076 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.683243595 |
| /workspace/coverage/default/14.sram_ctrl_regwen.33920116 |
| /workspace/coverage/default/14.sram_ctrl_smoke.3423935634 |
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| /workspace/coverage/default/43.sram_ctrl_max_throughput.3586439187 |
| /workspace/coverage/default/43.sram_ctrl_mem_partial_access.817207357 |
| /workspace/coverage/default/43.sram_ctrl_mem_walk.2027012929 |
| /workspace/coverage/default/43.sram_ctrl_multiple_keys.1032434291 |
| /workspace/coverage/default/43.sram_ctrl_partial_access.2473416745 |
| /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3198818407 |
| /workspace/coverage/default/43.sram_ctrl_ram_cfg.3497910845 |
| /workspace/coverage/default/43.sram_ctrl_regwen.1906947355 |
| /workspace/coverage/default/43.sram_ctrl_smoke.2021933851 |
| /workspace/coverage/default/43.sram_ctrl_stress_all.3279113490 |
| /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1870419660 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.1406208698 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.295220833 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.2485655245 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.3023496749 |
| /workspace/coverage/default/44.sram_ctrl_bijection.2891333593 |
| /workspace/coverage/default/44.sram_ctrl_executable.1343392353 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.3049593327 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.2523563750 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.499084555 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.2042927413 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.2323633712 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.4207732464 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.907055643 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.3482494944 |
| /workspace/coverage/default/44.sram_ctrl_regwen.1226639901 |
| /workspace/coverage/default/44.sram_ctrl_smoke.3042159323 |
| /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.895179220 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.2917059826 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.672391914 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.733142509 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.770224279 |
| /workspace/coverage/default/45.sram_ctrl_bijection.977491275 |
| /workspace/coverage/default/45.sram_ctrl_executable.2243817011 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.4018446009 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.1273079132 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.411350483 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.4030399324 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.2359295349 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.3510347264 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1409523332 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.1592539648 |
| /workspace/coverage/default/45.sram_ctrl_regwen.3016023784 |
| /workspace/coverage/default/45.sram_ctrl_smoke.1914516900 |
| /workspace/coverage/default/45.sram_ctrl_stress_all.4108066306 |
| /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.4288433631 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.3651318042 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.247776913 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.2636287926 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.3042996599 |
| /workspace/coverage/default/46.sram_ctrl_bijection.701610041 |
| /workspace/coverage/default/46.sram_ctrl_executable.956684769 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.3379647579 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.2874575404 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.4000291873 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.4090810012 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.474448413 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.1185772466 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2532365937 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.1693504356 |
| /workspace/coverage/default/46.sram_ctrl_regwen.3654542988 |
| /workspace/coverage/default/46.sram_ctrl_smoke.2112597516 |
| /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2195576404 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.840187647 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1270251621 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.3350183983 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.1186494432 |
| /workspace/coverage/default/47.sram_ctrl_bijection.1672130836 |
| /workspace/coverage/default/47.sram_ctrl_executable.1711330232 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.1053460932 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.395695970 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.4272389081 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.2923692411 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.1994955390 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.1873054857 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3453532935 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.251519206 |
| /workspace/coverage/default/47.sram_ctrl_regwen.2687995095 |
| /workspace/coverage/default/47.sram_ctrl_smoke.1328192232 |
| /workspace/coverage/default/47.sram_ctrl_stress_all.86470697 |
| /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.717049098 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.1008311672 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2632138306 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.3437671583 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.3244028086 |
| /workspace/coverage/default/48.sram_ctrl_bijection.1598491761 |
| /workspace/coverage/default/48.sram_ctrl_executable.738142043 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.1804847632 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.4292719906 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.2885147849 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.1297751923 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.1582927496 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.1302258715 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.541306960 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.2521529927 |
| /workspace/coverage/default/48.sram_ctrl_regwen.2618202790 |
| /workspace/coverage/default/48.sram_ctrl_smoke.1739889754 |
| /workspace/coverage/default/48.sram_ctrl_stress_all.499506876 |
| /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.4039368476 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.1160385827 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1693980038 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.722946199 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.811344948 |
| /workspace/coverage/default/49.sram_ctrl_bijection.1248285788 |
| /workspace/coverage/default/49.sram_ctrl_executable.849200291 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.2370539961 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.1194704307 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.2298186577 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.1358601381 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.1966149755 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.3955615503 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2859933727 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.2881633755 |
| /workspace/coverage/default/49.sram_ctrl_regwen.3297498909 |
| /workspace/coverage/default/49.sram_ctrl_smoke.1413612104 |
| /workspace/coverage/default/49.sram_ctrl_stress_all.4019266364 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.3103143688 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2650505950 |
| /workspace/coverage/default/5.sram_ctrl_access_during_key_req.175899177 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.3813967449 |
| /workspace/coverage/default/5.sram_ctrl_bijection.2910371208 |
| /workspace/coverage/default/5.sram_ctrl_executable.1749913032 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.1216216148 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.2964552741 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.1622337688 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.4075287631 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.838980137 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.1673935173 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.114276880 |
| /workspace/coverage/default/5.sram_ctrl_regwen.1366477669 |
| /workspace/coverage/default/5.sram_ctrl_smoke.1513478781 |
| /workspace/coverage/default/5.sram_ctrl_stress_all.2804447443 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.4213803529 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.3142788132 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1562660247 |
| /workspace/coverage/default/6.sram_ctrl_access_during_key_req.2876321508 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.1836807785 |
| /workspace/coverage/default/6.sram_ctrl_bijection.845119082 |
| /workspace/coverage/default/6.sram_ctrl_executable.2439548575 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.456963267 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.1774128586 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.462757522 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.830474823 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.3316053995 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.2035282876 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3484342004 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.697943477 |
| /workspace/coverage/default/6.sram_ctrl_regwen.3448732913 |
| /workspace/coverage/default/6.sram_ctrl_smoke.1602107270 |
| /workspace/coverage/default/6.sram_ctrl_stress_all.2057193596 |
| /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3247155626 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.4290749947 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.383235609 |
| /workspace/coverage/default/7.sram_ctrl_access_during_key_req.3087921604 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.3446102577 |
| /workspace/coverage/default/7.sram_ctrl_bijection.2904070961 |
| /workspace/coverage/default/7.sram_ctrl_executable.393113205 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.2784329054 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.3103042658 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.455097917 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.2253901072 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.3848055417 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.2583029063 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2880109604 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.2623711607 |
| /workspace/coverage/default/7.sram_ctrl_regwen.682456460 |
| /workspace/coverage/default/7.sram_ctrl_smoke.3298433377 |
| /workspace/coverage/default/7.sram_ctrl_stress_all.1968085230 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.2626077236 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4043618503 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.3119559585 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.583722829 |
| /workspace/coverage/default/8.sram_ctrl_bijection.2656507450 |
| /workspace/coverage/default/8.sram_ctrl_executable.2084141288 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.3833808212 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.1816139451 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.1365773708 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.3457753482 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.3871742310 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.2692476471 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1945988559 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.312230643 |
| /workspace/coverage/default/8.sram_ctrl_regwen.2201716297 |
| /workspace/coverage/default/8.sram_ctrl_smoke.3802975483 |
| /workspace/coverage/default/8.sram_ctrl_stress_all.2115438233 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.2220044458 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1490585921 |
| /workspace/coverage/default/9.sram_ctrl_access_during_key_req.4070180934 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.1239643359 |
| /workspace/coverage/default/9.sram_ctrl_bijection.1003686604 |
| /workspace/coverage/default/9.sram_ctrl_executable.3888298232 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.1595851624 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.472800897 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.3940011329 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.1616984412 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.302770797 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.1593066196 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.994127520 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.118776027 |
| /workspace/coverage/default/9.sram_ctrl_regwen.3184030220 |
| /workspace/coverage/default/9.sram_ctrl_smoke.4185422645 |
| /workspace/coverage/default/9.sram_ctrl_stress_all.2999854779 |
| /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2943200004 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.202911496 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.797210412 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1968085230 |
|
|
Jul 12 05:12:58 PM PDT 24 |
Jul 12 05:46:17 PM PDT 24 |
24569572557 ps |
| T2 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.3721300420 |
|
|
Jul 12 05:14:01 PM PDT 24 |
Jul 12 05:14:10 PM PDT 24 |
5805892575 ps |
| T3 |
/workspace/coverage/default/41.sram_ctrl_stress_all.1687916806 |
|
|
Jul 12 05:16:36 PM PDT 24 |
Jul 12 06:05:42 PM PDT 24 |
163964044451 ps |
| T6 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.3401352893 |
|
|
Jul 12 05:15:58 PM PDT 24 |
Jul 12 05:16:00 PM PDT 24 |
132449273 ps |
| T4 |
/workspace/coverage/default/31.sram_ctrl_smoke.2598914842 |
|
|
Jul 12 05:15:05 PM PDT 24 |
Jul 12 05:15:10 PM PDT 24 |
721243702 ps |
| T7 |
/workspace/coverage/default/41.sram_ctrl_smoke.2103018805 |
|
|
Jul 12 05:16:28 PM PDT 24 |
Jul 12 05:16:41 PM PDT 24 |
433807904 ps |
| T8 |
/workspace/coverage/default/1.sram_ctrl_stress_all.4109113795 |
|
|
Jul 12 05:12:39 PM PDT 24 |
Jul 12 06:12:25 PM PDT 24 |
19590989044 ps |
| T9 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.388222845 |
|
|
Jul 12 05:13:24 PM PDT 24 |
Jul 12 05:15:37 PM PDT 24 |
147936382 ps |
| T10 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2023471076 |
|
|
Jul 12 05:14:17 PM PDT 24 |
Jul 12 05:14:25 PM PDT 24 |
230306062 ps |
| T11 |
/workspace/coverage/default/28.sram_ctrl_smoke.3133229235 |
|
|
Jul 12 05:14:40 PM PDT 24 |
Jul 12 05:14:54 PM PDT 24 |
222212212 ps |
| T12 |
/workspace/coverage/default/3.sram_ctrl_alert_test.2724903620 |
|
|
Jul 12 05:12:41 PM PDT 24 |
Jul 12 05:12:43 PM PDT 24 |
11361512 ps |
| T13 |
/workspace/coverage/default/6.sram_ctrl_alert_test.1836807785 |
|
|
Jul 12 05:12:57 PM PDT 24 |
Jul 12 05:13:02 PM PDT 24 |
29840962 ps |
| T38 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2562795594 |
|
|
Jul 12 05:13:06 PM PDT 24 |
Jul 12 05:18:17 PM PDT 24 |
12535335089 ps |
| T40 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.669911301 |
|
|
Jul 12 05:13:31 PM PDT 24 |
Jul 12 05:27:37 PM PDT 24 |
27430421566 ps |
| T63 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.867039069 |
|
|
Jul 12 05:13:05 PM PDT 24 |
Jul 12 05:17:44 PM PDT 24 |
14605557262 ps |
| T44 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.189899016 |
|
|
Jul 12 05:13:10 PM PDT 24 |
Jul 12 05:13:17 PM PDT 24 |
96263791 ps |
| T55 |
/workspace/coverage/default/25.sram_ctrl_bijection.916458252 |
|
|
Jul 12 05:14:25 PM PDT 24 |
Jul 12 05:15:35 PM PDT 24 |
1447683569 ps |
| T56 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.3692025820 |
|
|
Jul 12 05:15:37 PM PDT 24 |
Jul 12 05:17:01 PM PDT 24 |
156499555 ps |
| T57 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.509533651 |
|
|
Jul 12 05:14:20 PM PDT 24 |
Jul 12 05:15:03 PM PDT 24 |
104412862 ps |
| T58 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.1245032695 |
|
|
Jul 12 05:16:28 PM PDT 24 |
Jul 12 05:26:18 PM PDT 24 |
47128852130 ps |
| T39 |
/workspace/coverage/default/45.sram_ctrl_partial_access.3510347264 |
|
|
Jul 12 05:17:13 PM PDT 24 |
Jul 12 05:19:35 PM PDT 24 |
678549891 ps |
| T25 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2218113776 |
|
|
Jul 12 05:16:40 PM PDT 24 |
Jul 12 05:16:42 PM PDT 24 |
82449227 ps |
| T21 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1420764949 |
|
|
Jul 12 05:15:49 PM PDT 24 |
Jul 12 05:17:41 PM PDT 24 |
3682213826 ps |
| T22 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.4039368476 |
|
|
Jul 12 05:17:44 PM PDT 24 |
Jul 12 05:21:16 PM PDT 24 |
2213072597 ps |
| T24 |
/workspace/coverage/default/44.sram_ctrl_executable.1343392353 |
|
|
Jul 12 05:16:58 PM PDT 24 |
Jul 12 05:34:47 PM PDT 24 |
191547666666 ps |
| T5 |
/workspace/coverage/default/2.sram_ctrl_stress_all.2544792004 |
|
|
Jul 12 05:12:42 PM PDT 24 |
Jul 12 06:01:30 PM PDT 24 |
229451158941 ps |
| T41 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2940979372 |
|
|
Jul 12 05:12:34 PM PDT 24 |
Jul 12 05:20:34 PM PDT 24 |
4022910844 ps |
| T62 |
/workspace/coverage/default/4.sram_ctrl_regwen.1954571376 |
|
|
Jul 12 05:12:48 PM PDT 24 |
Jul 12 05:30:30 PM PDT 24 |
18772222497 ps |
| T72 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1008311672 |
|
|
Jul 12 05:17:42 PM PDT 24 |
Jul 12 05:21:33 PM PDT 24 |
28153592148 ps |
| T73 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.3035500896 |
|
|
Jul 12 05:14:23 PM PDT 24 |
Jul 12 05:15:16 PM PDT 24 |
239839816 ps |
| T18 |
/workspace/coverage/default/23.sram_ctrl_regwen.1384575767 |
|
|
Jul 12 05:14:09 PM PDT 24 |
Jul 12 05:36:56 PM PDT 24 |
61972264239 ps |
| T74 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2136779338 |
|
|
Jul 12 05:13:18 PM PDT 24 |
Jul 12 05:13:23 PM PDT 24 |
360981261 ps |
| T67 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1595851624 |
|
|
Jul 12 05:13:05 PM PDT 24 |
Jul 12 05:13:10 PM PDT 24 |
811049711 ps |
| T42 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.757813508 |
|
|
Jul 12 05:14:24 PM PDT 24 |
Jul 12 05:29:19 PM PDT 24 |
31471095546 ps |
| T158 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2874575404 |
|
|
Jul 12 05:17:20 PM PDT 24 |
Jul 12 05:19:46 PM PDT 24 |
191946169 ps |
| T86 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.183735308 |
|
|
Jul 12 05:14:50 PM PDT 24 |
Jul 12 05:14:53 PM PDT 24 |
44060267 ps |
| T26 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.316026843 |
|
|
Jul 12 05:13:36 PM PDT 24 |
Jul 12 05:13:38 PM PDT 24 |
68253722 ps |
| T68 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2839040099 |
|
|
Jul 12 05:12:41 PM PDT 24 |
Jul 12 05:12:46 PM PDT 24 |
371079915 ps |
| T75 |
/workspace/coverage/default/14.sram_ctrl_stress_all.1252335259 |
|
|
Jul 12 05:13:17 PM PDT 24 |
Jul 12 05:27:36 PM PDT 24 |
59062336092 ps |
| T48 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.4090810012 |
|
|
Jul 12 05:17:22 PM PDT 24 |
Jul 12 05:17:33 PM PDT 24 |
183091705 ps |
| T136 |
/workspace/coverage/default/13.sram_ctrl_executable.2554257928 |
|
|
Jul 12 05:13:22 PM PDT 24 |
Jul 12 05:33:18 PM PDT 24 |
3419810613 ps |
| T159 |
/workspace/coverage/default/14.sram_ctrl_smoke.3423935634 |
|
|
Jul 12 05:13:24 PM PDT 24 |
Jul 12 05:13:35 PM PDT 24 |
997774735 ps |
| T76 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.1238124711 |
|
|
Jul 12 05:15:47 PM PDT 24 |
Jul 12 05:15:51 PM PDT 24 |
251354544 ps |
| T144 |
/workspace/coverage/default/47.sram_ctrl_executable.1711330232 |
|
|
Jul 12 05:17:33 PM PDT 24 |
Jul 12 05:24:33 PM PDT 24 |
4279493817 ps |
| T100 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3103143688 |
|
|
Jul 12 05:17:41 PM PDT 24 |
Jul 12 05:20:00 PM PDT 24 |
5502974071 ps |
| T139 |
/workspace/coverage/default/35.sram_ctrl_regwen.1040934504 |
|
|
Jul 12 05:15:39 PM PDT 24 |
Jul 12 05:26:22 PM PDT 24 |
3657656726 ps |
| T160 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.1665715764 |
|
|
Jul 12 05:16:27 PM PDT 24 |
Jul 12 05:17:43 PM PDT 24 |
218525162 ps |
| T137 |
/workspace/coverage/default/25.sram_ctrl_regwen.3788445074 |
|
|
Jul 12 05:14:28 PM PDT 24 |
Jul 12 05:27:24 PM PDT 24 |
70385790267 ps |
| T101 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.202911496 |
|
|
Jul 12 05:13:04 PM PDT 24 |
Jul 12 05:15:24 PM PDT 24 |
8054068214 ps |
| T161 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2551093655 |
|
|
Jul 12 05:12:47 PM PDT 24 |
Jul 12 05:12:49 PM PDT 24 |
277164690 ps |
| T148 |
/workspace/coverage/default/24.sram_ctrl_smoke.3962624369 |
|
|
Jul 12 05:14:16 PM PDT 24 |
Jul 12 05:14:25 PM PDT 24 |
2113023742 ps |
| T162 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.3100358602 |
|
|
Jul 12 05:13:25 PM PDT 24 |
Jul 12 05:15:16 PM PDT 24 |
985133268 ps |
| T145 |
/workspace/coverage/default/10.sram_ctrl_regwen.2113523206 |
|
|
Jul 12 05:13:04 PM PDT 24 |
Jul 12 05:29:35 PM PDT 24 |
20107771687 ps |
| T153 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.1045658309 |
|
|
Jul 12 05:14:56 PM PDT 24 |
Jul 12 05:14:59 PM PDT 24 |
211952027 ps |
| T47 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3940011329 |
|
|
Jul 12 05:13:05 PM PDT 24 |
Jul 12 05:13:11 PM PDT 24 |
401454031 ps |
| T138 |
/workspace/coverage/default/15.sram_ctrl_regwen.1571047211 |
|
|
Jul 12 05:13:23 PM PDT 24 |
Jul 12 05:34:03 PM PDT 24 |
32833826168 ps |
| T147 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.2955235535 |
|
|
Jul 12 05:14:42 PM PDT 24 |
Jul 12 05:34:12 PM PDT 24 |
7029205604 ps |
| T151 |
/workspace/coverage/default/5.sram_ctrl_partial_access.1673935173 |
|
|
Jul 12 05:12:57 PM PDT 24 |
Jul 12 05:14:52 PM PDT 24 |
578851902 ps |
| T102 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.4245574145 |
|
|
Jul 12 05:15:32 PM PDT 24 |
Jul 12 05:20:16 PM PDT 24 |
2886392643 ps |
| T49 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.3244888607 |
|
|
Jul 12 05:13:36 PM PDT 24 |
Jul 12 05:13:43 PM PDT 24 |
170732492 ps |
| T103 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1709631309 |
|
|
Jul 12 05:12:44 PM PDT 24 |
Jul 12 05:15:25 PM PDT 24 |
4522331168 ps |
| T19 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.2350261172 |
|
|
Jul 12 05:14:07 PM PDT 24 |
Jul 12 05:14:14 PM PDT 24 |
420727186 ps |
| T143 |
/workspace/coverage/default/32.sram_ctrl_regwen.2639471683 |
|
|
Jul 12 05:15:22 PM PDT 24 |
Jul 12 05:22:41 PM PDT 24 |
1341466584 ps |
| T50 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.411350483 |
|
|
Jul 12 05:17:20 PM PDT 24 |
Jul 12 05:17:28 PM PDT 24 |
346881440 ps |
| T163 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.1381440590 |
|
|
Jul 12 05:14:49 PM PDT 24 |
Jul 12 05:17:22 PM PDT 24 |
138920105 ps |
| T156 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.2206033071 |
|
|
Jul 12 05:16:04 PM PDT 24 |
Jul 12 05:31:16 PM PDT 24 |
10433186338 ps |
| T155 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3720970265 |
|
|
Jul 12 05:15:14 PM PDT 24 |
Jul 12 05:16:37 PM PDT 24 |
1772913944 ps |
| T164 |
/workspace/coverage/default/4.sram_ctrl_bijection.836521157 |
|
|
Jul 12 05:12:49 PM PDT 24 |
Jul 12 05:13:58 PM PDT 24 |
49237439174 ps |
| T165 |
/workspace/coverage/default/32.sram_ctrl_smoke.1733616276 |
|
|
Jul 12 05:15:13 PM PDT 24 |
Jul 12 05:15:22 PM PDT 24 |
750557567 ps |
| T150 |
/workspace/coverage/default/46.sram_ctrl_bijection.701610041 |
|
|
Jul 12 05:17:15 PM PDT 24 |
Jul 12 05:18:27 PM PDT 24 |
2058108569 ps |
| T14 |
/workspace/coverage/default/15.sram_ctrl_alert_test.3767777669 |
|
|
Jul 12 05:13:35 PM PDT 24 |
Jul 12 05:13:36 PM PDT 24 |
56892367 ps |
| T51 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2253901072 |
|
|
Jul 12 05:13:02 PM PDT 24 |
Jul 12 05:13:15 PM PDT 24 |
2012513184 ps |
| T43 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.88449911 |
|
|
Jul 12 05:13:45 PM PDT 24 |
Jul 12 05:45:16 PM PDT 24 |
30415331096 ps |
| T87 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.1188232307 |
|
|
Jul 12 05:13:30 PM PDT 24 |
Jul 12 05:23:23 PM PDT 24 |
5445826321 ps |
| T104 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2859933727 |
|
|
Jul 12 05:17:42 PM PDT 24 |
Jul 12 05:24:32 PM PDT 24 |
129567944694 ps |
| T140 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.499084555 |
|
|
Jul 12 05:17:13 PM PDT 24 |
Jul 12 05:17:16 PM PDT 24 |
478983387 ps |
| T166 |
/workspace/coverage/default/48.sram_ctrl_regwen.2618202790 |
|
|
Jul 12 05:17:40 PM PDT 24 |
Jul 12 05:19:25 PM PDT 24 |
1954667397 ps |
| T157 |
/workspace/coverage/default/10.sram_ctrl_executable.2096232049 |
|
|
Jul 12 05:13:05 PM PDT 24 |
Jul 12 05:16:43 PM PDT 24 |
2346213241 ps |
| T152 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.539801604 |
|
|
Jul 12 05:16:05 PM PDT 24 |
Jul 12 05:16:06 PM PDT 24 |
77660146 ps |
| T167 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3087921604 |
|
|
Jul 12 05:12:57 PM PDT 24 |
Jul 12 05:23:26 PM PDT 24 |
2903552987 ps |
| T168 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.697943477 |
|
|
Jul 12 05:12:57 PM PDT 24 |
Jul 12 05:13:02 PM PDT 24 |
83324679 ps |
| T169 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.1052637111 |
|
|
Jul 12 05:13:44 PM PDT 24 |
Jul 12 05:13:48 PM PDT 24 |
182220739 ps |
| T170 |
/workspace/coverage/default/16.sram_ctrl_smoke.1230701491 |
|
|
Jul 12 05:13:33 PM PDT 24 |
Jul 12 05:13:48 PM PDT 24 |
913117417 ps |
| T171 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.3437605074 |
|
|
Jul 12 05:13:21 PM PDT 24 |
Jul 12 05:19:05 PM PDT 24 |
17169933467 ps |
| T20 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.977602957 |
|
|
Jul 12 05:14:23 PM PDT 24 |
Jul 12 05:14:30 PM PDT 24 |
1496925396 ps |
| T172 |
/workspace/coverage/default/32.sram_ctrl_stress_all.4102547191 |
|
|
Jul 12 05:15:20 PM PDT 24 |
Jul 12 05:42:48 PM PDT 24 |
59681027316 ps |
| T154 |
/workspace/coverage/default/5.sram_ctrl_executable.1749913032 |
|
|
Jul 12 05:12:51 PM PDT 24 |
Jul 12 05:21:32 PM PDT 24 |
3059013991 ps |
| T141 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.3161097151 |
|
|
Jul 12 05:15:47 PM PDT 24 |
Jul 12 05:21:44 PM PDT 24 |
13841662284 ps |
| T146 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.1544120895 |
|
|
Jul 12 05:15:07 PM PDT 24 |
Jul 12 05:15:18 PM PDT 24 |
9933663511 ps |
| T149 |
/workspace/coverage/default/36.sram_ctrl_regwen.3213148008 |
|
|
Jul 12 05:15:52 PM PDT 24 |
Jul 12 05:31:45 PM PDT 24 |
14480238839 ps |
| T173 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.3185236700 |
|
|
Jul 12 05:13:34 PM PDT 24 |
Jul 12 05:16:26 PM PDT 24 |
571249773 ps |
| T174 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.3217573476 |
|
|
Jul 12 05:13:10 PM PDT 24 |
Jul 12 05:13:12 PM PDT 24 |
104623369 ps |
| T52 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.3457753482 |
|
|
Jul 12 05:12:58 PM PDT 24 |
Jul 12 05:13:12 PM PDT 24 |
176096178 ps |
| T175 |
/workspace/coverage/default/18.sram_ctrl_partial_access.919859341 |
|
|
Jul 12 05:13:44 PM PDT 24 |
Jul 12 05:14:00 PM PDT 24 |
2586387031 ps |
| T176 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.4110894614 |
|
|
Jul 12 05:16:00 PM PDT 24 |
Jul 12 05:33:05 PM PDT 24 |
51443301716 ps |
| T23 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.1338574762 |
|
|
Jul 12 05:14:12 PM PDT 24 |
Jul 12 05:17:22 PM PDT 24 |
4224492650 ps |
| T177 |
/workspace/coverage/default/3.sram_ctrl_stress_all.1798921722 |
|
|
Jul 12 05:12:41 PM PDT 24 |
Jul 12 05:58:55 PM PDT 24 |
24616528504 ps |
| T178 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.404249652 |
|
|
Jul 12 05:14:11 PM PDT 24 |
Jul 12 05:14:31 PM PDT 24 |
161095400 ps |
| T53 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.2814498400 |
|
|
Jul 12 05:14:13 PM PDT 24 |
Jul 12 05:14:23 PM PDT 24 |
400589957 ps |
| T179 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.384270268 |
|
|
Jul 12 05:15:47 PM PDT 24 |
Jul 12 05:15:49 PM PDT 24 |
168938264 ps |
| T180 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.295220833 |
|
|
Jul 12 05:16:50 PM PDT 24 |
Jul 12 05:17:29 PM PDT 24 |
419793901 ps |
| T181 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.3682765491 |
|
|
Jul 12 05:14:13 PM PDT 24 |
Jul 12 05:14:19 PM PDT 24 |
341495280 ps |
| T182 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2563617904 |
|
|
Jul 12 05:13:19 PM PDT 24 |
Jul 12 05:13:33 PM PDT 24 |
665370880 ps |
| T45 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2195576404 |
|
|
Jul 12 05:17:26 PM PDT 24 |
Jul 12 05:17:36 PM PDT 24 |
289301379 ps |
| T183 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1328088517 |
|
|
Jul 12 05:15:27 PM PDT 24 |
Jul 12 05:19:38 PM PDT 24 |
3415518568 ps |
| T184 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3049593327 |
|
|
Jul 12 05:16:58 PM PDT 24 |
Jul 12 05:17:09 PM PDT 24 |
848226435 ps |
| T185 |
/workspace/coverage/default/8.sram_ctrl_executable.2084141288 |
|
|
Jul 12 05:12:56 PM PDT 24 |
Jul 12 05:16:57 PM PDT 24 |
1429427871 ps |
| T142 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.2709472479 |
|
|
Jul 12 05:14:17 PM PDT 24 |
Jul 12 05:23:04 PM PDT 24 |
60385905533 ps |
| T186 |
/workspace/coverage/default/7.sram_ctrl_bijection.2904070961 |
|
|
Jul 12 05:12:56 PM PDT 24 |
Jul 12 05:13:21 PM PDT 24 |
1837390084 ps |
| T187 |
/workspace/coverage/default/20.sram_ctrl_stress_all.4120246172 |
|
|
Jul 12 05:13:59 PM PDT 24 |
Jul 12 05:39:06 PM PDT 24 |
20237812909 ps |
| T46 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3114933644 |
|
|
Jul 12 05:12:46 PM PDT 24 |
Jul 12 05:13:39 PM PDT 24 |
3418927151 ps |
| T114 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.1524918859 |
|
|
Jul 12 05:14:14 PM PDT 24 |
Jul 12 05:14:20 PM PDT 24 |
183282323 ps |
| T115 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1632773132 |
|
|
Jul 12 05:12:33 PM PDT 24 |
Jul 12 05:19:13 PM PDT 24 |
48373151172 ps |
| T116 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.3128083877 |
|
|
Jul 12 05:14:04 PM PDT 24 |
Jul 12 05:24:25 PM PDT 24 |
220141782999 ps |
| T117 |
/workspace/coverage/default/21.sram_ctrl_alert_test.2779208228 |
|
|
Jul 12 05:14:11 PM PDT 24 |
Jul 12 05:14:13 PM PDT 24 |
49452980 ps |
| T118 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.3670765661 |
|
|
Jul 12 05:12:42 PM PDT 24 |
Jul 12 05:12:52 PM PDT 24 |
68029501 ps |
| T119 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.1506285422 |
|
|
Jul 12 05:14:08 PM PDT 24 |
Jul 12 05:17:59 PM PDT 24 |
9857237308 ps |
| T120 |
/workspace/coverage/default/22.sram_ctrl_regwen.1637574181 |
|
|
Jul 12 05:14:12 PM PDT 24 |
Jul 12 05:23:09 PM PDT 24 |
2412835681 ps |
| T121 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.3731339200 |
|
|
Jul 12 05:15:59 PM PDT 24 |
Jul 12 05:16:08 PM PDT 24 |
743806443 ps |
| T122 |
/workspace/coverage/default/5.sram_ctrl_bijection.2910371208 |
|
|
Jul 12 05:13:03 PM PDT 24 |
Jul 12 05:13:55 PM PDT 24 |
5889827279 ps |
| T188 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.272900234 |
|
|
Jul 12 05:12:35 PM PDT 24 |
Jul 12 05:15:13 PM PDT 24 |
6447179522 ps |
| T189 |
/workspace/coverage/default/34.sram_ctrl_bijection.4021483146 |
|
|
Jul 12 05:15:27 PM PDT 24 |
Jul 12 05:16:24 PM PDT 24 |
1754894525 ps |
| T123 |
/workspace/coverage/default/36.sram_ctrl_stress_all.1955965038 |
|
|
Jul 12 05:15:50 PM PDT 24 |
Jul 12 05:58:16 PM PDT 24 |
38151644072 ps |
| T54 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.2636762454 |
|
|
Jul 12 05:15:07 PM PDT 24 |
Jul 12 05:17:04 PM PDT 24 |
546345446 ps |
| T190 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.1259396467 |
|
|
Jul 12 05:16:21 PM PDT 24 |
Jul 12 05:20:29 PM PDT 24 |
10023683397 ps |
| T191 |
/workspace/coverage/default/40.sram_ctrl_stress_all.4173743155 |
|
|
Jul 12 05:16:23 PM PDT 24 |
Jul 12 06:39:12 PM PDT 24 |
103794243816 ps |
| T192 |
/workspace/coverage/default/9.sram_ctrl_regwen.3184030220 |
|
|
Jul 12 05:13:04 PM PDT 24 |
Jul 12 05:32:03 PM PDT 24 |
22181170042 ps |
| T193 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.3113951887 |
|
|
Jul 12 05:13:48 PM PDT 24 |
Jul 12 05:13:50 PM PDT 24 |
80043012 ps |
| T194 |
/workspace/coverage/default/39.sram_ctrl_alert_test.576077208 |
|
|
Jul 12 05:16:15 PM PDT 24 |
Jul 12 05:16:16 PM PDT 24 |
12824393 ps |
| T195 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1945988559 |
|
|
Jul 12 05:12:57 PM PDT 24 |
Jul 12 05:19:51 PM PDT 24 |
237016396455 ps |
| T196 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2298186577 |
|
|
Jul 12 05:17:46 PM PDT 24 |
Jul 12 05:17:50 PM PDT 24 |
185197675 ps |
| T197 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.815607562 |
|
|
Jul 12 05:12:42 PM PDT 24 |
Jul 12 05:18:24 PM PDT 24 |
28286656040 ps |
| T69 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.895179220 |
|
|
Jul 12 05:17:05 PM PDT 24 |
Jul 12 05:20:28 PM PDT 24 |
1086985506 ps |
| T198 |
/workspace/coverage/default/13.sram_ctrl_alert_test.3312567366 |
|
|
Jul 12 05:13:18 PM PDT 24 |
Jul 12 05:13:19 PM PDT 24 |
31705367 ps |
| T199 |
/workspace/coverage/default/1.sram_ctrl_bijection.2185750490 |
|
|
Jul 12 05:12:36 PM PDT 24 |
Jul 12 05:13:03 PM PDT 24 |
4123470487 ps |
| T200 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1740733078 |
|
|
Jul 12 05:13:04 PM PDT 24 |
Jul 12 05:23:05 PM PDT 24 |
9353996965 ps |
| T201 |
/workspace/coverage/default/17.sram_ctrl_bijection.654096441 |
|
|
Jul 12 05:13:31 PM PDT 24 |
Jul 12 05:13:58 PM PDT 24 |
2335698517 ps |
| T202 |
/workspace/coverage/default/28.sram_ctrl_regwen.330728602 |
|
|
Jul 12 05:14:51 PM PDT 24 |
Jul 12 05:32:12 PM PDT 24 |
38876774408 ps |
| T203 |
/workspace/coverage/default/36.sram_ctrl_bijection.2591617965 |
|
|
Jul 12 05:15:38 PM PDT 24 |
Jul 12 05:16:40 PM PDT 24 |
2799392455 ps |
| T204 |
/workspace/coverage/default/33.sram_ctrl_regwen.2712155065 |
|
|
Jul 12 05:15:19 PM PDT 24 |
Jul 12 05:31:19 PM PDT 24 |
2350659248 ps |
| T205 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.33280640 |
|
|
Jul 12 05:13:24 PM PDT 24 |
Jul 12 05:30:52 PM PDT 24 |
3549856479 ps |
| T206 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.1370460281 |
|
|
Jul 12 05:14:01 PM PDT 24 |
Jul 12 05:14:16 PM PDT 24 |
618901126 ps |
| T207 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.346763953 |
|
|
Jul 12 05:13:16 PM PDT 24 |
Jul 12 05:13:20 PM PDT 24 |
218862258 ps |
| T208 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.3031966610 |
|
|
Jul 12 05:15:40 PM PDT 24 |
Jul 12 05:29:42 PM PDT 24 |
19609037653 ps |
| T209 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3833808212 |
|
|
Jul 12 05:12:55 PM PDT 24 |
Jul 12 05:13:01 PM PDT 24 |
4904645006 ps |
| T210 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.247776913 |
|
|
Jul 12 05:17:09 PM PDT 24 |
Jul 12 05:19:31 PM PDT 24 |
152951803 ps |
| T211 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.1853912534 |
|
|
Jul 12 05:13:44 PM PDT 24 |
Jul 12 05:28:46 PM PDT 24 |
12377575270 ps |
| T212 |
/workspace/coverage/default/29.sram_ctrl_executable.2947879028 |
|
|
Jul 12 05:14:54 PM PDT 24 |
Jul 12 05:19:26 PM PDT 24 |
2609543437 ps |
| T213 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2833025354 |
|
|
Jul 12 05:14:22 PM PDT 24 |
Jul 12 05:14:59 PM PDT 24 |
237618558 ps |
| T214 |
/workspace/coverage/default/26.sram_ctrl_smoke.2233829648 |
|
|
Jul 12 05:14:23 PM PDT 24 |
Jul 12 05:14:38 PM PDT 24 |
800982233 ps |
| T215 |
/workspace/coverage/default/1.sram_ctrl_alert_test.3663244391 |
|
|
Jul 12 05:12:53 PM PDT 24 |
Jul 12 05:12:55 PM PDT 24 |
97973673 ps |
| T70 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.4114584942 |
|
|
Jul 12 05:17:45 PM PDT 24 |
Jul 12 05:19:17 PM PDT 24 |
4819371262 ps |
| T216 |
/workspace/coverage/default/0.sram_ctrl_regwen.2460190116 |
|
|
Jul 12 05:12:33 PM PDT 24 |
Jul 12 05:22:52 PM PDT 24 |
34438798047 ps |
| T217 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.814324713 |
|
|
Jul 12 05:16:47 PM PDT 24 |
Jul 12 05:17:01 PM PDT 24 |
93453542 ps |
| T218 |
/workspace/coverage/default/4.sram_ctrl_stress_all.3819278822 |
|
|
Jul 12 05:12:47 PM PDT 24 |
Jul 12 05:56:56 PM PDT 24 |
449363521764 ps |
| T219 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2922551129 |
|
|
Jul 12 05:13:13 PM PDT 24 |
Jul 12 05:27:03 PM PDT 24 |
9558931870 ps |
| T220 |
/workspace/coverage/default/38.sram_ctrl_stress_all.2356484400 |
|
|
Jul 12 05:16:09 PM PDT 24 |
Jul 12 05:47:16 PM PDT 24 |
26577786288 ps |
| T221 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.4272389081 |
|
|
Jul 12 05:17:32 PM PDT 24 |
Jul 12 05:17:38 PM PDT 24 |
675597919 ps |
| T222 |
/workspace/coverage/default/29.sram_ctrl_smoke.4281500358 |
|
|
Jul 12 05:14:50 PM PDT 24 |
Jul 12 05:14:53 PM PDT 24 |
83636674 ps |
| T223 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.3259920900 |
|
|
Jul 12 05:13:11 PM PDT 24 |
Jul 12 05:13:18 PM PDT 24 |
348857022 ps |
| T224 |
/workspace/coverage/default/28.sram_ctrl_partial_access.3588361705 |
|
|
Jul 12 05:14:45 PM PDT 24 |
Jul 12 05:17:12 PM PDT 24 |
220388430 ps |
| T225 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2421157684 |
|
|
Jul 12 05:12:35 PM PDT 24 |
Jul 12 05:17:54 PM PDT 24 |
3326092259 ps |
| T226 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.3089250930 |
|
|
Jul 12 05:13:24 PM PDT 24 |
Jul 12 05:17:53 PM PDT 24 |
9732671656 ps |
| T227 |
/workspace/coverage/default/44.sram_ctrl_partial_access.4207732464 |
|
|
Jul 12 05:17:03 PM PDT 24 |
Jul 12 05:17:28 PM PDT 24 |
111995650 ps |
| T88 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.2085825390 |
|
|
Jul 12 05:13:26 PM PDT 24 |
Jul 12 05:13:31 PM PDT 24 |
67290606 ps |
| T228 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.2421232889 |
|
|
Jul 12 05:12:43 PM PDT 24 |
Jul 12 05:16:41 PM PDT 24 |
9977697570 ps |
| T229 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.590907867 |
|
|
Jul 12 05:15:38 PM PDT 24 |
Jul 12 05:17:03 PM PDT 24 |
641803612 ps |
| T230 |
/workspace/coverage/default/47.sram_ctrl_stress_all.86470697 |
|
|
Jul 12 05:17:33 PM PDT 24 |
Jul 12 05:49:20 PM PDT 24 |
196490367928 ps |
| T231 |
/workspace/coverage/default/31.sram_ctrl_regwen.1865606770 |
|
|
Jul 12 05:15:06 PM PDT 24 |
Jul 12 05:28:31 PM PDT 24 |
8427470857 ps |
| T232 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.1230329857 |
|
|
Jul 12 05:15:57 PM PDT 24 |
Jul 12 05:17:02 PM PDT 24 |
121123509 ps |
| T233 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2636287926 |
|
|
Jul 12 05:17:23 PM PDT 24 |
Jul 12 05:33:34 PM PDT 24 |
27022405629 ps |
| T234 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.3645343265 |
|
|
Jul 12 05:12:56 PM PDT 24 |
Jul 12 05:13:07 PM PDT 24 |
591144863 ps |
| T235 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.509894720 |
|
|
Jul 12 05:14:08 PM PDT 24 |
Jul 12 05:14:44 PM PDT 24 |
98795099 ps |
| T236 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2161766796 |
|
|
Jul 12 05:13:45 PM PDT 24 |
Jul 12 05:20:41 PM PDT 24 |
192759775868 ps |
| T237 |
/workspace/coverage/default/19.sram_ctrl_alert_test.612430629 |
|
|
Jul 12 05:14:01 PM PDT 24 |
Jul 12 05:14:03 PM PDT 24 |
30912550 ps |
| T238 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.1803360663 |
|
|
Jul 12 05:12:40 PM PDT 24 |
Jul 12 05:12:43 PM PDT 24 |
45510875 ps |
| T71 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3596583077 |
|
|
Jul 12 05:13:10 PM PDT 24 |
Jul 12 05:14:27 PM PDT 24 |
3239485146 ps |
| T239 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.474448413 |
|
|
Jul 12 05:17:13 PM PDT 24 |
Jul 12 05:27:44 PM PDT 24 |
32866780706 ps |
| T240 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.412040655 |
|
|
Jul 12 05:13:23 PM PDT 24 |
Jul 12 05:14:17 PM PDT 24 |
167234666 ps |
| T241 |
/workspace/coverage/default/28.sram_ctrl_stress_all.3817605551 |
|
|
Jul 12 05:14:48 PM PDT 24 |
Jul 12 05:44:14 PM PDT 24 |
183653031259 ps |
| T242 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.847904171 |
|
|
Jul 12 05:12:38 PM PDT 24 |
Jul 12 05:33:45 PM PDT 24 |
21471875477 ps |
| T243 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.477408242 |
|
|
Jul 12 05:13:38 PM PDT 24 |
Jul 12 05:13:57 PM PDT 24 |
81716410 ps |
| T244 |
/workspace/coverage/default/1.sram_ctrl_smoke.1694612682 |
|
|
Jul 12 05:12:35 PM PDT 24 |
Jul 12 05:12:51 PM PDT 24 |
583783711 ps |
| T245 |
/workspace/coverage/default/11.sram_ctrl_bijection.2331776332 |
|
|
Jul 12 05:13:29 PM PDT 24 |
Jul 12 05:14:09 PM PDT 24 |
1181659188 ps |
| T246 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.114276880 |
|
|
Jul 12 05:12:48 PM PDT 24 |
Jul 12 05:18:19 PM PDT 24 |
14837289953 ps |
| T247 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.1486549255 |
|
|
Jul 12 05:14:54 PM PDT 24 |
Jul 12 05:21:11 PM PDT 24 |
32662408982 ps |
| T248 |
/workspace/coverage/default/11.sram_ctrl_executable.2247143418 |
|
|
Jul 12 05:13:12 PM PDT 24 |
Jul 12 05:33:59 PM PDT 24 |
20348543642 ps |
| T249 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2917059826 |
|
|
Jul 12 05:16:57 PM PDT 24 |
Jul 12 05:19:55 PM PDT 24 |
3778283897 ps |
| T250 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.472800897 |
|
|
Jul 12 05:13:04 PM PDT 24 |
Jul 12 05:15:09 PM PDT 24 |
134006075 ps |
| T251 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1701981960 |
|
|
Jul 12 05:15:47 PM PDT 24 |
Jul 12 05:16:32 PM PDT 24 |
123551793 ps |
| T252 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.4292719906 |
|
|
Jul 12 05:17:39 PM PDT 24 |
Jul 12 05:18:41 PM PDT 24 |
107458617 ps |
| T253 |
/workspace/coverage/default/21.sram_ctrl_regwen.2621436999 |
|
|
Jul 12 05:14:11 PM PDT 24 |
Jul 12 05:23:58 PM PDT 24 |
45044996117 ps |
| T254 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1693980038 |
|
|
Jul 12 05:17:40 PM PDT 24 |
Jul 12 05:17:49 PM PDT 24 |
390869268 ps |
| T255 |
/workspace/coverage/default/20.sram_ctrl_partial_access.171153123 |
|
|
Jul 12 05:14:00 PM PDT 24 |
Jul 12 05:14:16 PM PDT 24 |
99035007 ps |
| T256 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.312230643 |
|
|
Jul 12 05:12:59 PM PDT 24 |
Jul 12 05:13:03 PM PDT 24 |
29748902 ps |
| T257 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.4111558718 |
|
|
Jul 12 05:16:47 PM PDT 24 |
Jul 12 05:16:49 PM PDT 24 |
36556082 ps |
| T258 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.502695011 |
|
|
Jul 12 05:14:56 PM PDT 24 |
Jul 12 05:14:59 PM PDT 24 |
119873983 ps |
| T259 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.3001526159 |
|
|
Jul 12 05:12:51 PM PDT 24 |
Jul 12 05:17:11 PM PDT 24 |
10731140578 ps |
| T260 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.2315613604 |
|
|
Jul 12 05:15:14 PM PDT 24 |
Jul 12 05:16:11 PM PDT 24 |
110505879 ps |
| T261 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1406208698 |
|
|
Jul 12 05:16:49 PM PDT 24 |
Jul 12 05:19:55 PM PDT 24 |
2214472949 ps |
| T262 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.2001224818 |
|
|
Jul 12 05:12:38 PM PDT 24 |
Jul 12 05:12:49 PM PDT 24 |
1753324914 ps |
| T263 |
/workspace/coverage/default/34.sram_ctrl_regwen.3374825001 |
|
|
Jul 12 05:15:26 PM PDT 24 |
Jul 12 05:31:26 PM PDT 24 |
4687667125 ps |
| T264 |
/workspace/coverage/default/8.sram_ctrl_regwen.2201716297 |
|
|
Jul 12 05:13:00 PM PDT 24 |
Jul 12 05:32:16 PM PDT 24 |
16474688230 ps |
| T265 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.4158646740 |
|
|
Jul 12 05:12:36 PM PDT 24 |
Jul 12 05:22:45 PM PDT 24 |
14563999778 ps |
| T266 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.2069675851 |
|
|
Jul 12 05:13:29 PM PDT 24 |
Jul 12 05:16:26 PM PDT 24 |
1819867746 ps |
| T267 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.813635277 |
|
|
Jul 12 05:14:38 PM PDT 24 |
Jul 12 05:14:50 PM PDT 24 |
1315446026 ps |
| T268 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.3178171103 |
|
|
Jul 12 05:14:08 PM PDT 24 |
Jul 12 05:16:16 PM PDT 24 |
539188512 ps |
| T269 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.1408304179 |
|
|
Jul 12 05:13:34 PM PDT 24 |
Jul 12 05:13:36 PM PDT 24 |
164918176 ps |
| T270 |
/workspace/coverage/default/43.sram_ctrl_stress_all.3279113490 |
|
|
Jul 12 05:17:03 PM PDT 24 |
Jul 12 05:52:12 PM PDT 24 |
35281612229 ps |
| T271 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1804847632 |
|
|
Jul 12 05:17:45 PM PDT 24 |
Jul 12 05:17:49 PM PDT 24 |
390210424 ps |
| T272 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.3946696877 |
|
|
Jul 12 05:16:41 PM PDT 24 |
Jul 12 05:16:46 PM PDT 24 |
691477338 ps |
| T273 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.2633644943 |
|
|
Jul 12 05:13:47 PM PDT 24 |
Jul 12 05:13:49 PM PDT 24 |
151945139 ps |
| T274 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.2642834963 |
|
|
Jul 12 05:15:20 PM PDT 24 |
Jul 12 05:15:25 PM PDT 24 |
231216819 ps |
| T275 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.3114336101 |
|
|
Jul 12 05:12:40 PM PDT 24 |
Jul 12 05:19:38 PM PDT 24 |
13063146026 ps |
| T276 |
/workspace/coverage/default/30.sram_ctrl_smoke.1110096950 |
|
|
Jul 12 05:14:58 PM PDT 24 |
Jul 12 05:15:12 PM PDT 24 |
2703143121 ps |
| T277 |
/workspace/coverage/default/5.sram_ctrl_smoke.1513478781 |
|
|
Jul 12 05:12:48 PM PDT 24 |
Jul 12 05:12:56 PM PDT 24 |
149639975 ps |
| T278 |
/workspace/coverage/default/10.sram_ctrl_smoke.2381383854 |
|
|
Jul 12 05:13:02 PM PDT 24 |
Jul 12 05:13:15 PM PDT 24 |
1520439098 ps |
| T279 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.107552404 |
|
|
Jul 12 05:13:59 PM PDT 24 |
Jul 12 05:14:06 PM PDT 24 |
155426003 ps |
| T280 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.3137469440 |
|
|
Jul 12 05:15:31 PM PDT 24 |
Jul 12 05:15:36 PM PDT 24 |
582730268 ps |
| T281 |
/workspace/coverage/default/14.sram_ctrl_regwen.33920116 |
|
|
Jul 12 05:13:15 PM PDT 24 |
Jul 12 05:22:10 PM PDT 24 |
9974819332 ps |
| T282 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.3371044640 |
|
|
Jul 12 05:14:08 PM PDT 24 |
Jul 12 05:14:15 PM PDT 24 |
485395170 ps |
| T283 |
/workspace/coverage/default/11.sram_ctrl_smoke.338370974 |
|
|
Jul 12 05:13:04 PM PDT 24 |
Jul 12 05:13:13 PM PDT 24 |
146960438 ps |
| T284 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3398912738 |
|
|
Jul 12 05:15:26 PM PDT 24 |
Jul 12 05:16:00 PM PDT 24 |
6095141503 ps |
| T285 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.3006319526 |
|
|
Jul 12 05:14:11 PM PDT 24 |
Jul 12 05:20:26 PM PDT 24 |
3804152796 ps |
| T286 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.1149955128 |
|
|
Jul 12 05:13:32 PM PDT 24 |
Jul 12 05:13:39 PM PDT 24 |
60615370 ps |
| T287 |
/workspace/coverage/default/4.sram_ctrl_partial_access.2761046405 |
|
|
Jul 12 05:12:49 PM PDT 24 |
Jul 12 05:14:33 PM PDT 24 |
9971100272 ps |
| T288 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.29124980 |
|
|
Jul 12 05:14:17 PM PDT 24 |
Jul 12 05:14:21 PM PDT 24 |
105347788 ps |
| T289 |
/workspace/coverage/default/38.sram_ctrl_alert_test.881260649 |
|
|
Jul 12 05:16:07 PM PDT 24 |
Jul 12 05:16:08 PM PDT 24 |
13581715 ps |
| T290 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.4051334113 |
|
|
Jul 12 05:14:55 PM PDT 24 |
Jul 12 05:14:59 PM PDT 24 |
98162054 ps |
| T291 |
/workspace/coverage/default/17.sram_ctrl_partial_access.2561377557 |
|
|
Jul 12 05:13:28 PM PDT 24 |
Jul 12 05:13:33 PM PDT 24 |
911110224 ps |
| T292 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.308289094 |
|
|
Jul 12 05:14:16 PM PDT 24 |
Jul 12 05:27:38 PM PDT 24 |
4997216359 ps |
| T293 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.3411278291 |
|
|
Jul 12 05:14:00 PM PDT 24 |
Jul 12 05:14:02 PM PDT 24 |
29160932 ps |
| T294 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2943200004 |
|
|
Jul 12 05:13:05 PM PDT 24 |
Jul 12 05:13:40 PM PDT 24 |
1079469146 ps |
| T295 |
/workspace/coverage/default/20.sram_ctrl_executable.1961396472 |
|
|
Jul 12 05:14:01 PM PDT 24 |
Jul 12 05:38:13 PM PDT 24 |
115713735541 ps |
| T296 |
/workspace/coverage/default/42.sram_ctrl_stress_all.290564995 |
|
|
Jul 12 05:16:39 PM PDT 24 |
Jul 12 05:17:07 PM PDT 24 |
6869217945 ps |
| T297 |
/workspace/coverage/default/45.sram_ctrl_bijection.977491275 |
|
|
Jul 12 05:17:04 PM PDT 24 |
Jul 12 05:18:03 PM PDT 24 |
3333472508 ps |
| T298 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.3337439190 |
|
|
Jul 12 05:15:04 PM PDT 24 |
Jul 12 05:22:37 PM PDT 24 |
34461847140 ps |
| T299 |
/workspace/coverage/default/43.sram_ctrl_partial_access.2473416745 |
|
|
Jul 12 05:16:46 PM PDT 24 |
Jul 12 05:17:37 PM PDT 24 |
404449388 ps |
| T300 |
/workspace/coverage/default/9.sram_ctrl_smoke.4185422645 |
|
|
Jul 12 05:12:57 PM PDT 24 |
Jul 12 05:14:27 PM PDT 24 |
5834781993 ps |
| T301 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.3446307702 |
|
|
Jul 12 05:15:31 PM PDT 24 |
Jul 12 05:35:14 PM PDT 24 |
14867094954 ps |
| T302 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.672391914 |
|
|
Jul 12 05:16:55 PM PDT 24 |
Jul 12 05:17:30 PM PDT 24 |
103176265 ps |
| T303 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2439721260 |
|
|
Jul 12 05:14:57 PM PDT 24 |
Jul 12 05:19:55 PM PDT 24 |
15284546521 ps |
| T304 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.3912059575 |
|
|
Jul 12 05:14:47 PM PDT 24 |
Jul 12 05:18:47 PM PDT 24 |
9078605994 ps |
| T305 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.722946199 |
|
|
Jul 12 05:17:47 PM PDT 24 |
Jul 12 05:25:08 PM PDT 24 |
6589173789 ps |
| T306 |
/workspace/coverage/default/0.sram_ctrl_alert_test.3511369519 |
|
|
Jul 12 05:12:33 PM PDT 24 |
Jul 12 05:12:36 PM PDT 24 |
19698624 ps |
| T307 |
/workspace/coverage/default/43.sram_ctrl_alert_test.114369386 |
|
|
Jul 12 05:16:56 PM PDT 24 |
Jul 12 05:16:57 PM PDT 24 |
30339582 ps |
| T308 |
/workspace/coverage/default/6.sram_ctrl_smoke.1602107270 |
|
|
Jul 12 05:12:47 PM PDT 24 |
Jul 12 05:13:02 PM PDT 24 |
980461454 ps |
| T309 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.3657356629 |
|
|
Jul 12 05:16:13 PM PDT 24 |
Jul 12 05:16:21 PM PDT 24 |
544408869 ps |
| T310 |
/workspace/coverage/default/21.sram_ctrl_partial_access.2783975799 |
|
|
Jul 12 05:14:07 PM PDT 24 |
Jul 12 05:14:14 PM PDT 24 |
298600768 ps |
| T311 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.3885260622 |
|
|
Jul 12 05:13:50 PM PDT 24 |
Jul 12 05:17:04 PM PDT 24 |
7327054176 ps |