Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3907476142 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3505854083 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.554633499 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3393532943 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3225330466 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2680348715 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1852429053 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3141503643 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1510647457 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1065440073 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2424529056 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1912660542 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2072756800 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1975219346 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2385804094 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1660970779 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2143273559 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.935215660 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3529291451 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.653139184 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3387309789 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2769895746 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1117313071 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3451084599 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1108460580 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3142117356 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1443251417 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.526745750 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.924986181 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.603701897 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.4109039176 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1419539482 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.22381411 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.4128673683 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1257589633 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1578976270 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.2061291885 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.4197451057 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.4196766317 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1470023541 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2989295650 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2503701384 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.729275100 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3074492268 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3874429355 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1509754581 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.636146726 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3491245937 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.562360946 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1685785399 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2077824258 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2432953524 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3486888548 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1176671238 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3021170895 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.826511011 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2213592797 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3116823368 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1207988315 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1378175243 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.279435650 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.4222598984 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1926854488 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2579772171 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.4289045499 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.412030250 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1306721897 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2369058335 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3398884582 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1069830211 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.985851345 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2801514570 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.4151492399 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1696522420 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.849143441 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1309276410 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.872148360 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.301608330 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.383833460 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3212354501 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.741679078 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3052722416 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.255524878 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3982095513 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.4171438806 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.522731848 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3736474941 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2626551150 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.28637026 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2998600451 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.696272680 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1657379567 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2011535269 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.4074786149 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.208482227 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3561470373 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2221426643 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3577656614 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.835393331 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2558296928 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.810889982 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.4101223945 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3508735325 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.518616642 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3850735274 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1822714472 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2785409465 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2975284138 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2558366379 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1095927217 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3863970184 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1631390584 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2289132937 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2078439271 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.353390265 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1445058771 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3111566865 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.4294730970 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3799338305 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.4010608876 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3416430469 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2333556798 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.3068737988 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.740335095 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.862467758 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1819365761 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2671932152 |
/workspace/coverage/default/0.sram_ctrl_alert_test.1071465034 |
/workspace/coverage/default/0.sram_ctrl_bijection.2071816846 |
/workspace/coverage/default/0.sram_ctrl_executable.3471046919 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2300681420 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.3650660437 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3104278389 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.853600010 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2623769649 |
/workspace/coverage/default/0.sram_ctrl_partial_access.1851731871 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2835131663 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.439876511 |
/workspace/coverage/default/0.sram_ctrl_regwen.2607539141 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.3387371499 |
/workspace/coverage/default/0.sram_ctrl_smoke.3465765518 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2864630375 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.239908217 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3131826281 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.591462745 |
/workspace/coverage/default/1.sram_ctrl_alert_test.1044889116 |
/workspace/coverage/default/1.sram_ctrl_bijection.3539459033 |
/workspace/coverage/default/1.sram_ctrl_executable.3754335593 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3997340057 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.4070298511 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.953690270 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.2561902558 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.571388745 |
/workspace/coverage/default/1.sram_ctrl_partial_access.3144376355 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3774811000 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1544561992 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.2332501403 |
/workspace/coverage/default/1.sram_ctrl_smoke.1494018020 |
/workspace/coverage/default/1.sram_ctrl_stress_all.2067089384 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1697136381 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.566331394 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.587488321 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2523801212 |
/workspace/coverage/default/10.sram_ctrl_alert_test.636344013 |
/workspace/coverage/default/10.sram_ctrl_bijection.533637246 |
/workspace/coverage/default/10.sram_ctrl_executable.397391194 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3126445369 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.316689887 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2514643370 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.4033316003 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3773228160 |
/workspace/coverage/default/10.sram_ctrl_partial_access.3913544463 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.543322767 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1025336432 |
/workspace/coverage/default/10.sram_ctrl_regwen.535920996 |
/workspace/coverage/default/10.sram_ctrl_smoke.20669280 |
/workspace/coverage/default/10.sram_ctrl_stress_all.2291490120 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3470358721 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2929489805 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1383726614 |
/workspace/coverage/default/11.sram_ctrl_alert_test.2922986890 |
/workspace/coverage/default/11.sram_ctrl_bijection.2087480594 |
/workspace/coverage/default/11.sram_ctrl_executable.4015553181 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.386860477 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.1383296753 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3498265128 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.4074300411 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.4211153379 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2358008245 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3706158447 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1911526859 |
/workspace/coverage/default/11.sram_ctrl_regwen.3873540424 |
/workspace/coverage/default/11.sram_ctrl_smoke.3762450810 |
/workspace/coverage/default/11.sram_ctrl_stress_all.3761632677 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1199600081 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.334202647 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2494278860 |
/workspace/coverage/default/12.sram_ctrl_alert_test.2965541120 |
/workspace/coverage/default/12.sram_ctrl_bijection.3976324253 |
/workspace/coverage/default/12.sram_ctrl_executable.4184637889 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1104612234 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.2598965133 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.4116819106 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.1515545634 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1745457964 |
/workspace/coverage/default/12.sram_ctrl_partial_access.1487787414 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.705813962 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.3198067581 |
/workspace/coverage/default/12.sram_ctrl_regwen.3629207962 |
/workspace/coverage/default/12.sram_ctrl_smoke.379843746 |
/workspace/coverage/default/12.sram_ctrl_stress_all.2758483704 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1705225100 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.2222995372 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1684527066 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.1624684796 |
/workspace/coverage/default/13.sram_ctrl_alert_test.2425784977 |
/workspace/coverage/default/13.sram_ctrl_bijection.537268694 |
/workspace/coverage/default/13.sram_ctrl_executable.135625392 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.4179739537 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.2749007788 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.3614851928 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.3051560700 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.705040190 |
/workspace/coverage/default/13.sram_ctrl_partial_access.2406888030 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1420712975 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.1841996891 |
/workspace/coverage/default/13.sram_ctrl_regwen.63063164 |
/workspace/coverage/default/13.sram_ctrl_smoke.1964446966 |
/workspace/coverage/default/13.sram_ctrl_stress_all.3820198589 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.932942991 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2148259984 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.2376871410 |
/workspace/coverage/default/14.sram_ctrl_alert_test.3253571326 |
/workspace/coverage/default/14.sram_ctrl_bijection.2779600228 |
/workspace/coverage/default/14.sram_ctrl_executable.1663389626 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.3808975316 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.2899814956 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.3475646106 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.4163858748 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.3903749634 |
/workspace/coverage/default/14.sram_ctrl_partial_access.2876494442 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.575681991 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.3007639916 |
/workspace/coverage/default/14.sram_ctrl_regwen.761932626 |
/workspace/coverage/default/14.sram_ctrl_smoke.1628026521 |
/workspace/coverage/default/14.sram_ctrl_stress_all.298504428 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.359037401 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.2524801365 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.2872744672 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.2569240242 |
/workspace/coverage/default/15.sram_ctrl_alert_test.2428484390 |
/workspace/coverage/default/15.sram_ctrl_bijection.1130479382 |
/workspace/coverage/default/15.sram_ctrl_executable.3502330682 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.803774948 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.1666233980 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.838227396 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.3418204738 |
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/workspace/coverage/default/45.sram_ctrl_lc_escalation.3219083 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.1419431901 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1544069162 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.3820598657 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1675433724 |
/workspace/coverage/default/45.sram_ctrl_partial_access.1025153783 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1596007480 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.48244509 |
/workspace/coverage/default/45.sram_ctrl_regwen.2689618133 |
/workspace/coverage/default/45.sram_ctrl_smoke.4271835602 |
/workspace/coverage/default/45.sram_ctrl_stress_all.3447648389 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2761296482 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2676647823 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2523299070 |
/workspace/coverage/default/46.sram_ctrl_alert_test.1505714152 |
/workspace/coverage/default/46.sram_ctrl_bijection.3407511816 |
/workspace/coverage/default/46.sram_ctrl_executable.1396779655 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1617210339 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.792044721 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.4072001943 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.373198004 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1026981315 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1138961882 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.172469889 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2985292867 |
/workspace/coverage/default/46.sram_ctrl_regwen.3408803036 |
/workspace/coverage/default/46.sram_ctrl_smoke.1887551128 |
/workspace/coverage/default/46.sram_ctrl_stress_all.3447874582 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1193923227 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2890954297 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2069090572 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3254840919 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3742888174 |
/workspace/coverage/default/47.sram_ctrl_bijection.2353054578 |
/workspace/coverage/default/47.sram_ctrl_executable.3731181924 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.338885193 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.2023936636 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3948371411 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.2141309137 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3434026910 |
/workspace/coverage/default/47.sram_ctrl_partial_access.2689370973 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2377680371 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1091623074 |
/workspace/coverage/default/47.sram_ctrl_regwen.3264293221 |
/workspace/coverage/default/47.sram_ctrl_smoke.1649126003 |
/workspace/coverage/default/47.sram_ctrl_stress_all.1165656640 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2490435289 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1695167152 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4116503078 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2652024296 |
/workspace/coverage/default/48.sram_ctrl_alert_test.756367248 |
/workspace/coverage/default/48.sram_ctrl_bijection.2591983484 |
/workspace/coverage/default/48.sram_ctrl_executable.2124897172 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3878570955 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.3466695849 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1674211601 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.780814145 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2746059261 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1054007633 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1185045479 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2842127679 |
/workspace/coverage/default/48.sram_ctrl_regwen.3952188072 |
/workspace/coverage/default/48.sram_ctrl_smoke.1627295769 |
/workspace/coverage/default/48.sram_ctrl_stress_all.244232302 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1908419797 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.324639244 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1310575777 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3574936133 |
/workspace/coverage/default/49.sram_ctrl_alert_test.3908951556 |
/workspace/coverage/default/49.sram_ctrl_bijection.1766528633 |
/workspace/coverage/default/49.sram_ctrl_executable.2623365206 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2548653089 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.408682739 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2160435752 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.2377324173 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2264026210 |
/workspace/coverage/default/49.sram_ctrl_partial_access.171952166 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1149624332 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.172668455 |
/workspace/coverage/default/49.sram_ctrl_regwen.3357792016 |
/workspace/coverage/default/49.sram_ctrl_smoke.1173553101 |
/workspace/coverage/default/49.sram_ctrl_stress_all.2176139911 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2441670121 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1516921027 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.4033189140 |
/workspace/coverage/default/5.sram_ctrl_alert_test.4144347001 |
/workspace/coverage/default/5.sram_ctrl_bijection.876249145 |
/workspace/coverage/default/5.sram_ctrl_executable.1509401612 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1310081561 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.3877556902 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3938619992 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.3369725091 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.776363722 |
/workspace/coverage/default/5.sram_ctrl_partial_access.393726746 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2078987997 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.369719481 |
/workspace/coverage/default/5.sram_ctrl_regwen.2555891785 |
/workspace/coverage/default/5.sram_ctrl_smoke.4169736177 |
/workspace/coverage/default/5.sram_ctrl_stress_all.3806261511 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2190605498 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3002020997 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3128379450 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.132392495 |
/workspace/coverage/default/6.sram_ctrl_alert_test.4010726066 |
/workspace/coverage/default/6.sram_ctrl_bijection.1743042687 |
/workspace/coverage/default/6.sram_ctrl_executable.4288493421 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.4092902633 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.710526959 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1324928363 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.1293986767 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2967381696 |
/workspace/coverage/default/6.sram_ctrl_partial_access.190113746 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2165011191 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2979274556 |
/workspace/coverage/default/6.sram_ctrl_regwen.1889794662 |
/workspace/coverage/default/6.sram_ctrl_smoke.216301416 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2293502204 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2384342549 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1395871918 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1151744202 |
/workspace/coverage/default/7.sram_ctrl_alert_test.2561836776 |
/workspace/coverage/default/7.sram_ctrl_bijection.828558513 |
/workspace/coverage/default/7.sram_ctrl_executable.2274865641 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3866353624 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.3277640589 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2056615452 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2885159909 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3295928893 |
/workspace/coverage/default/7.sram_ctrl_partial_access.3420930410 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2064445851 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3724822890 |
/workspace/coverage/default/7.sram_ctrl_regwen.1763076690 |
/workspace/coverage/default/7.sram_ctrl_smoke.1354077242 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1753367179 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.917907809 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1883062813 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3336234441 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3085532390 |
/workspace/coverage/default/8.sram_ctrl_alert_test.1601950763 |
/workspace/coverage/default/8.sram_ctrl_bijection.2108688718 |
/workspace/coverage/default/8.sram_ctrl_executable.2500992821 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.340546835 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.449889010 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.483100699 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.3589323519 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.120839208 |
/workspace/coverage/default/8.sram_ctrl_partial_access.1664171478 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3893514623 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.4289229901 |
/workspace/coverage/default/8.sram_ctrl_regwen.2484305100 |
/workspace/coverage/default/8.sram_ctrl_smoke.260958857 |
/workspace/coverage/default/8.sram_ctrl_stress_all.339180568 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2352235298 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3949390965 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.825235846 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.76782408 |
/workspace/coverage/default/9.sram_ctrl_alert_test.4091193372 |
/workspace/coverage/default/9.sram_ctrl_bijection.892582844 |
/workspace/coverage/default/9.sram_ctrl_executable.2476373103 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.451636199 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.2270677034 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2573636822 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.3547427836 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2768597451 |
/workspace/coverage/default/9.sram_ctrl_partial_access.3637618551 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2155113109 |
/workspace/coverage/default/9.sram_ctrl_regwen.2128467464 |
/workspace/coverage/default/9.sram_ctrl_smoke.4074189840 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3988730577 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3626262930 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1736897629 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.2531526860 |
|
|
Jul 14 05:01:16 PM PDT 24 |
Jul 14 05:01:23 PM PDT 24 |
570071401 ps |
T2 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1534930241 |
|
|
Jul 14 05:02:28 PM PDT 24 |
Jul 14 05:02:51 PM PDT 24 |
374394704 ps |
T3 |
/workspace/coverage/default/1.sram_ctrl_regwen.1956198260 |
|
|
Jul 14 04:53:53 PM PDT 24 |
Jul 14 05:13:16 PM PDT 24 |
12339965794 ps |
T4 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.3528787083 |
|
|
Jul 14 04:58:19 PM PDT 24 |
Jul 14 04:58:23 PM PDT 24 |
231141983 ps |
T8 |
/workspace/coverage/default/25.sram_ctrl_partial_access.3916563878 |
|
|
Jul 14 04:57:18 PM PDT 24 |
Jul 14 04:57:20 PM PDT 24 |
28534340 ps |
T9 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.1212116506 |
|
|
Jul 14 05:00:55 PM PDT 24 |
Jul 14 05:02:49 PM PDT 24 |
2502551810 ps |
T10 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1736897629 |
|
|
Jul 14 04:54:36 PM PDT 24 |
Jul 14 04:54:42 PM PDT 24 |
104090588 ps |
T11 |
/workspace/coverage/default/24.sram_ctrl_bijection.327957729 |
|
|
Jul 14 04:57:02 PM PDT 24 |
Jul 14 04:57:42 PM PDT 24 |
1423802046 ps |
T12 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.561184409 |
|
|
Jul 14 04:54:37 PM PDT 24 |
Jul 14 04:54:39 PM PDT 24 |
81067679 ps |
T13 |
/workspace/coverage/default/8.sram_ctrl_regwen.2484305100 |
|
|
Jul 14 04:54:34 PM PDT 24 |
Jul 14 05:15:22 PM PDT 24 |
15779479664 ps |
T25 |
/workspace/coverage/default/10.sram_ctrl_bijection.533637246 |
|
|
Jul 14 04:54:45 PM PDT 24 |
Jul 14 04:55:43 PM PDT 24 |
1000613204 ps |
T43 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.44164424 |
|
|
Jul 14 04:54:09 PM PDT 24 |
Jul 14 04:54:20 PM PDT 24 |
343488159 ps |
T44 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.4072001943 |
|
|
Jul 14 05:03:09 PM PDT 24 |
Jul 14 05:03:13 PM PDT 24 |
349978134 ps |
T26 |
/workspace/coverage/default/26.sram_ctrl_executable.4175508747 |
|
|
Jul 14 04:57:30 PM PDT 24 |
Jul 14 05:22:19 PM PDT 24 |
18014453996 ps |
T5 |
/workspace/coverage/default/43.sram_ctrl_stress_all.418287693 |
|
|
Jul 14 05:02:14 PM PDT 24 |
Jul 14 05:27:32 PM PDT 24 |
36030277511 ps |
T54 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.2730085944 |
|
|
Jul 14 04:56:38 PM PDT 24 |
Jul 14 05:00:54 PM PDT 24 |
2509249933 ps |
T42 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.1392442413 |
|
|
Jul 14 05:01:04 PM PDT 24 |
Jul 14 05:01:17 PM PDT 24 |
659518339 ps |
T65 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2155113109 |
|
|
Jul 14 04:54:37 PM PDT 24 |
Jul 14 05:01:56 PM PDT 24 |
20753921212 ps |
T30 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.2915740417 |
|
|
Jul 14 04:57:55 PM PDT 24 |
Jul 14 04:57:57 PM PDT 24 |
45960212 ps |
T66 |
/workspace/coverage/default/38.sram_ctrl_regwen.1761584766 |
|
|
Jul 14 05:00:39 PM PDT 24 |
Jul 14 05:16:44 PM PDT 24 |
55668585484 ps |
T67 |
/workspace/coverage/default/45.sram_ctrl_regwen.2689618133 |
|
|
Jul 14 05:02:46 PM PDT 24 |
Jul 14 05:24:15 PM PDT 24 |
6431403778 ps |
T53 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.1515545634 |
|
|
Jul 14 04:55:04 PM PDT 24 |
Jul 14 04:55:12 PM PDT 24 |
694426155 ps |
T27 |
/workspace/coverage/default/11.sram_ctrl_bijection.2087480594 |
|
|
Jul 14 04:54:50 PM PDT 24 |
Jul 14 04:55:24 PM PDT 24 |
4560686015 ps |
T164 |
/workspace/coverage/default/37.sram_ctrl_smoke.2514048337 |
|
|
Jul 14 05:00:17 PM PDT 24 |
Jul 14 05:02:54 PM PDT 24 |
662000409 ps |
T142 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.2659949162 |
|
|
Jul 14 04:56:38 PM PDT 24 |
Jul 14 04:56:49 PM PDT 24 |
66867073 ps |
T45 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.1556461296 |
|
|
Jul 14 04:56:43 PM PDT 24 |
Jul 14 05:01:45 PM PDT 24 |
2377662040 ps |
T46 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.3492465723 |
|
|
Jul 14 04:54:02 PM PDT 24 |
Jul 14 05:15:22 PM PDT 24 |
4289689725 ps |
T55 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.3531777512 |
|
|
Jul 14 04:56:54 PM PDT 24 |
Jul 14 04:57:08 PM PDT 24 |
5923496296 ps |
T94 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1695167152 |
|
|
Jul 14 05:03:18 PM PDT 24 |
Jul 14 05:06:57 PM PDT 24 |
12019955031 ps |
T47 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1383726614 |
|
|
Jul 14 04:54:52 PM PDT 24 |
Jul 14 05:04:39 PM PDT 24 |
3362479732 ps |
T14 |
/workspace/coverage/default/42.sram_ctrl_alert_test.4114113796 |
|
|
Jul 14 05:01:56 PM PDT 24 |
Jul 14 05:01:57 PM PDT 24 |
27615578 ps |
T71 |
/workspace/coverage/default/36.sram_ctrl_regwen.2161293646 |
|
|
Jul 14 05:00:10 PM PDT 24 |
Jul 14 05:13:20 PM PDT 24 |
11115700263 ps |
T167 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1516921027 |
|
|
Jul 14 05:04:05 PM PDT 24 |
Jul 14 05:05:15 PM PDT 24 |
119806786 ps |
T168 |
/workspace/coverage/default/49.sram_ctrl_bijection.1766528633 |
|
|
Jul 14 05:03:57 PM PDT 24 |
Jul 14 05:04:45 PM PDT 24 |
5506949580 ps |
T56 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.4027113702 |
|
|
Jul 14 04:57:26 PM PDT 24 |
Jul 14 04:57:38 PM PDT 24 |
2640682999 ps |
T75 |
/workspace/coverage/default/2.sram_ctrl_regwen.46152591 |
|
|
Jul 14 04:54:01 PM PDT 24 |
Jul 14 05:02:21 PM PDT 24 |
1875545055 ps |
T76 |
/workspace/coverage/default/11.sram_ctrl_regwen.3873540424 |
|
|
Jul 14 04:54:52 PM PDT 24 |
Jul 14 05:04:16 PM PDT 24 |
4280200235 ps |
T24 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.435437726 |
|
|
Jul 14 04:57:49 PM PDT 24 |
Jul 14 04:59:17 PM PDT 24 |
1849171063 ps |
T80 |
/workspace/coverage/default/20.sram_ctrl_partial_access.3959740542 |
|
|
Jul 14 04:56:15 PM PDT 24 |
Jul 14 04:56:17 PM PDT 24 |
199994572 ps |
T77 |
/workspace/coverage/default/48.sram_ctrl_regwen.3952188072 |
|
|
Jul 14 05:03:52 PM PDT 24 |
Jul 14 05:28:53 PM PDT 24 |
4215561857 ps |
T81 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.3336577305 |
|
|
Jul 14 04:56:22 PM PDT 24 |
Jul 14 04:56:31 PM PDT 24 |
541532042 ps |
T72 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.1088460810 |
|
|
Jul 14 04:55:56 PM PDT 24 |
Jul 14 05:18:59 PM PDT 24 |
3300889599 ps |
T6 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.3511739248 |
|
|
Jul 14 04:54:14 PM PDT 24 |
Jul 14 04:54:23 PM PDT 24 |
1358300574 ps |
T82 |
/workspace/coverage/default/44.sram_ctrl_smoke.2114487051 |
|
|
Jul 14 05:02:16 PM PDT 24 |
Jul 14 05:04:27 PM PDT 24 |
2364775997 ps |
T83 |
/workspace/coverage/default/23.sram_ctrl_partial_access.758332852 |
|
|
Jul 14 04:56:49 PM PDT 24 |
Jul 14 04:56:53 PM PDT 24 |
286440114 ps |
T84 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1151744202 |
|
|
Jul 14 04:54:23 PM PDT 24 |
Jul 14 05:09:12 PM PDT 24 |
2147813995 ps |
T85 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.460604914 |
|
|
Jul 14 04:59:21 PM PDT 24 |
Jul 14 05:01:41 PM PDT 24 |
484572573 ps |
T165 |
/workspace/coverage/default/46.sram_ctrl_bijection.3407511816 |
|
|
Jul 14 05:03:02 PM PDT 24 |
Jul 14 05:03:50 PM PDT 24 |
3154561487 ps |
T98 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3085532390 |
|
|
Jul 14 04:54:29 PM PDT 24 |
Jul 14 05:20:25 PM PDT 24 |
2371061799 ps |
T57 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.549224452 |
|
|
Jul 14 04:58:08 PM PDT 24 |
Jul 14 04:58:14 PM PDT 24 |
371861774 ps |
T99 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3948371411 |
|
|
Jul 14 05:03:25 PM PDT 24 |
Jul 14 05:03:28 PM PDT 24 |
97951465 ps |
T7 |
/workspace/coverage/default/37.sram_ctrl_stress_all.4086930236 |
|
|
Jul 14 05:00:32 PM PDT 24 |
Jul 14 05:46:04 PM PDT 24 |
21762254382 ps |
T160 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.571388745 |
|
|
Jul 14 04:53:57 PM PDT 24 |
Jul 14 05:23:00 PM PDT 24 |
97037112175 ps |
T28 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.2403203298 |
|
|
Jul 14 04:56:46 PM PDT 24 |
Jul 14 04:56:53 PM PDT 24 |
208670089 ps |
T157 |
/workspace/coverage/default/10.sram_ctrl_executable.397391194 |
|
|
Jul 14 04:54:44 PM PDT 24 |
Jul 14 05:15:41 PM PDT 24 |
11692128498 ps |
T159 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.477642862 |
|
|
Jul 14 04:54:15 PM PDT 24 |
Jul 14 05:10:34 PM PDT 24 |
14735740302 ps |
T31 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.798598129 |
|
|
Jul 14 04:56:19 PM PDT 24 |
Jul 14 04:56:20 PM PDT 24 |
66129841 ps |
T100 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.1311764919 |
|
|
Jul 14 04:56:26 PM PDT 24 |
Jul 14 05:15:52 PM PDT 24 |
56433555846 ps |
T58 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.2561902558 |
|
|
Jul 14 04:53:53 PM PDT 24 |
Jul 14 04:54:09 PM PDT 24 |
4369641009 ps |
T169 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.1811053578 |
|
|
Jul 14 04:57:25 PM PDT 24 |
Jul 14 04:57:27 PM PDT 24 |
85279048 ps |
T20 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1753367179 |
|
|
Jul 14 04:54:24 PM PDT 24 |
Jul 14 05:55:47 PM PDT 24 |
46166033451 ps |
T155 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.3916609783 |
|
|
Jul 14 04:56:17 PM PDT 24 |
Jul 14 04:56:20 PM PDT 24 |
456875161 ps |
T170 |
/workspace/coverage/default/35.sram_ctrl_partial_access.134805452 |
|
|
Jul 14 04:59:36 PM PDT 24 |
Jul 14 04:59:48 PM PDT 24 |
2237180522 ps |
T171 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2264026210 |
|
|
Jul 14 05:04:02 PM PDT 24 |
Jul 14 05:13:29 PM PDT 24 |
5477435815 ps |
T156 |
/workspace/coverage/default/42.sram_ctrl_regwen.1221509727 |
|
|
Jul 14 05:01:56 PM PDT 24 |
Jul 14 05:15:05 PM PDT 24 |
4614334480 ps |
T172 |
/workspace/coverage/default/1.sram_ctrl_executable.3754335593 |
|
|
Jul 14 04:53:53 PM PDT 24 |
Jul 14 04:58:53 PM PDT 24 |
5319362321 ps |
T173 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.3481640694 |
|
|
Jul 14 04:55:26 PM PDT 24 |
Jul 14 04:55:27 PM PDT 24 |
42241902 ps |
T21 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.1690677659 |
|
|
Jul 14 04:56:26 PM PDT 24 |
Jul 14 04:56:33 PM PDT 24 |
490434090 ps |
T163 |
/workspace/coverage/default/46.sram_ctrl_regwen.3408803036 |
|
|
Jul 14 05:03:01 PM PDT 24 |
Jul 14 05:15:39 PM PDT 24 |
7084878622 ps |
T29 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.2704001586 |
|
|
Jul 14 04:55:51 PM PDT 24 |
Jul 14 05:04:43 PM PDT 24 |
6223897176 ps |
T174 |
/workspace/coverage/default/43.sram_ctrl_executable.884196125 |
|
|
Jul 14 05:02:08 PM PDT 24 |
Jul 14 05:27:40 PM PDT 24 |
19511954381 ps |
T101 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.2055364352 |
|
|
Jul 14 04:57:28 PM PDT 24 |
Jul 14 05:11:53 PM PDT 24 |
14222109454 ps |
T175 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.1141428724 |
|
|
Jul 14 04:58:22 PM PDT 24 |
Jul 14 04:58:24 PM PDT 24 |
88713670 ps |
T176 |
/workspace/coverage/default/13.sram_ctrl_partial_access.2406888030 |
|
|
Jul 14 04:55:07 PM PDT 24 |
Jul 14 04:55:10 PM PDT 24 |
195432703 ps |
T177 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.1531581900 |
|
|
Jul 14 04:57:43 PM PDT 24 |
Jul 14 04:57:46 PM PDT 24 |
157609594 ps |
T51 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.3412844251 |
|
|
Jul 14 05:01:03 PM PDT 24 |
Jul 14 05:01:07 PM PDT 24 |
119935540 ps |
T178 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1674211601 |
|
|
Jul 14 05:03:53 PM PDT 24 |
Jul 14 05:03:57 PM PDT 24 |
342018590 ps |
T179 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3943447114 |
|
|
Jul 14 05:02:38 PM PDT 24 |
Jul 14 05:14:47 PM PDT 24 |
2661747031 ps |
T180 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.705040190 |
|
|
Jul 14 04:55:02 PM PDT 24 |
Jul 14 05:16:27 PM PDT 24 |
18962754023 ps |
T181 |
/workspace/coverage/default/14.sram_ctrl_partial_access.2876494442 |
|
|
Jul 14 04:55:14 PM PDT 24 |
Jul 14 04:55:28 PM PDT 24 |
904003923 ps |
T182 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.1176727975 |
|
|
Jul 14 04:55:39 PM PDT 24 |
Jul 14 04:55:41 PM PDT 24 |
57358786 ps |
T183 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.1021906458 |
|
|
Jul 14 04:58:14 PM PDT 24 |
Jul 14 04:58:19 PM PDT 24 |
325274827 ps |
T184 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.2569240242 |
|
|
Jul 14 04:55:26 PM PDT 24 |
Jul 14 05:18:02 PM PDT 24 |
4144134197 ps |
T185 |
/workspace/coverage/default/42.sram_ctrl_executable.483118373 |
|
|
Jul 14 05:01:55 PM PDT 24 |
Jul 14 05:12:44 PM PDT 24 |
5103784661 ps |
T161 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.1514577346 |
|
|
Jul 14 04:57:11 PM PDT 24 |
Jul 14 05:15:53 PM PDT 24 |
58854103871 ps |
T186 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2746059261 |
|
|
Jul 14 05:03:32 PM PDT 24 |
Jul 14 05:04:11 PM PDT 24 |
1329676997 ps |
T187 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.4074300411 |
|
|
Jul 14 04:54:56 PM PDT 24 |
Jul 14 04:55:06 PM PDT 24 |
448691493 ps |
T188 |
/workspace/coverage/default/41.sram_ctrl_regwen.3070495797 |
|
|
Jul 14 05:01:34 PM PDT 24 |
Jul 14 05:19:50 PM PDT 24 |
16804238719 ps |
T189 |
/workspace/coverage/default/30.sram_ctrl_executable.3089908976 |
|
|
Jul 14 04:58:20 PM PDT 24 |
Jul 14 05:12:49 PM PDT 24 |
5850881118 ps |
T190 |
/workspace/coverage/default/32.sram_ctrl_smoke.1836556111 |
|
|
Jul 14 04:58:39 PM PDT 24 |
Jul 14 04:58:45 PM PDT 24 |
1385725984 ps |
T191 |
/workspace/coverage/default/16.sram_ctrl_executable.2391572900 |
|
|
Jul 14 04:55:38 PM PDT 24 |
Jul 14 05:21:19 PM PDT 24 |
68043516745 ps |
T192 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.2023936636 |
|
|
Jul 14 05:03:18 PM PDT 24 |
Jul 14 05:04:18 PM PDT 24 |
182110427 ps |
T22 |
/workspace/coverage/default/19.sram_ctrl_stress_all.3806479931 |
|
|
Jul 14 04:56:07 PM PDT 24 |
Jul 14 05:47:49 PM PDT 24 |
121690834155 ps |
T193 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.1533609472 |
|
|
Jul 14 04:58:32 PM PDT 24 |
Jul 14 04:59:37 PM PDT 24 |
190213467 ps |
T194 |
/workspace/coverage/default/35.sram_ctrl_bijection.3164466405 |
|
|
Jul 14 04:59:34 PM PDT 24 |
Jul 14 05:00:01 PM PDT 24 |
405036496 ps |
T195 |
/workspace/coverage/default/24.sram_ctrl_stress_all.939398349 |
|
|
Jul 14 04:57:07 PM PDT 24 |
Jul 14 05:24:36 PM PDT 24 |
59039225781 ps |
T196 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.1311715653 |
|
|
Jul 14 05:00:37 PM PDT 24 |
Jul 14 05:00:49 PM PDT 24 |
880931846 ps |
T15 |
/workspace/coverage/default/41.sram_ctrl_alert_test.380107216 |
|
|
Jul 14 05:01:43 PM PDT 24 |
Jul 14 05:01:44 PM PDT 24 |
50671349 ps |
T17 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.1989491680 |
|
|
Jul 14 04:54:11 PM PDT 24 |
Jul 14 04:54:14 PM PDT 24 |
908491027 ps |
T34 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.369719481 |
|
|
Jul 14 04:54:14 PM PDT 24 |
Jul 14 04:54:15 PM PDT 24 |
351628379 ps |
T35 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3295928893 |
|
|
Jul 14 04:54:20 PM PDT 24 |
Jul 14 05:11:59 PM PDT 24 |
10213025723 ps |
T36 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.2951145927 |
|
|
Jul 14 04:58:45 PM PDT 24 |
Jul 14 05:04:18 PM PDT 24 |
16443583302 ps |
T37 |
/workspace/coverage/default/7.sram_ctrl_regwen.1763076690 |
|
|
Jul 14 04:54:24 PM PDT 24 |
Jul 14 05:18:13 PM PDT 24 |
11852977851 ps |
T38 |
/workspace/coverage/default/22.sram_ctrl_bijection.3896952467 |
|
|
Jul 14 04:56:37 PM PDT 24 |
Jul 14 04:57:17 PM PDT 24 |
650182895 ps |
T39 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.3195064253 |
|
|
Jul 14 05:02:27 PM PDT 24 |
Jul 14 05:05:09 PM PDT 24 |
2131849079 ps |
T16 |
/workspace/coverage/default/12.sram_ctrl_alert_test.2965541120 |
|
|
Jul 14 04:55:01 PM PDT 24 |
Jul 14 04:55:03 PM PDT 24 |
22190791 ps |
T40 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.4175974084 |
|
|
Jul 14 04:59:26 PM PDT 24 |
Jul 14 04:59:38 PM PDT 24 |
343464402 ps |
T41 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.3580235020 |
|
|
Jul 14 04:57:39 PM PDT 24 |
Jul 14 05:02:21 PM PDT 24 |
5901168020 ps |
T197 |
/workspace/coverage/default/14.sram_ctrl_executable.1663389626 |
|
|
Jul 14 04:55:20 PM PDT 24 |
Jul 14 05:08:41 PM PDT 24 |
8416623594 ps |
T198 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.1675409123 |
|
|
Jul 14 04:55:44 PM PDT 24 |
Jul 14 04:56:55 PM PDT 24 |
1925781769 ps |
T59 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.893628423 |
|
|
Jul 14 05:00:17 PM PDT 24 |
Jul 14 05:07:06 PM PDT 24 |
13935594008 ps |
T199 |
/workspace/coverage/default/25.sram_ctrl_regwen.257989224 |
|
|
Jul 14 04:57:25 PM PDT 24 |
Jul 14 05:07:30 PM PDT 24 |
7811054684 ps |
T200 |
/workspace/coverage/default/36.sram_ctrl_smoke.1229997241 |
|
|
Jul 14 05:00:02 PM PDT 24 |
Jul 14 05:00:05 PM PDT 24 |
148439381 ps |
T201 |
/workspace/coverage/default/3.sram_ctrl_executable.3066185657 |
|
|
Jul 14 04:54:00 PM PDT 24 |
Jul 14 05:09:53 PM PDT 24 |
13008521197 ps |
T122 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.3475646106 |
|
|
Jul 14 04:55:24 PM PDT 24 |
Jul 14 04:55:30 PM PDT 24 |
302574641 ps |
T202 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.3090198409 |
|
|
Jul 14 04:54:13 PM PDT 24 |
Jul 14 04:54:20 PM PDT 24 |
285724164 ps |
T123 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1883062813 |
|
|
Jul 14 04:54:23 PM PDT 24 |
Jul 14 04:58:32 PM PDT 24 |
11021566546 ps |
T23 |
/workspace/coverage/default/33.sram_ctrl_stress_all.1016851322 |
|
|
Jul 14 04:59:21 PM PDT 24 |
Jul 14 05:46:41 PM PDT 24 |
48561145516 ps |
T203 |
/workspace/coverage/default/30.sram_ctrl_regwen.4089517606 |
|
|
Jul 14 04:58:20 PM PDT 24 |
Jul 14 05:06:01 PM PDT 24 |
9320119996 ps |
T204 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1395871918 |
|
|
Jul 14 04:54:25 PM PDT 24 |
Jul 14 04:54:27 PM PDT 24 |
36627433 ps |
T205 |
/workspace/coverage/default/21.sram_ctrl_bijection.3344815041 |
|
|
Jul 14 04:56:20 PM PDT 24 |
Jul 14 04:56:48 PM PDT 24 |
1220233853 ps |
T124 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.3538154854 |
|
|
Jul 14 04:55:44 PM PDT 24 |
Jul 14 05:00:12 PM PDT 24 |
10649494078 ps |
T206 |
/workspace/coverage/default/6.sram_ctrl_smoke.216301416 |
|
|
Jul 14 04:54:16 PM PDT 24 |
Jul 14 04:54:19 PM PDT 24 |
350825509 ps |
T207 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.208997250 |
|
|
Jul 14 05:02:02 PM PDT 24 |
Jul 14 05:02:25 PM PDT 24 |
79269459 ps |
T208 |
/workspace/coverage/default/31.sram_ctrl_bijection.483380140 |
|
|
Jul 14 04:58:26 PM PDT 24 |
Jul 14 04:58:44 PM PDT 24 |
1181773457 ps |
T209 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.4096026289 |
|
|
Jul 14 05:01:49 PM PDT 24 |
Jul 14 05:07:14 PM PDT 24 |
18943968374 ps |
T210 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.1841996891 |
|
|
Jul 14 04:55:16 PM PDT 24 |
Jul 14 04:55:17 PM PDT 24 |
232228377 ps |
T211 |
/workspace/coverage/default/21.sram_ctrl_partial_access.1232450734 |
|
|
Jul 14 04:56:25 PM PDT 24 |
Jul 14 04:56:43 PM PDT 24 |
324844455 ps |
T212 |
/workspace/coverage/default/36.sram_ctrl_stress_all.1515126333 |
|
|
Jul 14 05:00:16 PM PDT 24 |
Jul 14 07:18:17 PM PDT 24 |
18471941373 ps |
T213 |
/workspace/coverage/default/29.sram_ctrl_bijection.2285297795 |
|
|
Jul 14 04:58:03 PM PDT 24 |
Jul 14 04:58:31 PM PDT 24 |
2282470893 ps |
T214 |
/workspace/coverage/default/6.sram_ctrl_alert_test.4010726066 |
|
|
Jul 14 04:54:22 PM PDT 24 |
Jul 14 04:54:24 PM PDT 24 |
71667149 ps |
T215 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.2276128988 |
|
|
Jul 14 04:55:50 PM PDT 24 |
Jul 14 04:56:13 PM PDT 24 |
284127548 ps |
T216 |
/workspace/coverage/default/42.sram_ctrl_stress_all.113771901 |
|
|
Jul 14 05:01:56 PM PDT 24 |
Jul 14 06:10:33 PM PDT 24 |
40428925983 ps |
T217 |
/workspace/coverage/default/45.sram_ctrl_partial_access.1025153783 |
|
|
Jul 14 05:02:41 PM PDT 24 |
Jul 14 05:02:42 PM PDT 24 |
57891023 ps |
T218 |
/workspace/coverage/default/20.sram_ctrl_alert_test.389780376 |
|
|
Jul 14 04:56:20 PM PDT 24 |
Jul 14 04:56:21 PM PDT 24 |
22027879 ps |
T219 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.3744318647 |
|
|
Jul 14 05:00:54 PM PDT 24 |
Jul 14 05:04:09 PM PDT 24 |
818282659 ps |
T220 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.1918952317 |
|
|
Jul 14 05:02:16 PM PDT 24 |
Jul 14 05:02:19 PM PDT 24 |
177671569 ps |
T221 |
/workspace/coverage/default/20.sram_ctrl_smoke.1075827067 |
|
|
Jul 14 04:56:07 PM PDT 24 |
Jul 14 04:58:38 PM PDT 24 |
541024017 ps |
T222 |
/workspace/coverage/default/15.sram_ctrl_smoke.4042000725 |
|
|
Jul 14 04:55:20 PM PDT 24 |
Jul 14 04:57:59 PM PDT 24 |
136175952 ps |
T223 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.3678806574 |
|
|
Jul 14 04:57:58 PM PDT 24 |
Jul 14 05:01:13 PM PDT 24 |
2064089808 ps |
T224 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2523299070 |
|
|
Jul 14 05:03:03 PM PDT 24 |
Jul 14 05:14:23 PM PDT 24 |
7953266709 ps |
T225 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1310575777 |
|
|
Jul 14 05:03:45 PM PDT 24 |
Jul 14 05:04:12 PM PDT 24 |
325845815 ps |
T226 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3773228160 |
|
|
Jul 14 04:54:37 PM PDT 24 |
Jul 14 05:07:39 PM PDT 24 |
3428964986 ps |
T166 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.4253686040 |
|
|
Jul 14 04:57:49 PM PDT 24 |
Jul 14 05:19:33 PM PDT 24 |
14145193784 ps |
T227 |
/workspace/coverage/default/31.sram_ctrl_partial_access.1607408589 |
|
|
Jul 14 04:58:33 PM PDT 24 |
Jul 14 04:58:51 PM PDT 24 |
2876552279 ps |
T228 |
/workspace/coverage/default/28.sram_ctrl_stress_all.1282248238 |
|
|
Jul 14 04:58:00 PM PDT 24 |
Jul 14 05:57:39 PM PDT 24 |
85820128017 ps |
T229 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.832862826 |
|
|
Jul 14 04:54:08 PM PDT 24 |
Jul 14 04:54:09 PM PDT 24 |
44480633 ps |
T230 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.120839208 |
|
|
Jul 14 04:54:23 PM PDT 24 |
Jul 14 05:08:10 PM PDT 24 |
36509143110 ps |
T231 |
/workspace/coverage/default/20.sram_ctrl_stress_all.4053064426 |
|
|
Jul 14 04:56:20 PM PDT 24 |
Jul 14 05:31:26 PM PDT 24 |
17605033206 ps |
T232 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.1293986767 |
|
|
Jul 14 04:54:23 PM PDT 24 |
Jul 14 04:54:36 PM PDT 24 |
2976795146 ps |
T233 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2160435752 |
|
|
Jul 14 05:04:15 PM PDT 24 |
Jul 14 05:04:19 PM PDT 24 |
92970736 ps |
T234 |
/workspace/coverage/default/7.sram_ctrl_alert_test.2561836776 |
|
|
Jul 14 04:54:22 PM PDT 24 |
Jul 14 04:54:24 PM PDT 24 |
16750775 ps |
T235 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.693426428 |
|
|
Jul 14 05:02:37 PM PDT 24 |
Jul 14 05:02:40 PM PDT 24 |
344425937 ps |
T236 |
/workspace/coverage/default/44.sram_ctrl_bijection.1681145881 |
|
|
Jul 14 05:02:20 PM PDT 24 |
Jul 14 05:02:45 PM PDT 24 |
6144765020 ps |
T237 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.2299240145 |
|
|
Jul 14 04:55:38 PM PDT 24 |
Jul 14 04:56:08 PM PDT 24 |
154188156 ps |
T238 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.3737007669 |
|
|
Jul 14 04:56:44 PM PDT 24 |
Jul 14 05:08:35 PM PDT 24 |
5388419911 ps |
T239 |
/workspace/coverage/default/6.sram_ctrl_partial_access.190113746 |
|
|
Jul 14 04:54:16 PM PDT 24 |
Jul 14 04:54:35 PM PDT 24 |
1990091479 ps |
T60 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1324928363 |
|
|
Jul 14 04:54:22 PM PDT 24 |
Jul 14 04:54:27 PM PDT 24 |
92380017 ps |
T240 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3223133604 |
|
|
Jul 14 04:58:08 PM PDT 24 |
Jul 14 04:59:31 PM PDT 24 |
448926749 ps |
T61 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1697136381 |
|
|
Jul 14 04:53:54 PM PDT 24 |
Jul 14 05:02:41 PM PDT 24 |
1712525920 ps |
T241 |
/workspace/coverage/default/11.sram_ctrl_smoke.3762450810 |
|
|
Jul 14 04:54:54 PM PDT 24 |
Jul 14 04:55:03 PM PDT 24 |
150798313 ps |
T52 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.2368904625 |
|
|
Jul 14 04:59:54 PM PDT 24 |
Jul 14 04:59:59 PM PDT 24 |
204046999 ps |
T242 |
/workspace/coverage/default/44.sram_ctrl_partial_access.896442027 |
|
|
Jul 14 05:02:20 PM PDT 24 |
Jul 14 05:02:32 PM PDT 24 |
375056122 ps |
T243 |
/workspace/coverage/default/46.sram_ctrl_executable.1396779655 |
|
|
Jul 14 05:03:02 PM PDT 24 |
Jul 14 05:20:06 PM PDT 24 |
62712837821 ps |
T244 |
/workspace/coverage/default/17.sram_ctrl_alert_test.1430349229 |
|
|
Jul 14 04:55:51 PM PDT 24 |
Jul 14 04:55:52 PM PDT 24 |
45068558 ps |
T245 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.4033189140 |
|
|
Jul 14 04:54:14 PM PDT 24 |
Jul 14 05:03:44 PM PDT 24 |
10138541465 ps |
T246 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.2141309137 |
|
|
Jul 14 05:03:25 PM PDT 24 |
Jul 14 05:03:36 PM PDT 24 |
462270591 ps |
T247 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.14504769 |
|
|
Jul 14 04:55:57 PM PDT 24 |
Jul 14 04:56:08 PM PDT 24 |
685140968 ps |
T248 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.4153677971 |
|
|
Jul 14 04:58:32 PM PDT 24 |
Jul 14 05:15:28 PM PDT 24 |
6040550086 ps |
T249 |
/workspace/coverage/default/23.sram_ctrl_alert_test.2050893321 |
|
|
Jul 14 04:56:54 PM PDT 24 |
Jul 14 04:56:55 PM PDT 24 |
14125114 ps |
T250 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.3785148333 |
|
|
Jul 14 04:57:00 PM PDT 24 |
Jul 14 05:22:24 PM PDT 24 |
5756174449 ps |
T62 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3988730577 |
|
|
Jul 14 04:54:37 PM PDT 24 |
Jul 14 05:01:04 PM PDT 24 |
9223884693 ps |
T251 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4116503078 |
|
|
Jul 14 05:03:20 PM PDT 24 |
Jul 14 05:06:02 PM PDT 24 |
194074244 ps |
T252 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.944263951 |
|
|
Jul 14 05:01:15 PM PDT 24 |
Jul 14 05:01:16 PM PDT 24 |
104057120 ps |
T253 |
/workspace/coverage/default/14.sram_ctrl_smoke.1628026521 |
|
|
Jul 14 04:55:16 PM PDT 24 |
Jul 14 04:55:26 PM PDT 24 |
819124554 ps |
T254 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.225267914 |
|
|
Jul 14 04:57:20 PM PDT 24 |
Jul 14 04:57:31 PM PDT 24 |
68555888 ps |
T158 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.309680034 |
|
|
Jul 14 05:00:17 PM PDT 24 |
Jul 14 05:06:48 PM PDT 24 |
16170177287 ps |
T255 |
/workspace/coverage/default/35.sram_ctrl_regwen.151529366 |
|
|
Jul 14 04:59:40 PM PDT 24 |
Jul 14 05:03:12 PM PDT 24 |
1528006286 ps |
T256 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.493373048 |
|
|
Jul 14 05:00:32 PM PDT 24 |
Jul 14 05:06:01 PM PDT 24 |
4133427164 ps |
T257 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2929489805 |
|
|
Jul 14 04:54:45 PM PDT 24 |
Jul 14 04:55:51 PM PDT 24 |
213369868 ps |
T258 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2207576900 |
|
|
Jul 14 04:56:48 PM PDT 24 |
Jul 14 04:57:34 PM PDT 24 |
95983122 ps |
T259 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.48244509 |
|
|
Jul 14 05:02:47 PM PDT 24 |
Jul 14 05:02:48 PM PDT 24 |
76307660 ps |
T260 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.3720041707 |
|
|
Jul 14 04:56:17 PM PDT 24 |
Jul 14 04:56:20 PM PDT 24 |
410263073 ps |
T261 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.2971428620 |
|
|
Jul 14 04:56:44 PM PDT 24 |
Jul 14 04:56:45 PM PDT 24 |
30094122 ps |
T262 |
/workspace/coverage/default/11.sram_ctrl_stress_all.3761632677 |
|
|
Jul 14 04:54:56 PM PDT 24 |
Jul 14 05:35:00 PM PDT 24 |
409030079546 ps |
T263 |
/workspace/coverage/default/12.sram_ctrl_smoke.379843746 |
|
|
Jul 14 04:54:58 PM PDT 24 |
Jul 14 04:55:02 PM PDT 24 |
176525281 ps |
T264 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.2956342650 |
|
|
Jul 14 04:56:56 PM PDT 24 |
Jul 14 04:56:57 PM PDT 24 |
29305821 ps |
T265 |
/workspace/coverage/default/46.sram_ctrl_smoke.1887551128 |
|
|
Jul 14 05:02:55 PM PDT 24 |
Jul 14 05:03:07 PM PDT 24 |
743833360 ps |
T266 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.958652426 |
|
|
Jul 14 04:53:54 PM PDT 24 |
Jul 14 04:53:56 PM PDT 24 |
46286016 ps |
T267 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.4225413337 |
|
|
Jul 14 04:54:01 PM PDT 24 |
Jul 14 04:54:03 PM PDT 24 |
93367871 ps |
T162 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3290927073 |
|
|
Jul 14 04:57:55 PM PDT 24 |
Jul 14 05:02:24 PM PDT 24 |
39761661568 ps |
T268 |
/workspace/coverage/default/16.sram_ctrl_alert_test.35428478 |
|
|
Jul 14 04:55:39 PM PDT 24 |
Jul 14 04:55:41 PM PDT 24 |
34494136 ps |
T269 |
/workspace/coverage/default/39.sram_ctrl_smoke.2264095884 |
|
|
Jul 14 05:00:45 PM PDT 24 |
Jul 14 05:00:54 PM PDT 24 |
1888125236 ps |
T270 |
/workspace/coverage/default/18.sram_ctrl_regwen.2341140981 |
|
|
Jul 14 04:56:00 PM PDT 24 |
Jul 14 05:27:27 PM PDT 24 |
49280059594 ps |
T271 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.2694540346 |
|
|
Jul 14 05:01:29 PM PDT 24 |
Jul 14 05:01:33 PM PDT 24 |
2007146323 ps |
T272 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.4177654938 |
|
|
Jul 14 05:00:23 PM PDT 24 |
Jul 14 05:02:13 PM PDT 24 |
1189148680 ps |
T273 |
/workspace/coverage/default/40.sram_ctrl_regwen.2046314077 |
|
|
Jul 14 05:01:17 PM PDT 24 |
Jul 14 05:26:11 PM PDT 24 |
2431453198 ps |
T274 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.637192862 |
|
|
Jul 14 04:55:38 PM PDT 24 |
Jul 14 05:16:54 PM PDT 24 |
14460958731 ps |
T275 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.4211153379 |
|
|
Jul 14 04:54:52 PM PDT 24 |
Jul 14 05:15:44 PM PDT 24 |
5519395583 ps |
T276 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.1862410970 |
|
|
Jul 14 05:00:17 PM PDT 24 |
Jul 14 05:02:36 PM PDT 24 |
1416246095 ps |
T277 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.876674353 |
|
|
Jul 14 04:58:39 PM PDT 24 |
Jul 14 04:58:40 PM PDT 24 |
48609087 ps |
T278 |
/workspace/coverage/default/16.sram_ctrl_stress_all.1345035529 |
|
|
Jul 14 04:55:39 PM PDT 24 |
Jul 14 05:24:12 PM PDT 24 |
146694827359 ps |
T63 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1006146102 |
|
|
Jul 14 05:00:46 PM PDT 24 |
Jul 14 05:00:54 PM PDT 24 |
634933194 ps |
T133 |
/workspace/coverage/default/18.sram_ctrl_smoke.3853982318 |
|
|
Jul 14 04:55:50 PM PDT 24 |
Jul 14 04:55:56 PM PDT 24 |
366625874 ps |
T134 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.4289229901 |
|
|
Jul 14 04:54:32 PM PDT 24 |
Jul 14 04:54:33 PM PDT 24 |
46286562 ps |
T135 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.3738866415 |
|
|
Jul 14 05:02:08 PM PDT 24 |
Jul 14 05:02:09 PM PDT 24 |
259882281 ps |
T136 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.2679121924 |
|
|
Jul 14 05:01:12 PM PDT 24 |
Jul 14 05:01:20 PM PDT 24 |
863451188 ps |
T137 |
/workspace/coverage/default/33.sram_ctrl_bijection.1796034907 |
|
|
Jul 14 04:59:08 PM PDT 24 |
Jul 14 05:00:24 PM PDT 24 |
5403755377 ps |
T138 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.646658310 |
|
|
Jul 14 04:59:09 PM PDT 24 |
Jul 14 05:01:17 PM PDT 24 |
9020025769 ps |
T139 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2523801212 |
|
|
Jul 14 04:54:46 PM PDT 24 |
Jul 14 05:10:29 PM PDT 24 |
3924761334 ps |
T140 |
/workspace/coverage/default/33.sram_ctrl_regwen.2607216895 |
|
|
Jul 14 06:17:28 PM PDT 24 |
Jul 14 06:41:03 PM PDT 24 |
29237993953 ps |
T141 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1745457964 |
|
|
Jul 14 04:54:57 PM PDT 24 |
Jul 14 05:00:49 PM PDT 24 |
8687831427 ps |
T64 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.3955061161 |
|
|
Jul 14 04:58:39 PM PDT 24 |
Jul 14 04:58:45 PM PDT 24 |
387774385 ps |
T279 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.2312727698 |
|
|
Jul 14 04:55:49 PM PDT 24 |
Jul 14 04:56:43 PM PDT 24 |
350540472 ps |
T280 |
/workspace/coverage/default/39.sram_ctrl_stress_all.2643327307 |
|
|
Jul 14 05:01:05 PM PDT 24 |
Jul 14 05:36:16 PM PDT 24 |
126784821070 ps |
T281 |
/workspace/coverage/default/16.sram_ctrl_regwen.631114821 |
|
|
Jul 14 04:55:38 PM PDT 24 |
Jul 14 05:04:45 PM PDT 24 |
1807025573 ps |
T282 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.2935027861 |
|
|
Jul 14 04:55:25 PM PDT 24 |
Jul 14 04:58:51 PM PDT 24 |
8226021041 ps |
T283 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.1030554816 |
|
|
Jul 14 05:00:12 PM PDT 24 |
Jul 14 05:00:13 PM PDT 24 |
28231059 ps |
T284 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.4198214025 |
|
|
Jul 14 04:59:40 PM PDT 24 |
Jul 14 05:20:19 PM PDT 24 |
9948911285 ps |
T285 |
/workspace/coverage/default/49.sram_ctrl_smoke.1173553101 |
|
|
Jul 14 05:03:51 PM PDT 24 |
Jul 14 05:05:27 PM PDT 24 |
967751106 ps |
T286 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.217937044 |
|
|
Jul 14 04:58:45 PM PDT 24 |
Jul 14 05:10:13 PM PDT 24 |
6940919357 ps |
T287 |
/workspace/coverage/default/19.sram_ctrl_partial_access.893946011 |
|
|
Jul 14 04:56:03 PM PDT 24 |
Jul 14 04:56:11 PM PDT 24 |
309903641 ps |
T288 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.3974998774 |
|
|
Jul 14 04:54:11 PM PDT 24 |
Jul 14 04:54:16 PM PDT 24 |
953294177 ps |
T289 |
/workspace/coverage/default/7.sram_ctrl_bijection.828558513 |
|
|
Jul 14 04:54:22 PM PDT 24 |
Jul 14 04:54:55 PM PDT 24 |
1316261082 ps |
T290 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3742888174 |
|
|
Jul 14 05:03:32 PM PDT 24 |
Jul 14 05:03:33 PM PDT 24 |
13308921 ps |
T291 |
/workspace/coverage/default/32.sram_ctrl_regwen.1406900374 |
|
|
Jul 14 04:58:52 PM PDT 24 |
Jul 14 05:23:54 PM PDT 24 |
40129893135 ps |
T292 |
/workspace/coverage/default/29.sram_ctrl_executable.27658492 |
|
|
Jul 14 04:58:07 PM PDT 24 |
Jul 14 05:10:12 PM PDT 24 |
1051416719 ps |
T293 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1104612234 |
|
|
Jul 14 04:55:01 PM PDT 24 |
Jul 14 04:55:08 PM PDT 24 |
527687071 ps |
T294 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.1511107241 |
|
|
Jul 14 04:57:37 PM PDT 24 |
Jul 14 05:11:05 PM PDT 24 |
3100383913 ps |
T295 |
/workspace/coverage/default/35.sram_ctrl_alert_test.3501288188 |
|
|
Jul 14 04:59:54 PM PDT 24 |
Jul 14 04:59:56 PM PDT 24 |
22797487 ps |
T296 |
/workspace/coverage/default/12.sram_ctrl_stress_all.2758483704 |
|
|
Jul 14 04:55:02 PM PDT 24 |
Jul 14 05:47:30 PM PDT 24 |
60224390461 ps |
T297 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.2376871410 |
|
|
Jul 14 04:55:23 PM PDT 24 |
Jul 14 05:02:00 PM PDT 24 |
6940775366 ps |
T298 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.2872744672 |
|
|
Jul 14 04:55:14 PM PDT 24 |
Jul 14 04:57:26 PM PDT 24 |
676392997 ps |
T299 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1199656131 |
|
|
Jul 14 04:59:21 PM PDT 24 |
Jul 14 05:00:53 PM PDT 24 |
138373986 ps |
T300 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1857439773 |
|
|
Jul 14 04:55:49 PM PDT 24 |
Jul 14 05:00:18 PM PDT 24 |
38465892473 ps |
T301 |
/workspace/coverage/default/42.sram_ctrl_smoke.1965658475 |
|
|
Jul 14 05:01:42 PM PDT 24 |
Jul 14 05:03:47 PM PDT 24 |
1050447702 ps |
T302 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1684527066 |
|
|
Jul 14 04:55:01 PM PDT 24 |
Jul 14 04:55:03 PM PDT 24 |
38783969 ps |
T303 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.853600010 |
|
|
Jul 14 04:53:49 PM PDT 24 |
Jul 14 04:53:56 PM PDT 24 |
1320517524 ps |
T304 |
/workspace/coverage/default/11.sram_ctrl_executable.4015553181 |
|
|
Jul 14 04:54:51 PM PDT 24 |
Jul 14 05:09:08 PM PDT 24 |
4202348551 ps |
T305 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.2997264001 |
|
|
Jul 14 04:57:49 PM PDT 24 |
Jul 14 04:57:53 PM PDT 24 |
89444451 ps |
T306 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1054007633 |
|
|
Jul 14 05:03:37 PM PDT 24 |
Jul 14 05:04:14 PM PDT 24 |
122719696 ps |
T307 |
/workspace/coverage/default/5.sram_ctrl_regwen.2555891785 |
|
|
Jul 14 04:54:25 PM PDT 24 |
Jul 14 05:01:54 PM PDT 24 |
7850717930 ps |
T308 |
/workspace/coverage/default/25.sram_ctrl_executable.3317891332 |
|
|
Jul 14 04:57:25 PM PDT 24 |
Jul 14 05:01:23 PM PDT 24 |
11271000617 ps |
T309 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.3837050066 |
|
|
Jul 14 05:01:34 PM PDT 24 |
Jul 14 05:01:35 PM PDT 24 |
57108148 ps |
T78 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3040559899 |
|
|
Jul 14 05:02:16 PM PDT 24 |
Jul 14 05:09:49 PM PDT 24 |
2592092384 ps |
T310 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2676647823 |
|
|
Jul 14 05:02:40 PM PDT 24 |
Jul 14 05:03:32 PM PDT 24 |
114478482 ps |
T48 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.917907809 |
|
|
Jul 14 04:54:21 PM PDT 24 |
Jul 14 04:56:47 PM PDT 24 |
4798146150 ps |
T311 |
/workspace/coverage/default/10.sram_ctrl_regwen.535920996 |
|
|
Jul 14 04:54:43 PM PDT 24 |
Jul 14 05:11:35 PM PDT 24 |
6700986271 ps |
T312 |
/workspace/coverage/default/41.sram_ctrl_executable.855276480 |
|
|
Jul 14 05:01:29 PM PDT 24 |
Jul 14 05:08:10 PM PDT 24 |
681869325 ps |
T313 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.3269139927 |
|
|
Jul 14 05:01:28 PM PDT 24 |
Jul 14 05:19:01 PM PDT 24 |
11270797683 ps |