Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1024
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
75.57 75.57 93.05 93.05 76.90 76.90 86.62 86.62 33.33 33.33 85.27 85.27 93.51 93.51 60.33 60.33 /workspace/coverage/default/48.sram_ctrl_stress_all.3951927046
87.93 12.36 96.95 3.90 86.37 9.48 89.53 2.91 71.43 38.10 90.82 5.56 95.43 1.92 85.01 24.68 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3968738751
92.87 4.93 98.47 1.53 86.49 0.12 90.22 0.69 100.00 28.57 93.72 2.90 96.17 0.74 85.01 0.00 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.604217024
94.49 1.62 98.73 0.25 88.39 1.90 97.95 7.73 100.00 0.00 94.44 0.72 96.17 0.00 85.74 0.73 /workspace/coverage/default/30.sram_ctrl_alert_test.2899464819
95.47 0.98 98.90 0.17 89.22 0.83 98.16 0.21 100.00 0.00 95.17 0.72 96.17 0.00 90.68 4.94 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.543510146
96.08 0.61 99.07 0.17 91.00 1.78 98.58 0.42 100.00 0.00 96.14 0.97 96.76 0.59 91.04 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.3067700457
96.37 0.29 99.07 0.00 91.00 0.00 98.61 0.03 100.00 0.00 96.14 0.00 97.64 0.88 92.14 1.10 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.3458279867
96.60 0.23 99.07 0.00 91.00 0.00 98.61 0.00 100.00 0.00 96.14 0.00 97.79 0.15 93.60 1.46 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.366756937
96.80 0.20 99.07 0.00 91.00 0.00 98.68 0.07 100.00 0.00 96.14 0.00 99.12 1.33 93.60 0.00 /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.38689899
97.00 0.20 99.07 0.00 91.00 0.00 98.79 0.10 100.00 0.00 96.14 0.00 99.12 0.00 94.88 1.28 /workspace/coverage/default/2.sram_ctrl_regwen.2223312580
97.13 0.13 99.15 0.08 91.00 0.00 99.62 0.83 100.00 0.00 96.14 0.00 99.12 0.00 94.88 0.00 /workspace/coverage/default/11.sram_ctrl_ram_cfg.674905739
97.23 0.10 99.15 0.00 91.00 0.00 99.62 0.00 100.00 0.00 96.14 0.00 99.12 0.00 95.61 0.73 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3050809508
97.31 0.08 99.15 0.00 91.00 0.00 99.62 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.16 0.55 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2998934891
97.38 0.07 99.15 0.00 91.00 0.00 99.72 0.10 100.00 0.00 96.14 0.00 99.12 0.00 96.53 0.37 /workspace/coverage/default/34.sram_ctrl_stress_all.1653566167
97.43 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.89 0.37 /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2096391635
97.46 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.18 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2975591427
97.48 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.2976539217
97.51 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1017725198

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1350216317
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.671487844
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1620883438
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3150122556
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3650514203
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3919621896
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.256620419
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.101106558
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1806944216
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3895239986
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2508530969
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3457750488
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.531318272
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1979627716
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.4272130437
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.4051776069
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3238534336
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.173415783
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1168633071
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3285401816
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3107566824
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2140607564
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.4067556090
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.458058278
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3208166060
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3197387300
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.704238486
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1802678815
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3425868207
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2401209406
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.272836597
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2642716891
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3359330650
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3083714753
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2428767013
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1819328536
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2379291258
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1720971945
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3570486793
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3610757270
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.137681560
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.4071717413
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2215627563
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1326026101
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1269346930
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3466124181
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3796499920
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.199209744
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3123695716
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.390761436
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.3558727729
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1674846550
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1811346218
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.641438496
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.895563143
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2179384525
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1262527059
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2317206497
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.305541558
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1415555064
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.511048108
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2281460890
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2819507140
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3346163142
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1878690218
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2296192843
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.954469556
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2192554472
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1443222315
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3131788984
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3576365393
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.931415790
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1994047219
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2378912108
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1543684699
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3930754998
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1259132612
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.664078888
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1291314171
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.84417896
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3085817001
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.268686527
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3007581842
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2903353201
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.419857052
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.4116467671
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1400726236
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1708127170
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.418235208
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1949441500
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2413648470
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.449781013
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.628354332
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3951659480
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1051888469
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3614534268
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2739202036
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2653060756
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1055228314
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.884222103
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3092091570
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.510944601
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3117416238
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.222791203
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1017461813
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3383708891
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1945356143
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1902715735
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.115199743
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3857866036
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2392300056
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2087043192
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3432305380
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3675079085
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3665803715
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2673182116
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1277765935
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.4061604369
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3765140886
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2261894546
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2409426919
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.259201278
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.4265190125
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2604866745
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3195104079
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.614433499
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3567345788
/workspace/coverage/default/0.sram_ctrl_alert_test.3295518069
/workspace/coverage/default/0.sram_ctrl_bijection.3747020905
/workspace/coverage/default/0.sram_ctrl_executable.3160094496
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3183363710
/workspace/coverage/default/0.sram_ctrl_max_throughput.2429661817
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2254247745
/workspace/coverage/default/0.sram_ctrl_mem_walk.4212505659
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3725574128
/workspace/coverage/default/0.sram_ctrl_partial_access.54534750
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3132484299
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2803201130
/workspace/coverage/default/0.sram_ctrl_regwen.3313756114
/workspace/coverage/default/0.sram_ctrl_smoke.861681031
/workspace/coverage/default/0.sram_ctrl_stress_all.1071926440
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.231012182
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.149670849
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2173407870
/workspace/coverage/default/1.sram_ctrl_alert_test.2474992346
/workspace/coverage/default/1.sram_ctrl_bijection.4085482403
/workspace/coverage/default/1.sram_ctrl_executable.3805391593
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3173435337
/workspace/coverage/default/1.sram_ctrl_max_throughput.1460948643
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.344312940
/workspace/coverage/default/1.sram_ctrl_mem_walk.3282147208
/workspace/coverage/default/1.sram_ctrl_multiple_keys.4179422092
/workspace/coverage/default/1.sram_ctrl_partial_access.2268795178
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1627241825
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2379340680
/workspace/coverage/default/1.sram_ctrl_regwen.3035842258
/workspace/coverage/default/1.sram_ctrl_sec_cm.3360570753
/workspace/coverage/default/1.sram_ctrl_smoke.1387421824
/workspace/coverage/default/1.sram_ctrl_stress_all.1416164056
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.492228453
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2454413581
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2384139419
/workspace/coverage/default/10.sram_ctrl_alert_test.1026876043
/workspace/coverage/default/10.sram_ctrl_bijection.1839859862
/workspace/coverage/default/10.sram_ctrl_executable.1570626850
/workspace/coverage/default/10.sram_ctrl_lc_escalation.60466142
/workspace/coverage/default/10.sram_ctrl_max_throughput.2463905322
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2583248741
/workspace/coverage/default/10.sram_ctrl_mem_walk.1146694861
/workspace/coverage/default/10.sram_ctrl_multiple_keys.558999213
/workspace/coverage/default/10.sram_ctrl_partial_access.2551608065
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1713796714
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3244733405
/workspace/coverage/default/10.sram_ctrl_regwen.436996186
/workspace/coverage/default/10.sram_ctrl_smoke.3859874716
/workspace/coverage/default/10.sram_ctrl_stress_all.1465381409
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3833090233
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.442645322
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.634017933
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.824878639
/workspace/coverage/default/11.sram_ctrl_alert_test.3393359578
/workspace/coverage/default/11.sram_ctrl_bijection.1370493516
/workspace/coverage/default/11.sram_ctrl_executable.799955558
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2703668301
/workspace/coverage/default/11.sram_ctrl_max_throughput.2730882674
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3925049998
/workspace/coverage/default/11.sram_ctrl_mem_walk.3111267837
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2168765229
/workspace/coverage/default/11.sram_ctrl_partial_access.3354749060
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1090064101
/workspace/coverage/default/11.sram_ctrl_regwen.4156835964
/workspace/coverage/default/11.sram_ctrl_smoke.3942889779
/workspace/coverage/default/11.sram_ctrl_stress_all.1119516686
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.856960274
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.875907928
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1455650482
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.923992496
/workspace/coverage/default/12.sram_ctrl_alert_test.3068805618
/workspace/coverage/default/12.sram_ctrl_bijection.1865637408
/workspace/coverage/default/12.sram_ctrl_executable.700532287
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2096713188
/workspace/coverage/default/12.sram_ctrl_max_throughput.1587042421
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2816799806
/workspace/coverage/default/12.sram_ctrl_mem_walk.2077170180
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2679565862
/workspace/coverage/default/12.sram_ctrl_partial_access.1192980273
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1423483864
/workspace/coverage/default/12.sram_ctrl_ram_cfg.490395678
/workspace/coverage/default/12.sram_ctrl_regwen.3276824745
/workspace/coverage/default/12.sram_ctrl_smoke.923287274
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/workspace/coverage/default/43.sram_ctrl_ram_cfg.433410579
/workspace/coverage/default/43.sram_ctrl_regwen.3056104819
/workspace/coverage/default/43.sram_ctrl_smoke.2482597001
/workspace/coverage/default/43.sram_ctrl_stress_all.549902334
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1658627594
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2784358079
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.392331640
/workspace/coverage/default/44.sram_ctrl_alert_test.3332393274
/workspace/coverage/default/44.sram_ctrl_bijection.2020775364
/workspace/coverage/default/44.sram_ctrl_executable.561905919
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2683809016
/workspace/coverage/default/44.sram_ctrl_max_throughput.2962380880
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.364866041
/workspace/coverage/default/44.sram_ctrl_mem_walk.4136783484
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2161001770
/workspace/coverage/default/44.sram_ctrl_partial_access.3687629333
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3440438307
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3660760566
/workspace/coverage/default/44.sram_ctrl_regwen.3387954563
/workspace/coverage/default/44.sram_ctrl_smoke.2951780949
/workspace/coverage/default/44.sram_ctrl_stress_all.1375179191
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3523318602
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.905769042
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.4091879446
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3571806640
/workspace/coverage/default/45.sram_ctrl_alert_test.3006982964
/workspace/coverage/default/45.sram_ctrl_bijection.3895805723
/workspace/coverage/default/45.sram_ctrl_executable.2863761965
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2369822623
/workspace/coverage/default/45.sram_ctrl_max_throughput.3802743161
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1722138295
/workspace/coverage/default/45.sram_ctrl_mem_walk.3015161249
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2761447898
/workspace/coverage/default/45.sram_ctrl_partial_access.1451780667
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.493517928
/workspace/coverage/default/45.sram_ctrl_ram_cfg.4208607648
/workspace/coverage/default/45.sram_ctrl_regwen.2051242612
/workspace/coverage/default/45.sram_ctrl_smoke.1053455131
/workspace/coverage/default/45.sram_ctrl_stress_all.2920026089
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2372165838
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.4202852059
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.4084980382
/workspace/coverage/default/46.sram_ctrl_alert_test.3362142197
/workspace/coverage/default/46.sram_ctrl_bijection.1576072276
/workspace/coverage/default/46.sram_ctrl_executable.2481596524
/workspace/coverage/default/46.sram_ctrl_lc_escalation.6796744
/workspace/coverage/default/46.sram_ctrl_max_throughput.1922234873
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1739829943
/workspace/coverage/default/46.sram_ctrl_mem_walk.3559864121
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3764831350
/workspace/coverage/default/46.sram_ctrl_partial_access.2329336998
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.908596788
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2565042101
/workspace/coverage/default/46.sram_ctrl_regwen.1682530409
/workspace/coverage/default/46.sram_ctrl_smoke.3020852087
/workspace/coverage/default/46.sram_ctrl_stress_all.2949361213
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2568028998
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.993532993
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3456134377
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.175310343
/workspace/coverage/default/47.sram_ctrl_alert_test.2390308867
/workspace/coverage/default/47.sram_ctrl_bijection.1938335249
/workspace/coverage/default/47.sram_ctrl_executable.883990707
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1217622983
/workspace/coverage/default/47.sram_ctrl_max_throughput.2359612607
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3572995715
/workspace/coverage/default/47.sram_ctrl_mem_walk.1466027364
/workspace/coverage/default/47.sram_ctrl_multiple_keys.950303099
/workspace/coverage/default/47.sram_ctrl_partial_access.2978371663
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4051360461
/workspace/coverage/default/47.sram_ctrl_ram_cfg.4259650421
/workspace/coverage/default/47.sram_ctrl_regwen.1212533084
/workspace/coverage/default/47.sram_ctrl_smoke.1827975781
/workspace/coverage/default/47.sram_ctrl_stress_all.4168299567
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1551737254
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1427427517
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2525026849
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2013243991
/workspace/coverage/default/48.sram_ctrl_alert_test.1785627316
/workspace/coverage/default/48.sram_ctrl_bijection.1619153624
/workspace/coverage/default/48.sram_ctrl_executable.680385876
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3428601476
/workspace/coverage/default/48.sram_ctrl_max_throughput.3481442546
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.357440606
/workspace/coverage/default/48.sram_ctrl_mem_walk.4140296602
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2780601249
/workspace/coverage/default/48.sram_ctrl_partial_access.1761441120
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2879451505
/workspace/coverage/default/48.sram_ctrl_ram_cfg.4098150173
/workspace/coverage/default/48.sram_ctrl_regwen.1157069929
/workspace/coverage/default/48.sram_ctrl_smoke.2394693110
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1377918989
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1679422812
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2725889105
/workspace/coverage/default/49.sram_ctrl_alert_test.3832159416
/workspace/coverage/default/49.sram_ctrl_bijection.3690558595
/workspace/coverage/default/49.sram_ctrl_executable.1092134757
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1289502256
/workspace/coverage/default/49.sram_ctrl_max_throughput.3224707904
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.320008686
/workspace/coverage/default/49.sram_ctrl_mem_walk.390711822
/workspace/coverage/default/49.sram_ctrl_multiple_keys.849278299
/workspace/coverage/default/49.sram_ctrl_partial_access.2782444294
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.593884831
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1469971056
/workspace/coverage/default/49.sram_ctrl_regwen.427369042
/workspace/coverage/default/49.sram_ctrl_smoke.665920089
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1165443123
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1696545763
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2327713646
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2168927669
/workspace/coverage/default/5.sram_ctrl_alert_test.3218129179
/workspace/coverage/default/5.sram_ctrl_bijection.3549501698
/workspace/coverage/default/5.sram_ctrl_executable.2976400600
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2195713030
/workspace/coverage/default/5.sram_ctrl_max_throughput.3608619676
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.36672209
/workspace/coverage/default/5.sram_ctrl_mem_walk.94557582
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2831238111
/workspace/coverage/default/5.sram_ctrl_partial_access.2932412893
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3505733122
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3291454631
/workspace/coverage/default/5.sram_ctrl_regwen.2363962034
/workspace/coverage/default/5.sram_ctrl_smoke.300621750
/workspace/coverage/default/5.sram_ctrl_stress_all.4230279374
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.86127573
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2696227451
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1852933059
/workspace/coverage/default/6.sram_ctrl_alert_test.3115190473
/workspace/coverage/default/6.sram_ctrl_bijection.1380731957
/workspace/coverage/default/6.sram_ctrl_executable.3646313437
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2371340671
/workspace/coverage/default/6.sram_ctrl_max_throughput.1610719788
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1192631194
/workspace/coverage/default/6.sram_ctrl_mem_walk.2663165340
/workspace/coverage/default/6.sram_ctrl_multiple_keys.402808331
/workspace/coverage/default/6.sram_ctrl_partial_access.2979574968
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.701832373
/workspace/coverage/default/6.sram_ctrl_ram_cfg.722640909
/workspace/coverage/default/6.sram_ctrl_regwen.269441936
/workspace/coverage/default/6.sram_ctrl_smoke.3783332988
/workspace/coverage/default/6.sram_ctrl_stress_all.972684959
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2536161563
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3999308125
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1509766962
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2870336045
/workspace/coverage/default/7.sram_ctrl_alert_test.2860454099
/workspace/coverage/default/7.sram_ctrl_bijection.554339009
/workspace/coverage/default/7.sram_ctrl_executable.3642658035
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1714982761
/workspace/coverage/default/7.sram_ctrl_max_throughput.1463597243
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.508502701
/workspace/coverage/default/7.sram_ctrl_mem_walk.1187772240
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3206576596
/workspace/coverage/default/7.sram_ctrl_partial_access.3442903951
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.289169839
/workspace/coverage/default/7.sram_ctrl_ram_cfg.4221627521
/workspace/coverage/default/7.sram_ctrl_regwen.3743259965
/workspace/coverage/default/7.sram_ctrl_smoke.762544745
/workspace/coverage/default/7.sram_ctrl_stress_all.2511646050
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2904576573
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1365373313
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.604834680
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3490563040
/workspace/coverage/default/8.sram_ctrl_alert_test.1668261784
/workspace/coverage/default/8.sram_ctrl_bijection.816157258
/workspace/coverage/default/8.sram_ctrl_executable.1673372402
/workspace/coverage/default/8.sram_ctrl_lc_escalation.4214455332
/workspace/coverage/default/8.sram_ctrl_max_throughput.2397131126
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2370872606
/workspace/coverage/default/8.sram_ctrl_mem_walk.1386448150
/workspace/coverage/default/8.sram_ctrl_multiple_keys.4175628496
/workspace/coverage/default/8.sram_ctrl_partial_access.1703320135
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.178720718
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3802206958
/workspace/coverage/default/8.sram_ctrl_regwen.2789625217
/workspace/coverage/default/8.sram_ctrl_smoke.1547100309
/workspace/coverage/default/8.sram_ctrl_stress_all.3294799907
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.684630562
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3425230180
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1370769855
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3239184874
/workspace/coverage/default/9.sram_ctrl_alert_test.3704492825
/workspace/coverage/default/9.sram_ctrl_bijection.2445495245
/workspace/coverage/default/9.sram_ctrl_executable.4152334763
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3046033330
/workspace/coverage/default/9.sram_ctrl_max_throughput.3519696577
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1697898478
/workspace/coverage/default/9.sram_ctrl_mem_walk.1648800164
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2721453393
/workspace/coverage/default/9.sram_ctrl_partial_access.3861967279
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2571256277
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3572093478
/workspace/coverage/default/9.sram_ctrl_regwen.2297473092
/workspace/coverage/default/9.sram_ctrl_smoke.348247518
/workspace/coverage/default/9.sram_ctrl_stress_all.3970945251
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1329131619
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1169554755
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3154642266



Total test records in report: 1024
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.1725252718 Jul 15 05:06:06 PM PDT 24 Jul 15 05:38:38 PM PDT 24 6249216539 ps
T2 /workspace/coverage/default/23.sram_ctrl_ram_cfg.1269855696 Jul 15 05:00:39 PM PDT 24 Jul 15 05:00:40 PM PDT 24 31898024 ps
T3 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.29284257 Jul 15 05:02:22 PM PDT 24 Jul 15 05:02:28 PM PDT 24 574549800 ps
T10 /workspace/coverage/default/11.sram_ctrl_ram_cfg.674905739 Jul 15 04:58:18 PM PDT 24 Jul 15 04:58:20 PM PDT 24 93967835 ps
T4 /workspace/coverage/default/10.sram_ctrl_regwen.436996186 Jul 15 04:58:01 PM PDT 24 Jul 15 05:17:02 PM PDT 24 74252674622 ps
T5 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.3677085722 Jul 15 05:05:52 PM PDT 24 Jul 15 05:05:56 PM PDT 24 98135465 ps
T11 /workspace/coverage/default/41.sram_ctrl_executable.462617141 Jul 15 05:05:25 PM PDT 24 Jul 15 05:43:50 PM PDT 24 69753228206 ps
T12 /workspace/coverage/default/14.sram_ctrl_ram_cfg.2957464205 Jul 15 04:58:52 PM PDT 24 Jul 15 04:58:54 PM PDT 24 98782134 ps
T6 /workspace/coverage/default/48.sram_ctrl_stress_all.3951927046 Jul 15 05:07:54 PM PDT 24 Jul 15 05:32:20 PM PDT 24 26796118525 ps
T13 /workspace/coverage/default/8.sram_ctrl_max_throughput.2397131126 Jul 15 04:57:32 PM PDT 24 Jul 15 04:57:45 PM PDT 24 131222449 ps
T34 /workspace/coverage/default/18.sram_ctrl_mem_walk.2683262626 Jul 15 04:59:40 PM PDT 24 Jul 15 04:59:47 PM PDT 24 691269842 ps
T35 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.2120659664 Jul 15 05:01:41 PM PDT 24 Jul 15 05:05:08 PM PDT 24 2276733092 ps
T14 /workspace/coverage/default/30.sram_ctrl_alert_test.2899464819 Jul 15 05:02:23 PM PDT 24 Jul 15 05:02:25 PM PDT 24 41783935 ps
T36 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.2911632592 Jul 15 05:05:12 PM PDT 24 Jul 15 05:05:16 PM PDT 24 66019366 ps
T37 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.2446386628 Jul 15 05:03:16 PM PDT 24 Jul 15 05:05:58 PM PDT 24 10077093617 ps
T39 /workspace/coverage/default/7.sram_ctrl_executable.3642658035 Jul 15 04:57:16 PM PDT 24 Jul 15 05:15:51 PM PDT 24 132521937468 ps
T24 /workspace/coverage/default/5.sram_ctrl_regwen.2363962034 Jul 15 04:56:50 PM PDT 24 Jul 15 05:20:48 PM PDT 24 79494672812 ps
T50 /workspace/coverage/default/15.sram_ctrl_mem_walk.1437006987 Jul 15 04:59:04 PM PDT 24 Jul 15 04:59:10 PM PDT 24 684779199 ps
T51 /workspace/coverage/default/3.sram_ctrl_multiple_keys.581049611 Jul 15 04:56:06 PM PDT 24 Jul 15 05:06:30 PM PDT 24 3624417684 ps
T52 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.1722138295 Jul 15 05:06:56 PM PDT 24 Jul 15 05:07:02 PM PDT 24 172276740 ps
T57 /workspace/coverage/default/26.sram_ctrl_smoke.2508384852 Jul 15 05:01:14 PM PDT 24 Jul 15 05:03:25 PM PDT 24 658044428 ps
T58 /workspace/coverage/default/23.sram_ctrl_partial_access.1398459374 Jul 15 05:00:31 PM PDT 24 Jul 15 05:00:37 PM PDT 24 1567965177 ps
T59 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.1903034957 Jul 15 04:59:56 PM PDT 24 Jul 15 05:00:02 PM PDT 24 669309511 ps
T148 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1942188098 Jul 15 05:05:45 PM PDT 24 Jul 15 05:06:05 PM PDT 24 300391989 ps
T154 /workspace/coverage/default/33.sram_ctrl_partial_access.531981 Jul 15 05:02:58 PM PDT 24 Jul 15 05:03:15 PM PDT 24 821432832 ps
T155 /workspace/coverage/default/46.sram_ctrl_smoke.3020852087 Jul 15 05:06:55 PM PDT 24 Jul 15 05:06:59 PM PDT 24 172122172 ps
T19 /workspace/coverage/default/18.sram_ctrl_bijection.1130987938 Jul 15 04:59:32 PM PDT 24 Jul 15 05:00:50 PM PDT 24 20211869631 ps
T144 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.2056766650 Jul 15 05:00:52 PM PDT 24 Jul 15 05:02:09 PM PDT 24 501618178 ps
T9 /workspace/coverage/default/0.sram_ctrl_sec_cm.3067700457 Jul 15 04:55:43 PM PDT 24 Jul 15 04:55:46 PM PDT 24 826417553 ps
T27 /workspace/coverage/default/19.sram_ctrl_smoke.488429630 Jul 15 04:59:50 PM PDT 24 Jul 15 05:00:03 PM PDT 24 554198602 ps
T28 /workspace/coverage/default/5.sram_ctrl_partial_access.2932412893 Jul 15 04:56:45 PM PDT 24 Jul 15 04:59:09 PM PDT 24 670657923 ps
T29 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.178720718 Jul 15 04:57:30 PM PDT 24 Jul 15 05:02:54 PM PDT 24 64729686707 ps
T30 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.3458279867 Jul 15 05:03:31 PM PDT 24 Jul 15 05:24:16 PM PDT 24 30914923941 ps
T31 /workspace/coverage/default/13.sram_ctrl_bijection.1629072978 Jul 15 04:58:25 PM PDT 24 Jul 15 04:59:26 PM PDT 24 3680913081 ps
T32 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.12837150 Jul 15 05:00:33 PM PDT 24 Jul 15 05:04:02 PM PDT 24 15108973769 ps
T33 /workspace/coverage/default/46.sram_ctrl_partial_access.2329336998 Jul 15 05:07:00 PM PDT 24 Jul 15 05:09:58 PM PDT 24 663972181 ps
T7 /workspace/coverage/default/45.sram_ctrl_lc_escalation.2369822623 Jul 15 05:06:47 PM PDT 24 Jul 15 05:06:54 PM PDT 24 511297264 ps
T8 /workspace/coverage/default/35.sram_ctrl_lc_escalation.2825947304 Jul 15 05:03:31 PM PDT 24 Jul 15 05:03:41 PM PDT 24 3212026343 ps
T65 /workspace/coverage/default/42.sram_ctrl_regwen.453936127 Jul 15 05:05:44 PM PDT 24 Jul 15 05:25:12 PM PDT 24 11990897423 ps
T156 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.3024780579 Jul 15 04:59:01 PM PDT 24 Jul 15 04:59:53 PM PDT 24 635923529 ps
T15 /workspace/coverage/default/35.sram_ctrl_alert_test.3260288654 Jul 15 05:03:39 PM PDT 24 Jul 15 05:03:40 PM PDT 24 15366291 ps
T157 /workspace/coverage/default/13.sram_ctrl_partial_access.1775643284 Jul 15 04:58:25 PM PDT 24 Jul 15 04:58:46 PM PDT 24 384202879 ps
T149 /workspace/coverage/default/24.sram_ctrl_multiple_keys.533339034 Jul 15 05:00:45 PM PDT 24 Jul 15 05:05:35 PM PDT 24 791707775 ps
T16 /workspace/coverage/default/0.sram_ctrl_alert_test.3295518069 Jul 15 04:55:44 PM PDT 24 Jul 15 04:55:45 PM PDT 24 13748516 ps
T158 /workspace/coverage/default/33.sram_ctrl_mem_walk.2780630634 Jul 15 05:02:58 PM PDT 24 Jul 15 05:03:04 PM PDT 24 757273950 ps
T20 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3968738751 Jul 15 05:05:51 PM PDT 24 Jul 15 05:13:28 PM PDT 24 5733945871 ps
T66 /workspace/coverage/default/30.sram_ctrl_regwen.2352335079 Jul 15 05:02:14 PM PDT 24 Jul 15 05:22:58 PM PDT 24 50999709040 ps
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T67 /workspace/coverage/default/41.sram_ctrl_lc_escalation.3842070145 Jul 15 05:05:24 PM PDT 24 Jul 15 05:05:30 PM PDT 24 1029438987 ps
T74 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.2426243044 Jul 15 05:00:51 PM PDT 24 Jul 15 05:00:59 PM PDT 24 328284837 ps
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T75 /workspace/coverage/default/45.sram_ctrl_partial_access.1451780667 Jul 15 05:06:41 PM PDT 24 Jul 15 05:07:05 PM PDT 24 573058611 ps
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T38 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.1978306750 Jul 15 04:58:31 PM PDT 24 Jul 15 05:04:35 PM PDT 24 596477087 ps
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T160 /workspace/coverage/default/20.sram_ctrl_partial_access.2754551918 Jul 15 04:59:59 PM PDT 24 Jul 15 05:00:12 PM PDT 24 1398269858 ps
T100 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.366756937 Jul 15 05:05:16 PM PDT 24 Jul 15 05:11:16 PM PDT 24 15648835689 ps
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T153 /workspace/coverage/default/19.sram_ctrl_max_throughput.1500801282 Jul 15 04:59:43 PM PDT 24 Jul 15 05:02:21 PM PDT 24 140252347 ps
T161 /workspace/coverage/default/13.sram_ctrl_ram_cfg.3603428654 Jul 15 04:58:37 PM PDT 24 Jul 15 04:58:38 PM PDT 24 85671380 ps
T101 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.3999308125 Jul 15 04:56:56 PM PDT 24 Jul 15 04:59:20 PM PDT 24 2855838068 ps
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T163 /workspace/coverage/default/48.sram_ctrl_alert_test.1785627316 Jul 15 05:07:56 PM PDT 24 Jul 15 05:08:00 PM PDT 24 42768211 ps
T139 /workspace/coverage/default/28.sram_ctrl_multiple_keys.2648700501 Jul 15 05:01:40 PM PDT 24 Jul 15 05:19:16 PM PDT 24 26349147395 ps
T103 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2286410851 Jul 15 05:01:57 PM PDT 24 Jul 15 05:08:59 PM PDT 24 52972994828 ps
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T165 /workspace/coverage/default/24.sram_ctrl_partial_access.2012363711 Jul 15 05:00:47 PM PDT 24 Jul 15 05:01:54 PM PDT 24 2587364936 ps
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T120 /workspace/coverage/default/31.sram_ctrl_lc_escalation.352728826 Jul 15 05:02:27 PM PDT 24 Jul 15 05:02:37 PM PDT 24 2270836386 ps
T104 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.231012182 Jul 15 04:55:27 PM PDT 24 Jul 15 05:01:01 PM PDT 24 3069671185 ps
T150 /workspace/coverage/default/14.sram_ctrl_lc_escalation.577777976 Jul 15 04:58:43 PM PDT 24 Jul 15 04:58:48 PM PDT 24 800307882 ps
T167 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.3293277733 Jul 15 05:02:43 PM PDT 24 Jul 15 05:08:49 PM PDT 24 8955871101 ps
T44 /workspace/coverage/default/7.sram_ctrl_mem_walk.1187772240 Jul 15 04:57:22 PM PDT 24 Jul 15 04:57:28 PM PDT 24 342170339 ps
T43 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.364866041 Jul 15 05:06:35 PM PDT 24 Jul 15 05:06:45 PM PDT 24 650961417 ps
T168 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.593075140 Jul 15 04:58:45 PM PDT 24 Jul 15 05:00:30 PM PDT 24 4458374661 ps
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T170 /workspace/coverage/default/33.sram_ctrl_alert_test.3431699932 Jul 15 05:03:09 PM PDT 24 Jul 15 05:03:10 PM PDT 24 34001162 ps
T171 /workspace/coverage/default/38.sram_ctrl_alert_test.2267025345 Jul 15 05:04:35 PM PDT 24 Jul 15 05:04:36 PM PDT 24 24148189 ps
T47 /workspace/coverage/default/32.sram_ctrl_mem_walk.3933147051 Jul 15 05:02:51 PM PDT 24 Jul 15 05:02:58 PM PDT 24 1478186621 ps
T172 /workspace/coverage/default/33.sram_ctrl_executable.4137191848 Jul 15 05:02:59 PM PDT 24 Jul 15 05:22:09 PM PDT 24 39250714495 ps
T152 /workspace/coverage/default/14.sram_ctrl_stress_pipeline.1850844499 Jul 15 04:58:37 PM PDT 24 Jul 15 05:04:24 PM PDT 24 3500576236 ps
T173 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2787404290 Jul 15 05:01:55 PM PDT 24 Jul 15 05:02:06 PM PDT 24 72380529 ps
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T140 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4051360461 Jul 15 05:07:17 PM PDT 24 Jul 15 05:14:25 PM PDT 24 80808426940 ps
T151 /workspace/coverage/default/22.sram_ctrl_lc_escalation.2042822901 Jul 15 05:00:24 PM PDT 24 Jul 15 05:00:32 PM PDT 24 9515758792 ps
T48 /workspace/coverage/default/24.sram_ctrl_mem_walk.1706034201 Jul 15 05:00:51 PM PDT 24 Jul 15 05:01:04 PM PDT 24 466908355 ps
T49 /workspace/coverage/default/35.sram_ctrl_mem_walk.508610169 Jul 15 05:03:38 PM PDT 24 Jul 15 05:03:44 PM PDT 24 236649796 ps
T175 /workspace/coverage/default/22.sram_ctrl_partial_access.1261055387 Jul 15 05:00:26 PM PDT 24 Jul 15 05:02:42 PM PDT 24 225856836 ps
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T22 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1551737254 Jul 15 05:07:39 PM PDT 24 Jul 15 05:17:14 PM PDT 24 1825789417 ps
T177 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.1658627594 Jul 15 05:06:00 PM PDT 24 Jul 15 05:11:34 PM PDT 24 3482775593 ps
T178 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.2467952227 Jul 15 04:59:25 PM PDT 24 Jul 15 04:59:30 PM PDT 24 127237419 ps
T179 /workspace/coverage/default/9.sram_ctrl_bijection.2445495245 Jul 15 04:57:38 PM PDT 24 Jul 15 04:58:42 PM PDT 24 2739147392 ps
T136 /workspace/coverage/default/2.sram_ctrl_regwen.2223312580 Jul 15 04:56:03 PM PDT 24 Jul 15 05:20:20 PM PDT 24 173111829385 ps
T180 /workspace/coverage/default/23.sram_ctrl_executable.976975854 Jul 15 05:00:39 PM PDT 24 Jul 15 05:02:33 PM PDT 24 5526154186 ps
T46 /workspace/coverage/default/37.sram_ctrl_mem_walk.4007352259 Jul 15 05:04:12 PM PDT 24 Jul 15 05:04:19 PM PDT 24 307584154 ps
T137 /workspace/coverage/default/21.sram_ctrl_regwen.1112284208 Jul 15 05:00:19 PM PDT 24 Jul 15 05:20:03 PM PDT 24 11898275476 ps
T23 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3050809508 Jul 15 04:55:50 PM PDT 24 Jul 15 04:56:28 PM PDT 24 1391611740 ps
T111 /workspace/coverage/default/6.sram_ctrl_lc_escalation.2371340671 Jul 15 04:56:58 PM PDT 24 Jul 15 04:57:03 PM PDT 24 290970298 ps
T112 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1751580458 Jul 15 05:00:14 PM PDT 24 Jul 15 05:04:53 PM PDT 24 14829589388 ps
T113 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.3245129120 Jul 15 05:02:43 PM PDT 24 Jul 15 05:06:12 PM PDT 24 2081715105 ps
T114 /workspace/coverage/default/13.sram_ctrl_mem_walk.2157358666 Jul 15 04:58:35 PM PDT 24 Jul 15 04:58:44 PM PDT 24 1865663716 ps
T115 /workspace/coverage/default/44.sram_ctrl_ram_cfg.3660760566 Jul 15 05:06:34 PM PDT 24 Jul 15 05:06:38 PM PDT 24 29774743 ps
T116 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.4272644130 Jul 15 05:01:15 PM PDT 24 Jul 15 05:04:49 PM PDT 24 8855478108 ps
T117 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.1614752983 Jul 15 04:59:11 PM PDT 24 Jul 15 05:04:22 PM PDT 24 4873112939 ps
T118 /workspace/coverage/default/47.sram_ctrl_mem_walk.1466027364 Jul 15 05:07:29 PM PDT 24 Jul 15 05:07:41 PM PDT 24 308875392 ps
T119 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3843348085 Jul 15 05:02:28 PM PDT 24 Jul 15 05:04:45 PM PDT 24 158012174 ps
T181 /workspace/coverage/default/34.sram_ctrl_partial_access.740530240 Jul 15 05:03:14 PM PDT 24 Jul 15 05:05:05 PM PDT 24 355007050 ps
T141 /workspace/coverage/default/8.sram_ctrl_stress_all.3294799907 Jul 15 04:57:39 PM PDT 24 Jul 15 05:59:14 PM PDT 24 459070767413 ps
T182 /workspace/coverage/default/31.sram_ctrl_alert_test.166772452 Jul 15 05:02:36 PM PDT 24 Jul 15 05:02:37 PM PDT 24 29873643 ps
T183 /workspace/coverage/default/44.sram_ctrl_smoke.2951780949 Jul 15 05:06:14 PM PDT 24 Jul 15 05:06:29 PM PDT 24 583193791 ps
T184 /workspace/coverage/default/23.sram_ctrl_lc_escalation.1536257023 Jul 15 05:00:37 PM PDT 24 Jul 15 05:00:39 PM PDT 24 55933826 ps
T53 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2528028100 Jul 15 05:02:51 PM PDT 24 Jul 15 05:13:45 PM PDT 24 5634969740 ps
T54 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2568028998 Jul 15 05:07:16 PM PDT 24 Jul 15 05:17:06 PM PDT 24 1757028495 ps
T185 /workspace/coverage/default/13.sram_ctrl_executable.4126611420 Jul 15 04:58:31 PM PDT 24 Jul 15 04:59:51 PM PDT 24 179957192 ps
T45 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.571421714 Jul 15 05:01:48 PM PDT 24 Jul 15 05:01:57 PM PDT 24 205056524 ps
T186 /workspace/coverage/default/18.sram_ctrl_max_throughput.822079130 Jul 15 04:59:33 PM PDT 24 Jul 15 04:59:52 PM PDT 24 147981270 ps
T187 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.1606302017 Jul 15 04:56:35 PM PDT 24 Jul 15 04:56:39 PM PDT 24 106225343 ps
T188 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2879451505 Jul 15 05:07:47 PM PDT 24 Jul 15 05:15:29 PM PDT 24 17241203226 ps
T189 /workspace/coverage/default/12.sram_ctrl_partial_access.1192980273 Jul 15 04:58:14 PM PDT 24 Jul 15 04:59:43 PM PDT 24 487867559 ps
T190 /workspace/coverage/default/32.sram_ctrl_lc_escalation.1655222380 Jul 15 05:02:45 PM PDT 24 Jul 15 05:02:52 PM PDT 24 1784373823 ps
T191 /workspace/coverage/default/4.sram_ctrl_mem_walk.4214961692 Jul 15 04:56:35 PM PDT 24 Jul 15 04:56:43 PM PDT 24 302305715 ps
T192 /workspace/coverage/default/10.sram_ctrl_max_throughput.2463905322 Jul 15 04:57:52 PM PDT 24 Jul 15 04:59:15 PM PDT 24 124078454 ps
T193 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2370872606 Jul 15 04:57:36 PM PDT 24 Jul 15 04:57:40 PM PDT 24 86616055 ps
T194 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.4266606124 Jul 15 05:00:14 PM PDT 24 Jul 15 05:02:47 PM PDT 24 209760843 ps
T195 /workspace/coverage/default/28.sram_ctrl_smoke.2618319041 Jul 15 05:01:42 PM PDT 24 Jul 15 05:01:52 PM PDT 24 1852319813 ps
T196 /workspace/coverage/default/0.sram_ctrl_lc_escalation.3183363710 Jul 15 04:55:35 PM PDT 24 Jul 15 04:55:42 PM PDT 24 1586608489 ps
T197 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.2586315127 Jul 15 04:56:29 PM PDT 24 Jul 15 05:00:33 PM PDT 24 8465335252 ps
T198 /workspace/coverage/default/18.sram_ctrl_executable.3888986929 Jul 15 04:59:39 PM PDT 24 Jul 15 05:09:48 PM PDT 24 2031971641 ps
T199 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.149670849 Jul 15 04:55:38 PM PDT 24 Jul 15 04:56:48 PM PDT 24 131715485 ps
T200 /workspace/coverage/default/44.sram_ctrl_multiple_keys.2161001770 Jul 15 05:06:15 PM PDT 24 Jul 15 05:15:00 PM PDT 24 20844774322 ps
T201 /workspace/coverage/default/10.sram_ctrl_executable.1570626850 Jul 15 04:58:00 PM PDT 24 Jul 15 05:08:35 PM PDT 24 8647320700 ps
T202 /workspace/coverage/default/42.sram_ctrl_mem_walk.2642107391 Jul 15 05:05:51 PM PDT 24 Jul 15 05:05:58 PM PDT 24 485724729 ps
T203 /workspace/coverage/default/20.sram_ctrl_regwen.1136615510 Jul 15 05:00:05 PM PDT 24 Jul 15 05:08:48 PM PDT 24 17806905161 ps
T204 /workspace/coverage/default/39.sram_ctrl_ram_cfg.3258698077 Jul 15 05:04:48 PM PDT 24 Jul 15 05:04:50 PM PDT 24 138934881 ps
T205 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.701832373 Jul 15 04:56:57 PM PDT 24 Jul 15 04:59:50 PM PDT 24 23808741884 ps
T206 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.3541077417 Jul 15 05:00:24 PM PDT 24 Jul 15 05:06:04 PM PDT 24 3469369182 ps
T207 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.1419008275 Jul 15 05:05:18 PM PDT 24 Jul 15 05:08:29 PM PDT 24 7755047027 ps
T208 /workspace/coverage/default/38.sram_ctrl_bijection.1948071673 Jul 15 05:04:19 PM PDT 24 Jul 15 05:05:19 PM PDT 24 12993773300 ps
T209 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.3182550353 Jul 15 05:04:50 PM PDT 24 Jul 15 05:11:29 PM PDT 24 24719764832 ps
T210 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.1365373313 Jul 15 04:57:07 PM PDT 24 Jul 15 05:02:17 PM PDT 24 6246360491 ps
T211 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.3215949962 Jul 15 04:58:59 PM PDT 24 Jul 15 05:01:19 PM PDT 24 2707932846 ps
T55 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.2583248741 Jul 15 04:57:58 PM PDT 24 Jul 15 04:58:05 PM PDT 24 370945984 ps
T212 /workspace/coverage/default/19.sram_ctrl_multiple_keys.2226506120 Jul 15 04:59:45 PM PDT 24 Jul 15 05:02:38 PM PDT 24 3758687754 ps
T213 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.18298806 Jul 15 05:00:01 PM PDT 24 Jul 15 05:02:33 PM PDT 24 308567543 ps
T214 /workspace/coverage/default/45.sram_ctrl_stress_all.2920026089 Jul 15 05:06:54 PM PDT 24 Jul 15 05:32:41 PM PDT 24 11193101688 ps
T215 /workspace/coverage/default/48.sram_ctrl_smoke.2394693110 Jul 15 05:07:39 PM PDT 24 Jul 15 05:10:06 PM PDT 24 2436270902 ps
T216 /workspace/coverage/default/31.sram_ctrl_ram_cfg.1601342634 Jul 15 05:02:28 PM PDT 24 Jul 15 05:02:31 PM PDT 24 86314037 ps
T217 /workspace/coverage/default/38.sram_ctrl_multiple_keys.1197612207 Jul 15 05:04:20 PM PDT 24 Jul 15 05:21:49 PM PDT 24 14649201154 ps
T218 /workspace/coverage/default/39.sram_ctrl_executable.4014388530 Jul 15 05:04:49 PM PDT 24 Jul 15 05:41:57 PM PDT 24 20370756973 ps
T219 /workspace/coverage/default/37.sram_ctrl_bijection.2498853193 Jul 15 05:03:56 PM PDT 24 Jul 15 05:04:49 PM PDT 24 2914824199 ps
T220 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.1154162727 Jul 15 04:56:10 PM PDT 24 Jul 15 05:02:05 PM PDT 24 9903384214 ps
T221 /workspace/coverage/default/22.sram_ctrl_regwen.2941944820 Jul 15 05:00:24 PM PDT 24 Jul 15 05:14:54 PM PDT 24 2696497450 ps
T222 /workspace/coverage/default/35.sram_ctrl_smoke.2787423684 Jul 15 05:03:23 PM PDT 24 Jul 15 05:03:40 PM PDT 24 703939648 ps
T223 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.2369474418 Jul 15 05:05:46 PM PDT 24 Jul 15 05:12:14 PM PDT 24 2654795243 ps
T224 /workspace/coverage/default/18.sram_ctrl_partial_access.2367540207 Jul 15 04:59:31 PM PDT 24 Jul 15 04:59:50 PM PDT 24 1287888797 ps
T225 /workspace/coverage/default/42.sram_ctrl_bijection.1307294179 Jul 15 05:05:32 PM PDT 24 Jul 15 05:06:36 PM PDT 24 2712709248 ps
T226 /workspace/coverage/default/39.sram_ctrl_alert_test.3397977855 Jul 15 05:04:58 PM PDT 24 Jul 15 05:05:00 PM PDT 24 36450578 ps
T227 /workspace/coverage/default/11.sram_ctrl_smoke.3942889779 Jul 15 04:58:06 PM PDT 24 Jul 15 04:58:17 PM PDT 24 565048040 ps
T228 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.908596788 Jul 15 05:07:03 PM PDT 24 Jul 15 05:13:31 PM PDT 24 19418066105 ps
T229 /workspace/coverage/default/20.sram_ctrl_ram_cfg.2913606506 Jul 15 05:00:05 PM PDT 24 Jul 15 05:00:07 PM PDT 24 84987304 ps
T230 /workspace/coverage/default/9.sram_ctrl_stress_all.3970945251 Jul 15 04:57:45 PM PDT 24 Jul 15 05:10:24 PM PDT 24 8635816822 ps
T231 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.4096793946 Jul 15 04:59:51 PM PDT 24 Jul 15 05:13:06 PM PDT 24 9946160052 ps
T232 /workspace/coverage/default/40.sram_ctrl_stress_all.4209169593 Jul 15 05:05:13 PM PDT 24 Jul 15 05:07:12 PM PDT 24 9905479217 ps
T233 /workspace/coverage/default/21.sram_ctrl_executable.2895188892 Jul 15 05:00:17 PM PDT 24 Jul 15 05:18:26 PM PDT 24 20685192956 ps
T234 /workspace/coverage/default/18.sram_ctrl_smoke.3229572972 Jul 15 04:59:26 PM PDT 24 Jul 15 05:01:02 PM PDT 24 565856810 ps
T235 /workspace/coverage/default/12.sram_ctrl_multiple_keys.2679565862 Jul 15 04:58:12 PM PDT 24 Jul 15 05:13:17 PM PDT 24 13904766424 ps
T56 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.2906189099 Jul 15 05:00:07 PM PDT 24 Jul 15 05:00:11 PM PDT 24 85630938 ps
T236 /workspace/coverage/default/33.sram_ctrl_max_throughput.1777629922 Jul 15 05:02:58 PM PDT 24 Jul 15 05:03:45 PM PDT 24 349871686 ps
T237 /workspace/coverage/default/30.sram_ctrl_ram_cfg.19470286 Jul 15 05:02:15 PM PDT 24 Jul 15 05:02:16 PM PDT 24 43193916 ps
T238 /workspace/coverage/default/41.sram_ctrl_regwen.4098839576 Jul 15 05:05:24 PM PDT 24 Jul 15 05:12:43 PM PDT 24 9450859456 ps
T239 /workspace/coverage/default/30.sram_ctrl_partial_access.3581847990 Jul 15 05:02:09 PM PDT 24 Jul 15 05:02:30 PM PDT 24 4014338536 ps
T240 /workspace/coverage/default/19.sram_ctrl_alert_test.665685751 Jul 15 04:59:51 PM PDT 24 Jul 15 04:59:52 PM PDT 24 45876132 ps
T241 /workspace/coverage/default/37.sram_ctrl_alert_test.3569438604 Jul 15 05:04:19 PM PDT 24 Jul 15 05:04:21 PM PDT 24 19002421 ps
T242 /workspace/coverage/default/13.sram_ctrl_smoke.1802668511 Jul 15 04:58:22 PM PDT 24 Jul 15 04:58:25 PM PDT 24 242656022 ps
T40 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.604217024 Jul 15 05:06:57 PM PDT 24 Jul 15 05:11:27 PM PDT 24 1740846424 ps
T243 /workspace/coverage/default/29.sram_ctrl_bijection.3493430498 Jul 15 05:01:50 PM PDT 24 Jul 15 05:03:14 PM PDT 24 4796516832 ps
T244 /workspace/coverage/default/2.sram_ctrl_bijection.3085804835 Jul 15 04:55:58 PM PDT 24 Jul 15 04:57:09 PM PDT 24 1077708188 ps
T245 /workspace/coverage/default/11.sram_ctrl_multiple_keys.2168765229 Jul 15 04:58:05 PM PDT 24 Jul 15 05:06:12 PM PDT 24 12347384821 ps
T246 /workspace/coverage/default/35.sram_ctrl_ram_cfg.724766652 Jul 15 05:03:32 PM PDT 24 Jul 15 05:03:33 PM PDT 24 33052799 ps
T247 /workspace/coverage/default/42.sram_ctrl_executable.3166713901 Jul 15 05:05:46 PM PDT 24 Jul 15 05:12:12 PM PDT 24 8322142219 ps
T248 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.2654824454 Jul 15 05:00:46 PM PDT 24 Jul 15 05:05:32 PM PDT 24 14288196508 ps
T249 /workspace/coverage/default/28.sram_ctrl_stress_all.67084332 Jul 15 05:01:48 PM PDT 24 Jul 15 06:22:00 PM PDT 24 24232865356 ps
T250 /workspace/coverage/default/47.sram_ctrl_partial_access.2978371663 Jul 15 05:07:20 PM PDT 24 Jul 15 05:09:35 PM PDT 24 232342835 ps
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T252 /workspace/coverage/default/40.sram_ctrl_lc_escalation.3060296390 Jul 15 05:05:04 PM PDT 24 Jul 15 05:05:07 PM PDT 24 115298471 ps
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T301 /workspace/coverage/default/42.sram_ctrl_ram_cfg.3990338745 Jul 15 05:05:45 PM PDT 24 Jul 15 05:05:47 PM PDT 24 29303953 ps
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T303 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.9873831 Jul 15 04:58:18 PM PDT 24 Jul 15 05:01:02 PM PDT 24 1641357555 ps
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