| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2769753081 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1252044771 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2556582657 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3295177160 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.561063476 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2491152498 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3892395568 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1567286445 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2380635766 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3744830807 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1717318537 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3641402361 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1025495629 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.4139093651 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.70381138 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.4201940718 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1062510247 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1588252987 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2954989437 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2812834387 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2471277388 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3855430188 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1068192141 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1351398769 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1223181872 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2577649925 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2487199464 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2643515670 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1188160226 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3803739293 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2523852723 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3474094252 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2241105765 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.612390993 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.4077560859 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3296750616 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.216630281 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.236365463 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.889000911 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3354668111 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2336492502 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3683667260 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2406013529 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.530538279 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.758242535 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2115254809 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.262475027 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2666976986 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.661575849 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1139079175 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.186267295 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3220906489 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1146217975 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.4228538554 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.4197737556 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3221399950 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.367016517 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.987524104 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2033458270 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.159158905 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.529956150 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1491825351 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3795405848 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.4293404148 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1460678896 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1212981388 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1807185185 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1372626271 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.430902649 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.513228602 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3429528822 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1272594937 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1372737661 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.414456551 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2446692043 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2917893427 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1040770459 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3629556553 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2016845168 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3206759193 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2552340034 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3924287141 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1713315376 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.526217862 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1883675390 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3065534624 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3598625700 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1518000654 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1391890177 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1586693058 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3808678052 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2378149622 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.563651982 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3550177145 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.690354080 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2343509869 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2043272456 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1017262897 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.500033418 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1982068261 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3044041444 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3170250316 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3484330539 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1860081639 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3768005169 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3353937850 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.859633073 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.141031666 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1299135021 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2094309077 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1319256001 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.603432231 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.968682427 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3227915873 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1159446657 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2024136888 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2656565442 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3754235786 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1881316691 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2712681388 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.913851239 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1010981687 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2389390590 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.732910795 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3857356080 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3827063319 |
| /workspace/coverage/default/0.sram_ctrl_access_during_key_req.1690612480 |
| /workspace/coverage/default/0.sram_ctrl_alert_test.1887821979 |
| /workspace/coverage/default/0.sram_ctrl_bijection.3020760934 |
| /workspace/coverage/default/0.sram_ctrl_executable.954263549 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.1715820067 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.4023871915 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.3568315097 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.158487774 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.2927084294 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.1007724046 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2381113180 |
| /workspace/coverage/default/0.sram_ctrl_regwen.259778929 |
| /workspace/coverage/default/0.sram_ctrl_sec_cm.2064956375 |
| /workspace/coverage/default/0.sram_ctrl_smoke.4291691253 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.3701955922 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.846189571 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.2682156469 |
| /workspace/coverage/default/1.sram_ctrl_alert_test.2098605091 |
| /workspace/coverage/default/1.sram_ctrl_bijection.2530761171 |
| /workspace/coverage/default/1.sram_ctrl_executable.1488789005 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.681789201 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.2501315915 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.2077636681 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.150383676 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.3861786601 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.3311113097 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2622913248 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.1833020946 |
| /workspace/coverage/default/1.sram_ctrl_regwen.1680887388 |
| /workspace/coverage/default/1.sram_ctrl_sec_cm.2547847014 |
| /workspace/coverage/default/1.sram_ctrl_smoke.144069213 |
| /workspace/coverage/default/1.sram_ctrl_stress_all.149927816 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.3494405958 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1757417523 |
| /workspace/coverage/default/10.sram_ctrl_access_during_key_req.2054580436 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.3369829496 |
| /workspace/coverage/default/10.sram_ctrl_bijection.4195849064 |
| /workspace/coverage/default/10.sram_ctrl_executable.1165676489 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.2516595171 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.934857927 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.3498634611 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.61750090 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.1041105673 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.584776610 |
| /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.219541556 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.3801326166 |
| /workspace/coverage/default/10.sram_ctrl_regwen.737684084 |
| /workspace/coverage/default/10.sram_ctrl_smoke.671788091 |
| /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.987434540 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.1102973281 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3854482804 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.3638058682 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.3296310110 |
| /workspace/coverage/default/11.sram_ctrl_bijection.2473526285 |
| /workspace/coverage/default/11.sram_ctrl_executable.2759914654 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.2802440795 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.3595224667 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.864630914 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.1236975124 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.561562877 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.2362316275 |
| /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4243505435 |
| /workspace/coverage/default/11.sram_ctrl_ram_cfg.1417784477 |
| /workspace/coverage/default/11.sram_ctrl_regwen.1922541434 |
| /workspace/coverage/default/11.sram_ctrl_smoke.3064188835 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.405106393 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1120026118 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2943751603 |
| /workspace/coverage/default/12.sram_ctrl_access_during_key_req.3850240082 |
| /workspace/coverage/default/12.sram_ctrl_bijection.2254825105 |
| /workspace/coverage/default/12.sram_ctrl_executable.1545471360 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.2351919686 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.2781449287 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.1866105882 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.697189766 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.143486813 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.1501713485 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.2775678245 |
| /workspace/coverage/default/12.sram_ctrl_ram_cfg.3975368945 |
| /workspace/coverage/default/12.sram_ctrl_regwen.1886379449 |
| /workspace/coverage/default/12.sram_ctrl_smoke.691623270 |
| /workspace/coverage/default/12.sram_ctrl_stress_all.1855658213 |
| /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3554281138 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.363413576 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1295762480 |
| /workspace/coverage/default/13.sram_ctrl_access_during_key_req.3155634682 |
| /workspace/coverage/default/13.sram_ctrl_alert_test.1628148180 |
| /workspace/coverage/default/13.sram_ctrl_bijection.3506764493 |
| /workspace/coverage/default/13.sram_ctrl_executable.3535918908 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.2093322888 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.58902866 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.1312949919 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.766285909 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.2991889643 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.1348731723 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.868651268 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.3192320158 |
| /workspace/coverage/default/13.sram_ctrl_regwen.3210136505 |
| /workspace/coverage/default/13.sram_ctrl_smoke.422617748 |
| /workspace/coverage/default/13.sram_ctrl_stress_all.1428035934 |
| /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1943927834 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.2611567862 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3391273638 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.2277359849 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.3175170176 |
| /workspace/coverage/default/14.sram_ctrl_bijection.1484269010 |
| /workspace/coverage/default/14.sram_ctrl_executable.3948036380 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.527520767 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.256908724 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.324200504 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.2254872564 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.938888034 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.2933273021 |
| /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2749216662 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.3663810319 |
| /workspace/coverage/default/14.sram_ctrl_regwen.437507864 |
| /workspace/coverage/default/14.sram_ctrl_smoke.2742506958 |
| /workspace/coverage/default/14.sram_ctrl_stress_all.3605393656 |
| /workspace/coverage/default/14.sram_ctrl_stress_pipeline.1517945158 |
| /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.579887158 |
| /workspace/coverage/default/15.sram_ctrl_access_during_key_req.1799433187 |
| /workspace/coverage/default/15.sram_ctrl_alert_test.159009439 |
| /workspace/coverage/default/15.sram_ctrl_bijection.4042172600 |
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| /workspace/coverage/default/43.sram_ctrl_smoke.77384316 |
| /workspace/coverage/default/43.sram_ctrl_stress_all.1034274418 |
| /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.781807044 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.2488680285 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1713651216 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.2852738690 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.3417873613 |
| /workspace/coverage/default/44.sram_ctrl_bijection.392861306 |
| /workspace/coverage/default/44.sram_ctrl_executable.3055714339 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.970040232 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.2064204564 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.226953241 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.3764737251 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.1891692986 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.3118573842 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3586910897 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.2687070585 |
| /workspace/coverage/default/44.sram_ctrl_regwen.152960838 |
| /workspace/coverage/default/44.sram_ctrl_smoke.2102847516 |
| /workspace/coverage/default/44.sram_ctrl_stress_all.1580517859 |
| /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.79739363 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.513875833 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3715167622 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.3662677273 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.2211469096 |
| /workspace/coverage/default/45.sram_ctrl_bijection.1606959310 |
| /workspace/coverage/default/45.sram_ctrl_executable.123951312 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.3523740699 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.3344640157 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.1548104772 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.1964776372 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.289272155 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.4042093990 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.933281658 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.1443204722 |
| /workspace/coverage/default/45.sram_ctrl_regwen.4221574934 |
| /workspace/coverage/default/45.sram_ctrl_smoke.1958195244 |
| /workspace/coverage/default/45.sram_ctrl_stress_all.2396681851 |
| /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2752617523 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.3047106597 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.4217722242 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.1388812774 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.1441627159 |
| /workspace/coverage/default/46.sram_ctrl_bijection.339751772 |
| /workspace/coverage/default/46.sram_ctrl_executable.914749397 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.1270840804 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.2043073735 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.322020276 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.794789431 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.1901155447 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.3763737671 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.408440498 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.3323248114 |
| /workspace/coverage/default/46.sram_ctrl_regwen.2164865620 |
| /workspace/coverage/default/46.sram_ctrl_smoke.1535901479 |
| /workspace/coverage/default/46.sram_ctrl_stress_all.2784511164 |
| /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1903968160 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.2976937558 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3317848051 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.3101560389 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.3955629210 |
| /workspace/coverage/default/47.sram_ctrl_bijection.2986658986 |
| /workspace/coverage/default/47.sram_ctrl_executable.1746994993 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.1634742085 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.2618767215 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.1994869627 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.3068631328 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.1437407335 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.4056231309 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2553379646 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.3579976390 |
| /workspace/coverage/default/47.sram_ctrl_regwen.3573568906 |
| /workspace/coverage/default/47.sram_ctrl_smoke.324296311 |
| /workspace/coverage/default/47.sram_ctrl_stress_all.2105581010 |
| /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.4115284132 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.3910550275 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2524903226 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.3159159738 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.788616278 |
| /workspace/coverage/default/48.sram_ctrl_bijection.2670319482 |
| /workspace/coverage/default/48.sram_ctrl_executable.2421373402 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.732329253 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.1184363924 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.3645565579 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.1258248217 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.1554343356 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.1613638696 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2594877874 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.1090409358 |
| /workspace/coverage/default/48.sram_ctrl_regwen.888116420 |
| /workspace/coverage/default/48.sram_ctrl_smoke.417197858 |
| /workspace/coverage/default/48.sram_ctrl_stress_all.2038221683 |
| /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.858243584 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.365779610 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.665333504 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.330199223 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.3266088859 |
| /workspace/coverage/default/49.sram_ctrl_bijection.2575566789 |
| /workspace/coverage/default/49.sram_ctrl_executable.3959112490 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.1443987842 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.2002997760 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.1736201159 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.3370154283 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.1061914177 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.3741404192 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2098315107 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.1769860646 |
| /workspace/coverage/default/49.sram_ctrl_regwen.3470956943 |
| /workspace/coverage/default/49.sram_ctrl_smoke.1822054452 |
| /workspace/coverage/default/49.sram_ctrl_stress_all.2306000059 |
| /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2271867258 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.3368598234 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.776560477 |
| /workspace/coverage/default/5.sram_ctrl_access_during_key_req.3463786555 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.2241163193 |
| /workspace/coverage/default/5.sram_ctrl_bijection.3287501371 |
| /workspace/coverage/default/5.sram_ctrl_executable.2276764996 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.395271734 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.620385727 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.2779432539 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.3171379886 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.3211296760 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.1102680179 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1464731752 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.225453862 |
| /workspace/coverage/default/5.sram_ctrl_regwen.179765180 |
| /workspace/coverage/default/5.sram_ctrl_smoke.2190684791 |
| /workspace/coverage/default/5.sram_ctrl_stress_all.3049176504 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.618379637 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.4032738743 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3547899731 |
| /workspace/coverage/default/6.sram_ctrl_access_during_key_req.4147907848 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.92609481 |
| /workspace/coverage/default/6.sram_ctrl_bijection.3864797207 |
| /workspace/coverage/default/6.sram_ctrl_executable.4083722309 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.3390918531 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.980836880 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.2029327811 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.3312114475 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.1961145960 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.1358956118 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2751159518 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.2593273761 |
| /workspace/coverage/default/6.sram_ctrl_regwen.3541411086 |
| /workspace/coverage/default/6.sram_ctrl_smoke.460427642 |
| /workspace/coverage/default/6.sram_ctrl_stress_all.288824794 |
| /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1071554833 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.2344725583 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2034606263 |
| /workspace/coverage/default/7.sram_ctrl_access_during_key_req.171538884 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.308460762 |
| /workspace/coverage/default/7.sram_ctrl_bijection.804223637 |
| /workspace/coverage/default/7.sram_ctrl_executable.2397529540 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.2451164738 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.2793557383 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.4218865114 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.720059712 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.2141886498 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.2801995943 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2675891461 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.2145630497 |
| /workspace/coverage/default/7.sram_ctrl_regwen.2193398574 |
| /workspace/coverage/default/7.sram_ctrl_smoke.3268239654 |
| /workspace/coverage/default/7.sram_ctrl_stress_all.2656061504 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.188219716 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.851022654 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.488616526 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.1205435125 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.2909184401 |
| /workspace/coverage/default/8.sram_ctrl_bijection.4054874269 |
| /workspace/coverage/default/8.sram_ctrl_executable.414679136 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.3706229391 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.3641244679 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.1984186861 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.3489684213 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.1133336054 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.3138802975 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3216895407 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.1307867816 |
| /workspace/coverage/default/8.sram_ctrl_regwen.1846224716 |
| /workspace/coverage/default/8.sram_ctrl_smoke.110057181 |
| /workspace/coverage/default/8.sram_ctrl_stress_all.1815379180 |
| /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2419423930 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.943607903 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.10986345 |
| /workspace/coverage/default/9.sram_ctrl_access_during_key_req.3204907424 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.1456936529 |
| /workspace/coverage/default/9.sram_ctrl_bijection.1969553807 |
| /workspace/coverage/default/9.sram_ctrl_executable.1774735576 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.847969443 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.3670980570 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.3369559103 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.3831396072 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.2844594317 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1667771314 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.1456412780 |
| /workspace/coverage/default/9.sram_ctrl_regwen.2068907494 |
| /workspace/coverage/default/9.sram_ctrl_smoke.4042745281 |
| /workspace/coverage/default/9.sram_ctrl_stress_all.671628780 |
| /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.628669015 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.2807344123 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.4270776412 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.150383676 |
|
|
Jul 21 06:43:53 PM PDT 24 |
Jul 21 06:44:04 PM PDT 24 |
174794769 ps |
| T2 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.877216038 |
|
|
Jul 21 06:45:10 PM PDT 24 |
Jul 21 06:51:01 PM PDT 24 |
14662708458 ps |
| T3 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.455421349 |
|
|
Jul 21 06:45:15 PM PDT 24 |
Jul 21 06:50:47 PM PDT 24 |
22393890525 ps |
| T4 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.158487774 |
|
|
Jul 21 06:43:35 PM PDT 24 |
Jul 21 06:43:46 PM PDT 24 |
914005746 ps |
| T9 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.4160519701 |
|
|
Jul 21 06:44:54 PM PDT 24 |
Jul 21 06:44:57 PM PDT 24 |
234038907 ps |
| T5 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1216337120 |
|
|
Jul 21 06:45:50 PM PDT 24 |
Jul 21 06:51:53 PM PDT 24 |
14047844743 ps |
| T10 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.3793589618 |
|
|
Jul 21 06:45:50 PM PDT 24 |
Jul 21 06:45:52 PM PDT 24 |
139322104 ps |
| T11 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.3641244679 |
|
|
Jul 21 06:44:08 PM PDT 24 |
Jul 21 06:44:41 PM PDT 24 |
86242153 ps |
| T12 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1741746617 |
|
|
Jul 21 06:44:29 PM PDT 24 |
Jul 21 06:45:15 PM PDT 24 |
2893032334 ps |
| T6 |
/workspace/coverage/default/21.sram_ctrl_stress_all.584218155 |
|
|
Jul 21 06:44:49 PM PDT 24 |
Jul 21 07:09:43 PM PDT 24 |
47211441411 ps |
| T43 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.1419003658 |
|
|
Jul 21 06:43:48 PM PDT 24 |
Jul 21 06:59:49 PM PDT 24 |
3388437513 ps |
| T29 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.3975368945 |
|
|
Jul 21 06:44:23 PM PDT 24 |
Jul 21 06:44:24 PM PDT 24 |
367362778 ps |
| T44 |
/workspace/coverage/default/6.sram_ctrl_smoke.460427642 |
|
|
Jul 21 06:43:55 PM PDT 24 |
Jul 21 06:44:21 PM PDT 24 |
145705165 ps |
| T19 |
/workspace/coverage/default/4.sram_ctrl_bijection.1991755531 |
|
|
Jul 21 06:43:50 PM PDT 24 |
Jul 21 06:44:29 PM PDT 24 |
10613230608 ps |
| T20 |
/workspace/coverage/default/46.sram_ctrl_stress_all.2784511164 |
|
|
Jul 21 06:47:34 PM PDT 24 |
Jul 21 07:57:31 PM PDT 24 |
423611535260 ps |
| T68 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.1184363924 |
|
|
Jul 21 06:47:44 PM PDT 24 |
Jul 21 06:48:29 PM PDT 24 |
911984620 ps |
| T52 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.1712426799 |
|
|
Jul 21 06:44:47 PM PDT 24 |
Jul 21 06:49:36 PM PDT 24 |
6001683866 ps |
| T28 |
/workspace/coverage/default/27.sram_ctrl_executable.1764960878 |
|
|
Jul 21 06:45:16 PM PDT 24 |
Jul 21 06:58:15 PM PDT 24 |
22341798907 ps |
| T27 |
/workspace/coverage/default/49.sram_ctrl_regwen.3470956943 |
|
|
Jul 21 06:47:54 PM PDT 24 |
Jul 21 07:02:33 PM PDT 24 |
33145535991 ps |
| T124 |
/workspace/coverage/default/38.sram_ctrl_executable.582018136 |
|
|
Jul 21 06:46:22 PM PDT 24 |
Jul 21 06:58:39 PM PDT 24 |
4982126434 ps |
| T30 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.1621683915 |
|
|
Jul 21 06:43:52 PM PDT 24 |
Jul 21 06:43:54 PM PDT 24 |
31478403 ps |
| T133 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.781387503 |
|
|
Jul 21 06:46:11 PM PDT 24 |
Jul 21 06:48:13 PM PDT 24 |
275147914 ps |
| T101 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1667771314 |
|
|
Jul 21 06:44:16 PM PDT 24 |
Jul 21 06:48:48 PM PDT 24 |
17122765771 ps |
| T22 |
/workspace/coverage/default/47.sram_ctrl_regwen.3573568906 |
|
|
Jul 21 06:47:39 PM PDT 24 |
Jul 21 07:02:54 PM PDT 24 |
62614790550 ps |
| T7 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2351919686 |
|
|
Jul 21 06:44:21 PM PDT 24 |
Jul 21 06:44:28 PM PDT 24 |
1326374038 ps |
| T45 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.2277359849 |
|
|
Jul 21 06:44:31 PM PDT 24 |
Jul 21 07:01:32 PM PDT 24 |
11407242068 ps |
| T134 |
/workspace/coverage/default/44.sram_ctrl_partial_access.3118573842 |
|
|
Jul 21 06:47:07 PM PDT 24 |
Jul 21 06:47:20 PM PDT 24 |
247699964 ps |
| T63 |
/workspace/coverage/default/40.sram_ctrl_regwen.3254028368 |
|
|
Jul 21 06:46:38 PM PDT 24 |
Jul 21 06:50:02 PM PDT 24 |
8723642716 ps |
| T62 |
/workspace/coverage/default/21.sram_ctrl_regwen.986896908 |
|
|
Jul 21 06:44:49 PM PDT 24 |
Jul 21 07:06:49 PM PDT 24 |
7891357151 ps |
| T132 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.3622267920 |
|
|
Jul 21 06:43:46 PM PDT 24 |
Jul 21 06:44:14 PM PDT 24 |
375821009 ps |
| T50 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.794789431 |
|
|
Jul 21 06:47:29 PM PDT 24 |
Jul 21 06:47:41 PM PDT 24 |
589311197 ps |
| T13 |
/workspace/coverage/default/12.sram_ctrl_alert_test.1021021485 |
|
|
Jul 21 06:44:23 PM PDT 24 |
Jul 21 06:44:24 PM PDT 24 |
21543441 ps |
| T102 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3047106597 |
|
|
Jul 21 06:47:17 PM PDT 24 |
Jul 21 06:52:21 PM PDT 24 |
3005533723 ps |
| T127 |
/workspace/coverage/default/21.sram_ctrl_partial_access.304768709 |
|
|
Jul 21 06:44:41 PM PDT 24 |
Jul 21 06:44:54 PM PDT 24 |
1323122573 ps |
| T8 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.4215385580 |
|
|
Jul 21 06:45:33 PM PDT 24 |
Jul 21 06:45:42 PM PDT 24 |
2302650048 ps |
| T129 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.40728843 |
|
|
Jul 21 06:44:29 PM PDT 24 |
Jul 21 06:55:39 PM PDT 24 |
8126338179 ps |
| T23 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.3720444766 |
|
|
Jul 21 06:44:47 PM PDT 24 |
Jul 21 06:47:25 PM PDT 24 |
563530731 ps |
| T67 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.2712688001 |
|
|
Jul 21 06:44:02 PM PDT 24 |
Jul 21 06:44:04 PM PDT 24 |
84088531 ps |
| T128 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.2991889643 |
|
|
Jul 21 06:44:23 PM PDT 24 |
Jul 21 06:52:00 PM PDT 24 |
7046469692 ps |
| T31 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.3192320158 |
|
|
Jul 21 06:44:21 PM PDT 24 |
Jul 21 06:44:22 PM PDT 24 |
27000025 ps |
| T135 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.665749148 |
|
|
Jul 21 06:44:33 PM PDT 24 |
Jul 21 06:45:12 PM PDT 24 |
176526285 ps |
| T136 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.1435417655 |
|
|
Jul 21 06:46:51 PM PDT 24 |
Jul 21 06:56:11 PM PDT 24 |
4094979453 ps |
| T14 |
/workspace/coverage/default/37.sram_ctrl_alert_test.2099422493 |
|
|
Jul 21 06:46:15 PM PDT 24 |
Jul 21 06:46:16 PM PDT 24 |
52997496 ps |
| T137 |
/workspace/coverage/default/32.sram_ctrl_partial_access.3350672148 |
|
|
Jul 21 06:45:40 PM PDT 24 |
Jul 21 06:45:50 PM PDT 24 |
552302102 ps |
| T138 |
/workspace/coverage/default/43.sram_ctrl_bijection.2681838007 |
|
|
Jul 21 06:47:03 PM PDT 24 |
Jul 21 06:47:43 PM PDT 24 |
2485358086 ps |
| T73 |
/workspace/coverage/default/42.sram_ctrl_regwen.635565707 |
|
|
Jul 21 06:46:57 PM PDT 24 |
Jul 21 06:57:42 PM PDT 24 |
9654368227 ps |
| T139 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.3228041070 |
|
|
Jul 21 06:44:33 PM PDT 24 |
Jul 21 06:44:34 PM PDT 24 |
32940981 ps |
| T74 |
/workspace/coverage/default/11.sram_ctrl_stress_all.2449075851 |
|
|
Jul 21 06:44:22 PM PDT 24 |
Jul 21 08:30:53 PM PDT 24 |
137166135332 ps |
| T86 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2135755896 |
|
|
Jul 21 06:47:08 PM PDT 24 |
Jul 21 06:47:11 PM PDT 24 |
46118586 ps |
| T140 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.61750090 |
|
|
Jul 21 06:44:13 PM PDT 24 |
Jul 21 06:44:22 PM PDT 24 |
277729507 ps |
| T141 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.2002997760 |
|
|
Jul 21 06:47:49 PM PDT 24 |
Jul 21 06:49:13 PM PDT 24 |
127682700 ps |
| T142 |
/workspace/coverage/default/38.sram_ctrl_partial_access.616140922 |
|
|
Jul 21 06:46:22 PM PDT 24 |
Jul 21 06:46:43 PM PDT 24 |
3681098710 ps |
| T143 |
/workspace/coverage/default/0.sram_ctrl_bijection.3020760934 |
|
|
Jul 21 06:43:38 PM PDT 24 |
Jul 21 06:44:53 PM PDT 24 |
45535190675 ps |
| T26 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2854296874 |
|
|
Jul 21 06:44:59 PM PDT 24 |
Jul 21 06:45:13 PM PDT 24 |
341399505 ps |
| T15 |
/workspace/coverage/default/49.sram_ctrl_alert_test.3266088859 |
|
|
Jul 21 06:47:53 PM PDT 24 |
Jul 21 06:47:54 PM PDT 24 |
22205011 ps |
| T144 |
/workspace/coverage/default/32.sram_ctrl_executable.2496392709 |
|
|
Jul 21 06:45:47 PM PDT 24 |
Jul 21 07:06:37 PM PDT 24 |
3563799316 ps |
| T103 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3586910897 |
|
|
Jul 21 06:47:07 PM PDT 24 |
Jul 21 06:54:35 PM PDT 24 |
96207281199 ps |
| T125 |
/workspace/coverage/default/4.sram_ctrl_executable.2439047549 |
|
|
Jul 21 06:43:46 PM PDT 24 |
Jul 21 06:51:11 PM PDT 24 |
1329699796 ps |
| T104 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1890841887 |
|
|
Jul 21 06:45:00 PM PDT 24 |
Jul 21 06:49:05 PM PDT 24 |
32452135132 ps |
| T131 |
/workspace/coverage/default/23.sram_ctrl_executable.2780759175 |
|
|
Jul 21 06:45:00 PM PDT 24 |
Jul 21 07:14:40 PM PDT 24 |
24815762922 ps |
| T87 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.464635277 |
|
|
Jul 21 06:45:25 PM PDT 24 |
Jul 21 06:45:30 PM PDT 24 |
129295666 ps |
| T53 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.136316541 |
|
|
Jul 21 06:45:16 PM PDT 24 |
Jul 21 06:49:40 PM PDT 24 |
2057178562 ps |
| T145 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1041105673 |
|
|
Jul 21 06:44:14 PM PDT 24 |
Jul 21 07:01:08 PM PDT 24 |
81314136497 ps |
| T21 |
/workspace/coverage/default/7.sram_ctrl_stress_all.2656061504 |
|
|
Jul 21 06:44:08 PM PDT 24 |
Jul 21 07:55:31 PM PDT 24 |
122551203915 ps |
| T146 |
/workspace/coverage/default/38.sram_ctrl_smoke.3016154107 |
|
|
Jul 21 06:46:17 PM PDT 24 |
Jul 21 06:46:36 PM PDT 24 |
4493135819 ps |
| T105 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3494405958 |
|
|
Jul 21 06:43:34 PM PDT 24 |
Jul 21 06:45:53 PM PDT 24 |
1511617925 ps |
| T147 |
/workspace/coverage/default/20.sram_ctrl_smoke.2444992414 |
|
|
Jul 21 06:44:41 PM PDT 24 |
Jul 21 06:44:48 PM PDT 24 |
116218966 ps |
| T148 |
/workspace/coverage/default/39.sram_ctrl_partial_access.3490572380 |
|
|
Jul 21 06:46:27 PM PDT 24 |
Jul 21 06:46:30 PM PDT 24 |
52787055 ps |
| T149 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.3064365091 |
|
|
Jul 21 06:45:01 PM PDT 24 |
Jul 21 06:45:03 PM PDT 24 |
29134684 ps |
| T46 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3101560389 |
|
|
Jul 21 06:47:39 PM PDT 24 |
Jul 21 07:08:05 PM PDT 24 |
8115158556 ps |
| T150 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.3186545831 |
|
|
Jul 21 06:46:40 PM PDT 24 |
Jul 21 06:50:45 PM PDT 24 |
13017235074 ps |
| T151 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3579976390 |
|
|
Jul 21 06:47:40 PM PDT 24 |
Jul 21 06:47:41 PM PDT 24 |
74297535 ps |
| T152 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.798978232 |
|
|
Jul 21 06:45:08 PM PDT 24 |
Jul 21 06:45:09 PM PDT 24 |
45908643 ps |
| T51 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.3468543639 |
|
|
Jul 21 06:45:03 PM PDT 24 |
Jul 21 06:45:09 PM PDT 24 |
205236745 ps |
| T153 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.3980638674 |
|
|
Jul 21 06:46:53 PM PDT 24 |
Jul 21 06:46:58 PM PDT 24 |
236644991 ps |
| T154 |
/workspace/coverage/default/5.sram_ctrl_partial_access.1102680179 |
|
|
Jul 21 06:43:51 PM PDT 24 |
Jul 21 06:44:44 PM PDT 24 |
625136935 ps |
| T88 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.435950948 |
|
|
Jul 21 06:45:56 PM PDT 24 |
Jul 21 06:46:01 PM PDT 24 |
68857419 ps |
| T155 |
/workspace/coverage/default/25.sram_ctrl_smoke.3767247696 |
|
|
Jul 21 06:45:07 PM PDT 24 |
Jul 21 06:45:10 PM PDT 24 |
267840993 ps |
| T156 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.3736453489 |
|
|
Jul 21 06:46:57 PM PDT 24 |
Jul 21 06:51:01 PM PDT 24 |
3459445778 ps |
| T54 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.1501903819 |
|
|
Jul 21 06:47:08 PM PDT 24 |
Jul 21 06:47:18 PM PDT 24 |
716970653 ps |
| T25 |
/workspace/coverage/default/3.sram_ctrl_stress_all.2777227317 |
|
|
Jul 21 06:43:54 PM PDT 24 |
Jul 21 07:25:22 PM PDT 24 |
18926434070 ps |
| T157 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2749216662 |
|
|
Jul 21 06:44:28 PM PDT 24 |
Jul 21 06:50:48 PM PDT 24 |
16948968806 ps |
| T158 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.1561872246 |
|
|
Jul 21 06:44:59 PM PDT 24 |
Jul 21 06:45:11 PM PDT 24 |
2372173136 ps |
| T159 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.1945402775 |
|
|
Jul 21 06:47:03 PM PDT 24 |
Jul 21 06:47:07 PM PDT 24 |
437628627 ps |
| T160 |
/workspace/coverage/default/14.sram_ctrl_executable.3948036380 |
|
|
Jul 21 06:44:38 PM PDT 24 |
Jul 21 07:03:14 PM PDT 24 |
86245134369 ps |
| T161 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.2673296865 |
|
|
Jul 21 06:44:55 PM PDT 24 |
Jul 21 06:45:02 PM PDT 24 |
673569156 ps |
| T162 |
/workspace/coverage/default/7.sram_ctrl_bijection.804223637 |
|
|
Jul 21 06:44:02 PM PDT 24 |
Jul 21 06:45:04 PM PDT 24 |
975547323 ps |
| T163 |
/workspace/coverage/default/2.sram_ctrl_max_throughput.3219633812 |
|
|
Jul 21 06:43:41 PM PDT 24 |
Jul 21 06:45:50 PM PDT 24 |
239177687 ps |
| T89 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.3100675484 |
|
|
Jul 21 06:45:16 PM PDT 24 |
Jul 21 07:07:42 PM PDT 24 |
17355469558 ps |
| T164 |
/workspace/coverage/default/25.sram_ctrl_partial_access.1077015187 |
|
|
Jul 21 06:45:07 PM PDT 24 |
Jul 21 06:45:13 PM PDT 24 |
99451203 ps |
| T165 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.3887082747 |
|
|
Jul 21 06:45:03 PM PDT 24 |
Jul 21 06:49:31 PM PDT 24 |
5999818322 ps |
| T166 |
/workspace/coverage/default/44.sram_ctrl_bijection.392861306 |
|
|
Jul 21 06:47:07 PM PDT 24 |
Jul 21 06:47:51 PM PDT 24 |
1338877019 ps |
| T167 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.2730681431 |
|
|
Jul 21 06:44:28 PM PDT 24 |
Jul 21 06:46:50 PM PDT 24 |
1576482336 ps |
| T168 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.1236975124 |
|
|
Jul 21 06:44:22 PM PDT 24 |
Jul 21 06:44:28 PM PDT 24 |
291456578 ps |
| T169 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.3605974339 |
|
|
Jul 21 06:45:34 PM PDT 24 |
Jul 21 06:56:10 PM PDT 24 |
19773067344 ps |
| T170 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.2323915264 |
|
|
Jul 21 06:45:07 PM PDT 24 |
Jul 21 06:59:37 PM PDT 24 |
12125402859 ps |
| T171 |
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2648772120 |
|
|
Jul 21 06:47:02 PM PDT 24 |
Jul 21 06:53:22 PM PDT 24 |
27602309239 ps |
| T172 |
/workspace/coverage/default/3.sram_ctrl_alert_test.1421764982 |
|
|
Jul 21 06:43:45 PM PDT 24 |
Jul 21 06:43:47 PM PDT 24 |
46948528 ps |
| T173 |
/workspace/coverage/default/40.sram_ctrl_executable.2828755626 |
|
|
Jul 21 06:46:35 PM PDT 24 |
Jul 21 07:00:20 PM PDT 24 |
28628285953 ps |
| T174 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.527520767 |
|
|
Jul 21 06:44:29 PM PDT 24 |
Jul 21 06:44:37 PM PDT 24 |
3150716391 ps |
| T55 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.3625233583 |
|
|
Jul 21 06:44:40 PM PDT 24 |
Jul 21 06:44:44 PM PDT 24 |
382033526 ps |
| T175 |
/workspace/coverage/default/8.sram_ctrl_smoke.110057181 |
|
|
Jul 21 06:44:10 PM PDT 24 |
Jul 21 06:46:02 PM PDT 24 |
1384300630 ps |
| T176 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3390918531 |
|
|
Jul 21 06:43:53 PM PDT 24 |
Jul 21 06:43:57 PM PDT 24 |
1972575940 ps |
| T177 |
/workspace/coverage/default/27.sram_ctrl_partial_access.2625739518 |
|
|
Jul 21 06:45:14 PM PDT 24 |
Jul 21 06:46:26 PM PDT 24 |
2341769950 ps |
| T178 |
/workspace/coverage/default/30.sram_ctrl_stress_all.3762847805 |
|
|
Jul 21 06:45:34 PM PDT 24 |
Jul 21 07:20:12 PM PDT 24 |
13554305850 ps |
| T179 |
/workspace/coverage/default/32.sram_ctrl_smoke.1206025614 |
|
|
Jul 21 06:45:40 PM PDT 24 |
Jul 21 06:45:53 PM PDT 24 |
418692625 ps |
| T180 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.2032996882 |
|
|
Jul 21 06:46:36 PM PDT 24 |
Jul 21 06:48:10 PM PDT 24 |
219498598 ps |
| T181 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.2909005043 |
|
|
Jul 21 06:46:01 PM PDT 24 |
Jul 21 06:51:22 PM PDT 24 |
12882891964 ps |
| T182 |
/workspace/coverage/default/6.sram_ctrl_executable.4083722309 |
|
|
Jul 21 06:43:52 PM PDT 24 |
Jul 21 07:01:07 PM PDT 24 |
26761825850 ps |
| T183 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.363413576 |
|
|
Jul 21 06:44:22 PM PDT 24 |
Jul 21 06:47:10 PM PDT 24 |
3447261034 ps |
| T184 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.4179333648 |
|
|
Jul 21 06:46:32 PM PDT 24 |
Jul 21 06:46:33 PM PDT 24 |
46749179 ps |
| T185 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.4050601062 |
|
|
Jul 21 06:45:30 PM PDT 24 |
Jul 21 06:53:47 PM PDT 24 |
21090616555 ps |
| T186 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.502495583 |
|
|
Jul 21 06:45:39 PM PDT 24 |
Jul 21 06:49:03 PM PDT 24 |
10829285064 ps |
| T187 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.4238523379 |
|
|
Jul 21 06:45:23 PM PDT 24 |
Jul 21 07:07:23 PM PDT 24 |
50919459524 ps |
| T56 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.2872272957 |
|
|
Jul 21 06:47:00 PM PDT 24 |
Jul 21 06:47:07 PM PDT 24 |
93686824 ps |
| T188 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.2198961577 |
|
|
Jul 21 06:46:22 PM PDT 24 |
Jul 21 06:48:36 PM PDT 24 |
280447730 ps |
| T24 |
/workspace/coverage/default/20.sram_ctrl_regwen.272765408 |
|
|
Jul 21 06:44:41 PM PDT 24 |
Jul 21 07:08:22 PM PDT 24 |
24023256004 ps |
| T189 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.1430917901 |
|
|
Jul 21 06:43:57 PM PDT 24 |
Jul 21 06:55:13 PM PDT 24 |
11231935233 ps |
| T190 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.4078475892 |
|
|
Jul 21 06:45:52 PM PDT 24 |
Jul 21 06:46:00 PM PDT 24 |
1568785685 ps |
| T191 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.3344640157 |
|
|
Jul 21 06:47:16 PM PDT 24 |
Jul 21 06:47:21 PM PDT 24 |
124689206 ps |
| T192 |
/workspace/coverage/default/24.sram_ctrl_bijection.3884636715 |
|
|
Jul 21 06:45:01 PM PDT 24 |
Jul 21 06:45:43 PM PDT 24 |
2610741944 ps |
| T193 |
/workspace/coverage/default/43.sram_ctrl_smoke.77384316 |
|
|
Jul 21 06:47:01 PM PDT 24 |
Jul 21 06:47:25 PM PDT 24 |
1287636692 ps |
| T194 |
/workspace/coverage/default/37.sram_ctrl_executable.313839528 |
|
|
Jul 21 06:46:21 PM PDT 24 |
Jul 21 06:59:03 PM PDT 24 |
34083961262 ps |
| T195 |
/workspace/coverage/default/22.sram_ctrl_smoke.4040724890 |
|
|
Jul 21 06:44:47 PM PDT 24 |
Jul 21 06:46:25 PM PDT 24 |
2581762088 ps |
| T57 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.2470621048 |
|
|
Jul 21 06:43:56 PM PDT 24 |
Jul 21 06:43:59 PM PDT 24 |
64072408 ps |
| T196 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3216895407 |
|
|
Jul 21 06:44:13 PM PDT 24 |
Jul 21 06:50:48 PM PDT 24 |
15812925310 ps |
| T197 |
/workspace/coverage/default/43.sram_ctrl_alert_test.4252824578 |
|
|
Jul 21 06:47:06 PM PDT 24 |
Jul 21 06:47:07 PM PDT 24 |
17753099 ps |
| T58 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.322020276 |
|
|
Jul 21 06:47:29 PM PDT 24 |
Jul 21 06:47:36 PM PDT 24 |
387185593 ps |
| T198 |
/workspace/coverage/default/28.sram_ctrl_partial_access.2623519447 |
|
|
Jul 21 06:45:23 PM PDT 24 |
Jul 21 06:45:31 PM PDT 24 |
183275576 ps |
| T199 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.712616803 |
|
|
Jul 21 06:45:49 PM PDT 24 |
Jul 21 06:59:52 PM PDT 24 |
6874002936 ps |
| T200 |
/workspace/coverage/default/45.sram_ctrl_executable.123951312 |
|
|
Jul 21 06:47:19 PM PDT 24 |
Jul 21 06:49:56 PM PDT 24 |
2979361242 ps |
| T201 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3504038149 |
|
|
Jul 21 06:43:39 PM PDT 24 |
Jul 21 06:43:41 PM PDT 24 |
94563742 ps |
| T202 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.4175098875 |
|
|
Jul 21 06:46:12 PM PDT 24 |
Jul 21 06:46:13 PM PDT 24 |
340189029 ps |
| T203 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.1752333144 |
|
|
Jul 21 06:46:08 PM PDT 24 |
Jul 21 06:46:34 PM PDT 24 |
85098622 ps |
| T16 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.3959475212 |
|
|
Jul 21 06:43:56 PM PDT 24 |
Jul 21 06:44:00 PM PDT 24 |
861994434 ps |
| T34 |
/workspace/coverage/default/33.sram_ctrl_regwen.3059631500 |
|
|
Jul 21 06:45:51 PM PDT 24 |
Jul 21 06:48:22 PM PDT 24 |
1477791949 ps |
| T35 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.1113712408 |
|
|
Jul 21 06:46:35 PM PDT 24 |
Jul 21 06:46:36 PM PDT 24 |
28528437 ps |
| T36 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3513277089 |
|
|
Jul 21 06:45:15 PM PDT 24 |
Jul 21 06:45:17 PM PDT 24 |
229930264 ps |
| T37 |
/workspace/coverage/default/14.sram_ctrl_smoke.2742506958 |
|
|
Jul 21 06:44:24 PM PDT 24 |
Jul 21 06:44:27 PM PDT 24 |
229773670 ps |
| T38 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1443204722 |
|
|
Jul 21 06:47:19 PM PDT 24 |
Jul 21 06:47:20 PM PDT 24 |
138745892 ps |
| T39 |
/workspace/coverage/default/48.sram_ctrl_executable.2421373402 |
|
|
Jul 21 06:47:44 PM PDT 24 |
Jul 21 06:57:03 PM PDT 24 |
28993078632 ps |
| T40 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.2093322888 |
|
|
Jul 21 06:44:21 PM PDT 24 |
Jul 21 06:44:25 PM PDT 24 |
1124122572 ps |
| T41 |
/workspace/coverage/default/34.sram_ctrl_executable.4018326883 |
|
|
Jul 21 06:45:58 PM PDT 24 |
Jul 21 07:03:08 PM PDT 24 |
3368445172 ps |
| T42 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.329104908 |
|
|
Jul 21 06:44:36 PM PDT 24 |
Jul 21 06:44:42 PM PDT 24 |
579398624 ps |
| T204 |
/workspace/coverage/default/3.sram_ctrl_bijection.1527554222 |
|
|
Jul 21 06:43:44 PM PDT 24 |
Jul 21 06:44:11 PM PDT 24 |
1561043212 ps |
| T205 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.3231772494 |
|
|
Jul 21 06:46:34 PM PDT 24 |
Jul 21 06:46:42 PM PDT 24 |
6690696411 ps |
| T206 |
/workspace/coverage/default/24.sram_ctrl_executable.1422707085 |
|
|
Jul 21 06:45:01 PM PDT 24 |
Jul 21 06:50:07 PM PDT 24 |
3073801989 ps |
| T207 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.2618767215 |
|
|
Jul 21 06:47:40 PM PDT 24 |
Jul 21 06:47:45 PM PDT 24 |
49928613 ps |
| T208 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.970040232 |
|
|
Jul 21 06:47:13 PM PDT 24 |
Jul 21 06:47:22 PM PDT 24 |
3339578487 ps |
| T209 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.3636663386 |
|
|
Jul 21 06:45:16 PM PDT 24 |
Jul 21 06:45:19 PM PDT 24 |
112088669 ps |
| T210 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.4189099931 |
|
|
Jul 21 06:45:09 PM PDT 24 |
Jul 21 06:45:13 PM PDT 24 |
377024364 ps |
| T211 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.2265972577 |
|
|
Jul 21 06:45:00 PM PDT 24 |
Jul 21 06:45:10 PM PDT 24 |
2919576968 ps |
| T212 |
/workspace/coverage/default/5.sram_ctrl_smoke.2190684791 |
|
|
Jul 21 06:43:45 PM PDT 24 |
Jul 21 06:43:57 PM PDT 24 |
225330145 ps |
| T213 |
/workspace/coverage/default/41.sram_ctrl_smoke.1830523241 |
|
|
Jul 21 06:46:43 PM PDT 24 |
Jul 21 06:47:18 PM PDT 24 |
1663957874 ps |
| T214 |
/workspace/coverage/default/22.sram_ctrl_partial_access.2077273120 |
|
|
Jul 21 06:44:48 PM PDT 24 |
Jul 21 06:45:06 PM PDT 24 |
1884344586 ps |
| T215 |
/workspace/coverage/default/35.sram_ctrl_alert_test.4173302148 |
|
|
Jul 21 06:46:12 PM PDT 24 |
Jul 21 06:46:13 PM PDT 24 |
67566399 ps |
| T216 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.885251520 |
|
|
Jul 21 06:46:22 PM PDT 24 |
Jul 21 07:00:52 PM PDT 24 |
22744193139 ps |
| T217 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.3133039892 |
|
|
Jul 21 06:45:16 PM PDT 24 |
Jul 21 06:45:17 PM PDT 24 |
51312378 ps |
| T218 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.1211922510 |
|
|
Jul 21 06:46:48 PM PDT 24 |
Jul 21 06:46:57 PM PDT 24 |
65777160 ps |
| T219 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.2085311662 |
|
|
Jul 21 06:44:41 PM PDT 24 |
Jul 21 06:46:23 PM PDT 24 |
2396931122 ps |
| T220 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.1080122039 |
|
|
Jul 21 06:44:42 PM PDT 24 |
Jul 21 06:49:27 PM PDT 24 |
2779521240 ps |
| T221 |
/workspace/coverage/default/33.sram_ctrl_alert_test.2050504123 |
|
|
Jul 21 06:45:52 PM PDT 24 |
Jul 21 06:45:54 PM PDT 24 |
115609599 ps |
| T222 |
/workspace/coverage/default/35.sram_ctrl_partial_access.3699902025 |
|
|
Jul 21 06:46:03 PM PDT 24 |
Jul 21 06:46:06 PM PDT 24 |
176179331 ps |
| T223 |
/workspace/coverage/default/25.sram_ctrl_bijection.3965345795 |
|
|
Jul 21 06:45:07 PM PDT 24 |
Jul 21 06:46:27 PM PDT 24 |
7071587313 ps |
| T224 |
/workspace/coverage/default/1.sram_ctrl_executable.1488789005 |
|
|
Jul 21 06:43:40 PM PDT 24 |
Jul 21 06:47:57 PM PDT 24 |
607562723 ps |
| T225 |
/workspace/coverage/default/49.sram_ctrl_smoke.1822054452 |
|
|
Jul 21 06:47:52 PM PDT 24 |
Jul 21 06:47:55 PM PDT 24 |
141892709 ps |
| T226 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.1064935990 |
|
|
Jul 21 06:45:03 PM PDT 24 |
Jul 21 07:01:56 PM PDT 24 |
13912363968 ps |
| T126 |
/workspace/coverage/default/12.sram_ctrl_executable.1545471360 |
|
|
Jul 21 06:44:23 PM PDT 24 |
Jul 21 07:00:07 PM PDT 24 |
34158325550 ps |
| T227 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.289272155 |
|
|
Jul 21 06:47:11 PM PDT 24 |
Jul 21 07:03:49 PM PDT 24 |
12664635635 ps |
| T228 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.2004653063 |
|
|
Jul 21 06:43:42 PM PDT 24 |
Jul 21 06:44:11 PM PDT 24 |
744683746 ps |
| T229 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.3153596303 |
|
|
Jul 21 06:45:14 PM PDT 24 |
Jul 21 06:45:18 PM PDT 24 |
81716472 ps |
| T230 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.1488525361 |
|
|
Jul 21 06:45:02 PM PDT 24 |
Jul 21 06:49:25 PM PDT 24 |
5530304432 ps |
| T231 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.1739829256 |
|
|
Jul 21 06:45:32 PM PDT 24 |
Jul 21 06:45:36 PM PDT 24 |
60543077 ps |
| T232 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1580517859 |
|
|
Jul 21 06:47:13 PM PDT 24 |
Jul 21 08:55:20 PM PDT 24 |
90298077556 ps |
| T233 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.741172028 |
|
|
Jul 21 06:45:13 PM PDT 24 |
Jul 21 06:46:18 PM PDT 24 |
426681521 ps |
| T234 |
/workspace/coverage/default/33.sram_ctrl_smoke.1117986084 |
|
|
Jul 21 06:45:51 PM PDT 24 |
Jul 21 06:46:55 PM PDT 24 |
2045063216 ps |
| T235 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2675891461 |
|
|
Jul 21 06:44:04 PM PDT 24 |
Jul 21 06:47:05 PM PDT 24 |
7068810799 ps |
| T236 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1443987842 |
|
|
Jul 21 06:47:51 PM PDT 24 |
Jul 21 06:47:54 PM PDT 24 |
240271681 ps |
| T237 |
/workspace/coverage/default/30.sram_ctrl_bijection.4032206575 |
|
|
Jul 21 06:45:30 PM PDT 24 |
Jul 21 06:46:13 PM PDT 24 |
669217189 ps |
| T238 |
/workspace/coverage/default/30.sram_ctrl_executable.1756009468 |
|
|
Jul 21 06:45:30 PM PDT 24 |
Jul 21 07:06:10 PM PDT 24 |
4015223818 ps |
| T239 |
/workspace/coverage/default/20.sram_ctrl_bijection.868349192 |
|
|
Jul 21 06:44:42 PM PDT 24 |
Jul 21 06:45:29 PM PDT 24 |
8986956856 ps |
| T240 |
/workspace/coverage/default/32.sram_ctrl_regwen.100418872 |
|
|
Jul 21 06:45:48 PM PDT 24 |
Jul 21 07:00:02 PM PDT 24 |
55129107649 ps |
| T241 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.3171564342 |
|
|
Jul 21 06:46:06 PM PDT 24 |
Jul 21 06:46:12 PM PDT 24 |
1716413870 ps |
| T242 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.2283666877 |
|
|
Jul 21 06:45:52 PM PDT 24 |
Jul 21 06:57:19 PM PDT 24 |
3370418049 ps |
| T243 |
/workspace/coverage/default/26.sram_ctrl_alert_test.1990777367 |
|
|
Jul 21 06:45:13 PM PDT 24 |
Jul 21 06:45:14 PM PDT 24 |
41047600 ps |
| T130 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.4067170668 |
|
|
Jul 21 06:45:41 PM PDT 24 |
Jul 21 06:51:17 PM PDT 24 |
12787431571 ps |
| T244 |
/workspace/coverage/default/25.sram_ctrl_alert_test.1654240863 |
|
|
Jul 21 06:45:07 PM PDT 24 |
Jul 21 06:45:08 PM PDT 24 |
20292055 ps |
| T245 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.1709588751 |
|
|
Jul 21 06:46:28 PM PDT 24 |
Jul 21 07:03:47 PM PDT 24 |
43324948345 ps |
| T246 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.3226049597 |
|
|
Jul 21 06:46:37 PM PDT 24 |
Jul 21 06:46:43 PM PDT 24 |
388541768 ps |
| T247 |
/workspace/coverage/default/15.sram_ctrl_regwen.2610269523 |
|
|
Jul 21 06:44:32 PM PDT 24 |
Jul 21 06:55:31 PM PDT 24 |
98942404209 ps |
| T248 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.324200504 |
|
|
Jul 21 06:44:28 PM PDT 24 |
Jul 21 06:44:31 PM PDT 24 |
240067228 ps |
| T47 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.1415455957 |
|
|
Jul 21 06:44:32 PM PDT 24 |
Jul 21 06:44:50 PM PDT 24 |
580166556 ps |
| T249 |
/workspace/coverage/default/35.sram_ctrl_smoke.1203945977 |
|
|
Jul 21 06:45:56 PM PDT 24 |
Jul 21 06:46:53 PM PDT 24 |
398163271 ps |
| T69 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1071554833 |
|
|
Jul 21 06:43:54 PM PDT 24 |
Jul 21 06:50:46 PM PDT 24 |
5020934525 ps |
| T250 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.2254872564 |
|
|
Jul 21 06:44:27 PM PDT 24 |
Jul 21 06:44:39 PM PDT 24 |
639946555 ps |
| T251 |
/workspace/coverage/default/39.sram_ctrl_executable.1682440955 |
|
|
Jul 21 06:46:28 PM PDT 24 |
Jul 21 06:55:55 PM PDT 24 |
3840791178 ps |
| T252 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2098315107 |
|
|
Jul 21 06:47:49 PM PDT 24 |
Jul 21 06:56:25 PM PDT 24 |
84040848749 ps |
| T253 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.2135417462 |
|
|
Jul 21 06:46:14 PM PDT 24 |
Jul 21 06:46:20 PM PDT 24 |
1277509368 ps |
| T254 |
/workspace/coverage/default/18.sram_ctrl_executable.1698230650 |
|
|
Jul 21 06:44:34 PM PDT 24 |
Jul 21 07:03:06 PM PDT 24 |
35963622190 ps |
| T255 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.579887158 |
|
|
Jul 21 06:44:26 PM PDT 24 |
Jul 21 06:45:36 PM PDT 24 |
136562030 ps |
| T256 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1634742085 |
|
|
Jul 21 06:47:40 PM PDT 24 |
Jul 21 06:47:49 PM PDT 24 |
6690568997 ps |
| T257 |
/workspace/coverage/default/0.sram_ctrl_stress_all.3755286984 |
|
|
Jul 21 06:43:37 PM PDT 24 |
Jul 21 07:10:50 PM PDT 24 |
50552142456 ps |
| T258 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.732329253 |
|
|
Jul 21 06:47:44 PM PDT 24 |
Jul 21 06:47:53 PM PDT 24 |
1459741963 ps |
| T90 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.1845272338 |
|
|
Jul 21 06:46:26 PM PDT 24 |
Jul 21 06:46:30 PM PDT 24 |
95868361 ps |
| T259 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.2413258577 |
|
|
Jul 21 06:45:51 PM PDT 24 |
Jul 21 07:08:15 PM PDT 24 |
60773931440 ps |
| T260 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.1730388411 |
|
|
Jul 21 06:44:52 PM PDT 24 |
Jul 21 06:45:05 PM PDT 24 |
3772404967 ps |
| T261 |
/workspace/coverage/default/26.sram_ctrl_partial_access.1462032014 |
|
|
Jul 21 06:45:16 PM PDT 24 |
Jul 21 06:45:20 PM PDT 24 |
75921342 ps |
| T262 |
/workspace/coverage/default/48.sram_ctrl_bijection.2670319482 |
|
|
Jul 21 06:47:46 PM PDT 24 |
Jul 21 06:48:26 PM PDT 24 |
3452336381 ps |
| T263 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2516595171 |
|
|
Jul 21 06:44:14 PM PDT 24 |
Jul 21 06:44:25 PM PDT 24 |
2103804085 ps |
| T264 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2213411927 |
|
|
Jul 21 06:45:52 PM PDT 24 |
Jul 21 06:45:57 PM PDT 24 |
48050635 ps |
| T265 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1799433187 |
|
|
Jul 21 06:44:38 PM PDT 24 |
Jul 21 06:46:01 PM PDT 24 |
729531044 ps |
| T266 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2889055008 |
|
|
Jul 21 06:44:42 PM PDT 24 |
Jul 21 06:50:15 PM PDT 24 |
14261625621 ps |
| T267 |
/workspace/coverage/default/47.sram_ctrl_stress_all.2105581010 |
|
|
Jul 21 06:47:45 PM PDT 24 |
Jul 21 07:35:33 PM PDT 24 |
34229541174 ps |
| T268 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.740595541 |
|
|
Jul 21 06:45:02 PM PDT 24 |
Jul 21 06:45:04 PM PDT 24 |
39098190 ps |
| T269 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.3312114475 |
|
|
Jul 21 06:44:04 PM PDT 24 |
Jul 21 06:44:09 PM PDT 24 |
233595897 ps |
| T270 |
/workspace/coverage/default/15.sram_ctrl_smoke.1067638042 |
|
|
Jul 21 06:44:27 PM PDT 24 |
Jul 21 06:44:34 PM PDT 24 |
108362577 ps |
| T271 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2488680285 |
|
|
Jul 21 06:47:01 PM PDT 24 |
Jul 21 06:49:58 PM PDT 24 |
1803608586 ps |
| T70 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3234226227 |
|
|
Jul 21 06:43:47 PM PDT 24 |
Jul 21 06:44:19 PM PDT 24 |
5757412343 ps |
| T272 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2687070585 |
|
|
Jul 21 06:47:16 PM PDT 24 |
Jul 21 06:47:17 PM PDT 24 |
83343533 ps |
| T273 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3547899731 |
|
|
Jul 21 06:44:03 PM PDT 24 |
Jul 21 06:44:20 PM PDT 24 |
301912621 ps |
| T274 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.3068631328 |
|
|
Jul 21 06:47:39 PM PDT 24 |
Jul 21 06:47:45 PM PDT 24 |
237289270 ps |
| T275 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2801995943 |
|
|
Jul 21 06:44:02 PM PDT 24 |
Jul 21 06:44:25 PM PDT 24 |
498145767 ps |
| T276 |
/workspace/coverage/default/10.sram_ctrl_regwen.737684084 |
|
|
Jul 21 06:44:14 PM PDT 24 |
Jul 21 07:28:19 PM PDT 24 |
18244099434 ps |
| T277 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.3849550529 |
|
|
Jul 21 06:45:31 PM PDT 24 |
Jul 21 07:01:51 PM PDT 24 |
6640533533 ps |
| T278 |
/workspace/coverage/default/33.sram_ctrl_executable.1196641469 |
|
|
Jul 21 06:45:51 PM PDT 24 |
Jul 21 06:51:11 PM PDT 24 |
1405585733 ps |
| T279 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1236594242 |
|
|
Jul 21 06:44:33 PM PDT 24 |
Jul 21 06:51:18 PM PDT 24 |
156993027849 ps |
| T280 |
/workspace/coverage/default/15.sram_ctrl_executable.2653000367 |
|
|
Jul 21 06:44:27 PM PDT 24 |
Jul 21 06:46:29 PM PDT 24 |
1878505182 ps |
| T281 |
/workspace/coverage/default/16.sram_ctrl_bijection.1945432179 |
|
|
Jul 21 06:44:30 PM PDT 24 |
Jul 21 06:45:10 PM PDT 24 |
14504329941 ps |
| T282 |
/workspace/coverage/default/43.sram_ctrl_stress_all.1034274418 |
|
|
Jul 21 06:47:07 PM PDT 24 |
Jul 21 07:17:03 PM PDT 24 |
8596802091 ps |
| T71 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1593066594 |
|
|
Jul 21 06:44:35 PM PDT 24 |
Jul 21 06:45:30 PM PDT 24 |
861246287 ps |
| T283 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.3940936193 |
|
|
Jul 21 06:46:48 PM PDT 24 |
Jul 21 06:57:03 PM PDT 24 |
10945714763 ps |
| T284 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.3544034635 |
|
|
Jul 21 06:45:31 PM PDT 24 |
Jul 21 06:45:35 PM PDT 24 |
1096691642 ps |
| T285 |
/workspace/coverage/default/47.sram_ctrl_partial_access.4056231309 |
|
|
Jul 21 06:47:35 PM PDT 24 |
Jul 21 06:48:58 PM PDT 24 |
5381457675 ps |
| T286 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.2421481708 |
|
|
Jul 21 06:46:21 PM PDT 24 |
Jul 21 06:51:01 PM PDT 24 |
3502582040 ps |
| T287 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.162213068 |
|
|
Jul 21 06:45:15 PM PDT 24 |
Jul 21 06:47:22 PM PDT 24 |
565736220 ps |
| T288 |
/workspace/coverage/default/23.sram_ctrl_alert_test.54498526 |
|
|
Jul 21 06:45:00 PM PDT 24 |
Jul 21 06:45:01 PM PDT 24 |
16810931 ps |
| T289 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.776560477 |
|
|
Jul 21 06:47:49 PM PDT 24 |
Jul 21 06:49:05 PM PDT 24 |
191424613 ps |
| T290 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.943607903 |
|
|
Jul 21 06:44:09 PM PDT 24 |
Jul 21 06:47:27 PM PDT 24 |
2131773939 ps |
| T291 |
/workspace/coverage/default/38.sram_ctrl_stress_all.135984616 |
|
|
Jul 21 06:46:29 PM PDT 24 |
Jul 21 06:55:38 PM PDT 24 |
12626884280 ps |
| T292 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1295762480 |
|
|
Jul 21 06:44:20 PM PDT 24 |
Jul 21 06:44:25 PM PDT 24 |
436241970 ps |
| T293 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1554343356 |
|
|
Jul 21 06:47:45 PM PDT 24 |
Jul 21 06:59:01 PM PDT 24 |
5740644806 ps |
| T294 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1517945158 |
|
|
Jul 21 06:44:32 PM PDT 24 |
Jul 21 06:49:01 PM PDT 24 |
11209071181 ps |
| T295 |
/workspace/coverage/default/28.sram_ctrl_executable.438013789 |
|
|
Jul 21 06:45:24 PM PDT 24 |
Jul 21 06:51:17 PM PDT 24 |
18493869346 ps |
| T72 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.3821130970 |
|
|
Jul 21 06:45:47 PM PDT 24 |
Jul 21 06:46:14 PM PDT 24 |
1254459418 ps |
| T48 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.175076679 |
|
|
Jul 21 06:46:51 PM PDT 24 |
Jul 21 06:48:25 PM PDT 24 |
1318911825 ps |
| T296 |
/workspace/coverage/default/44.sram_ctrl_alert_test.3417873613 |
|
|
Jul 21 06:47:11 PM PDT 24 |
Jul 21 06:47:12 PM PDT 24 |
17808085 ps |
| T297 |
/workspace/coverage/default/23.sram_ctrl_smoke.3332455804 |
|
|
Jul 21 06:44:55 PM PDT 24 |
Jul 21 06:45:10 PM PDT 24 |
1750729899 ps |
| T298 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.3850996680 |
|
|
Jul 21 06:45:00 PM PDT 24 |
Jul 21 06:45:06 PM PDT 24 |
412482794 ps |
| T299 |
/workspace/coverage/default/39.sram_ctrl_bijection.1708930482 |
|
|
Jul 21 06:46:27 PM PDT 24 |
Jul 21 06:47:21 PM PDT 24 |
820789433 ps |
| T300 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1548104772 |
|
|
Jul 21 06:47:23 PM PDT 24 |
Jul 21 06:47:27 PM PDT 24 |
403590970 ps |