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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total test records in report: 1031
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

T303 /workspace/coverage/default/0.sram_ctrl_smoke.1035493212 Jul 26 07:10:32 PM PDT 24 Jul 26 07:13:00 PM PDT 24 727012516 ps
T304 /workspace/coverage/default/15.sram_ctrl_multiple_keys.3742870508 Jul 26 07:12:00 PM PDT 24 Jul 26 07:20:09 PM PDT 24 6756756296 ps
T305 /workspace/coverage/default/9.sram_ctrl_stress_all.2660917584 Jul 26 07:11:27 PM PDT 24 Jul 26 07:46:28 PM PDT 24 15897647143 ps
T306 /workspace/coverage/default/28.sram_ctrl_partial_access.1700008962 Jul 26 07:14:02 PM PDT 24 Jul 26 07:14:03 PM PDT 24 124464343 ps
T307 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2658322695 Jul 26 07:10:31 PM PDT 24 Jul 26 07:17:30 PM PDT 24 10930977647 ps
T308 /workspace/coverage/default/16.sram_ctrl_partial_access.3058641709 Jul 26 07:12:10 PM PDT 24 Jul 26 07:12:21 PM PDT 24 512558345 ps
T309 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.3953760501 Jul 26 07:11:41 PM PDT 24 Jul 26 07:29:02 PM PDT 24 4143043766 ps
T310 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.381832458 Jul 26 07:14:03 PM PDT 24 Jul 26 07:14:08 PM PDT 24 255159792 ps
T311 /workspace/coverage/default/3.sram_ctrl_smoke.647334518 Jul 26 07:10:43 PM PDT 24 Jul 26 07:10:50 PM PDT 24 560500623 ps
T312 /workspace/coverage/default/3.sram_ctrl_multiple_keys.2996255555 Jul 26 07:10:44 PM PDT 24 Jul 26 07:14:07 PM PDT 24 435786417 ps
T313 /workspace/coverage/default/34.sram_ctrl_max_throughput.351076322 Jul 26 07:15:17 PM PDT 24 Jul 26 07:15:24 PM PDT 24 92691549 ps
T314 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1427100232 Jul 26 07:10:32 PM PDT 24 Jul 26 07:11:00 PM PDT 24 457100748 ps
T315 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.3375873558 Jul 26 07:13:21 PM PDT 24 Jul 26 07:17:30 PM PDT 24 3349944758 ps
T316 /workspace/coverage/default/49.sram_ctrl_smoke.1415426919 Jul 26 07:18:17 PM PDT 24 Jul 26 07:18:33 PM PDT 24 979577213 ps
T317 /workspace/coverage/default/25.sram_ctrl_ram_cfg.729657600 Jul 26 07:13:51 PM PDT 24 Jul 26 07:13:51 PM PDT 24 73629578 ps
T318 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1783291309 Jul 26 07:10:34 PM PDT 24 Jul 26 07:12:50 PM PDT 24 1020250550 ps
T319 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3729288745 Jul 26 07:17:01 PM PDT 24 Jul 26 07:18:06 PM PDT 24 504927468 ps
T320 /workspace/coverage/default/34.sram_ctrl_regwen.2343993482 Jul 26 07:15:17 PM PDT 24 Jul 26 07:32:25 PM PDT 24 19523900218 ps
T321 /workspace/coverage/default/5.sram_ctrl_alert_test.650778039 Jul 26 07:11:09 PM PDT 24 Jul 26 07:11:09 PM PDT 24 61299899 ps
T322 /workspace/coverage/default/0.sram_ctrl_executable.1233014153 Jul 26 07:10:29 PM PDT 24 Jul 26 07:20:34 PM PDT 24 4554361440 ps
T323 /workspace/coverage/default/19.sram_ctrl_bijection.91187947 Jul 26 07:12:31 PM PDT 24 Jul 26 07:12:49 PM PDT 24 2953326620 ps
T324 /workspace/coverage/default/41.sram_ctrl_bijection.2517421271 Jul 26 07:16:37 PM PDT 24 Jul 26 07:17:20 PM PDT 24 2888063016 ps
T325 /workspace/coverage/default/24.sram_ctrl_max_throughput.3247691939 Jul 26 07:13:20 PM PDT 24 Jul 26 07:14:06 PM PDT 24 194366164 ps
T326 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.59362409 Jul 26 07:14:35 PM PDT 24 Jul 26 07:21:30 PM PDT 24 17291920100 ps
T327 /workspace/coverage/default/23.sram_ctrl_bijection.1643065359 Jul 26 07:13:11 PM PDT 24 Jul 26 07:13:58 PM PDT 24 6899212702 ps
T328 /workspace/coverage/default/10.sram_ctrl_bijection.762347556 Jul 26 07:11:25 PM PDT 24 Jul 26 07:11:42 PM PDT 24 671783635 ps
T329 /workspace/coverage/default/39.sram_ctrl_regwen.1063711695 Jul 26 07:16:18 PM PDT 24 Jul 26 07:36:28 PM PDT 24 62426977039 ps
T330 /workspace/coverage/default/11.sram_ctrl_partial_access.4021582223 Jul 26 07:11:34 PM PDT 24 Jul 26 07:11:51 PM PDT 24 981151540 ps
T331 /workspace/coverage/default/16.sram_ctrl_multiple_keys.181415039 Jul 26 07:12:09 PM PDT 24 Jul 26 07:16:34 PM PDT 24 3269856404 ps
T332 /workspace/coverage/default/20.sram_ctrl_alert_test.3813077304 Jul 26 07:12:54 PM PDT 24 Jul 26 07:12:55 PM PDT 24 17898447 ps
T333 /workspace/coverage/default/35.sram_ctrl_executable.4119587319 Jul 26 07:15:26 PM PDT 24 Jul 26 07:24:42 PM PDT 24 99297056502 ps
T334 /workspace/coverage/default/20.sram_ctrl_mem_walk.1351186823 Jul 26 07:12:52 PM PDT 24 Jul 26 07:13:03 PM PDT 24 2257252048 ps
T335 /workspace/coverage/default/16.sram_ctrl_smoke.1546994719 Jul 26 07:12:08 PM PDT 24 Jul 26 07:12:34 PM PDT 24 1137191893 ps
T336 /workspace/coverage/default/30.sram_ctrl_bijection.754302449 Jul 26 07:14:23 PM PDT 24 Jul 26 07:15:42 PM PDT 24 15044418534 ps
T337 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.579334181 Jul 26 07:15:49 PM PDT 24 Jul 26 07:21:00 PM PDT 24 55503311507 ps
T338 /workspace/coverage/default/12.sram_ctrl_executable.1696626666 Jul 26 07:11:36 PM PDT 24 Jul 26 07:21:32 PM PDT 24 2637496542 ps
T46 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.396278329 Jul 26 07:17:30 PM PDT 24 Jul 26 07:17:42 PM PDT 24 1574178388 ps
T339 /workspace/coverage/default/22.sram_ctrl_regwen.345091243 Jul 26 07:13:01 PM PDT 24 Jul 26 07:19:12 PM PDT 24 5953939147 ps
T340 /workspace/coverage/default/45.sram_ctrl_multiple_keys.3070496241 Jul 26 07:17:21 PM PDT 24 Jul 26 07:27:59 PM PDT 24 1179920972 ps
T341 /workspace/coverage/default/34.sram_ctrl_mem_walk.1700726383 Jul 26 07:15:16 PM PDT 24 Jul 26 07:15:28 PM PDT 24 2619115715 ps
T342 /workspace/coverage/default/4.sram_ctrl_mem_walk.649855528 Jul 26 07:10:59 PM PDT 24 Jul 26 07:11:10 PM PDT 24 2443608012 ps
T343 /workspace/coverage/default/6.sram_ctrl_mem_walk.734174335 Jul 26 07:11:12 PM PDT 24 Jul 26 07:11:17 PM PDT 24 355929279 ps
T105 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.3109008766 Jul 26 07:12:51 PM PDT 24 Jul 26 07:12:54 PM PDT 24 502472782 ps
T344 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2031666665 Jul 26 07:15:18 PM PDT 24 Jul 26 07:23:04 PM PDT 24 5826551366 ps
T345 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2740352994 Jul 26 07:10:57 PM PDT 24 Jul 26 07:11:01 PM PDT 24 243995263 ps
T346 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.1791836492 Jul 26 07:14:12 PM PDT 24 Jul 26 07:19:49 PM PDT 24 4615320519 ps
T347 /workspace/coverage/default/2.sram_ctrl_executable.2123158153 Jul 26 07:10:44 PM PDT 24 Jul 26 07:13:43 PM PDT 24 1120971315 ps
T348 /workspace/coverage/default/11.sram_ctrl_stress_all.4003108785 Jul 26 07:11:35 PM PDT 24 Jul 26 08:01:51 PM PDT 24 40479325077 ps
T349 /workspace/coverage/default/39.sram_ctrl_ram_cfg.1036471663 Jul 26 07:16:18 PM PDT 24 Jul 26 07:16:18 PM PDT 24 88345713 ps
T350 /workspace/coverage/default/41.sram_ctrl_multiple_keys.2068967013 Jul 26 07:16:40 PM PDT 24 Jul 26 07:32:43 PM PDT 24 62757024003 ps
T351 /workspace/coverage/default/28.sram_ctrl_mem_walk.658801141 Jul 26 07:14:13 PM PDT 24 Jul 26 07:14:24 PM PDT 24 466335865 ps
T352 /workspace/coverage/default/20.sram_ctrl_partial_access.2737379718 Jul 26 07:12:52 PM PDT 24 Jul 26 07:13:02 PM PDT 24 2219055225 ps
T353 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.2721160694 Jul 26 07:17:24 PM PDT 24 Jul 26 07:21:51 PM PDT 24 2770597178 ps
T354 /workspace/coverage/default/9.sram_ctrl_smoke.494944499 Jul 26 07:11:34 PM PDT 24 Jul 26 07:11:53 PM PDT 24 1118236740 ps
T355 /workspace/coverage/default/26.sram_ctrl_stress_all.3724213974 Jul 26 07:13:49 PM PDT 24 Jul 26 09:01:15 PM PDT 24 321585066519 ps
T47 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.2064293030 Jul 26 07:15:39 PM PDT 24 Jul 26 07:17:09 PM PDT 24 2183816653 ps
T356 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.3326163590 Jul 26 07:14:02 PM PDT 24 Jul 26 07:16:47 PM PDT 24 6969897265 ps
T357 /workspace/coverage/default/5.sram_ctrl_partial_access.3101784497 Jul 26 07:10:59 PM PDT 24 Jul 26 07:11:02 PM PDT 24 128495160 ps
T358 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.2251677872 Jul 26 07:15:51 PM PDT 24 Jul 26 07:15:57 PM PDT 24 356094375 ps
T359 /workspace/coverage/default/4.sram_ctrl_lc_escalation.51713696 Jul 26 07:10:57 PM PDT 24 Jul 26 07:11:06 PM PDT 24 2241250326 ps
T360 /workspace/coverage/default/14.sram_ctrl_max_throughput.1278952144 Jul 26 07:11:52 PM PDT 24 Jul 26 07:12:55 PM PDT 24 525916696 ps
T361 /workspace/coverage/default/36.sram_ctrl_partial_access.545396982 Jul 26 07:15:40 PM PDT 24 Jul 26 07:15:54 PM PDT 24 253010096 ps
T362 /workspace/coverage/default/46.sram_ctrl_bijection.2362101869 Jul 26 07:17:36 PM PDT 24 Jul 26 07:18:09 PM PDT 24 1097949141 ps
T363 /workspace/coverage/default/47.sram_ctrl_alert_test.2800114238 Jul 26 07:18:06 PM PDT 24 Jul 26 07:18:07 PM PDT 24 13314586 ps
T364 /workspace/coverage/default/46.sram_ctrl_partial_access.1112759673 Jul 26 07:17:37 PM PDT 24 Jul 26 07:18:01 PM PDT 24 929090423 ps
T365 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.319825550 Jul 26 07:17:49 PM PDT 24 Jul 26 07:24:07 PM PDT 24 13587776359 ps
T366 /workspace/coverage/default/40.sram_ctrl_multiple_keys.2523953720 Jul 26 07:16:26 PM PDT 24 Jul 26 07:18:44 PM PDT 24 2172999672 ps
T367 /workspace/coverage/default/13.sram_ctrl_ram_cfg.874166707 Jul 26 07:11:49 PM PDT 24 Jul 26 07:11:50 PM PDT 24 44678295 ps
T368 /workspace/coverage/default/24.sram_ctrl_executable.2037680043 Jul 26 07:13:21 PM PDT 24 Jul 26 07:19:21 PM PDT 24 14723840251 ps
T369 /workspace/coverage/default/35.sram_ctrl_multiple_keys.3098341735 Jul 26 07:15:19 PM PDT 24 Jul 26 07:42:18 PM PDT 24 147946038779 ps
T370 /workspace/coverage/default/23.sram_ctrl_executable.1046356764 Jul 26 07:13:10 PM PDT 24 Jul 26 07:43:27 PM PDT 24 40077099647 ps
T371 /workspace/coverage/default/8.sram_ctrl_smoke.4196453632 Jul 26 07:11:08 PM PDT 24 Jul 26 07:11:25 PM PDT 24 781629992 ps
T372 /workspace/coverage/default/26.sram_ctrl_max_throughput.1017515073 Jul 26 07:13:50 PM PDT 24 Jul 26 07:16:16 PM PDT 24 539834709 ps
T373 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.2574172775 Jul 26 07:13:00 PM PDT 24 Jul 26 07:16:18 PM PDT 24 11004986800 ps
T374 /workspace/coverage/default/6.sram_ctrl_bijection.1811254704 Jul 26 07:11:11 PM PDT 24 Jul 26 07:11:35 PM PDT 24 4287244717 ps
T375 /workspace/coverage/default/36.sram_ctrl_regwen.1518841107 Jul 26 07:15:40 PM PDT 24 Jul 26 07:29:24 PM PDT 24 9621123990 ps
T376 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.2894956423 Jul 26 07:16:26 PM PDT 24 Jul 26 07:39:38 PM PDT 24 19635227250 ps
T377 /workspace/coverage/default/5.sram_ctrl_stress_all.2874607617 Jul 26 07:11:10 PM PDT 24 Jul 26 08:26:41 PM PDT 24 44823969012 ps
T378 /workspace/coverage/default/2.sram_ctrl_partial_access.892425248 Jul 26 07:10:43 PM PDT 24 Jul 26 07:10:59 PM PDT 24 279432627 ps
T379 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1693129151 Jul 26 07:17:20 PM PDT 24 Jul 26 07:25:01 PM PDT 24 2079901281 ps
T380 /workspace/coverage/default/7.sram_ctrl_regwen.2977829256 Jul 26 07:11:10 PM PDT 24 Jul 26 07:30:32 PM PDT 24 18898732061 ps
T381 /workspace/coverage/default/9.sram_ctrl_max_throughput.3542418844 Jul 26 07:11:25 PM PDT 24 Jul 26 07:12:06 PM PDT 24 188597331 ps
T382 /workspace/coverage/default/14.sram_ctrl_mem_walk.1151855723 Jul 26 07:11:59 PM PDT 24 Jul 26 07:12:07 PM PDT 24 133371505 ps
T383 /workspace/coverage/default/7.sram_ctrl_bijection.938141761 Jul 26 07:11:09 PM PDT 24 Jul 26 07:11:59 PM PDT 24 3009561838 ps
T384 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2056681093 Jul 26 07:12:38 PM PDT 24 Jul 26 07:18:17 PM PDT 24 4785367108 ps
T385 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.3733299667 Jul 26 07:16:50 PM PDT 24 Jul 26 07:16:56 PM PDT 24 359159788 ps
T386 /workspace/coverage/default/35.sram_ctrl_bijection.3041762185 Jul 26 07:15:17 PM PDT 24 Jul 26 07:16:18 PM PDT 24 10992820550 ps
T387 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.371098274 Jul 26 07:15:59 PM PDT 24 Jul 26 07:19:21 PM PDT 24 31409945608 ps
T388 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.2671021862 Jul 26 07:13:10 PM PDT 24 Jul 26 07:40:58 PM PDT 24 5709851716 ps
T389 /workspace/coverage/default/43.sram_ctrl_stress_all.4133043353 Jul 26 07:17:09 PM PDT 24 Jul 26 07:48:26 PM PDT 24 15959305116 ps
T390 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.3254714240 Jul 26 07:14:15 PM PDT 24 Jul 26 07:29:42 PM PDT 24 4717283238 ps
T391 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.3959792103 Jul 26 07:14:55 PM PDT 24 Jul 26 07:29:40 PM PDT 24 3524182142 ps
T392 /workspace/coverage/default/25.sram_ctrl_bijection.272085501 Jul 26 07:13:37 PM PDT 24 Jul 26 07:14:37 PM PDT 24 3318331175 ps
T393 /workspace/coverage/default/15.sram_ctrl_partial_access.870212638 Jul 26 07:12:01 PM PDT 24 Jul 26 07:12:12 PM PDT 24 609875140 ps
T394 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.1072985232 Jul 26 07:11:39 PM PDT 24 Jul 26 07:11:42 PM PDT 24 346133233 ps
T395 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2012080658 Jul 26 07:11:10 PM PDT 24 Jul 26 07:15:59 PM PDT 24 3910227473 ps
T396 /workspace/coverage/default/38.sram_ctrl_executable.2744232127 Jul 26 07:16:00 PM PDT 24 Jul 26 07:30:41 PM PDT 24 66323693806 ps
T397 /workspace/coverage/default/17.sram_ctrl_mem_walk.1800849754 Jul 26 07:12:19 PM PDT 24 Jul 26 07:12:32 PM PDT 24 3978818327 ps
T398 /workspace/coverage/default/42.sram_ctrl_mem_walk.933689853 Jul 26 07:16:52 PM PDT 24 Jul 26 07:16:58 PM PDT 24 298468906 ps
T399 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.1635106721 Jul 26 07:13:22 PM PDT 24 Jul 26 07:20:03 PM PDT 24 1784525334 ps
T400 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.3622533065 Jul 26 07:14:34 PM PDT 24 Jul 26 07:22:03 PM PDT 24 2166971371 ps
T401 /workspace/coverage/default/6.sram_ctrl_smoke.1573044386 Jul 26 07:11:08 PM PDT 24 Jul 26 07:11:22 PM PDT 24 634921570 ps
T402 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3640067225 Jul 26 07:17:18 PM PDT 24 Jul 26 07:18:14 PM PDT 24 342689829 ps
T403 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1400726040 Jul 26 07:18:08 PM PDT 24 Jul 26 07:18:10 PM PDT 24 50563645 ps
T404 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.2597716793 Jul 26 07:12:31 PM PDT 24 Jul 26 07:15:54 PM PDT 24 8606508714 ps
T405 /workspace/coverage/default/19.sram_ctrl_partial_access.2773947254 Jul 26 07:12:38 PM PDT 24 Jul 26 07:12:48 PM PDT 24 216102222 ps
T406 /workspace/coverage/default/1.sram_ctrl_regwen.1978334279 Jul 26 07:10:42 PM PDT 24 Jul 26 07:18:39 PM PDT 24 4153389745 ps
T407 /workspace/coverage/default/48.sram_ctrl_smoke.872624090 Jul 26 07:18:07 PM PDT 24 Jul 26 07:18:33 PM PDT 24 82200829 ps
T408 /workspace/coverage/default/36.sram_ctrl_max_throughput.3364963242 Jul 26 07:15:41 PM PDT 24 Jul 26 07:15:53 PM PDT 24 350409413 ps
T409 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.272961765 Jul 26 07:11:12 PM PDT 24 Jul 26 07:26:41 PM PDT 24 3811780425 ps
T410 /workspace/coverage/default/46.sram_ctrl_regwen.1779085140 Jul 26 07:17:40 PM PDT 24 Jul 26 07:18:21 PM PDT 24 637216577 ps
T411 /workspace/coverage/default/23.sram_ctrl_ram_cfg.926443607 Jul 26 07:13:22 PM PDT 24 Jul 26 07:13:23 PM PDT 24 64474687 ps
T412 /workspace/coverage/default/1.sram_ctrl_partial_access.3128616874 Jul 26 07:10:31 PM PDT 24 Jul 26 07:10:37 PM PDT 24 110800235 ps
T413 /workspace/coverage/default/48.sram_ctrl_executable.4117890814 Jul 26 07:18:07 PM PDT 24 Jul 26 07:26:51 PM PDT 24 12151625108 ps
T414 /workspace/coverage/default/25.sram_ctrl_partial_access.3490394159 Jul 26 07:13:40 PM PDT 24 Jul 26 07:14:47 PM PDT 24 1397847928 ps
T415 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.1553788040 Jul 26 07:15:59 PM PDT 24 Jul 26 07:26:46 PM PDT 24 11591698543 ps
T416 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.3138391539 Jul 26 07:15:16 PM PDT 24 Jul 26 07:18:40 PM PDT 24 2159984089 ps
T417 /workspace/coverage/default/21.sram_ctrl_mem_walk.480119217 Jul 26 07:13:00 PM PDT 24 Jul 26 07:13:07 PM PDT 24 3301980357 ps
T418 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.1581783232 Jul 26 07:12:29 PM PDT 24 Jul 26 07:12:30 PM PDT 24 41095334 ps
T419 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.1780524316 Jul 26 07:10:32 PM PDT 24 Jul 26 07:13:21 PM PDT 24 1817290928 ps
T117 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.619923950 Jul 26 07:15:00 PM PDT 24 Jul 26 07:15:08 PM PDT 24 199263105 ps
T420 /workspace/coverage/default/34.sram_ctrl_multiple_keys.590810416 Jul 26 07:15:07 PM PDT 24 Jul 26 07:25:36 PM PDT 24 6422552907 ps
T421 /workspace/coverage/default/22.sram_ctrl_stress_all.2040660667 Jul 26 07:13:09 PM PDT 24 Jul 26 08:29:22 PM PDT 24 46023681616 ps
T422 /workspace/coverage/default/40.sram_ctrl_mem_walk.2201547133 Jul 26 07:16:35 PM PDT 24 Jul 26 07:16:40 PM PDT 24 99536821 ps
T423 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.809857728 Jul 26 07:13:36 PM PDT 24 Jul 26 07:13:39 PM PDT 24 158152890 ps
T424 /workspace/coverage/default/14.sram_ctrl_regwen.486633970 Jul 26 07:12:01 PM PDT 24 Jul 26 07:32:50 PM PDT 24 27057219131 ps
T425 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2741047498 Jul 26 07:11:12 PM PDT 24 Jul 26 07:11:18 PM PDT 24 182309233 ps
T426 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.1288532121 Jul 26 07:18:14 PM PDT 24 Jul 26 07:18:19 PM PDT 24 248439218 ps
T427 /workspace/coverage/default/1.sram_ctrl_bijection.970851198 Jul 26 07:10:32 PM PDT 24 Jul 26 07:11:12 PM PDT 24 616536728 ps
T428 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.2448926484 Jul 26 07:11:58 PM PDT 24 Jul 26 07:17:35 PM PDT 24 1092564959 ps
T429 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.3960376364 Jul 26 07:12:50 PM PDT 24 Jul 26 07:17:33 PM PDT 24 5776564317 ps
T430 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.560631212 Jul 26 07:13:35 PM PDT 24 Jul 26 07:23:32 PM PDT 24 27328353980 ps
T431 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2435523206 Jul 26 07:14:01 PM PDT 24 Jul 26 07:14:07 PM PDT 24 205294139 ps
T432 /workspace/coverage/default/23.sram_ctrl_partial_access.1040061396 Jul 26 07:13:09 PM PDT 24 Jul 26 07:13:52 PM PDT 24 1525478897 ps
T106 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.3718185021 Jul 26 07:11:59 PM PDT 24 Jul 26 07:12:02 PM PDT 24 898393958 ps
T433 /workspace/coverage/default/36.sram_ctrl_stress_all.3238308883 Jul 26 07:15:51 PM PDT 24 Jul 26 07:40:19 PM PDT 24 76357497731 ps
T434 /workspace/coverage/default/47.sram_ctrl_partial_access.3890292520 Jul 26 07:17:59 PM PDT 24 Jul 26 07:18:51 PM PDT 24 7243874663 ps
T435 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1824230791 Jul 26 07:11:49 PM PDT 24 Jul 26 07:14:15 PM PDT 24 270018462 ps
T436 /workspace/coverage/default/23.sram_ctrl_lc_escalation.2896216416 Jul 26 07:13:11 PM PDT 24 Jul 26 07:13:17 PM PDT 24 898207374 ps
T437 /workspace/coverage/default/33.sram_ctrl_mem_walk.4147811042 Jul 26 07:15:09 PM PDT 24 Jul 26 07:15:19 PM PDT 24 1109745282 ps
T438 /workspace/coverage/default/12.sram_ctrl_bijection.610401323 Jul 26 07:11:38 PM PDT 24 Jul 26 07:12:42 PM PDT 24 2895167022 ps
T439 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.57187028 Jul 26 07:16:52 PM PDT 24 Jul 26 07:22:53 PM PDT 24 5011483890 ps
T118 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.2862211784 Jul 26 07:16:16 PM PDT 24 Jul 26 07:20:51 PM PDT 24 1978956041 ps
T440 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.713487582 Jul 26 07:13:10 PM PDT 24 Jul 26 07:13:15 PM PDT 24 165593642 ps
T441 /workspace/coverage/default/6.sram_ctrl_multiple_keys.3884263451 Jul 26 07:11:09 PM PDT 24 Jul 26 07:18:14 PM PDT 24 7525279117 ps
T442 /workspace/coverage/default/24.sram_ctrl_alert_test.1393653799 Jul 26 07:13:37 PM PDT 24 Jul 26 07:13:38 PM PDT 24 51171586 ps
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T445 /workspace/coverage/default/34.sram_ctrl_partial_access.2084900590 Jul 26 07:15:18 PM PDT 24 Jul 26 07:15:27 PM PDT 24 610014520 ps
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T447 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.985412933 Jul 26 07:15:00 PM PDT 24 Jul 26 07:15:27 PM PDT 24 95211611 ps
T448 /workspace/coverage/default/37.sram_ctrl_partial_access.2272656086 Jul 26 07:15:52 PM PDT 24 Jul 26 07:16:47 PM PDT 24 588275622 ps
T449 /workspace/coverage/default/10.sram_ctrl_alert_test.2860465647 Jul 26 07:11:22 PM PDT 24 Jul 26 07:11:23 PM PDT 24 24623101 ps
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T451 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.2284277130 Jul 26 07:13:49 PM PDT 24 Jul 26 07:19:57 PM PDT 24 18004769596 ps
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T453 /workspace/coverage/default/33.sram_ctrl_partial_access.983246426 Jul 26 07:14:57 PM PDT 24 Jul 26 07:15:05 PM PDT 24 673259067 ps
T454 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.2872454271 Jul 26 07:15:50 PM PDT 24 Jul 26 07:15:57 PM PDT 24 672134746 ps
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T459 /workspace/coverage/default/3.sram_ctrl_partial_access.2519361314 Jul 26 07:10:43 PM PDT 24 Jul 26 07:10:59 PM PDT 24 1153946792 ps
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T467 /workspace/coverage/default/14.sram_ctrl_partial_access.2201856664 Jul 26 07:11:48 PM PDT 24 Jul 26 07:12:02 PM PDT 24 299697197 ps
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T472 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2759636508 Jul 26 07:11:11 PM PDT 24 Jul 26 07:15:36 PM PDT 24 1343237225 ps
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T476 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1018449081 Jul 26 07:11:11 PM PDT 24 Jul 26 07:18:27 PM PDT 24 6006095543 ps
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T486 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.823502463 Jul 26 07:17:37 PM PDT 24 Jul 26 07:22:15 PM PDT 24 1398091528 ps
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T489 /workspace/coverage/default/21.sram_ctrl_partial_access.1767451196 Jul 26 07:12:50 PM PDT 24 Jul 26 07:15:28 PM PDT 24 1510957729 ps
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T491 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.58056384 Jul 26 07:12:17 PM PDT 24 Jul 26 07:14:54 PM PDT 24 867682805 ps
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T493 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.3838063487 Jul 26 07:11:13 PM PDT 24 Jul 26 07:11:16 PM PDT 24 101652145 ps
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T495 /workspace/coverage/default/30.sram_ctrl_regwen.3333652311 Jul 26 07:14:36 PM PDT 24 Jul 26 07:34:51 PM PDT 24 53316339255 ps
T496 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1452022544 Jul 26 07:15:52 PM PDT 24 Jul 26 07:16:25 PM PDT 24 649478563 ps
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T499 /workspace/coverage/default/5.sram_ctrl_lc_escalation.2716123669 Jul 26 07:10:56 PM PDT 24 Jul 26 07:10:59 PM PDT 24 196354060 ps
T500 /workspace/coverage/default/29.sram_ctrl_ram_cfg.3575798079 Jul 26 07:14:25 PM PDT 24 Jul 26 07:14:26 PM PDT 24 207327038 ps
T501 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.51759798 Jul 26 07:10:43 PM PDT 24 Jul 26 07:10:48 PM PDT 24 295790685 ps
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T503 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.830879709 Jul 26 07:16:50 PM PDT 24 Jul 26 07:20:02 PM PDT 24 8448818114 ps
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T505 /workspace/coverage/default/2.sram_ctrl_multiple_keys.2538511151 Jul 26 07:10:45 PM PDT 24 Jul 26 07:23:22 PM PDT 24 39346020263 ps
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T507 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.1864164831 Jul 26 07:14:36 PM PDT 24 Jul 26 07:19:24 PM PDT 24 2234770649 ps
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T509 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.109403271 Jul 26 07:13:09 PM PDT 24 Jul 26 07:17:22 PM PDT 24 2607668296 ps
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T512 /workspace/coverage/default/28.sram_ctrl_max_throughput.425722949 Jul 26 07:14:10 PM PDT 24 Jul 26 07:15:20 PM PDT 24 110187760 ps
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T515 /workspace/coverage/default/17.sram_ctrl_partial_access.1024364539 Jul 26 07:12:12 PM PDT 24 Jul 26 07:12:28 PM PDT 24 794716057 ps
T516 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.3121104987 Jul 26 07:18:00 PM PDT 24 Jul 26 07:20:26 PM PDT 24 1190187424 ps
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T518 /workspace/coverage/default/39.sram_ctrl_multiple_keys.1102799122 Jul 26 07:16:09 PM PDT 24 Jul 26 07:26:42 PM PDT 24 39137512767 ps
T519 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.607938245 Jul 26 07:15:17 PM PDT 24 Jul 26 07:20:00 PM PDT 24 15312492890 ps
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T521 /workspace/coverage/default/32.sram_ctrl_partial_access.1535979447 Jul 26 07:14:57 PM PDT 24 Jul 26 07:15:04 PM PDT 24 431070952 ps
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T523 /workspace/coverage/default/48.sram_ctrl_stress_all.928094553 Jul 26 07:18:15 PM PDT 24 Jul 26 08:16:17 PM PDT 24 68444841256 ps
T524 /workspace/coverage/default/25.sram_ctrl_executable.1947541968 Jul 26 07:13:38 PM PDT 24 Jul 26 07:23:46 PM PDT 24 14607694690 ps
T525 /workspace/coverage/default/4.sram_ctrl_regwen.807826269 Jul 26 07:10:58 PM PDT 24 Jul 26 07:37:03 PM PDT 24 13190441716 ps
T526 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.464483598 Jul 26 07:14:46 PM PDT 24 Jul 26 07:16:52 PM PDT 24 23330145290 ps
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T528 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.2850325117 Jul 26 07:13:51 PM PDT 24 Jul 26 07:13:56 PM PDT 24 149556708 ps
T529 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.892288594 Jul 26 07:14:56 PM PDT 24 Jul 26 07:23:17 PM PDT 24 76638131531 ps
T530 /workspace/coverage/default/17.sram_ctrl_lc_escalation.2924540594 Jul 26 07:12:18 PM PDT 24 Jul 26 07:12:25 PM PDT 24 3216822702 ps
T531 /workspace/coverage/default/11.sram_ctrl_executable.1786756690 Jul 26 07:11:37 PM PDT 24 Jul 26 07:20:38 PM PDT 24 4090837411 ps
T532 /workspace/coverage/default/10.sram_ctrl_partial_access.3310011213 Jul 26 07:11:20 PM PDT 24 Jul 26 07:12:37 PM PDT 24 2794838549 ps
T533 /workspace/coverage/default/30.sram_ctrl_lc_escalation.1170269542 Jul 26 07:14:41 PM PDT 24 Jul 26 07:14:49 PM PDT 24 1072677798 ps
T534 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3697037789 Jul 26 07:11:10 PM PDT 24 Jul 26 07:16:23 PM PDT 24 1871027420 ps
T535 /workspace/coverage/default/32.sram_ctrl_max_throughput.1797942471 Jul 26 07:14:56 PM PDT 24 Jul 26 07:14:59 PM PDT 24 186932930 ps
T536 /workspace/coverage/default/18.sram_ctrl_lc_escalation.1996488808 Jul 26 07:12:31 PM PDT 24 Jul 26 07:12:37 PM PDT 24 8099865314 ps
T537 /workspace/coverage/default/33.sram_ctrl_bijection.4265030144 Jul 26 07:14:57 PM PDT 24 Jul 26 07:15:28 PM PDT 24 500738916 ps
T538 /workspace/coverage/default/30.sram_ctrl_alert_test.393446144 Jul 26 07:14:36 PM PDT 24 Jul 26 07:14:37 PM PDT 24 16996552 ps
T539 /workspace/coverage/default/44.sram_ctrl_ram_cfg.2133037490 Jul 26 07:17:24 PM PDT 24 Jul 26 07:17:25 PM PDT 24 27548321 ps
T540 /workspace/coverage/default/4.sram_ctrl_smoke.2938451942 Jul 26 07:10:59 PM PDT 24 Jul 26 07:12:17 PM PDT 24 439068480 ps
T541 /workspace/coverage/default/28.sram_ctrl_multiple_keys.1542749044 Jul 26 07:14:02 PM PDT 24 Jul 26 07:26:57 PM PDT 24 21336999382 ps
T542 /workspace/coverage/default/23.sram_ctrl_max_throughput.2205692381 Jul 26 07:13:11 PM PDT 24 Jul 26 07:14:36 PM PDT 24 249416471 ps
T543 /workspace/coverage/default/46.sram_ctrl_smoke.703576305 Jul 26 07:17:28 PM PDT 24 Jul 26 07:17:29 PM PDT 24 344261515 ps
T544 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.173061158 Jul 26 07:11:59 PM PDT 24 Jul 26 07:23:24 PM PDT 24 2097052877 ps
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