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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total test records in report: 1030
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

T546 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3763669694 Jul 28 06:25:19 PM PDT 24 Jul 28 06:29:10 PM PDT 24 6347250064 ps
T547 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.1880925853 Jul 28 06:31:23 PM PDT 24 Jul 28 06:36:16 PM PDT 24 12115303334 ps
T548 /workspace/coverage/default/38.sram_ctrl_bijection.3672579710 Jul 28 06:35:24 PM PDT 24 Jul 28 06:36:20 PM PDT 24 9666107661 ps
T103 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.1178741159 Jul 28 06:33:30 PM PDT 24 Jul 28 06:33:36 PM PDT 24 341629806 ps
T549 /workspace/coverage/default/0.sram_ctrl_ram_cfg.3761278328 Jul 28 06:24:30 PM PDT 24 Jul 28 06:24:31 PM PDT 24 49651882 ps
T550 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.86833639 Jul 28 06:34:18 PM PDT 24 Jul 28 06:41:08 PM PDT 24 162745794093 ps
T551 /workspace/coverage/default/39.sram_ctrl_alert_test.483241224 Jul 28 06:35:45 PM PDT 24 Jul 28 06:35:46 PM PDT 24 33998003 ps
T552 /workspace/coverage/default/4.sram_ctrl_ram_cfg.3736816261 Jul 28 06:25:23 PM PDT 24 Jul 28 06:25:24 PM PDT 24 123515569 ps
T553 /workspace/coverage/default/3.sram_ctrl_regwen.1126258204 Jul 28 06:25:09 PM PDT 24 Jul 28 06:28:18 PM PDT 24 25724376767 ps
T554 /workspace/coverage/default/38.sram_ctrl_max_throughput.4171670539 Jul 28 06:35:23 PM PDT 24 Jul 28 06:35:24 PM PDT 24 35574307 ps
T555 /workspace/coverage/default/2.sram_ctrl_executable.2783667653 Jul 28 06:24:56 PM PDT 24 Jul 28 06:30:21 PM PDT 24 3728865652 ps
T556 /workspace/coverage/default/29.sram_ctrl_lc_escalation.3100100204 Jul 28 06:32:38 PM PDT 24 Jul 28 06:32:48 PM PDT 24 10824321370 ps
T557 /workspace/coverage/default/20.sram_ctrl_stress_all.12890079 Jul 28 06:30:16 PM PDT 24 Jul 28 07:38:08 PM PDT 24 49178421170 ps
T558 /workspace/coverage/default/37.sram_ctrl_executable.566366557 Jul 28 06:35:17 PM PDT 24 Jul 28 06:50:38 PM PDT 24 289383269985 ps
T559 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2350399673 Jul 28 06:32:36 PM PDT 24 Jul 28 06:34:09 PM PDT 24 266834318 ps
T560 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.4026714419 Jul 28 06:32:15 PM PDT 24 Jul 28 06:32:25 PM PDT 24 1495059193 ps
T561 /workspace/coverage/default/26.sram_ctrl_smoke.326842771 Jul 28 06:31:51 PM PDT 24 Jul 28 06:33:16 PM PDT 24 495486961 ps
T562 /workspace/coverage/default/2.sram_ctrl_mem_walk.2557745793 Jul 28 06:25:00 PM PDT 24 Jul 28 06:25:05 PM PDT 24 337011678 ps
T563 /workspace/coverage/default/34.sram_ctrl_max_throughput.2839115612 Jul 28 06:34:20 PM PDT 24 Jul 28 06:36:20 PM PDT 24 139739207 ps
T564 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.280412739 Jul 28 06:36:46 PM PDT 24 Jul 28 06:48:39 PM PDT 24 3198133399 ps
T565 /workspace/coverage/default/25.sram_ctrl_alert_test.822341147 Jul 28 06:31:49 PM PDT 24 Jul 28 06:31:49 PM PDT 24 12323054 ps
T566 /workspace/coverage/default/13.sram_ctrl_regwen.600655285 Jul 28 06:27:58 PM PDT 24 Jul 28 06:49:59 PM PDT 24 4979838089 ps
T567 /workspace/coverage/default/14.sram_ctrl_multiple_keys.3178672505 Jul 28 06:28:14 PM PDT 24 Jul 28 06:34:50 PM PDT 24 190867796803 ps
T568 /workspace/coverage/default/41.sram_ctrl_max_throughput.807404344 Jul 28 06:36:10 PM PDT 24 Jul 28 06:38:28 PM PDT 24 143915476 ps
T569 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.3586037169 Jul 28 06:25:31 PM PDT 24 Jul 28 06:27:55 PM PDT 24 7467381426 ps
T570 /workspace/coverage/default/28.sram_ctrl_multiple_keys.1284628854 Jul 28 06:32:16 PM PDT 24 Jul 28 06:40:36 PM PDT 24 10465970456 ps
T571 /workspace/coverage/default/24.sram_ctrl_regwen.4272591531 Jul 28 06:31:25 PM PDT 24 Jul 28 06:31:56 PM PDT 24 507409260 ps
T572 /workspace/coverage/default/35.sram_ctrl_mem_walk.3117967320 Jul 28 06:34:39 PM PDT 24 Jul 28 06:34:48 PM PDT 24 999441768 ps
T573 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.2401738605 Jul 28 06:31:08 PM PDT 24 Jul 28 06:31:12 PM PDT 24 66367567 ps
T574 /workspace/coverage/default/10.sram_ctrl_regwen.2969556329 Jul 28 06:27:02 PM PDT 24 Jul 28 06:31:37 PM PDT 24 977670123 ps
T575 /workspace/coverage/default/27.sram_ctrl_stress_all.4080153698 Jul 28 06:32:11 PM PDT 24 Jul 28 07:29:17 PM PDT 24 12402123496 ps
T576 /workspace/coverage/default/21.sram_ctrl_regwen.2334423111 Jul 28 06:30:30 PM PDT 24 Jul 28 06:46:07 PM PDT 24 10441561365 ps
T577 /workspace/coverage/default/6.sram_ctrl_regwen.1078564707 Jul 28 06:25:55 PM PDT 24 Jul 28 06:38:51 PM PDT 24 13261828925 ps
T578 /workspace/coverage/default/25.sram_ctrl_multiple_keys.3260213688 Jul 28 06:31:32 PM PDT 24 Jul 28 06:45:25 PM PDT 24 5471804551 ps
T579 /workspace/coverage/default/37.sram_ctrl_partial_access.1163728253 Jul 28 06:35:03 PM PDT 24 Jul 28 06:35:05 PM PDT 24 179786124 ps
T580 /workspace/coverage/default/11.sram_ctrl_mem_walk.548061854 Jul 28 06:27:23 PM PDT 24 Jul 28 06:27:29 PM PDT 24 459402456 ps
T581 /workspace/coverage/default/11.sram_ctrl_stress_all.3752801730 Jul 28 06:27:24 PM PDT 24 Jul 28 06:52:45 PM PDT 24 125446217901 ps
T582 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.958195791 Jul 28 06:37:04 PM PDT 24 Jul 28 06:56:25 PM PDT 24 3794871221 ps
T583 /workspace/coverage/default/22.sram_ctrl_regwen.2413665265 Jul 28 06:30:52 PM PDT 24 Jul 28 06:47:21 PM PDT 24 55109387588 ps
T584 /workspace/coverage/default/37.sram_ctrl_ram_cfg.2805726764 Jul 28 06:35:17 PM PDT 24 Jul 28 06:35:18 PM PDT 24 25499416 ps
T585 /workspace/coverage/default/47.sram_ctrl_mem_walk.4022825806 Jul 28 06:38:05 PM PDT 24 Jul 28 06:38:11 PM PDT 24 156990269 ps
T586 /workspace/coverage/default/34.sram_ctrl_stress_all.3177088057 Jul 28 06:34:22 PM PDT 24 Jul 28 07:34:46 PM PDT 24 239752438495 ps
T587 /workspace/coverage/default/26.sram_ctrl_lc_escalation.1982024553 Jul 28 06:31:55 PM PDT 24 Jul 28 06:31:59 PM PDT 24 762235922 ps
T588 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.3037385822 Jul 28 06:31:59 PM PDT 24 Jul 28 06:48:16 PM PDT 24 6338325727 ps
T589 /workspace/coverage/default/3.sram_ctrl_lc_escalation.1981961406 Jul 28 06:25:11 PM PDT 24 Jul 28 06:25:15 PM PDT 24 705977878 ps
T590 /workspace/coverage/default/26.sram_ctrl_stress_all.3262221264 Jul 28 06:32:06 PM PDT 24 Jul 28 06:38:21 PM PDT 24 3806346145 ps
T591 /workspace/coverage/default/16.sram_ctrl_smoke.4180151748 Jul 28 06:28:52 PM PDT 24 Jul 28 06:30:01 PM PDT 24 594775325 ps
T592 /workspace/coverage/default/26.sram_ctrl_alert_test.455904443 Jul 28 06:32:03 PM PDT 24 Jul 28 06:32:04 PM PDT 24 20702523 ps
T593 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2658742665 Jul 28 06:26:43 PM PDT 24 Jul 28 06:31:02 PM PDT 24 5873210118 ps
T594 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1451793165 Jul 28 06:33:57 PM PDT 24 Jul 28 06:35:32 PM PDT 24 451150335 ps
T595 /workspace/coverage/default/3.sram_ctrl_smoke.3658795909 Jul 28 06:25:05 PM PDT 24 Jul 28 06:27:41 PM PDT 24 1484577838 ps
T596 /workspace/coverage/default/46.sram_ctrl_partial_access.1259619274 Jul 28 06:37:39 PM PDT 24 Jul 28 06:37:55 PM PDT 24 89682810 ps
T597 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.69711372 Jul 28 06:25:15 PM PDT 24 Jul 28 06:25:18 PM PDT 24 176909571 ps
T598 /workspace/coverage/default/44.sram_ctrl_max_throughput.2619231338 Jul 28 06:36:55 PM PDT 24 Jul 28 06:38:03 PM PDT 24 1006097161 ps
T599 /workspace/coverage/default/30.sram_ctrl_smoke.2662332770 Jul 28 06:32:51 PM PDT 24 Jul 28 06:33:30 PM PDT 24 388611636 ps
T600 /workspace/coverage/default/29.sram_ctrl_partial_access.559942 Jul 28 06:32:38 PM PDT 24 Jul 28 06:32:58 PM PDT 24 1125579905 ps
T601 /workspace/coverage/default/36.sram_ctrl_ram_cfg.1918644064 Jul 28 06:34:56 PM PDT 24 Jul 28 06:34:57 PM PDT 24 84070285 ps
T602 /workspace/coverage/default/40.sram_ctrl_max_throughput.1571238071 Jul 28 06:35:57 PM PDT 24 Jul 28 06:37:22 PM PDT 24 122560463 ps
T33 /workspace/coverage/default/2.sram_ctrl_sec_cm.2488633527 Jul 28 06:25:04 PM PDT 24 Jul 28 06:25:08 PM PDT 24 1048838531 ps
T603 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.940197231 Jul 28 06:29:26 PM PDT 24 Jul 28 06:29:31 PM PDT 24 135630693 ps
T604 /workspace/coverage/default/9.sram_ctrl_regwen.1397680840 Jul 28 06:26:43 PM PDT 24 Jul 28 06:31:41 PM PDT 24 4612672200 ps
T605 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1900793691 Jul 28 06:27:36 PM PDT 24 Jul 28 06:28:41 PM PDT 24 123295013 ps
T606 /workspace/coverage/default/36.sram_ctrl_mem_walk.93143411 Jul 28 06:34:57 PM PDT 24 Jul 28 06:35:02 PM PDT 24 295019713 ps
T607 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.645181759 Jul 28 06:27:20 PM PDT 24 Jul 28 06:48:24 PM PDT 24 16600864386 ps
T608 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.3716405837 Jul 28 06:30:55 PM PDT 24 Jul 28 06:34:47 PM PDT 24 23314907999 ps
T609 /workspace/coverage/default/6.sram_ctrl_mem_walk.324957690 Jul 28 06:25:57 PM PDT 24 Jul 28 06:26:03 PM PDT 24 1655228413 ps
T610 /workspace/coverage/default/25.sram_ctrl_bijection.2163053578 Jul 28 06:31:35 PM PDT 24 Jul 28 06:32:04 PM PDT 24 440260333 ps
T611 /workspace/coverage/default/6.sram_ctrl_stress_all.1385875617 Jul 28 06:25:56 PM PDT 24 Jul 28 07:04:42 PM PDT 24 48220959576 ps
T612 /workspace/coverage/default/45.sram_ctrl_smoke.2262772171 Jul 28 06:37:15 PM PDT 24 Jul 28 06:38:04 PM PDT 24 2401643899 ps
T613 /workspace/coverage/default/5.sram_ctrl_partial_access.1759870264 Jul 28 06:25:34 PM PDT 24 Jul 28 06:25:45 PM PDT 24 613706328 ps
T614 /workspace/coverage/default/32.sram_ctrl_multiple_keys.865038315 Jul 28 06:33:35 PM PDT 24 Jul 28 06:51:27 PM PDT 24 4109912957 ps
T615 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.3388314231 Jul 28 06:33:09 PM PDT 24 Jul 28 06:39:25 PM PDT 24 1086113618 ps
T616 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2741886752 Jul 28 06:36:56 PM PDT 24 Jul 28 06:39:40 PM PDT 24 95941686350 ps
T617 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.1068817461 Jul 28 06:30:48 PM PDT 24 Jul 28 06:32:53 PM PDT 24 166417867 ps
T618 /workspace/coverage/default/45.sram_ctrl_mem_walk.663422014 Jul 28 06:37:28 PM PDT 24 Jul 28 06:37:33 PM PDT 24 99052584 ps
T619 /workspace/coverage/default/28.sram_ctrl_max_throughput.4021811761 Jul 28 06:32:20 PM PDT 24 Jul 28 06:32:40 PM PDT 24 419523939 ps
T620 /workspace/coverage/default/40.sram_ctrl_smoke.2251741104 Jul 28 06:35:51 PM PDT 24 Jul 28 06:36:05 PM PDT 24 581932474 ps
T621 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.1280940304 Jul 28 06:24:34 PM PDT 24 Jul 28 06:24:39 PM PDT 24 453620166 ps
T622 /workspace/coverage/default/44.sram_ctrl_mem_walk.1477898625 Jul 28 06:37:10 PM PDT 24 Jul 28 06:37:19 PM PDT 24 550680832 ps
T623 /workspace/coverage/default/49.sram_ctrl_executable.3237731468 Jul 28 06:38:32 PM PDT 24 Jul 28 06:48:04 PM PDT 24 26299709875 ps
T624 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.2951648613 Jul 28 06:31:58 PM PDT 24 Jul 28 06:32:03 PM PDT 24 95389312 ps
T625 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.2671565720 Jul 28 06:30:13 PM PDT 24 Jul 28 06:34:42 PM PDT 24 11053332281 ps
T626 /workspace/coverage/default/17.sram_ctrl_partial_access.3474813231 Jul 28 06:29:14 PM PDT 24 Jul 28 06:30:39 PM PDT 24 727348947 ps
T627 /workspace/coverage/default/25.sram_ctrl_regwen.2292525845 Jul 28 06:31:38 PM PDT 24 Jul 28 06:39:26 PM PDT 24 2713737646 ps
T628 /workspace/coverage/default/38.sram_ctrl_alert_test.510962820 Jul 28 06:35:36 PM PDT 24 Jul 28 06:35:36 PM PDT 24 29923890 ps
T629 /workspace/coverage/default/27.sram_ctrl_ram_cfg.1631953550 Jul 28 06:32:06 PM PDT 24 Jul 28 06:32:07 PM PDT 24 30863638 ps
T630 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.3783359671 Jul 28 06:35:25 PM PDT 24 Jul 28 06:37:11 PM PDT 24 1477238857 ps
T631 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.910041018 Jul 28 06:30:42 PM PDT 24 Jul 28 06:35:29 PM PDT 24 3152355191 ps
T632 /workspace/coverage/default/0.sram_ctrl_mem_walk.2344954872 Jul 28 06:24:36 PM PDT 24 Jul 28 06:24:42 PM PDT 24 347484666 ps
T633 /workspace/coverage/default/16.sram_ctrl_mem_walk.277316883 Jul 28 06:29:08 PM PDT 24 Jul 28 06:29:16 PM PDT 24 138487809 ps
T634 /workspace/coverage/default/42.sram_ctrl_max_throughput.3623023517 Jul 28 06:36:24 PM PDT 24 Jul 28 06:37:04 PM PDT 24 99733697 ps
T635 /workspace/coverage/default/21.sram_ctrl_alert_test.1012271892 Jul 28 06:30:40 PM PDT 24 Jul 28 06:30:41 PM PDT 24 46047453 ps
T636 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.2291311874 Jul 28 06:28:21 PM PDT 24 Jul 28 06:31:19 PM PDT 24 2821607182 ps
T637 /workspace/coverage/default/5.sram_ctrl_mem_walk.1854603623 Jul 28 06:25:41 PM PDT 24 Jul 28 06:25:51 PM PDT 24 349773906 ps
T638 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.3479294713 Jul 28 06:26:43 PM PDT 24 Jul 28 06:26:47 PM PDT 24 93081124 ps
T639 /workspace/coverage/default/13.sram_ctrl_max_throughput.417314032 Jul 28 06:27:54 PM PDT 24 Jul 28 06:28:02 PM PDT 24 124275818 ps
T640 /workspace/coverage/default/20.sram_ctrl_smoke.900069291 Jul 28 06:30:09 PM PDT 24 Jul 28 06:30:21 PM PDT 24 750120445 ps
T641 /workspace/coverage/default/10.sram_ctrl_executable.871281704 Jul 28 06:27:05 PM PDT 24 Jul 28 06:44:54 PM PDT 24 13560704953 ps
T642 /workspace/coverage/default/47.sram_ctrl_bijection.325731040 Jul 28 06:37:51 PM PDT 24 Jul 28 06:38:24 PM PDT 24 1072330519 ps
T643 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.4182374403 Jul 28 06:25:37 PM PDT 24 Jul 28 06:26:14 PM PDT 24 705904670 ps
T644 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3894062791 Jul 28 06:29:36 PM PDT 24 Jul 28 06:29:38 PM PDT 24 168053794 ps
T645 /workspace/coverage/default/18.sram_ctrl_lc_escalation.144794342 Jul 28 06:29:41 PM PDT 24 Jul 28 06:29:42 PM PDT 24 497359658 ps
T646 /workspace/coverage/default/48.sram_ctrl_stress_all.2155607151 Jul 28 06:38:19 PM PDT 24 Jul 28 07:18:38 PM PDT 24 10871913137 ps
T647 /workspace/coverage/default/46.sram_ctrl_ram_cfg.1385810907 Jul 28 06:37:46 PM PDT 24 Jul 28 06:37:47 PM PDT 24 28467622 ps
T648 /workspace/coverage/default/37.sram_ctrl_alert_test.1576273643 Jul 28 06:35:23 PM PDT 24 Jul 28 06:35:24 PM PDT 24 45238995 ps
T649 /workspace/coverage/default/6.sram_ctrl_executable.1457246336 Jul 28 06:25:55 PM PDT 24 Jul 28 06:34:51 PM PDT 24 12832115314 ps
T650 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1420259700 Jul 28 06:25:34 PM PDT 24 Jul 28 06:31:32 PM PDT 24 4567699430 ps
T651 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.3059082427 Jul 28 06:34:34 PM PDT 24 Jul 28 06:37:12 PM PDT 24 1085663736 ps
T652 /workspace/coverage/default/14.sram_ctrl_partial_access.1422622965 Jul 28 06:28:21 PM PDT 24 Jul 28 06:28:27 PM PDT 24 68876192 ps
T653 /workspace/coverage/default/36.sram_ctrl_lc_escalation.2213546473 Jul 28 06:34:55 PM PDT 24 Jul 28 06:35:05 PM PDT 24 717811826 ps
T654 /workspace/coverage/default/1.sram_ctrl_regwen.3429563604 Jul 28 06:24:39 PM PDT 24 Jul 28 06:48:29 PM PDT 24 3532603712 ps
T655 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3495395228 Jul 28 06:38:05 PM PDT 24 Jul 28 06:38:16 PM PDT 24 1303933493 ps
T656 /workspace/coverage/default/42.sram_ctrl_alert_test.37923377 Jul 28 06:36:38 PM PDT 24 Jul 28 06:36:38 PM PDT 24 28291401 ps
T657 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.4294810045 Jul 28 06:38:14 PM PDT 24 Jul 28 06:38:51 PM PDT 24 422499009 ps
T658 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.3536562678 Jul 28 06:35:58 PM PDT 24 Jul 28 06:40:52 PM PDT 24 11697610743 ps
T659 /workspace/coverage/default/49.sram_ctrl_lc_escalation.4266337873 Jul 28 06:38:34 PM PDT 24 Jul 28 06:38:36 PM PDT 24 178582409 ps
T660 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.1459394932 Jul 28 06:33:15 PM PDT 24 Jul 28 06:38:00 PM PDT 24 9083689451 ps
T661 /workspace/coverage/default/17.sram_ctrl_smoke.1412875181 Jul 28 06:29:11 PM PDT 24 Jul 28 06:30:50 PM PDT 24 612656646 ps
T662 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2788513617 Jul 28 06:24:45 PM PDT 24 Jul 28 06:25:34 PM PDT 24 2233945407 ps
T663 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.722097605 Jul 28 06:29:23 PM PDT 24 Jul 28 06:33:48 PM PDT 24 14800118256 ps
T664 /workspace/coverage/default/32.sram_ctrl_smoke.2219707374 Jul 28 06:33:35 PM PDT 24 Jul 28 06:33:47 PM PDT 24 2237176125 ps
T665 /workspace/coverage/default/47.sram_ctrl_partial_access.3664416954 Jul 28 06:37:54 PM PDT 24 Jul 28 06:38:02 PM PDT 24 473003139 ps
T666 /workspace/coverage/default/3.sram_ctrl_mem_walk.2027780476 Jul 28 06:25:10 PM PDT 24 Jul 28 06:25:21 PM PDT 24 597556078 ps
T667 /workspace/coverage/default/36.sram_ctrl_smoke.225737017 Jul 28 06:34:48 PM PDT 24 Jul 28 06:36:47 PM PDT 24 679460185 ps
T668 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1595470302 Jul 28 06:28:22 PM PDT 24 Jul 28 06:29:52 PM PDT 24 265124547 ps
T669 /workspace/coverage/default/27.sram_ctrl_max_throughput.958210697 Jul 28 06:32:07 PM PDT 24 Jul 28 06:34:20 PM PDT 24 990935586 ps
T670 /workspace/coverage/default/36.sram_ctrl_partial_access.1380721210 Jul 28 06:34:52 PM PDT 24 Jul 28 06:35:25 PM PDT 24 153838650 ps
T671 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.1247264367 Jul 28 06:30:13 PM PDT 24 Jul 28 06:36:11 PM PDT 24 13563228346 ps
T672 /workspace/coverage/default/7.sram_ctrl_ram_cfg.685154306 Jul 28 06:26:11 PM PDT 24 Jul 28 06:26:12 PM PDT 24 38891846 ps
T673 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3481596771 Jul 28 06:25:42 PM PDT 24 Jul 28 06:25:47 PM PDT 24 100040355 ps
T674 /workspace/coverage/default/9.sram_ctrl_executable.3736738065 Jul 28 06:26:46 PM PDT 24 Jul 28 06:44:27 PM PDT 24 13509198137 ps
T675 /workspace/coverage/default/34.sram_ctrl_smoke.1556022906 Jul 28 06:34:10 PM PDT 24 Jul 28 06:34:25 PM PDT 24 3164653599 ps
T676 /workspace/coverage/default/4.sram_ctrl_multiple_keys.1543668108 Jul 28 06:25:20 PM PDT 24 Jul 28 06:29:15 PM PDT 24 30107686219 ps
T677 /workspace/coverage/default/46.sram_ctrl_lc_escalation.3448646252 Jul 28 06:37:40 PM PDT 24 Jul 28 06:37:46 PM PDT 24 568010806 ps
T678 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3007232086 Jul 28 06:27:14 PM PDT 24 Jul 28 06:29:43 PM PDT 24 203766070 ps
T679 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.832320389 Jul 28 06:34:05 PM PDT 24 Jul 28 06:34:10 PM PDT 24 610832977 ps
T680 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1729877999 Jul 28 06:24:28 PM PDT 24 Jul 28 06:26:13 PM PDT 24 183287606 ps
T681 /workspace/coverage/default/11.sram_ctrl_smoke.2452934454 Jul 28 06:27:09 PM PDT 24 Jul 28 06:27:21 PM PDT 24 467080849 ps
T682 /workspace/coverage/default/2.sram_ctrl_smoke.3935693573 Jul 28 06:24:51 PM PDT 24 Jul 28 06:24:53 PM PDT 24 91703432 ps
T683 /workspace/coverage/default/9.sram_ctrl_bijection.3035308441 Jul 28 06:26:32 PM PDT 24 Jul 28 06:27:18 PM PDT 24 2936205637 ps
T125 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.703075404 Jul 28 06:25:19 PM PDT 24 Jul 28 06:26:23 PM PDT 24 7046923527 ps
T684 /workspace/coverage/default/18.sram_ctrl_bijection.1816306708 Jul 28 06:29:30 PM PDT 24 Jul 28 06:30:50 PM PDT 24 5133617952 ps
T685 /workspace/coverage/default/0.sram_ctrl_bijection.100094211 Jul 28 06:24:25 PM PDT 24 Jul 28 06:25:35 PM PDT 24 1185127802 ps
T686 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.4112618059 Jul 28 06:30:18 PM PDT 24 Jul 28 06:30:24 PM PDT 24 1722663175 ps
T687 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.3800936188 Jul 28 06:35:48 PM PDT 24 Jul 28 06:37:56 PM PDT 24 1132926509 ps
T688 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.3126770263 Jul 28 06:27:35 PM PDT 24 Jul 28 06:43:22 PM PDT 24 6254086602 ps
T689 /workspace/coverage/default/28.sram_ctrl_stress_all.1735643820 Jul 28 06:32:29 PM PDT 24 Jul 28 06:57:40 PM PDT 24 20656587955 ps
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T691 /workspace/coverage/default/23.sram_ctrl_lc_escalation.2861220216 Jul 28 06:31:02 PM PDT 24 Jul 28 06:31:09 PM PDT 24 513119459 ps
T692 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.4250303075 Jul 28 06:37:43 PM PDT 24 Jul 28 06:40:05 PM PDT 24 8233732241 ps
T693 /workspace/coverage/default/34.sram_ctrl_alert_test.1148381981 Jul 28 06:34:23 PM PDT 24 Jul 28 06:34:24 PM PDT 24 47557009 ps
T694 /workspace/coverage/default/49.sram_ctrl_max_throughput.2635162597 Jul 28 06:38:35 PM PDT 24 Jul 28 06:38:58 PM PDT 24 148647707 ps
T695 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.3126424073 Jul 28 06:35:16 PM PDT 24 Jul 28 06:45:28 PM PDT 24 8294880410 ps
T696 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.1853542515 Jul 28 06:34:53 PM PDT 24 Jul 28 06:49:00 PM PDT 24 4179358112 ps
T697 /workspace/coverage/default/5.sram_ctrl_bijection.3040609051 Jul 28 06:25:30 PM PDT 24 Jul 28 06:26:08 PM PDT 24 677301847 ps
T698 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2524133014 Jul 28 06:30:35 PM PDT 24 Jul 28 06:32:04 PM PDT 24 826721528 ps
T699 /workspace/coverage/default/24.sram_ctrl_max_throughput.1309036803 Jul 28 06:31:21 PM PDT 24 Jul 28 06:32:46 PM PDT 24 111860680 ps
T700 /workspace/coverage/default/36.sram_ctrl_multiple_keys.1699136267 Jul 28 06:34:47 PM PDT 24 Jul 28 06:38:43 PM PDT 24 1168402838 ps
T701 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.1058426935 Jul 28 06:31:38 PM PDT 24 Jul 28 06:44:43 PM PDT 24 10433235991 ps
T702 /workspace/coverage/default/34.sram_ctrl_multiple_keys.4267065903 Jul 28 06:34:12 PM PDT 24 Jul 28 06:41:56 PM PDT 24 30918975201 ps
T703 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.1056598312 Jul 28 06:34:27 PM PDT 24 Jul 28 06:37:09 PM PDT 24 6271189672 ps
T704 /workspace/coverage/default/11.sram_ctrl_alert_test.3217835897 Jul 28 06:27:28 PM PDT 24 Jul 28 06:27:29 PM PDT 24 72466856 ps
T705 /workspace/coverage/default/1.sram_ctrl_smoke.67102924 Jul 28 06:24:35 PM PDT 24 Jul 28 06:24:41 PM PDT 24 461140908 ps
T706 /workspace/coverage/default/42.sram_ctrl_partial_access.1650357068 Jul 28 06:36:23 PM PDT 24 Jul 28 06:36:34 PM PDT 24 374787129 ps
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T708 /workspace/coverage/default/5.sram_ctrl_max_throughput.514290761 Jul 28 06:25:35 PM PDT 24 Jul 28 06:25:43 PM PDT 24 136595473 ps
T709 /workspace/coverage/default/39.sram_ctrl_bijection.1713902625 Jul 28 06:35:40 PM PDT 24 Jul 28 06:36:04 PM PDT 24 4572600292 ps
T710 /workspace/coverage/default/19.sram_ctrl_partial_access.2187802788 Jul 28 06:29:56 PM PDT 24 Jul 28 06:29:58 PM PDT 24 48778454 ps
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T712 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.148815572 Jul 28 06:32:56 PM PDT 24 Jul 28 06:33:12 PM PDT 24 311057018 ps
T713 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.3904625029 Jul 28 06:37:34 PM PDT 24 Jul 28 06:37:37 PM PDT 24 1317632907 ps
T714 /workspace/coverage/default/31.sram_ctrl_bijection.1590826208 Jul 28 06:33:15 PM PDT 24 Jul 28 06:33:46 PM PDT 24 946518743 ps
T715 /workspace/coverage/default/28.sram_ctrl_regwen.279525524 Jul 28 06:32:26 PM PDT 24 Jul 28 06:45:04 PM PDT 24 18274197525 ps
T716 /workspace/coverage/default/8.sram_ctrl_smoke.1709951479 Jul 28 06:26:09 PM PDT 24 Jul 28 06:26:10 PM PDT 24 49224687 ps
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T718 /workspace/coverage/default/43.sram_ctrl_max_throughput.1593898751 Jul 28 06:36:46 PM PDT 24 Jul 28 06:37:46 PM PDT 24 215539527 ps
T719 /workspace/coverage/default/38.sram_ctrl_ram_cfg.2140350999 Jul 28 06:35:30 PM PDT 24 Jul 28 06:35:31 PM PDT 24 32701387 ps
T720 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.2101762430 Jul 28 06:31:32 PM PDT 24 Jul 28 06:39:00 PM PDT 24 120485445632 ps
T721 /workspace/coverage/default/31.sram_ctrl_partial_access.3138860745 Jul 28 06:33:22 PM PDT 24 Jul 28 06:34:24 PM PDT 24 330890063 ps
T722 /workspace/coverage/default/25.sram_ctrl_executable.2185192888 Jul 28 06:31:41 PM PDT 24 Jul 28 06:51:13 PM PDT 24 10310849056 ps
T723 /workspace/coverage/default/48.sram_ctrl_bijection.62869577 Jul 28 06:38:10 PM PDT 24 Jul 28 06:39:11 PM PDT 24 3530232604 ps
T724 /workspace/coverage/default/19.sram_ctrl_multiple_keys.1863251445 Jul 28 06:29:47 PM PDT 24 Jul 28 06:31:03 PM PDT 24 2810693243 ps
T725 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.873435446 Jul 28 06:29:06 PM PDT 24 Jul 28 06:39:35 PM PDT 24 3362033372 ps
T726 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.1861034078 Jul 28 06:25:05 PM PDT 24 Jul 28 06:33:40 PM PDT 24 20595972997 ps
T727 /workspace/coverage/default/9.sram_ctrl_smoke.4244420913 Jul 28 06:26:31 PM PDT 24 Jul 28 06:26:44 PM PDT 24 2977169581 ps
T728 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.584927838 Jul 28 06:32:50 PM PDT 24 Jul 28 06:37:32 PM PDT 24 11973587929 ps
T729 /workspace/coverage/default/7.sram_ctrl_multiple_keys.1216288604 Jul 28 06:26:00 PM PDT 24 Jul 28 06:41:01 PM PDT 24 37330442562 ps
T730 /workspace/coverage/default/19.sram_ctrl_executable.4120573220 Jul 28 06:29:59 PM PDT 24 Jul 28 06:35:39 PM PDT 24 28353225847 ps
T731 /workspace/coverage/default/33.sram_ctrl_smoke.4258899306 Jul 28 06:33:44 PM PDT 24 Jul 28 06:33:52 PM PDT 24 1380874139 ps
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T733 /workspace/coverage/default/43.sram_ctrl_smoke.672559660 Jul 28 06:36:38 PM PDT 24 Jul 28 06:38:47 PM PDT 24 548667013 ps
T734 /workspace/coverage/default/5.sram_ctrl_multiple_keys.181257148 Jul 28 06:25:30 PM PDT 24 Jul 28 06:39:28 PM PDT 24 61856069272 ps
T735 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3424623005 Jul 28 06:33:23 PM PDT 24 Jul 28 06:33:24 PM PDT 24 33417462 ps
T736 /workspace/coverage/default/27.sram_ctrl_lc_escalation.4106778537 Jul 28 06:32:07 PM PDT 24 Jul 28 06:32:11 PM PDT 24 247532326 ps
T737 /workspace/coverage/default/24.sram_ctrl_partial_access.3561318750 Jul 28 06:31:20 PM PDT 24 Jul 28 06:31:23 PM PDT 24 490370199 ps
T738 /workspace/coverage/default/47.sram_ctrl_max_throughput.474466594 Jul 28 06:37:51 PM PDT 24 Jul 28 06:39:26 PM PDT 24 266203363 ps
T739 /workspace/coverage/default/25.sram_ctrl_lc_escalation.1951027931 Jul 28 06:31:37 PM PDT 24 Jul 28 06:31:38 PM PDT 24 230000693 ps
T740 /workspace/coverage/default/1.sram_ctrl_max_throughput.3205623351 Jul 28 06:24:41 PM PDT 24 Jul 28 06:25:13 PM PDT 24 354242858 ps
T741 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.374741461 Jul 28 06:36:39 PM PDT 24 Jul 28 06:41:19 PM PDT 24 21232531327 ps
T742 /workspace/coverage/default/43.sram_ctrl_alert_test.3324653418 Jul 28 06:36:51 PM PDT 24 Jul 28 06:36:51 PM PDT 24 28016242 ps
T743 /workspace/coverage/default/27.sram_ctrl_alert_test.2221194348 Jul 28 06:32:12 PM PDT 24 Jul 28 06:32:13 PM PDT 24 95171819 ps
T744 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.3690706673 Jul 28 06:27:01 PM PDT 24 Jul 28 07:02:29 PM PDT 24 5404231230 ps
T745 /workspace/coverage/default/0.sram_ctrl_partial_access.1785937173 Jul 28 06:24:26 PM PDT 24 Jul 28 06:24:46 PM PDT 24 4028516996 ps
T746 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.149506166 Jul 28 06:37:21 PM PDT 24 Jul 28 06:42:38 PM PDT 24 77216063028 ps
T747 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.1269057383 Jul 28 06:25:05 PM PDT 24 Jul 28 06:31:00 PM PDT 24 3418650099 ps
T748 /workspace/coverage/default/8.sram_ctrl_alert_test.2681580603 Jul 28 06:26:31 PM PDT 24 Jul 28 06:26:32 PM PDT 24 16505815 ps
T749 /workspace/coverage/default/43.sram_ctrl_executable.494725787 Jul 28 06:36:47 PM PDT 24 Jul 28 06:39:25 PM PDT 24 3964134226 ps
T750 /workspace/coverage/default/45.sram_ctrl_regwen.3537010018 Jul 28 06:37:27 PM PDT 24 Jul 28 06:44:02 PM PDT 24 5436676018 ps
T751 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.2545821601 Jul 28 06:27:29 PM PDT 24 Jul 28 06:29:55 PM PDT 24 7736946223 ps
T752 /workspace/coverage/default/39.sram_ctrl_max_throughput.1886053974 Jul 28 06:35:41 PM PDT 24 Jul 28 06:37:16 PM PDT 24 260094246 ps
T753 /workspace/coverage/default/20.sram_ctrl_lc_escalation.3516179324 Jul 28 06:30:10 PM PDT 24 Jul 28 06:30:17 PM PDT 24 654578724 ps
T754 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.300584578 Jul 28 06:38:34 PM PDT 24 Jul 28 06:42:15 PM PDT 24 6237863020 ps
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T756 /workspace/coverage/default/47.sram_ctrl_alert_test.3538119495 Jul 28 06:38:04 PM PDT 24 Jul 28 06:38:05 PM PDT 24 27005855 ps
T757 /workspace/coverage/default/46.sram_ctrl_bijection.3643471177 Jul 28 06:37:35 PM PDT 24 Jul 28 06:38:12 PM PDT 24 1616878017 ps
T758 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.3518613449 Jul 28 06:37:52 PM PDT 24 Jul 28 06:42:46 PM PDT 24 17499146701 ps
T759 /workspace/coverage/default/39.sram_ctrl_multiple_keys.1325105887 Jul 28 06:35:36 PM PDT 24 Jul 28 06:56:08 PM PDT 24 37702381945 ps
T760 /workspace/coverage/default/8.sram_ctrl_lc_escalation.3557014163 Jul 28 06:26:20 PM PDT 24 Jul 28 06:26:26 PM PDT 24 633809941 ps
T761 /workspace/coverage/default/15.sram_ctrl_multiple_keys.4174891302 Jul 28 06:28:30 PM PDT 24 Jul 28 06:47:23 PM PDT 24 12945373364 ps
T762 /workspace/coverage/default/42.sram_ctrl_bijection.2632274035 Jul 28 06:36:21 PM PDT 24 Jul 28 06:37:36 PM PDT 24 9943256488 ps
T763 /workspace/coverage/default/49.sram_ctrl_multiple_keys.3370478414 Jul 28 06:38:27 PM PDT 24 Jul 28 06:52:38 PM PDT 24 26123761129 ps
T764 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.956667122 Jul 28 06:31:50 PM PDT 24 Jul 28 06:34:49 PM PDT 24 1891186628 ps
T765 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.3331040597 Jul 28 06:27:58 PM PDT 24 Jul 28 06:45:53 PM PDT 24 16211872482 ps
T766 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3615320425 Jul 28 06:31:25 PM PDT 24 Jul 28 06:39:05 PM PDT 24 4799583454 ps
T767 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.3002735837 Jul 28 06:29:43 PM PDT 24 Jul 28 06:29:49 PM PDT 24 792829473 ps
T768 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.944779365 Jul 28 06:38:05 PM PDT 24 Jul 28 06:38:11 PM PDT 24 390932112 ps
T769 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1178210319 Jul 28 06:35:49 PM PDT 24 Jul 28 06:35:56 PM PDT 24 210596292 ps
T770 /workspace/coverage/default/14.sram_ctrl_executable.289731818 Jul 28 06:28:22 PM PDT 24 Jul 28 06:41:31 PM PDT 24 70855351440 ps
T771 /workspace/coverage/default/7.sram_ctrl_regwen.4173468494 Jul 28 06:26:13 PM PDT 24 Jul 28 06:30:06 PM PDT 24 6202371185 ps
T772 /workspace/coverage/default/45.sram_ctrl_bijection.1698609932 Jul 28 06:37:16 PM PDT 24 Jul 28 06:38:34 PM PDT 24 17797397307 ps
T773 /workspace/coverage/default/30.sram_ctrl_partial_access.2372912945 Jul 28 06:32:50 PM PDT 24 Jul 28 06:35:13 PM PDT 24 4092058685 ps
T774 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.336970134 Jul 28 06:35:56 PM PDT 24 Jul 28 06:40:44 PM PDT 24 3803210798 ps
T775 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.2684494729 Jul 28 06:29:25 PM PDT 24 Jul 28 06:33:32 PM PDT 24 4984675919 ps
T776 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.1411852473 Jul 28 06:29:30 PM PDT 24 Jul 28 06:33:02 PM PDT 24 9262163110 ps
T777 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3531952261 Jul 28 06:26:30 PM PDT 24 Jul 28 06:32:56 PM PDT 24 3671099707 ps
T778 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.2151575080 Jul 28 06:24:45 PM PDT 24 Jul 28 06:24:49 PM PDT 24 219144486 ps
T779 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.3602251710 Jul 28 06:34:27 PM PDT 24 Jul 28 06:39:37 PM PDT 24 31203706245 ps
T780 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.522286566 Jul 28 06:26:20 PM PDT 24 Jul 28 06:30:32 PM PDT 24 5509851526 ps
T781 /workspace/coverage/default/8.sram_ctrl_executable.2440726574 Jul 28 06:26:21 PM PDT 24 Jul 28 06:44:48 PM PDT 24 18652747948 ps
T782 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.2612975592 Jul 28 06:34:40 PM PDT 24 Jul 28 06:34:42 PM PDT 24 492115839 ps
T783 /workspace/coverage/default/4.sram_ctrl_max_throughput.3304289149 Jul 28 06:25:23 PM PDT 24 Jul 28 06:25:25 PM PDT 24 136738829 ps
T784 /workspace/coverage/default/46.sram_ctrl_stress_all.961299024 Jul 28 06:37:44 PM PDT 24 Jul 28 07:30:23 PM PDT 24 43956655522 ps
T785 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2963326035 Jul 28 06:25:55 PM PDT 24 Jul 28 06:31:51 PM PDT 24 1145699237 ps
T786 /workspace/coverage/default/4.sram_ctrl_lc_escalation.2003614245 Jul 28 06:25:27 PM PDT 24 Jul 28 06:25:30 PM PDT 24 448219436 ps
T787 /workspace/coverage/default/17.sram_ctrl_multiple_keys.3188848123 Jul 28 06:29:13 PM PDT 24 Jul 28 06:42:51 PM PDT 24 3181406233 ps
T788 /workspace/coverage/default/2.sram_ctrl_regwen.2617740203 Jul 28 06:24:54 PM PDT 24 Jul 28 06:40:47 PM PDT 24 26792938434 ps
T789 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.238366140 Jul 28 06:26:41 PM PDT 24 Jul 28 06:48:08 PM PDT 24 5306057547 ps
T790 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.3950531909 Jul 28 06:34:23 PM PDT 24 Jul 28 06:34:29 PM PDT 24 177479769 ps
T791 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.4241509727 Jul 28 06:24:25 PM PDT 24 Jul 28 06:27:19 PM PDT 24 1849774721 ps
T792 /workspace/coverage/default/32.sram_ctrl_executable.528448554 Jul 28 06:33:45 PM PDT 24 Jul 28 06:48:43 PM PDT 24 16424297167 ps
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