Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.93 99.16 94.27 99.72 100.00 95.95 99.12 97.26


Total test records in report: 1018
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T312 /workspace/coverage/default/23.sram_ctrl_multiple_keys.495624358 Jul 29 07:37:37 PM PDT 24 Jul 29 08:00:15 PM PDT 24 14889788577 ps
T313 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2007194204 Jul 29 07:36:59 PM PDT 24 Jul 29 07:45:03 PM PDT 24 181618879818 ps
T314 /workspace/coverage/default/12.sram_ctrl_multiple_keys.2161987547 Jul 29 07:37:16 PM PDT 24 Jul 29 07:53:22 PM PDT 24 19694212659 ps
T315 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.1785199498 Jul 29 07:38:49 PM PDT 24 Jul 29 07:39:55 PM PDT 24 543877244 ps
T316 /workspace/coverage/default/36.sram_ctrl_regwen.2179173842 Jul 29 07:38:37 PM PDT 24 Jul 29 07:40:46 PM PDT 24 9168765791 ps
T317 /workspace/coverage/default/30.sram_ctrl_mem_walk.1758485079 Jul 29 07:38:19 PM PDT 24 Jul 29 07:38:28 PM PDT 24 136378585 ps
T318 /workspace/coverage/default/48.sram_ctrl_alert_test.1733870378 Jul 29 07:40:00 PM PDT 24 Jul 29 07:40:00 PM PDT 24 26264438 ps
T319 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2074380285 Jul 29 07:36:53 PM PDT 24 Jul 29 07:43:15 PM PDT 24 851040379 ps
T320 /workspace/coverage/default/41.sram_ctrl_stress_all.3575851516 Jul 29 07:39:07 PM PDT 24 Jul 29 09:11:30 PM PDT 24 15802774937 ps
T321 /workspace/coverage/default/21.sram_ctrl_executable.4050427549 Jul 29 07:37:48 PM PDT 24 Jul 29 07:56:02 PM PDT 24 18635771661 ps
T322 /workspace/coverage/default/24.sram_ctrl_ram_cfg.4070025683 Jul 29 07:37:38 PM PDT 24 Jul 29 07:37:39 PM PDT 24 29670788 ps
T323 /workspace/coverage/default/3.sram_ctrl_regwen.3266474898 Jul 29 07:36:48 PM PDT 24 Jul 29 07:51:19 PM PDT 24 13324304621 ps
T324 /workspace/coverage/default/36.sram_ctrl_stress_all.3263841375 Jul 29 07:38:40 PM PDT 24 Jul 29 08:34:02 PM PDT 24 25465189713 ps
T325 /workspace/coverage/default/0.sram_ctrl_stress_all.2333096046 Jul 29 07:36:48 PM PDT 24 Jul 29 08:39:22 PM PDT 24 151597462003 ps
T326 /workspace/coverage/default/27.sram_ctrl_bijection.551807179 Jul 29 07:37:59 PM PDT 24 Jul 29 07:38:57 PM PDT 24 917293709 ps
T327 /workspace/coverage/default/31.sram_ctrl_alert_test.4090917665 Jul 29 07:38:22 PM PDT 24 Jul 29 07:38:23 PM PDT 24 22143861 ps
T328 /workspace/coverage/default/32.sram_ctrl_alert_test.3623594295 Jul 29 07:38:24 PM PDT 24 Jul 29 07:38:25 PM PDT 24 14336696 ps
T329 /workspace/coverage/default/4.sram_ctrl_alert_test.2718124074 Jul 29 07:36:59 PM PDT 24 Jul 29 07:36:59 PM PDT 24 61244195 ps
T330 /workspace/coverage/default/31.sram_ctrl_stress_all.2064714225 Jul 29 07:38:19 PM PDT 24 Jul 29 08:17:31 PM PDT 24 36501225983 ps
T331 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.1921222458 Jul 29 07:37:00 PM PDT 24 Jul 29 07:37:24 PM PDT 24 571003282 ps
T332 /workspace/coverage/default/17.sram_ctrl_regwen.1254244418 Jul 29 07:37:33 PM PDT 24 Jul 29 07:59:16 PM PDT 24 50221710551 ps
T333 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.626329671 Jul 29 07:37:44 PM PDT 24 Jul 29 07:46:50 PM PDT 24 11681452330 ps
T334 /workspace/coverage/default/11.sram_ctrl_alert_test.3489909600 Jul 29 07:37:06 PM PDT 24 Jul 29 07:37:07 PM PDT 24 14883041 ps
T335 /workspace/coverage/default/25.sram_ctrl_executable.1008571820 Jul 29 07:37:49 PM PDT 24 Jul 29 07:53:33 PM PDT 24 50916304704 ps
T336 /workspace/coverage/default/8.sram_ctrl_partial_access.2393897764 Jul 29 07:37:03 PM PDT 24 Jul 29 07:37:21 PM PDT 24 932137964 ps
T337 /workspace/coverage/default/30.sram_ctrl_bijection.3598069128 Jul 29 07:38:16 PM PDT 24 Jul 29 07:38:41 PM PDT 24 806591271 ps
T338 /workspace/coverage/default/42.sram_ctrl_partial_access.1117831282 Jul 29 07:39:08 PM PDT 24 Jul 29 07:39:18 PM PDT 24 1801355623 ps
T339 /workspace/coverage/default/6.sram_ctrl_executable.3235367209 Jul 29 07:37:12 PM PDT 24 Jul 29 07:49:07 PM PDT 24 11945312437 ps
T340 /workspace/coverage/default/17.sram_ctrl_mem_walk.3993219868 Jul 29 07:37:31 PM PDT 24 Jul 29 07:37:41 PM PDT 24 288061621 ps
T341 /workspace/coverage/default/34.sram_ctrl_ram_cfg.3561764603 Jul 29 07:38:36 PM PDT 24 Jul 29 07:38:37 PM PDT 24 29638196 ps
T342 /workspace/coverage/default/37.sram_ctrl_mem_walk.3128950278 Jul 29 07:38:40 PM PDT 24 Jul 29 07:38:46 PM PDT 24 469111739 ps
T343 /workspace/coverage/default/18.sram_ctrl_lc_escalation.3480976565 Jul 29 07:37:32 PM PDT 24 Jul 29 07:37:38 PM PDT 24 513533367 ps
T344 /workspace/coverage/default/3.sram_ctrl_bijection.2185884864 Jul 29 07:36:46 PM PDT 24 Jul 29 07:37:20 PM PDT 24 563622618 ps
T345 /workspace/coverage/default/26.sram_ctrl_multiple_keys.1041178187 Jul 29 07:37:46 PM PDT 24 Jul 29 07:46:49 PM PDT 24 8492308567 ps
T346 /workspace/coverage/default/45.sram_ctrl_lc_escalation.42265833 Jul 29 07:39:29 PM PDT 24 Jul 29 07:39:30 PM PDT 24 145877623 ps
T347 /workspace/coverage/default/41.sram_ctrl_alert_test.2733755025 Jul 29 07:39:07 PM PDT 24 Jul 29 07:39:08 PM PDT 24 14524398 ps
T348 /workspace/coverage/default/41.sram_ctrl_partial_access.3830198470 Jul 29 07:39:06 PM PDT 24 Jul 29 07:39:19 PM PDT 24 1334875972 ps
T349 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2368421173 Jul 29 07:38:13 PM PDT 24 Jul 29 07:46:01 PM PDT 24 19870691873 ps
T350 /workspace/coverage/default/26.sram_ctrl_smoke.104859760 Jul 29 07:37:49 PM PDT 24 Jul 29 07:38:08 PM PDT 24 3031556735 ps
T351 /workspace/coverage/default/33.sram_ctrl_lc_escalation.655944644 Jul 29 07:38:28 PM PDT 24 Jul 29 07:38:32 PM PDT 24 450511965 ps
T352 /workspace/coverage/default/17.sram_ctrl_partial_access.508458633 Jul 29 07:37:34 PM PDT 24 Jul 29 07:38:40 PM PDT 24 1000307709 ps
T353 /workspace/coverage/default/30.sram_ctrl_smoke.3120450430 Jul 29 07:38:13 PM PDT 24 Jul 29 07:38:22 PM PDT 24 590625089 ps
T354 /workspace/coverage/default/18.sram_ctrl_ram_cfg.868802362 Jul 29 07:37:33 PM PDT 24 Jul 29 07:37:34 PM PDT 24 35151666 ps
T355 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.2400554271 Jul 29 07:38:12 PM PDT 24 Jul 29 07:56:08 PM PDT 24 20549207748 ps
T356 /workspace/coverage/default/9.sram_ctrl_executable.3131074680 Jul 29 07:37:03 PM PDT 24 Jul 29 07:49:12 PM PDT 24 108238648314 ps
T357 /workspace/coverage/default/2.sram_ctrl_regwen.1253429073 Jul 29 07:36:59 PM PDT 24 Jul 29 07:44:23 PM PDT 24 16928211221 ps
T358 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2315512034 Jul 29 07:37:26 PM PDT 24 Jul 29 07:39:11 PM PDT 24 142596235 ps
T359 /workspace/coverage/default/25.sram_ctrl_bijection.2122659986 Jul 29 07:37:44 PM PDT 24 Jul 29 07:38:34 PM PDT 24 3289019794 ps
T360 /workspace/coverage/default/13.sram_ctrl_regwen.1733995973 Jul 29 07:37:11 PM PDT 24 Jul 29 07:49:31 PM PDT 24 4597006117 ps
T361 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2328856700 Jul 29 07:38:31 PM PDT 24 Jul 29 07:40:56 PM PDT 24 305696374 ps
T362 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.2598084779 Jul 29 07:38:48 PM PDT 24 Jul 29 07:48:12 PM PDT 24 82152349886 ps
T363 /workspace/coverage/default/36.sram_ctrl_mem_walk.2827125683 Jul 29 07:38:35 PM PDT 24 Jul 29 07:38:46 PM PDT 24 1809305534 ps
T364 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.3681363421 Jul 29 07:37:32 PM PDT 24 Jul 29 07:39:36 PM PDT 24 549922376 ps
T365 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.3290398313 Jul 29 07:37:39 PM PDT 24 Jul 29 07:41:46 PM PDT 24 10484213380 ps
T366 /workspace/coverage/default/45.sram_ctrl_regwen.3908479391 Jul 29 07:39:36 PM PDT 24 Jul 29 07:44:06 PM PDT 24 19740559447 ps
T367 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1058770827 Jul 29 07:37:02 PM PDT 24 Jul 29 07:37:39 PM PDT 24 517284390 ps
T368 /workspace/coverage/default/33.sram_ctrl_alert_test.572839495 Jul 29 07:38:29 PM PDT 24 Jul 29 07:38:30 PM PDT 24 27058087 ps
T369 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.66771669 Jul 29 07:37:39 PM PDT 24 Jul 29 07:53:32 PM PDT 24 8159619601 ps
T370 /workspace/coverage/default/36.sram_ctrl_smoke.3387770545 Jul 29 07:38:39 PM PDT 24 Jul 29 07:38:43 PM PDT 24 473193837 ps
T371 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1104390082 Jul 29 07:38:30 PM PDT 24 Jul 29 07:38:37 PM PDT 24 768941221 ps
T372 /workspace/coverage/default/8.sram_ctrl_smoke.2386262475 Jul 29 07:36:56 PM PDT 24 Jul 29 07:39:08 PM PDT 24 2520834996 ps
T373 /workspace/coverage/default/14.sram_ctrl_mem_walk.999975743 Jul 29 07:37:16 PM PDT 24 Jul 29 07:37:26 PM PDT 24 178373604 ps
T374 /workspace/coverage/default/24.sram_ctrl_bijection.2331159807 Jul 29 07:37:50 PM PDT 24 Jul 29 07:38:44 PM PDT 24 3283016528 ps
T375 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2019461573 Jul 29 07:38:40 PM PDT 24 Jul 29 07:38:50 PM PDT 24 74590064 ps
T376 /workspace/coverage/default/3.sram_ctrl_multiple_keys.579913085 Jul 29 07:37:00 PM PDT 24 Jul 29 07:43:36 PM PDT 24 51846599586 ps
T377 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.3065633351 Jul 29 07:39:05 PM PDT 24 Jul 29 07:43:11 PM PDT 24 9438360906 ps
T378 /workspace/coverage/default/40.sram_ctrl_max_throughput.462902429 Jul 29 07:38:58 PM PDT 24 Jul 29 07:40:13 PM PDT 24 451214567 ps
T379 /workspace/coverage/default/9.sram_ctrl_smoke.1867802918 Jul 29 07:37:24 PM PDT 24 Jul 29 07:37:36 PM PDT 24 2362601701 ps
T380 /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.232416379 Jul 29 07:36:59 PM PDT 24 Jul 29 07:39:24 PM PDT 24 1810958384 ps
T381 /workspace/coverage/default/16.sram_ctrl_alert_test.3511402305 Jul 29 07:37:35 PM PDT 24 Jul 29 07:37:36 PM PDT 24 36572226 ps
T382 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.2812604712 Jul 29 07:37:49 PM PDT 24 Jul 29 07:37:53 PM PDT 24 341386521 ps
T383 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.2038834524 Jul 29 07:39:06 PM PDT 24 Jul 29 07:39:12 PM PDT 24 198016291 ps
T384 /workspace/coverage/default/7.sram_ctrl_partial_access.3250770141 Jul 29 07:37:00 PM PDT 24 Jul 29 07:37:05 PM PDT 24 910038231 ps
T385 /workspace/coverage/default/23.sram_ctrl_regwen.925808662 Jul 29 07:37:43 PM PDT 24 Jul 29 07:57:07 PM PDT 24 26834952013 ps
T386 /workspace/coverage/default/8.sram_ctrl_multiple_keys.3963024522 Jul 29 07:37:02 PM PDT 24 Jul 29 07:42:54 PM PDT 24 10669059861 ps
T387 /workspace/coverage/default/25.sram_ctrl_multiple_keys.3772963046 Jul 29 07:37:39 PM PDT 24 Jul 29 07:52:35 PM PDT 24 10557962714 ps
T388 /workspace/coverage/default/2.sram_ctrl_lc_escalation.699402139 Jul 29 07:36:54 PM PDT 24 Jul 29 07:37:02 PM PDT 24 583450574 ps
T389 /workspace/coverage/default/36.sram_ctrl_executable.2214950012 Jul 29 07:38:36 PM PDT 24 Jul 29 07:45:01 PM PDT 24 19911588371 ps
T390 /workspace/coverage/default/44.sram_ctrl_alert_test.189068848 Jul 29 07:39:29 PM PDT 24 Jul 29 07:39:30 PM PDT 24 73996511 ps
T391 /workspace/coverage/default/40.sram_ctrl_lc_escalation.2747731325 Jul 29 07:39:01 PM PDT 24 Jul 29 07:39:04 PM PDT 24 198375686 ps
T392 /workspace/coverage/default/29.sram_ctrl_stress_all.2668972187 Jul 29 07:38:13 PM PDT 24 Jul 29 08:53:50 PM PDT 24 249222307383 ps
T393 /workspace/coverage/default/4.sram_ctrl_partial_access.1030815460 Jul 29 07:36:59 PM PDT 24 Jul 29 07:37:12 PM PDT 24 992386100 ps
T394 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.3024974011 Jul 29 07:38:20 PM PDT 24 Jul 29 07:38:24 PM PDT 24 139799702 ps
T395 /workspace/coverage/default/28.sram_ctrl_stress_all.4266667985 Jul 29 07:37:59 PM PDT 24 Jul 29 07:55:55 PM PDT 24 52437132460 ps
T396 /workspace/coverage/default/40.sram_ctrl_executable.2536322814 Jul 29 07:38:59 PM PDT 24 Jul 29 07:39:49 PM PDT 24 8904267645 ps
T397 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3382435875 Jul 29 07:36:58 PM PDT 24 Jul 29 07:37:10 PM PDT 24 74326725 ps
T398 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.2939941611 Jul 29 07:37:37 PM PDT 24 Jul 29 07:37:40 PM PDT 24 89490814 ps
T399 /workspace/coverage/default/9.sram_ctrl_bijection.3979176626 Jul 29 07:37:04 PM PDT 24 Jul 29 07:38:00 PM PDT 24 3811354461 ps
T400 /workspace/coverage/default/28.sram_ctrl_mem_walk.436216788 Jul 29 07:37:56 PM PDT 24 Jul 29 07:38:06 PM PDT 24 1856892464 ps
T401 /workspace/coverage/default/46.sram_ctrl_bijection.783462258 Jul 29 07:39:40 PM PDT 24 Jul 29 07:40:38 PM PDT 24 889246925 ps
T402 /workspace/coverage/default/4.sram_ctrl_max_throughput.330118399 Jul 29 07:36:47 PM PDT 24 Jul 29 07:37:03 PM PDT 24 75463774 ps
T403 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1614862104 Jul 29 07:39:50 PM PDT 24 Jul 29 07:40:24 PM PDT 24 177145227 ps
T404 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.3065991396 Jul 29 07:37:05 PM PDT 24 Jul 29 07:41:25 PM PDT 24 10640742543 ps
T405 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.2490186477 Jul 29 07:37:43 PM PDT 24 Jul 29 07:41:08 PM PDT 24 4227529439 ps
T406 /workspace/coverage/default/33.sram_ctrl_bijection.864239102 Jul 29 07:38:32 PM PDT 24 Jul 29 07:39:21 PM PDT 24 2979605652 ps
T407 /workspace/coverage/default/22.sram_ctrl_multiple_keys.2206198151 Jul 29 07:37:38 PM PDT 24 Jul 29 07:47:38 PM PDT 24 14717661623 ps
T408 /workspace/coverage/default/44.sram_ctrl_max_throughput.650173169 Jul 29 07:39:25 PM PDT 24 Jul 29 07:40:43 PM PDT 24 193946671 ps
T409 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.4032007705 Jul 29 07:38:20 PM PDT 24 Jul 29 07:42:35 PM PDT 24 449634069 ps
T410 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.872332478 Jul 29 07:38:21 PM PDT 24 Jul 29 07:38:26 PM PDT 24 594729884 ps
T411 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.200805632 Jul 29 07:37:31 PM PDT 24 Jul 29 07:37:35 PM PDT 24 168576288 ps
T412 /workspace/coverage/default/27.sram_ctrl_stress_all.448521573 Jul 29 07:37:53 PM PDT 24 Jul 29 07:59:50 PM PDT 24 103606274964 ps
T413 /workspace/coverage/default/11.sram_ctrl_multiple_keys.1203268975 Jul 29 07:37:01 PM PDT 24 Jul 29 07:54:12 PM PDT 24 131173880487 ps
T414 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3041226965 Jul 29 07:38:34 PM PDT 24 Jul 29 07:43:10 PM PDT 24 14418636750 ps
T415 /workspace/coverage/default/29.sram_ctrl_ram_cfg.2711298399 Jul 29 07:38:12 PM PDT 24 Jul 29 07:38:13 PM PDT 24 91421047 ps
T416 /workspace/coverage/default/29.sram_ctrl_smoke.3146265989 Jul 29 07:37:54 PM PDT 24 Jul 29 07:39:40 PM PDT 24 2335378038 ps
T417 /workspace/coverage/default/2.sram_ctrl_smoke.3275406598 Jul 29 07:36:59 PM PDT 24 Jul 29 07:37:28 PM PDT 24 408155214 ps
T418 /workspace/coverage/default/48.sram_ctrl_max_throughput.2020739781 Jul 29 07:39:46 PM PDT 24 Jul 29 07:40:10 PM PDT 24 88592223 ps
T419 /workspace/coverage/default/1.sram_ctrl_regwen.310738226 Jul 29 07:36:48 PM PDT 24 Jul 29 07:40:56 PM PDT 24 4259905627 ps
T420 /workspace/coverage/default/33.sram_ctrl_smoke.2045792604 Jul 29 07:38:21 PM PDT 24 Jul 29 07:38:35 PM PDT 24 917385543 ps
T421 /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.3082054115 Jul 29 07:37:37 PM PDT 24 Jul 29 07:43:45 PM PDT 24 4972248458 ps
T422 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.1756244608 Jul 29 07:36:46 PM PDT 24 Jul 29 07:39:51 PM PDT 24 926536704 ps
T423 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.17784654 Jul 29 07:36:53 PM PDT 24 Jul 29 07:37:04 PM PDT 24 278166831 ps
T424 /workspace/coverage/default/48.sram_ctrl_ram_cfg.260900792 Jul 29 07:39:49 PM PDT 24 Jul 29 07:39:50 PM PDT 24 78549645 ps
T425 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.1901078359 Jul 29 07:39:06 PM PDT 24 Jul 29 07:48:23 PM PDT 24 6096475861 ps
T426 /workspace/coverage/default/1.sram_ctrl_lc_escalation.269199891 Jul 29 07:36:40 PM PDT 24 Jul 29 07:36:47 PM PDT 24 1645332122 ps
T427 /workspace/coverage/default/49.sram_ctrl_max_throughput.902878702 Jul 29 07:40:00 PM PDT 24 Jul 29 07:41:33 PM PDT 24 460075637 ps
T428 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.24061530 Jul 29 07:39:27 PM PDT 24 Jul 29 07:48:24 PM PDT 24 68570653153 ps
T429 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.592565600 Jul 29 07:39:27 PM PDT 24 Jul 29 07:41:25 PM PDT 24 1060219149 ps
T430 /workspace/coverage/default/37.sram_ctrl_alert_test.543114875 Jul 29 07:38:45 PM PDT 24 Jul 29 07:38:45 PM PDT 24 85973662 ps
T431 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2379507177 Jul 29 07:37:24 PM PDT 24 Jul 29 07:43:14 PM PDT 24 4899722275 ps
T432 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.4077494641 Jul 29 07:38:23 PM PDT 24 Jul 29 07:43:35 PM PDT 24 44858466708 ps
T433 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1032031512 Jul 29 07:36:59 PM PDT 24 Jul 29 07:44:00 PM PDT 24 5191186414 ps
T434 /workspace/coverage/default/33.sram_ctrl_max_throughput.385345277 Jul 29 07:38:29 PM PDT 24 Jul 29 07:38:32 PM PDT 24 50094467 ps
T435 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.3957896639 Jul 29 07:38:31 PM PDT 24 Jul 29 07:43:04 PM PDT 24 2740572281 ps
T436 /workspace/coverage/default/13.sram_ctrl_ram_cfg.385771669 Jul 29 07:37:03 PM PDT 24 Jul 29 07:37:05 PM PDT 24 88749770 ps
T437 /workspace/coverage/default/10.sram_ctrl_lc_escalation.3213206922 Jul 29 07:37:09 PM PDT 24 Jul 29 07:37:13 PM PDT 24 242479500 ps
T438 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.262533160 Jul 29 07:38:22 PM PDT 24 Jul 29 07:44:48 PM PDT 24 1018999859 ps
T439 /workspace/coverage/default/19.sram_ctrl_lc_escalation.1111044646 Jul 29 07:37:47 PM PDT 24 Jul 29 07:37:48 PM PDT 24 66029566 ps
T440 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1654349119 Jul 29 07:38:36 PM PDT 24 Jul 29 07:52:31 PM PDT 24 5616186087 ps
T441 /workspace/coverage/default/25.sram_ctrl_partial_access.4041056690 Jul 29 07:37:53 PM PDT 24 Jul 29 07:38:05 PM PDT 24 1225598418 ps
T442 /workspace/coverage/default/22.sram_ctrl_ram_cfg.208138349 Jul 29 07:37:42 PM PDT 24 Jul 29 07:37:43 PM PDT 24 61523951 ps
T443 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1775491733 Jul 29 07:38:59 PM PDT 24 Jul 29 07:46:03 PM PDT 24 16609809740 ps
T444 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.3022371180 Jul 29 07:38:41 PM PDT 24 Jul 29 07:42:01 PM PDT 24 1110120813 ps
T445 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.1834194248 Jul 29 07:37:51 PM PDT 24 Jul 29 07:42:11 PM PDT 24 7026664346 ps
T446 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3628616494 Jul 29 07:37:43 PM PDT 24 Jul 29 07:37:55 PM PDT 24 472128461 ps
T447 /workspace/coverage/default/19.sram_ctrl_ram_cfg.2367728561 Jul 29 07:37:30 PM PDT 24 Jul 29 07:37:31 PM PDT 24 50995303 ps
T448 /workspace/coverage/default/17.sram_ctrl_max_throughput.3169788085 Jul 29 07:37:28 PM PDT 24 Jul 29 07:37:38 PM PDT 24 140429189 ps
T449 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.464423706 Jul 29 07:36:47 PM PDT 24 Jul 29 07:41:03 PM PDT 24 2656660745 ps
T450 /workspace/coverage/default/43.sram_ctrl_regwen.2616999387 Jul 29 07:39:25 PM PDT 24 Jul 29 07:45:10 PM PDT 24 18961021167 ps
T451 /workspace/coverage/default/11.sram_ctrl_stress_all.2686254757 Jul 29 07:36:57 PM PDT 24 Jul 29 07:49:00 PM PDT 24 64266125330 ps
T452 /workspace/coverage/default/26.sram_ctrl_partial_access.215158845 Jul 29 07:37:41 PM PDT 24 Jul 29 07:37:52 PM PDT 24 850470824 ps
T453 /workspace/coverage/default/44.sram_ctrl_multiple_keys.15127421 Jul 29 07:39:28 PM PDT 24 Jul 29 07:39:51 PM PDT 24 9759710491 ps
T454 /workspace/coverage/default/19.sram_ctrl_max_throughput.2087774262 Jul 29 07:37:41 PM PDT 24 Jul 29 07:39:29 PM PDT 24 143075359 ps
T455 /workspace/coverage/default/49.sram_ctrl_ram_cfg.1228803756 Jul 29 07:40:01 PM PDT 24 Jul 29 07:40:02 PM PDT 24 45435976 ps
T456 /workspace/coverage/default/35.sram_ctrl_ram_cfg.313508719 Jul 29 07:38:42 PM PDT 24 Jul 29 07:38:43 PM PDT 24 69212246 ps
T457 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.1037460134 Jul 29 07:37:00 PM PDT 24 Jul 29 07:48:26 PM PDT 24 9389901912 ps
T16 /workspace/coverage/default/4.sram_ctrl_sec_cm.4278597518 Jul 29 07:36:55 PM PDT 24 Jul 29 07:36:57 PM PDT 24 317231567 ps
T458 /workspace/coverage/default/37.sram_ctrl_smoke.4280982793 Jul 29 07:38:37 PM PDT 24 Jul 29 07:39:51 PM PDT 24 1089174992 ps
T459 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.1927957919 Jul 29 07:36:48 PM PDT 24 Jul 29 07:39:39 PM PDT 24 2626790868 ps
T460 /workspace/coverage/default/32.sram_ctrl_lc_escalation.1462807145 Jul 29 07:38:24 PM PDT 24 Jul 29 07:38:30 PM PDT 24 1703594358 ps
T461 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.1028005398 Jul 29 07:37:40 PM PDT 24 Jul 29 07:48:10 PM PDT 24 4244469674 ps
T462 /workspace/coverage/default/23.sram_ctrl_max_throughput.493528246 Jul 29 07:37:37 PM PDT 24 Jul 29 07:38:22 PM PDT 24 97856028 ps
T463 /workspace/coverage/default/8.sram_ctrl_regwen.3544119136 Jul 29 07:37:01 PM PDT 24 Jul 29 07:38:57 PM PDT 24 1573422639 ps
T464 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.2653711914 Jul 29 07:37:46 PM PDT 24 Jul 29 07:37:50 PM PDT 24 1614165946 ps
T465 /workspace/coverage/default/41.sram_ctrl_multiple_keys.1068798652 Jul 29 07:39:07 PM PDT 24 Jul 29 08:07:18 PM PDT 24 35120547704 ps
T466 /workspace/coverage/default/36.sram_ctrl_partial_access.3191032469 Jul 29 07:38:44 PM PDT 24 Jul 29 07:38:49 PM PDT 24 74251946 ps
T467 /workspace/coverage/default/42.sram_ctrl_ram_cfg.232469654 Jul 29 07:39:16 PM PDT 24 Jul 29 07:39:17 PM PDT 24 40774151 ps
T468 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.221487069 Jul 29 07:37:49 PM PDT 24 Jul 29 07:37:52 PM PDT 24 52343201 ps
T469 /workspace/coverage/default/30.sram_ctrl_stress_all.3448477731 Jul 29 07:38:20 PM PDT 24 Jul 29 08:47:45 PM PDT 24 43518082169 ps
T470 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.1767297750 Jul 29 07:38:29 PM PDT 24 Jul 29 07:38:34 PM PDT 24 948833313 ps
T471 /workspace/coverage/default/6.sram_ctrl_partial_access.3561358042 Jul 29 07:36:59 PM PDT 24 Jul 29 07:39:45 PM PDT 24 225672925 ps
T472 /workspace/coverage/default/20.sram_ctrl_alert_test.468169044 Jul 29 07:37:50 PM PDT 24 Jul 29 07:37:50 PM PDT 24 60570815 ps
T473 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.683737369 Jul 29 07:37:00 PM PDT 24 Jul 29 07:37:06 PM PDT 24 737860149 ps
T474 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.787920106 Jul 29 07:37:37 PM PDT 24 Jul 29 07:41:16 PM PDT 24 983303367 ps
T475 /workspace/coverage/default/32.sram_ctrl_mem_walk.337274490 Jul 29 07:38:24 PM PDT 24 Jul 29 07:38:30 PM PDT 24 352423060 ps
T476 /workspace/coverage/default/42.sram_ctrl_lc_escalation.2208816304 Jul 29 07:39:14 PM PDT 24 Jul 29 07:39:18 PM PDT 24 422052269 ps
T477 /workspace/coverage/default/21.sram_ctrl_partial_access.3504487793 Jul 29 07:37:41 PM PDT 24 Jul 29 07:37:55 PM PDT 24 801261532 ps
T478 /workspace/coverage/default/17.sram_ctrl_ram_cfg.3571121747 Jul 29 07:37:36 PM PDT 24 Jul 29 07:37:37 PM PDT 24 50012393 ps
T479 /workspace/coverage/default/19.sram_ctrl_bijection.1890347616 Jul 29 07:37:41 PM PDT 24 Jul 29 07:38:25 PM PDT 24 1408476129 ps
T480 /workspace/coverage/default/4.sram_ctrl_mem_walk.3635261955 Jul 29 07:36:48 PM PDT 24 Jul 29 07:36:54 PM PDT 24 870713138 ps
T481 /workspace/coverage/default/47.sram_ctrl_alert_test.3900824090 Jul 29 07:39:48 PM PDT 24 Jul 29 07:39:49 PM PDT 24 98126931 ps
T482 /workspace/coverage/default/39.sram_ctrl_ram_cfg.2551027177 Jul 29 07:38:53 PM PDT 24 Jul 29 07:38:54 PM PDT 24 35386185 ps
T483 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.3294726393 Jul 29 07:36:46 PM PDT 24 Jul 29 07:36:50 PM PDT 24 98085145 ps
T484 /workspace/coverage/default/16.sram_ctrl_multiple_keys.3419330973 Jul 29 07:37:29 PM PDT 24 Jul 29 07:57:00 PM PDT 24 13024959212 ps
T485 /workspace/coverage/default/5.sram_ctrl_bijection.3198942925 Jul 29 07:37:03 PM PDT 24 Jul 29 07:37:34 PM PDT 24 3553990717 ps
T486 /workspace/coverage/default/46.sram_ctrl_stress_all.526086751 Jul 29 07:39:36 PM PDT 24 Jul 29 08:04:55 PM PDT 24 97443043952 ps
T487 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3944060363 Jul 29 07:38:15 PM PDT 24 Jul 29 07:40:42 PM PDT 24 172956621 ps
T488 /workspace/coverage/default/8.sram_ctrl_alert_test.3693847562 Jul 29 07:37:05 PM PDT 24 Jul 29 07:37:06 PM PDT 24 14523288 ps
T489 /workspace/coverage/default/31.sram_ctrl_executable.1602386802 Jul 29 07:38:20 PM PDT 24 Jul 29 07:49:16 PM PDT 24 7403167760 ps
T490 /workspace/coverage/default/45.sram_ctrl_max_throughput.3497850037 Jul 29 07:39:25 PM PDT 24 Jul 29 07:40:50 PM PDT 24 438188381 ps
T491 /workspace/coverage/default/47.sram_ctrl_smoke.1541884243 Jul 29 07:39:38 PM PDT 24 Jul 29 07:41:54 PM PDT 24 641432588 ps
T492 /workspace/coverage/default/27.sram_ctrl_max_throughput.906236258 Jul 29 07:37:53 PM PDT 24 Jul 29 07:37:59 PM PDT 24 190166390 ps
T493 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3317030559 Jul 29 07:39:47 PM PDT 24 Jul 29 07:40:39 PM PDT 24 399224463 ps
T494 /workspace/coverage/default/13.sram_ctrl_alert_test.1565886923 Jul 29 07:37:10 PM PDT 24 Jul 29 07:37:10 PM PDT 24 20892010 ps
T495 /workspace/coverage/default/45.sram_ctrl_bijection.3235762444 Jul 29 07:39:26 PM PDT 24 Jul 29 07:40:43 PM PDT 24 3397322128 ps
T496 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.3958835216 Jul 29 07:37:47 PM PDT 24 Jul 29 08:06:05 PM PDT 24 4446206656 ps
T497 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.4000330813 Jul 29 07:37:32 PM PDT 24 Jul 29 07:43:59 PM PDT 24 2105784993 ps
T498 /workspace/coverage/default/15.sram_ctrl_lc_escalation.1231293750 Jul 29 07:37:12 PM PDT 24 Jul 29 07:37:23 PM PDT 24 870319099 ps
T499 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.2393473626 Jul 29 07:37:49 PM PDT 24 Jul 29 07:41:00 PM PDT 24 8352518906 ps
T500 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3572981290 Jul 29 07:39:58 PM PDT 24 Jul 29 07:40:23 PM PDT 24 1692286105 ps
T501 /workspace/coverage/default/39.sram_ctrl_multiple_keys.2911339525 Jul 29 07:38:56 PM PDT 24 Jul 29 07:51:12 PM PDT 24 18434046949 ps
T502 /workspace/coverage/default/7.sram_ctrl_stress_all.3989641679 Jul 29 07:36:55 PM PDT 24 Jul 29 08:35:10 PM PDT 24 10725277448 ps
T503 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2327247281 Jul 29 07:37:35 PM PDT 24 Jul 29 07:38:52 PM PDT 24 125627260 ps
T504 /workspace/coverage/default/35.sram_ctrl_mem_walk.2509175512 Jul 29 07:38:36 PM PDT 24 Jul 29 07:38:48 PM PDT 24 2857161072 ps
T505 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.3056258822 Jul 29 07:38:13 PM PDT 24 Jul 29 07:47:49 PM PDT 24 1823324978 ps
T506 /workspace/coverage/default/38.sram_ctrl_lc_escalation.707207942 Jul 29 07:38:40 PM PDT 24 Jul 29 07:38:48 PM PDT 24 6588988249 ps
T507 /workspace/coverage/default/21.sram_ctrl_max_throughput.3290306452 Jul 29 07:37:48 PM PDT 24 Jul 29 07:37:57 PM PDT 24 235941420 ps
T508 /workspace/coverage/default/25.sram_ctrl_smoke.2468406615 Jul 29 07:37:43 PM PDT 24 Jul 29 07:37:50 PM PDT 24 55164221 ps
T509 /workspace/coverage/default/16.sram_ctrl_partial_access.783777443 Jul 29 07:37:12 PM PDT 24 Jul 29 07:39:48 PM PDT 24 2712800543 ps
T510 /workspace/coverage/default/31.sram_ctrl_smoke.2916617976 Jul 29 07:38:21 PM PDT 24 Jul 29 07:38:39 PM PDT 24 8244631321 ps
T511 /workspace/coverage/default/14.sram_ctrl_executable.4218827304 Jul 29 07:37:10 PM PDT 24 Jul 29 07:49:05 PM PDT 24 2471045465 ps
T512 /workspace/coverage/default/29.sram_ctrl_regwen.2428208716 Jul 29 07:38:12 PM PDT 24 Jul 29 07:49:19 PM PDT 24 2991055780 ps
T513 /workspace/coverage/default/26.sram_ctrl_ram_cfg.1902014005 Jul 29 07:37:40 PM PDT 24 Jul 29 07:37:40 PM PDT 24 32647551 ps
T514 /workspace/coverage/default/47.sram_ctrl_bijection.4235829903 Jul 29 07:39:48 PM PDT 24 Jul 29 07:40:58 PM PDT 24 4414672970 ps
T515 /workspace/coverage/default/15.sram_ctrl_bijection.581087532 Jul 29 07:37:22 PM PDT 24 Jul 29 07:38:39 PM PDT 24 14267751783 ps
T516 /workspace/coverage/default/31.sram_ctrl_multiple_keys.85130727 Jul 29 07:38:24 PM PDT 24 Jul 29 07:58:11 PM PDT 24 29665293037 ps
T517 /workspace/coverage/default/1.sram_ctrl_executable.1035705645 Jul 29 07:36:54 PM PDT 24 Jul 29 07:58:51 PM PDT 24 12215203305 ps
T518 /workspace/coverage/default/26.sram_ctrl_max_throughput.826909329 Jul 29 07:37:38 PM PDT 24 Jul 29 07:38:40 PM PDT 24 367959084 ps
T519 /workspace/coverage/default/48.sram_ctrl_stress_all.425726770 Jul 29 07:39:58 PM PDT 24 Jul 29 09:10:51 PM PDT 24 49661092921 ps
T520 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.372733009 Jul 29 07:37:05 PM PDT 24 Jul 29 07:37:11 PM PDT 24 695622999 ps
T521 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.2324418675 Jul 29 07:37:26 PM PDT 24 Jul 29 07:44:19 PM PDT 24 6230067141 ps
T522 /workspace/coverage/default/11.sram_ctrl_regwen.4281632316 Jul 29 07:37:08 PM PDT 24 Jul 29 07:57:04 PM PDT 24 15881499213 ps
T523 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.574800134 Jul 29 07:37:54 PM PDT 24 Jul 29 07:41:48 PM PDT 24 15653014790 ps
T524 /workspace/coverage/default/9.sram_ctrl_alert_test.2462879894 Jul 29 07:37:23 PM PDT 24 Jul 29 07:37:24 PM PDT 24 14350768 ps
T525 /workspace/coverage/default/2.sram_ctrl_ram_cfg.3059752540 Jul 29 07:36:56 PM PDT 24 Jul 29 07:36:57 PM PDT 24 48474713 ps
T526 /workspace/coverage/default/45.sram_ctrl_stress_all.2647678471 Jul 29 07:39:40 PM PDT 24 Jul 29 07:54:38 PM PDT 24 85664138801 ps
T527 /workspace/coverage/default/45.sram_ctrl_mem_walk.1625352855 Jul 29 07:39:36 PM PDT 24 Jul 29 07:39:42 PM PDT 24 1371486304 ps
T528 /workspace/coverage/default/18.sram_ctrl_alert_test.1699800404 Jul 29 07:37:42 PM PDT 24 Jul 29 07:37:43 PM PDT 24 14347793 ps
T529 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.105776236 Jul 29 07:36:54 PM PDT 24 Jul 29 07:43:31 PM PDT 24 133042801973 ps
T112 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.727169648 Jul 29 07:38:22 PM PDT 24 Jul 29 07:41:34 PM PDT 24 8941960195 ps
T530 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.3004722122 Jul 29 07:37:40 PM PDT 24 Jul 29 07:41:18 PM PDT 24 8501258352 ps
T531 /workspace/coverage/default/11.sram_ctrl_partial_access.1859047019 Jul 29 07:36:58 PM PDT 24 Jul 29 07:37:05 PM PDT 24 338163749 ps
T532 /workspace/coverage/default/40.sram_ctrl_regwen.1397211665 Jul 29 07:38:57 PM PDT 24 Jul 29 07:42:11 PM PDT 24 6476291549 ps
T533 /workspace/coverage/default/47.sram_ctrl_stress_all.886300154 Jul 29 07:39:51 PM PDT 24 Jul 29 08:14:47 PM PDT 24 267179890815 ps
T113 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.1434653432 Jul 29 07:37:48 PM PDT 24 Jul 29 07:38:27 PM PDT 24 1269956981 ps
T534 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2176989807 Jul 29 07:39:06 PM PDT 24 Jul 29 07:40:24 PM PDT 24 488392513 ps
T535 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.2245118095 Jul 29 07:37:37 PM PDT 24 Jul 29 07:37:42 PM PDT 24 589992403 ps
T536 /workspace/coverage/default/24.sram_ctrl_lc_escalation.2186377802 Jul 29 07:37:43 PM PDT 24 Jul 29 07:37:47 PM PDT 24 226149294 ps
T537 /workspace/coverage/default/23.sram_ctrl_partial_access.293943595 Jul 29 07:37:55 PM PDT 24 Jul 29 07:38:35 PM PDT 24 440980142 ps
T538 /workspace/coverage/default/47.sram_ctrl_multiple_keys.3625760763 Jul 29 07:39:37 PM PDT 24 Jul 29 08:06:51 PM PDT 24 4746102276 ps
T539 /workspace/coverage/default/7.sram_ctrl_executable.1043722524 Jul 29 07:37:05 PM PDT 24 Jul 29 07:50:39 PM PDT 24 6842286754 ps
T540 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.4109778011 Jul 29 07:37:41 PM PDT 24 Jul 29 07:37:44 PM PDT 24 110062930 ps
T541 /workspace/coverage/default/11.sram_ctrl_smoke.36097104 Jul 29 07:36:53 PM PDT 24 Jul 29 07:37:08 PM PDT 24 546195131 ps
T542 /workspace/coverage/default/32.sram_ctrl_regwen.2047869025 Jul 29 07:38:20 PM PDT 24 Jul 29 08:03:57 PM PDT 24 34432994795 ps
T543 /workspace/coverage/default/43.sram_ctrl_lc_escalation.3655277569 Jul 29 07:39:16 PM PDT 24 Jul 29 07:39:19 PM PDT 24 197280098 ps
T544 /workspace/coverage/default/49.sram_ctrl_partial_access.2611541729 Jul 29 07:39:58 PM PDT 24 Jul 29 07:40:11 PM PDT 24 159513041 ps
T545 /workspace/coverage/default/10.sram_ctrl_regwen.3264224538 Jul 29 07:36:51 PM PDT 24 Jul 29 08:08:22 PM PDT 24 16218532284 ps
T546 /workspace/coverage/default/0.sram_ctrl_regwen.1309835433 Jul 29 07:36:44 PM PDT 24 Jul 29 07:44:19 PM PDT 24 9481027368 ps
T547 /workspace/coverage/default/2.sram_ctrl_mem_walk.1155276626 Jul 29 07:36:43 PM PDT 24 Jul 29 07:36:53 PM PDT 24 1807883942 ps
T548 /workspace/coverage/default/34.sram_ctrl_alert_test.419266254 Jul 29 07:38:31 PM PDT 24 Jul 29 07:38:31 PM PDT 24 14979141 ps
T549 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.2288483256 Jul 29 07:36:55 PM PDT 24 Jul 29 07:39:58 PM PDT 24 2337749093 ps
T550 /workspace/coverage/default/7.sram_ctrl_regwen.2596805639 Jul 29 07:37:10 PM PDT 24 Jul 29 07:55:46 PM PDT 24 3203909522 ps
T551 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1000865866 Jul 29 07:36:56 PM PDT 24 Jul 29 07:45:52 PM PDT 24 817215352 ps
T552 /workspace/coverage/default/19.sram_ctrl_executable.3763848112 Jul 29 07:37:45 PM PDT 24 Jul 29 07:59:22 PM PDT 24 40753526431 ps
T553 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.936640007 Jul 29 07:39:25 PM PDT 24 Jul 29 07:40:25 PM PDT 24 812865324 ps
T554 /workspace/coverage/default/18.sram_ctrl_partial_access.3580610948 Jul 29 07:37:39 PM PDT 24 Jul 29 07:38:47 PM PDT 24 637729812 ps
T555 /workspace/coverage/default/45.sram_ctrl_ram_cfg.1242419787 Jul 29 07:39:37 PM PDT 24 Jul 29 07:39:38 PM PDT 24 52909067 ps
T556 /workspace/coverage/default/28.sram_ctrl_bijection.3502224808 Jul 29 07:37:56 PM PDT 24 Jul 29 07:39:07 PM PDT 24 5814009630 ps
T557 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.3222772719 Jul 29 07:37:51 PM PDT 24 Jul 29 07:39:37 PM PDT 24 783816840 ps
T558 /workspace/coverage/default/42.sram_ctrl_multiple_keys.1254832009 Jul 29 07:39:05 PM PDT 24 Jul 29 07:47:14 PM PDT 24 22055481857 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%