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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.93 99.16 94.27 99.72 100.00 95.95 99.12 97.26


Total test records in report: 1018
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T559 /workspace/coverage/default/32.sram_ctrl_stress_all.2331835802 Jul 29 07:38:22 PM PDT 24 Jul 29 08:53:16 PM PDT 24 55190404082 ps
T560 /workspace/coverage/default/15.sram_ctrl_max_throughput.2494764477 Jul 29 07:37:13 PM PDT 24 Jul 29 07:39:26 PM PDT 24 270889224 ps
T561 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3233643580 Jul 29 07:38:39 PM PDT 24 Jul 29 07:41:29 PM PDT 24 9239883288 ps
T562 /workspace/coverage/default/34.sram_ctrl_regwen.2590401941 Jul 29 07:38:32 PM PDT 24 Jul 29 07:55:14 PM PDT 24 54311010147 ps
T563 /workspace/coverage/default/45.sram_ctrl_smoke.1213458722 Jul 29 07:39:28 PM PDT 24 Jul 29 07:40:56 PM PDT 24 1152785507 ps
T564 /workspace/coverage/default/8.sram_ctrl_executable.992203834 Jul 29 07:36:54 PM PDT 24 Jul 29 08:08:00 PM PDT 24 7696722212 ps
T565 /workspace/coverage/default/0.sram_ctrl_mem_walk.468476999 Jul 29 07:36:53 PM PDT 24 Jul 29 07:36:59 PM PDT 24 1216503137 ps
T566 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.1174555112 Jul 29 07:38:40 PM PDT 24 Jul 29 07:53:34 PM PDT 24 4323795816 ps
T567 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.800627922 Jul 29 07:37:39 PM PDT 24 Jul 29 07:47:21 PM PDT 24 1329344176 ps
T568 /workspace/coverage/default/18.sram_ctrl_stress_all.2995265967 Jul 29 07:37:45 PM PDT 24 Jul 29 08:10:49 PM PDT 24 50450366867 ps
T569 /workspace/coverage/default/25.sram_ctrl_alert_test.3851538818 Jul 29 07:37:39 PM PDT 24 Jul 29 07:37:40 PM PDT 24 10986766 ps
T570 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1054817564 Jul 29 07:36:51 PM PDT 24 Jul 29 07:42:18 PM PDT 24 23705467184 ps
T571 /workspace/coverage/default/19.sram_ctrl_partial_access.1110606984 Jul 29 07:37:34 PM PDT 24 Jul 29 07:38:42 PM PDT 24 615525079 ps
T572 /workspace/coverage/default/12.sram_ctrl_smoke.3389485604 Jul 29 07:37:12 PM PDT 24 Jul 29 07:38:15 PM PDT 24 216426027 ps
T573 /workspace/coverage/default/49.sram_ctrl_alert_test.2664181132 Jul 29 07:39:58 PM PDT 24 Jul 29 07:39:59 PM PDT 24 46545930 ps
T574 /workspace/coverage/default/20.sram_ctrl_bijection.1162831935 Jul 29 07:37:43 PM PDT 24 Jul 29 07:38:43 PM PDT 24 3402514315 ps
T575 /workspace/coverage/default/22.sram_ctrl_alert_test.110059519 Jul 29 07:37:43 PM PDT 24 Jul 29 07:37:44 PM PDT 24 18822205 ps
T576 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1064874710 Jul 29 07:36:48 PM PDT 24 Jul 29 07:41:52 PM PDT 24 13050229795 ps
T577 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.4049203716 Jul 29 07:39:36 PM PDT 24 Jul 29 07:39:59 PM PDT 24 333040908 ps
T578 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.3473594163 Jul 29 07:37:04 PM PDT 24 Jul 29 07:46:15 PM PDT 24 8726136154 ps
T41 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2244828523 Jul 29 07:38:38 PM PDT 24 Jul 29 07:39:15 PM PDT 24 2780323882 ps
T579 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.503074314 Jul 29 07:37:00 PM PDT 24 Jul 29 07:39:14 PM PDT 24 1069200972 ps
T17 /workspace/coverage/default/2.sram_ctrl_sec_cm.2163063634 Jul 29 07:36:54 PM PDT 24 Jul 29 07:36:57 PM PDT 24 541721573 ps
T580 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2805277798 Jul 29 07:37:07 PM PDT 24 Jul 29 07:37:20 PM PDT 24 316286881 ps
T581 /workspace/coverage/default/19.sram_ctrl_alert_test.67629160 Jul 29 07:37:47 PM PDT 24 Jul 29 07:37:47 PM PDT 24 18366383 ps
T42 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1723162039 Jul 29 07:39:17 PM PDT 24 Jul 29 07:41:26 PM PDT 24 1035774010 ps
T582 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2224733975 Jul 29 07:36:45 PM PDT 24 Jul 29 07:40:12 PM PDT 24 10772924583 ps
T583 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.70713805 Jul 29 07:37:35 PM PDT 24 Jul 29 07:45:23 PM PDT 24 220789904087 ps
T584 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.2725071703 Jul 29 07:37:06 PM PDT 24 Jul 29 07:49:58 PM PDT 24 31914866489 ps
T585 /workspace/coverage/default/11.sram_ctrl_lc_escalation.2443452538 Jul 29 07:37:06 PM PDT 24 Jul 29 07:37:10 PM PDT 24 345093483 ps
T586 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2830340944 Jul 29 07:37:44 PM PDT 24 Jul 29 07:45:02 PM PDT 24 16714435044 ps
T587 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.973475291 Jul 29 07:37:54 PM PDT 24 Jul 29 07:38:58 PM PDT 24 480481624 ps
T588 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.975752372 Jul 29 07:38:57 PM PDT 24 Jul 29 07:42:32 PM PDT 24 2219383464 ps
T589 /workspace/coverage/default/30.sram_ctrl_max_throughput.799958768 Jul 29 07:38:14 PM PDT 24 Jul 29 07:38:36 PM PDT 24 87517046 ps
T590 /workspace/coverage/default/16.sram_ctrl_max_throughput.1407053814 Jul 29 07:37:40 PM PDT 24 Jul 29 07:39:55 PM PDT 24 259590832 ps
T591 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.1203367424 Jul 29 07:36:49 PM PDT 24 Jul 29 07:45:08 PM PDT 24 17340842513 ps
T592 /workspace/coverage/default/41.sram_ctrl_regwen.337109824 Jul 29 07:39:05 PM PDT 24 Jul 29 07:51:52 PM PDT 24 15848643472 ps
T593 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3048747680 Jul 29 07:37:37 PM PDT 24 Jul 29 07:39:18 PM PDT 24 1768926103 ps
T594 /workspace/coverage/default/48.sram_ctrl_executable.397388929 Jul 29 07:39:51 PM PDT 24 Jul 29 07:43:23 PM PDT 24 4819750949 ps
T595 /workspace/coverage/default/26.sram_ctrl_lc_escalation.3749521904 Jul 29 07:37:42 PM PDT 24 Jul 29 07:37:53 PM PDT 24 1796487095 ps
T596 /workspace/coverage/default/34.sram_ctrl_stress_all.545427930 Jul 29 07:38:35 PM PDT 24 Jul 29 08:52:31 PM PDT 24 36219789572 ps
T597 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.4246490598 Jul 29 07:37:39 PM PDT 24 Jul 29 07:42:33 PM PDT 24 11374627543 ps
T598 /workspace/coverage/default/49.sram_ctrl_bijection.797100038 Jul 29 07:39:58 PM PDT 24 Jul 29 07:40:27 PM PDT 24 1346492126 ps
T599 /workspace/coverage/default/2.sram_ctrl_alert_test.3628513318 Jul 29 07:36:57 PM PDT 24 Jul 29 07:36:58 PM PDT 24 57969862 ps
T600 /workspace/coverage/default/23.sram_ctrl_stress_all.3638118392 Jul 29 07:37:47 PM PDT 24 Jul 29 08:54:56 PM PDT 24 42612393931 ps
T601 /workspace/coverage/default/38.sram_ctrl_partial_access.3078176441 Jul 29 07:38:43 PM PDT 24 Jul 29 07:39:56 PM PDT 24 632316705 ps
T602 /workspace/coverage/default/0.sram_ctrl_alert_test.3860181045 Jul 29 07:36:52 PM PDT 24 Jul 29 07:36:58 PM PDT 24 34429233 ps
T603 /workspace/coverage/default/13.sram_ctrl_max_throughput.2322451099 Jul 29 07:36:58 PM PDT 24 Jul 29 07:37:49 PM PDT 24 551393476 ps
T604 /workspace/coverage/default/19.sram_ctrl_regwen.2621811608 Jul 29 07:37:45 PM PDT 24 Jul 29 07:44:53 PM PDT 24 37412974522 ps
T605 /workspace/coverage/default/35.sram_ctrl_max_throughput.459129028 Jul 29 07:38:35 PM PDT 24 Jul 29 07:40:18 PM PDT 24 505970689 ps
T606 /workspace/coverage/default/12.sram_ctrl_executable.2915821273 Jul 29 07:37:09 PM PDT 24 Jul 29 07:56:01 PM PDT 24 14955969449 ps
T607 /workspace/coverage/default/44.sram_ctrl_ram_cfg.1379983581 Jul 29 07:39:28 PM PDT 24 Jul 29 07:39:29 PM PDT 24 124433842 ps
T608 /workspace/coverage/default/14.sram_ctrl_alert_test.1494644105 Jul 29 07:37:12 PM PDT 24 Jul 29 07:37:13 PM PDT 24 14905282 ps
T609 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.1817658608 Jul 29 07:38:52 PM PDT 24 Jul 29 07:45:49 PM PDT 24 7370262586 ps
T610 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.1530915581 Jul 29 07:36:51 PM PDT 24 Jul 29 07:36:55 PM PDT 24 105148000 ps
T611 /workspace/coverage/default/25.sram_ctrl_lc_escalation.926761404 Jul 29 07:37:50 PM PDT 24 Jul 29 07:37:53 PM PDT 24 626052452 ps
T612 /workspace/coverage/default/5.sram_ctrl_smoke.1370909788 Jul 29 07:36:56 PM PDT 24 Jul 29 07:37:11 PM PDT 24 992993930 ps
T613 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.1104262850 Jul 29 07:36:56 PM PDT 24 Jul 29 07:41:18 PM PDT 24 10904589406 ps
T614 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1993354736 Jul 29 07:37:25 PM PDT 24 Jul 29 07:43:18 PM PDT 24 55650485945 ps
T615 /workspace/coverage/default/34.sram_ctrl_smoke.392238252 Jul 29 07:38:36 PM PDT 24 Jul 29 07:38:38 PM PDT 24 110333156 ps
T616 /workspace/coverage/default/46.sram_ctrl_multiple_keys.793519013 Jul 29 07:39:35 PM PDT 24 Jul 29 07:50:07 PM PDT 24 83790288358 ps
T617 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.240170344 Jul 29 07:39:39 PM PDT 24 Jul 29 07:39:45 PM PDT 24 170176156 ps
T618 /workspace/coverage/default/24.sram_ctrl_alert_test.2831085484 Jul 29 07:37:54 PM PDT 24 Jul 29 07:37:55 PM PDT 24 18693547 ps
T619 /workspace/coverage/default/20.sram_ctrl_mem_walk.3420278162 Jul 29 07:37:45 PM PDT 24 Jul 29 07:37:50 PM PDT 24 1201288467 ps
T620 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1854627292 Jul 29 07:37:28 PM PDT 24 Jul 29 07:38:25 PM PDT 24 3236052428 ps
T621 /workspace/coverage/default/22.sram_ctrl_lc_escalation.24865209 Jul 29 07:37:39 PM PDT 24 Jul 29 07:37:46 PM PDT 24 556685590 ps
T622 /workspace/coverage/default/28.sram_ctrl_alert_test.3514900870 Jul 29 07:37:55 PM PDT 24 Jul 29 07:37:56 PM PDT 24 12579350 ps
T623 /workspace/coverage/default/48.sram_ctrl_partial_access.422238208 Jul 29 07:39:47 PM PDT 24 Jul 29 07:42:19 PM PDT 24 5775268798 ps
T624 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.2274303706 Jul 29 07:38:30 PM PDT 24 Jul 29 07:43:30 PM PDT 24 14413725421 ps
T625 /workspace/coverage/default/37.sram_ctrl_regwen.3806270420 Jul 29 07:38:42 PM PDT 24 Jul 29 08:00:43 PM PDT 24 10992566001 ps
T626 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.525627615 Jul 29 07:38:39 PM PDT 24 Jul 29 07:43:17 PM PDT 24 7189853174 ps
T627 /workspace/coverage/default/20.sram_ctrl_max_throughput.1916002505 Jul 29 07:37:38 PM PDT 24 Jul 29 07:37:47 PM PDT 24 252197646 ps
T628 /workspace/coverage/default/9.sram_ctrl_ram_cfg.3661523854 Jul 29 07:36:53 PM PDT 24 Jul 29 07:36:54 PM PDT 24 49974662 ps
T629 /workspace/coverage/default/21.sram_ctrl_stress_all.2456769452 Jul 29 07:37:38 PM PDT 24 Jul 29 08:22:25 PM PDT 24 124464125065 ps
T630 /workspace/coverage/default/23.sram_ctrl_smoke.132184139 Jul 29 07:37:33 PM PDT 24 Jul 29 07:39:23 PM PDT 24 204467943 ps
T631 /workspace/coverage/default/23.sram_ctrl_executable.181897663 Jul 29 07:37:48 PM PDT 24 Jul 29 07:49:40 PM PDT 24 30859833862 ps
T632 /workspace/coverage/default/12.sram_ctrl_lc_escalation.3142856105 Jul 29 07:37:06 PM PDT 24 Jul 29 07:37:09 PM PDT 24 388306854 ps
T633 /workspace/coverage/default/41.sram_ctrl_mem_walk.149629250 Jul 29 07:39:06 PM PDT 24 Jul 29 07:39:15 PM PDT 24 260231926 ps
T634 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3788682660 Jul 29 07:38:28 PM PDT 24 Jul 29 07:38:53 PM PDT 24 4118336422 ps
T635 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1226268416 Jul 29 07:38:14 PM PDT 24 Jul 29 07:40:00 PM PDT 24 7131530092 ps
T636 /workspace/coverage/default/44.sram_ctrl_smoke.2388020500 Jul 29 07:39:25 PM PDT 24 Jul 29 07:40:11 PM PDT 24 1530223709 ps
T637 /workspace/coverage/default/7.sram_ctrl_max_throughput.1082859255 Jul 29 07:36:59 PM PDT 24 Jul 29 07:37:48 PM PDT 24 278618897 ps
T638 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.3012630940 Jul 29 07:39:52 PM PDT 24 Jul 29 07:46:55 PM PDT 24 4484004642 ps
T639 /workspace/coverage/default/2.sram_ctrl_stress_all.4187808318 Jul 29 07:36:48 PM PDT 24 Jul 29 07:46:26 PM PDT 24 7597007315 ps
T640 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.973010870 Jul 29 07:37:11 PM PDT 24 Jul 29 07:37:14 PM PDT 24 448402630 ps
T641 /workspace/coverage/default/40.sram_ctrl_multiple_keys.1492134035 Jul 29 07:38:52 PM PDT 24 Jul 29 07:45:04 PM PDT 24 19843952478 ps
T642 /workspace/coverage/default/2.sram_ctrl_multiple_keys.1466871438 Jul 29 07:36:52 PM PDT 24 Jul 29 07:52:44 PM PDT 24 2703816663 ps
T643 /workspace/coverage/default/34.sram_ctrl_bijection.2840321870 Jul 29 07:38:31 PM PDT 24 Jul 29 07:39:17 PM PDT 24 2696349531 ps
T644 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.3227312386 Jul 29 07:37:11 PM PDT 24 Jul 29 07:37:40 PM PDT 24 96664950 ps
T645 /workspace/coverage/default/16.sram_ctrl_bijection.3604766856 Jul 29 07:37:27 PM PDT 24 Jul 29 07:38:28 PM PDT 24 3671507946 ps
T646 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1168666752 Jul 29 07:37:03 PM PDT 24 Jul 29 07:37:16 PM PDT 24 78100945 ps
T647 /workspace/coverage/default/33.sram_ctrl_executable.2139491921 Jul 29 07:38:29 PM PDT 24 Jul 29 07:47:00 PM PDT 24 5868316168 ps
T648 /workspace/coverage/default/0.sram_ctrl_executable.1267434825 Jul 29 07:36:56 PM PDT 24 Jul 29 07:38:23 PM PDT 24 2546362330 ps
T649 /workspace/coverage/default/23.sram_ctrl_mem_walk.1776618758 Jul 29 07:37:46 PM PDT 24 Jul 29 07:37:52 PM PDT 24 459765853 ps
T650 /workspace/coverage/default/18.sram_ctrl_regwen.983679280 Jul 29 07:37:33 PM PDT 24 Jul 29 07:55:19 PM PDT 24 98526579330 ps
T651 /workspace/coverage/default/47.sram_ctrl_mem_walk.1081374524 Jul 29 07:39:47 PM PDT 24 Jul 29 07:39:55 PM PDT 24 2385310020 ps
T652 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.554815050 Jul 29 07:37:14 PM PDT 24 Jul 29 07:37:18 PM PDT 24 60872058 ps
T653 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.2484585369 Jul 29 07:38:32 PM PDT 24 Jul 29 07:42:46 PM PDT 24 177182956189 ps
T654 /workspace/coverage/default/2.sram_ctrl_bijection.1939665563 Jul 29 07:36:58 PM PDT 24 Jul 29 07:37:39 PM PDT 24 2469728711 ps
T655 /workspace/coverage/default/42.sram_ctrl_bijection.2283868222 Jul 29 07:39:07 PM PDT 24 Jul 29 07:39:31 PM PDT 24 710500742 ps
T656 /workspace/coverage/default/39.sram_ctrl_mem_walk.2619875102 Jul 29 07:38:53 PM PDT 24 Jul 29 07:39:03 PM PDT 24 440329970 ps
T657 /workspace/coverage/default/5.sram_ctrl_partial_access.578498561 Jul 29 07:36:47 PM PDT 24 Jul 29 07:36:56 PM PDT 24 377361541 ps
T658 /workspace/coverage/default/45.sram_ctrl_alert_test.2265779191 Jul 29 07:39:37 PM PDT 24 Jul 29 07:39:38 PM PDT 24 39511668 ps
T659 /workspace/coverage/default/24.sram_ctrl_stress_all.1980094459 Jul 29 07:37:42 PM PDT 24 Jul 29 07:41:57 PM PDT 24 41912758265 ps
T660 /workspace/coverage/default/19.sram_ctrl_mem_walk.1981640827 Jul 29 07:37:36 PM PDT 24 Jul 29 07:37:47 PM PDT 24 2782691179 ps
T661 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.2607641529 Jul 29 07:37:00 PM PDT 24 Jul 29 07:39:45 PM PDT 24 16963605595 ps
T662 /workspace/coverage/default/5.sram_ctrl_max_throughput.3245672537 Jul 29 07:36:58 PM PDT 24 Jul 29 07:38:29 PM PDT 24 615789994 ps
T663 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.4195897184 Jul 29 07:37:53 PM PDT 24 Jul 29 07:37:56 PM PDT 24 171247047 ps
T664 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3695114776 Jul 29 07:37:12 PM PDT 24 Jul 29 07:37:51 PM PDT 24 2214391923 ps
T665 /workspace/coverage/default/5.sram_ctrl_mem_walk.1581996954 Jul 29 07:36:55 PM PDT 24 Jul 29 07:37:01 PM PDT 24 340486410 ps
T666 /workspace/coverage/default/49.sram_ctrl_mem_walk.1787317665 Jul 29 07:39:58 PM PDT 24 Jul 29 07:40:10 PM PDT 24 2356859456 ps
T667 /workspace/coverage/default/44.sram_ctrl_bijection.919894152 Jul 29 07:39:25 PM PDT 24 Jul 29 07:40:04 PM PDT 24 1205139593 ps
T668 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.4031160354 Jul 29 07:39:47 PM PDT 24 Jul 29 07:39:50 PM PDT 24 65668913 ps
T669 /workspace/coverage/default/39.sram_ctrl_stress_all.1970234542 Jul 29 07:38:53 PM PDT 24 Jul 29 07:51:09 PM PDT 24 4759605089 ps
T670 /workspace/coverage/default/10.sram_ctrl_mem_walk.3266038715 Jul 29 07:37:06 PM PDT 24 Jul 29 07:37:18 PM PDT 24 2739262274 ps
T671 /workspace/coverage/default/42.sram_ctrl_mem_walk.2634660654 Jul 29 07:39:14 PM PDT 24 Jul 29 07:39:20 PM PDT 24 3201444117 ps
T672 /workspace/coverage/default/28.sram_ctrl_multiple_keys.1336615396 Jul 29 07:37:54 PM PDT 24 Jul 29 07:53:08 PM PDT 24 16109396035 ps
T673 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.116157255 Jul 29 07:39:06 PM PDT 24 Jul 29 07:40:22 PM PDT 24 779992337 ps
T674 /workspace/coverage/default/44.sram_ctrl_stress_all.1644387093 Jul 29 07:39:28 PM PDT 24 Jul 29 08:25:28 PM PDT 24 109889182285 ps
T675 /workspace/coverage/default/2.sram_ctrl_partial_access.3792689969 Jul 29 07:37:05 PM PDT 24 Jul 29 07:39:23 PM PDT 24 799541648 ps
T676 /workspace/coverage/default/29.sram_ctrl_max_throughput.39685337 Jul 29 07:38:13 PM PDT 24 Jul 29 07:40:22 PM PDT 24 264188289 ps
T677 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.4154042098 Jul 29 07:39:14 PM PDT 24 Jul 29 07:39:17 PM PDT 24 111364283 ps
T678 /workspace/coverage/default/14.sram_ctrl_max_throughput.1497019702 Jul 29 07:37:13 PM PDT 24 Jul 29 07:37:16 PM PDT 24 44539127 ps
T679 /workspace/coverage/default/27.sram_ctrl_lc_escalation.1093436780 Jul 29 07:37:51 PM PDT 24 Jul 29 07:37:57 PM PDT 24 957548673 ps
T680 /workspace/coverage/default/29.sram_ctrl_lc_escalation.1980692582 Jul 29 07:38:14 PM PDT 24 Jul 29 07:38:16 PM PDT 24 602362713 ps
T681 /workspace/coverage/default/27.sram_ctrl_ram_cfg.989384906 Jul 29 07:38:01 PM PDT 24 Jul 29 07:38:02 PM PDT 24 91165144 ps
T682 /workspace/coverage/default/41.sram_ctrl_smoke.3083087613 Jul 29 07:39:05 PM PDT 24 Jul 29 07:39:09 PM PDT 24 249980594 ps
T683 /workspace/coverage/default/3.sram_ctrl_stress_all.3635428906 Jul 29 07:36:55 PM PDT 24 Jul 29 08:43:09 PM PDT 24 35108854686 ps
T684 /workspace/coverage/default/34.sram_ctrl_lc_escalation.3764251420 Jul 29 07:38:32 PM PDT 24 Jul 29 07:38:39 PM PDT 24 461247445 ps
T114 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.4032415107 Jul 29 07:39:39 PM PDT 24 Jul 29 07:41:37 PM PDT 24 1551638972 ps
T685 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.3293065136 Jul 29 07:37:38 PM PDT 24 Jul 29 07:40:23 PM PDT 24 5533233959 ps
T686 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.2739732391 Jul 29 07:38:34 PM PDT 24 Jul 29 07:43:51 PM PDT 24 13415134872 ps
T687 /workspace/coverage/default/40.sram_ctrl_alert_test.2980978173 Jul 29 07:39:05 PM PDT 24 Jul 29 07:39:06 PM PDT 24 34347429 ps
T688 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.3337686973 Jul 29 07:36:43 PM PDT 24 Jul 29 07:42:11 PM PDT 24 12446151594 ps
T115 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.2385160934 Jul 29 07:37:41 PM PDT 24 Jul 29 07:39:41 PM PDT 24 3865136647 ps
T689 /workspace/coverage/default/45.sram_ctrl_partial_access.2252490091 Jul 29 07:39:28 PM PDT 24 Jul 29 07:39:46 PM PDT 24 105745255 ps
T690 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.4055390343 Jul 29 07:36:56 PM PDT 24 Jul 29 07:40:46 PM PDT 24 5434352054 ps
T691 /workspace/coverage/default/31.sram_ctrl_regwen.3416332704 Jul 29 07:38:20 PM PDT 24 Jul 29 07:47:10 PM PDT 24 9949655076 ps
T692 /workspace/coverage/default/22.sram_ctrl_partial_access.1314961415 Jul 29 07:37:40 PM PDT 24 Jul 29 07:37:55 PM PDT 24 276903319 ps
T24 /workspace/coverage/default/1.sram_ctrl_sec_cm.1237613179 Jul 29 07:37:06 PM PDT 24 Jul 29 07:37:10 PM PDT 24 234584451 ps
T693 /workspace/coverage/default/7.sram_ctrl_mem_walk.847007372 Jul 29 07:36:56 PM PDT 24 Jul 29 07:37:02 PM PDT 24 1337976554 ps
T694 /workspace/coverage/default/48.sram_ctrl_mem_walk.1808983575 Jul 29 07:39:57 PM PDT 24 Jul 29 07:40:03 PM PDT 24 493852893 ps
T695 /workspace/coverage/default/44.sram_ctrl_regwen.3950776598 Jul 29 07:39:27 PM PDT 24 Jul 29 07:51:02 PM PDT 24 10633698650 ps
T696 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2132899766 Jul 29 07:36:57 PM PDT 24 Jul 29 07:37:00 PM PDT 24 81854508 ps
T697 /workspace/coverage/default/48.sram_ctrl_multiple_keys.3399176420 Jul 29 07:39:48 PM PDT 24 Jul 29 07:47:40 PM PDT 24 5463785242 ps
T698 /workspace/coverage/default/18.sram_ctrl_mem_walk.3529242260 Jul 29 07:37:31 PM PDT 24 Jul 29 07:37:42 PM PDT 24 1340377054 ps
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T705 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.824555453 Jul 29 07:38:34 PM PDT 24 Jul 29 07:46:19 PM PDT 24 74477756412 ps
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T709 /workspace/coverage/default/39.sram_ctrl_regwen.2426218505 Jul 29 07:38:53 PM PDT 24 Jul 29 07:49:58 PM PDT 24 14055115601 ps
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T720 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.4138985594 Jul 29 07:37:06 PM PDT 24 Jul 29 07:44:21 PM PDT 24 18059204805 ps
T721 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.627025768 Jul 29 07:38:32 PM PDT 24 Jul 29 07:39:19 PM PDT 24 649045773 ps
T722 /workspace/coverage/default/12.sram_ctrl_alert_test.2515958308 Jul 29 07:36:57 PM PDT 24 Jul 29 07:36:58 PM PDT 24 20588117 ps
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T724 /workspace/coverage/default/7.sram_ctrl_bijection.1133352366 Jul 29 07:37:07 PM PDT 24 Jul 29 07:37:39 PM PDT 24 4112605812 ps
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T730 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.1292600736 Jul 29 07:37:54 PM PDT 24 Jul 29 07:42:30 PM PDT 24 2811522699 ps
T731 /workspace/coverage/default/33.sram_ctrl_stress_all.2298106504 Jul 29 07:38:32 PM PDT 24 Jul 29 07:51:48 PM PDT 24 93817412386 ps
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T734 /workspace/coverage/default/40.sram_ctrl_bijection.328314417 Jul 29 07:39:00 PM PDT 24 Jul 29 07:39:47 PM PDT 24 8464248681 ps
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T738 /workspace/coverage/default/37.sram_ctrl_bijection.4261462844 Jul 29 07:38:35 PM PDT 24 Jul 29 07:39:02 PM PDT 24 2487807855 ps
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T741 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.432552832 Jul 29 07:39:27 PM PDT 24 Jul 29 07:39:33 PM PDT 24 365797248 ps
T742 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.1957328792 Jul 29 07:36:52 PM PDT 24 Jul 29 07:36:58 PM PDT 24 91158070 ps
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T745 /workspace/coverage/default/33.sram_ctrl_ram_cfg.1471425541 Jul 29 07:38:29 PM PDT 24 Jul 29 07:38:30 PM PDT 24 86665528 ps
T746 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3701118855 Jul 29 07:38:20 PM PDT 24 Jul 29 07:38:37 PM PDT 24 314645407 ps
T747 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.3567822679 Jul 29 07:39:07 PM PDT 24 Jul 29 07:43:30 PM PDT 24 5317549947 ps
T748 /workspace/coverage/default/49.sram_ctrl_lc_escalation.2751129860 Jul 29 07:39:57 PM PDT 24 Jul 29 07:40:03 PM PDT 24 636409431 ps
T749 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.283153302 Jul 29 07:38:32 PM PDT 24 Jul 29 07:38:38 PM PDT 24 848211060 ps
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T766 /workspace/coverage/default/32.sram_ctrl_bijection.2100682202 Jul 29 07:38:21 PM PDT 24 Jul 29 07:39:01 PM PDT 24 632809590 ps
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T769 /workspace/coverage/default/15.sram_ctrl_multiple_keys.2055185657 Jul 29 07:37:18 PM PDT 24 Jul 29 07:50:16 PM PDT 24 2222123620 ps
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T776 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.2096951381 Jul 29 07:39:00 PM PDT 24 Jul 29 08:09:07 PM PDT 24 3806013595 ps
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T780 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.3145429039 Jul 29 07:38:13 PM PDT 24 Jul 29 07:38:17 PM PDT 24 110698677 ps
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T783 /workspace/coverage/default/24.sram_ctrl_max_throughput.3369789014 Jul 29 07:37:48 PM PDT 24 Jul 29 07:39:41 PM PDT 24 136295398 ps
T784 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.787423773 Jul 29 07:39:27 PM PDT 24 Jul 29 07:59:09 PM PDT 24 8283283634 ps
T785 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2644873131 Jul 29 07:37:10 PM PDT 24 Jul 29 07:41:43 PM PDT 24 49006860379 ps
T786 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3978196116 Jul 29 07:36:55 PM PDT 24 Jul 29 07:41:26 PM PDT 24 6178075888 ps
T787 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.3797096904 Jul 29 07:37:01 PM PDT 24 Jul 29 07:41:58 PM PDT 24 3869775396 ps
T788 /workspace/coverage/default/40.sram_ctrl_ram_cfg.388025699 Jul 29 07:39:00 PM PDT 24 Jul 29 07:39:01 PM PDT 24 47332475 ps
T789 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.2994769908 Jul 29 07:37:13 PM PDT 24 Jul 29 07:42:47 PM PDT 24 13796244375 ps
T790 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.674198270 Jul 29 07:38:22 PM PDT 24 Jul 29 07:42:52 PM PDT 24 6708143836 ps
T791 /workspace/coverage/default/38.sram_ctrl_max_throughput.1790978638 Jul 29 07:38:43 PM PDT 24 Jul 29 07:40:34 PM PDT 24 534744557 ps
T792 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.3845301171 Jul 29 07:37:09 PM PDT 24 Jul 29 07:41:48 PM PDT 24 10676466809 ps
T793 /workspace/coverage/default/39.sram_ctrl_lc_escalation.3558521279 Jul 29 07:38:56 PM PDT 24 Jul 29 07:39:04 PM PDT 24 578554281 ps
T794 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.3717907147 Jul 29 07:38:36 PM PDT 24 Jul 29 07:38:41 PM PDT 24 226444441 ps
T795 /workspace/coverage/default/13.sram_ctrl_partial_access.2310553757 Jul 29 07:37:03 PM PDT 24 Jul 29 07:37:21 PM PDT 24 3682804991 ps
T796 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.3134897556 Jul 29 07:36:53 PM PDT 24 Jul 29 07:41:23 PM PDT 24 7248215948 ps
T797 /workspace/coverage/default/41.sram_ctrl_executable.1922040423 Jul 29 07:39:05 PM PDT 24 Jul 29 07:57:44 PM PDT 24 12489226420 ps
T798 /workspace/coverage/default/46.sram_ctrl_executable.2222874078 Jul 29 07:39:35 PM PDT 24 Jul 29 07:53:54 PM PDT 24 3476602714 ps
T799 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.1392982633 Jul 29 07:37:32 PM PDT 24 Jul 29 07:37:37 PM PDT 24 66542029 ps
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