Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.95	99.16	94.27	99.72	100.00	95.95	99.12	97.44

Total tests in report: 1020

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
72.52	72.52	95.42	95.42	66.94	66.94	45.98	45.98	85.71	85.71	85.02	85.02	94.40	94.40	34.19	34.19	/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2812829397
86.17	13.64	98.22	2.80	79.74	12.80	87.41	41.44	100.00	14.29	93.24	8.21	94.84	0.44	49.73	15.54	/workspace/coverage/default/42.sram_ctrl_stress_all.3101320238
92.19	6.02	98.73	0.51	83.65	3.91	88.04	0.62	100.00	0.00	94.44	1.21	96.90	2.06	83.55	33.82	/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2734124338
93.93	1.74	98.73	0.00	86.85	3.20	96.81	8.77	100.00	0.00	94.69	0.24	96.90	0.00	83.55	0.00	/workspace/coverage/default/37.sram_ctrl_lc_escalation.600009635
94.93	1.00	98.90	0.17	87.44	0.59	97.02	0.21	100.00	0.00	95.41	0.72	96.90	0.00	88.85	5.30	/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1063604274
95.67	0.74	99.07	0.17	89.45	2.01	97.78	0.76	100.00	0.00	96.14	0.72	97.49	0.59	89.76	0.91	/workspace/coverage/default/4.sram_ctrl_sec_cm.1520861258
96.18	0.51	99.07	0.00	89.57	0.12	98.13	0.35	100.00	0.00	96.14	0.00	97.49	0.00	92.87	3.11	/workspace/coverage/default/25.sram_ctrl_stress_all.2695688737
96.55	0.36	99.07	0.00	90.28	0.71	98.58	0.45	100.00	0.00	96.14	0.00	97.79	0.29	93.97	1.10	/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.69797266
96.76	0.21	99.07	0.00	90.52	0.24	98.65	0.07	100.00	0.00	96.14	0.00	98.97	1.18	93.97	0.00	/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.3376636079
96.91	0.16	99.07	0.00	90.52	0.00	98.65	0.00	100.00	0.00	96.14	0.00	98.97	0.00	95.06	1.10	/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3749189221
97.06	0.14	99.07	0.00	90.64	0.12	98.79	0.14	100.00	0.00	96.14	0.00	98.97	0.00	95.80	0.73	/workspace/coverage/default/19.sram_ctrl_stress_all.2561994047
97.19	0.13	99.15	0.08	90.64	0.00	99.62	0.83	100.00	0.00	96.14	0.00	98.97	0.00	95.80	0.00	/workspace/coverage/default/0.sram_ctrl_ram_cfg.3167108811
97.32	0.13	99.15	0.00	90.64	0.00	99.62	0.00	100.00	0.00	96.14	0.00	98.97	0.00	96.71	0.91	/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1986844605
97.41	0.09	99.15	0.00	91.00	0.36	99.72	0.10	100.00	0.00	96.14	0.00	98.97	0.00	96.89	0.18	/workspace/coverage/default/0.sram_ctrl_alert_test.4095374435
97.46	0.05	99.15	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.14	0.00	98.97	0.00	97.26	0.37	/workspace/coverage/default/26.sram_ctrl_stress_all.1641232151
97.49	0.03	99.15	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.14	0.00	98.97	0.00	97.44	0.18	/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2340246723
97.51	0.02	99.15	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.14	0.00	99.12	0.15	97.44	0.00	/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1646940836

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.4280138501
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3580959444
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.318651883
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3744384009
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3069213398
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3015005666
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3596987884
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1861005529
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2990652321
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2372217568
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3056450414
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1752475792
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3240858691
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.4034662102
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.882737164
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.4154320986
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3353648359
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2023487770
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1626550297
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3358496867
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2989236399
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2390361006
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.4196710928
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2062300323
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.669040660
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.4281869359
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1196132095
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1859897716
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2779672982
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1265943818
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.352730809
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3176121159
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1993572256
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2289947020
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.853365806
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.549561623
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2579216259
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3279927726
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.768287718
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1060546716
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2935089046
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2956251448
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3802188355
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.462222881
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1280007371
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3153062681
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1730870820
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2705982860
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3177122626
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3949177628
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3224502782
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2788490180
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.3222840456
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3870173754
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2597798757
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2872031605
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1132218043
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1690230903
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3860213160
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2402017589
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3796420257
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2262880489
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3110142777
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2583846501
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1169764927
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3476481632
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1040458108
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1205190085
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1515009405
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.337065114
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3910686774
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.790971553
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2941207770
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1333055739
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2989819047
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.872087854
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1185670287
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1679961414
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3274717435
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.310831912
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3282514439
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.777915796
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3356943532
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2779306397
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1079276471
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1193953889
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1895812078
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.38704340
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1914811829
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.4281807207
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.161400868
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3455173568
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2253600589
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.4081536857
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.4069261661
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1632750814
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3591280013
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3171516455
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3017980477
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2374753433
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.4076770245
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2829476959
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3192388834
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2187883237
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2716572037
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3080962732
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3994466084
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2406784006
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3706120545
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2120139244
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.268762842
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.4094474539
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2623799205
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.918204549
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1578074452
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1997466310
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1696052310
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3203992495
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.519819773
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.888928618
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2461128988
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3963322601
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1918316385
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3999709444
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2553913918
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1592292725
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2322179673
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1499985952
/workspace/coverage/default/0.sram_ctrl_bijection.623881615
/workspace/coverage/default/0.sram_ctrl_executable.914332123
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3969344451
/workspace/coverage/default/0.sram_ctrl_max_throughput.43296766
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.153520140
/workspace/coverage/default/0.sram_ctrl_mem_walk.4253623642
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2156880916
/workspace/coverage/default/0.sram_ctrl_partial_access.428539759
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1507436752
/workspace/coverage/default/0.sram_ctrl_regwen.3673173969
/workspace/coverage/default/0.sram_ctrl_sec_cm.1128259893
/workspace/coverage/default/0.sram_ctrl_smoke.1261694784
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3447867648
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1430708660
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3802037243
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3126885813
/workspace/coverage/default/1.sram_ctrl_alert_test.2836900517
/workspace/coverage/default/1.sram_ctrl_bijection.717895279
/workspace/coverage/default/1.sram_ctrl_executable.2170088261
/workspace/coverage/default/1.sram_ctrl_lc_escalation.283518309
/workspace/coverage/default/1.sram_ctrl_max_throughput.1493959875
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2678167692
/workspace/coverage/default/1.sram_ctrl_mem_walk.1976230805
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3280564436
/workspace/coverage/default/1.sram_ctrl_partial_access.20882973
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.4060298757
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3089196135
/workspace/coverage/default/1.sram_ctrl_regwen.1107447237
/workspace/coverage/default/1.sram_ctrl_sec_cm.885362600
/workspace/coverage/default/1.sram_ctrl_smoke.4109124082
/workspace/coverage/default/1.sram_ctrl_stress_all.3903385584
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1864841022
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.943914443
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2335404104
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3233572159
/workspace/coverage/default/10.sram_ctrl_alert_test.3514540125
/workspace/coverage/default/10.sram_ctrl_bijection.4229160345
/workspace/coverage/default/10.sram_ctrl_executable.135458273
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2008589930
/workspace/coverage/default/10.sram_ctrl_max_throughput.1953965957
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2493407530
/workspace/coverage/default/10.sram_ctrl_mem_walk.1558597067
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3368815088
/workspace/coverage/default/10.sram_ctrl_partial_access.3337861139
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2346809068
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1871135036
/workspace/coverage/default/10.sram_ctrl_regwen.3114350131
/workspace/coverage/default/10.sram_ctrl_smoke.367597042
/workspace/coverage/default/10.sram_ctrl_stress_all.4006650437
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.265658734
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.885925926
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.970017549
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3166967911
/workspace/coverage/default/11.sram_ctrl_alert_test.1127940963
/workspace/coverage/default/11.sram_ctrl_bijection.719431503
/workspace/coverage/default/11.sram_ctrl_executable.3266260795
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2134846854
/workspace/coverage/default/11.sram_ctrl_max_throughput.3256971192
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1024776525
/workspace/coverage/default/11.sram_ctrl_mem_walk.1451880586
/workspace/coverage/default/11.sram_ctrl_multiple_keys.839530317
/workspace/coverage/default/11.sram_ctrl_partial_access.3106344510
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3328267209
/workspace/coverage/default/11.sram_ctrl_ram_cfg.971563767
/workspace/coverage/default/11.sram_ctrl_regwen.3354790975
/workspace/coverage/default/11.sram_ctrl_smoke.1998912525
/workspace/coverage/default/11.sram_ctrl_stress_all.1852561887
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2425074438
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1019137015
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.43135412
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1778907859
/workspace/coverage/default/12.sram_ctrl_alert_test.2215722827
/workspace/coverage/default/12.sram_ctrl_bijection.2531497198
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/workspace/coverage/default/43.sram_ctrl_mem_partial_access.474033380
/workspace/coverage/default/43.sram_ctrl_mem_walk.1152724590
/workspace/coverage/default/43.sram_ctrl_multiple_keys.954437402
/workspace/coverage/default/43.sram_ctrl_partial_access.2172079274
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2486057681
/workspace/coverage/default/43.sram_ctrl_ram_cfg.3757299405
/workspace/coverage/default/43.sram_ctrl_regwen.2758522884
/workspace/coverage/default/43.sram_ctrl_smoke.3125802629
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1279964973
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.669282775
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2336234087
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.4028970660
/workspace/coverage/default/44.sram_ctrl_alert_test.1696040586
/workspace/coverage/default/44.sram_ctrl_bijection.3721773356
/workspace/coverage/default/44.sram_ctrl_executable.3623325195
/workspace/coverage/default/44.sram_ctrl_lc_escalation.972124622
/workspace/coverage/default/44.sram_ctrl_max_throughput.643273261
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1304959079
/workspace/coverage/default/44.sram_ctrl_mem_walk.3705149409
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3406360364
/workspace/coverage/default/44.sram_ctrl_partial_access.2600252658
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3870577773
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1970382051
/workspace/coverage/default/44.sram_ctrl_regwen.170778369
/workspace/coverage/default/44.sram_ctrl_smoke.2324463075
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1107089177
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3636020413
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.458280587
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2034009740
/workspace/coverage/default/45.sram_ctrl_alert_test.770254378
/workspace/coverage/default/45.sram_ctrl_bijection.3045064039
/workspace/coverage/default/45.sram_ctrl_executable.710509331
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1402783472
/workspace/coverage/default/45.sram_ctrl_max_throughput.345428972
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3194249933
/workspace/coverage/default/45.sram_ctrl_mem_walk.1037980988
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1401506403
/workspace/coverage/default/45.sram_ctrl_partial_access.2807415065
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.685869247
/workspace/coverage/default/45.sram_ctrl_ram_cfg.683702241
/workspace/coverage/default/45.sram_ctrl_regwen.1491256431
/workspace/coverage/default/45.sram_ctrl_smoke.2204246124
/workspace/coverage/default/45.sram_ctrl_stress_all.1854412070
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1234029775
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2026574388
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1295376444
/workspace/coverage/default/46.sram_ctrl_alert_test.4226863903
/workspace/coverage/default/46.sram_ctrl_bijection.1338022655
/workspace/coverage/default/46.sram_ctrl_executable.1118857752
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2323599899
/workspace/coverage/default/46.sram_ctrl_max_throughput.4144061731
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3594506152
/workspace/coverage/default/46.sram_ctrl_mem_walk.2685622423
/workspace/coverage/default/46.sram_ctrl_multiple_keys.429735053
/workspace/coverage/default/46.sram_ctrl_partial_access.1958421427
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2015095653
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1757277380
/workspace/coverage/default/46.sram_ctrl_regwen.3673408911
/workspace/coverage/default/46.sram_ctrl_smoke.1136820345
/workspace/coverage/default/46.sram_ctrl_stress_all.2451543125
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2092404844
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.193398817
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1272526917
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2902339664
/workspace/coverage/default/47.sram_ctrl_alert_test.687095001
/workspace/coverage/default/47.sram_ctrl_bijection.3536448702
/workspace/coverage/default/47.sram_ctrl_executable.1144526743
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1085031429
/workspace/coverage/default/47.sram_ctrl_max_throughput.122904464
/workspace/coverage/default/47.sram_ctrl_mem_walk.3459247255
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1991710541
/workspace/coverage/default/47.sram_ctrl_partial_access.864635651
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3026809109
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3548203415
/workspace/coverage/default/47.sram_ctrl_regwen.2004824276
/workspace/coverage/default/47.sram_ctrl_smoke.958627761
/workspace/coverage/default/47.sram_ctrl_stress_all.4270365723
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1957820736
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.240158698
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1187491582
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1739406764
/workspace/coverage/default/48.sram_ctrl_alert_test.3806964937
/workspace/coverage/default/48.sram_ctrl_bijection.1110584266
/workspace/coverage/default/48.sram_ctrl_executable.2317178823
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3467522132
/workspace/coverage/default/48.sram_ctrl_max_throughput.259083325
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3945028970
/workspace/coverage/default/48.sram_ctrl_mem_walk.2504959386
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2482692565
/workspace/coverage/default/48.sram_ctrl_partial_access.3249797119
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1108504973
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3286625843
/workspace/coverage/default/48.sram_ctrl_regwen.3906919763
/workspace/coverage/default/48.sram_ctrl_smoke.1641508486
/workspace/coverage/default/48.sram_ctrl_stress_all.1798451800
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.736923522
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2107903078
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.186779953
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3503913677
/workspace/coverage/default/49.sram_ctrl_alert_test.3781180972
/workspace/coverage/default/49.sram_ctrl_bijection.2434338043
/workspace/coverage/default/49.sram_ctrl_executable.702582423
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2124576074
/workspace/coverage/default/49.sram_ctrl_max_throughput.603005468
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.4200469945
/workspace/coverage/default/49.sram_ctrl_mem_walk.119810396
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3289692123
/workspace/coverage/default/49.sram_ctrl_partial_access.2590187777
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1694384259
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3334699997
/workspace/coverage/default/49.sram_ctrl_regwen.1303455641
/workspace/coverage/default/49.sram_ctrl_smoke.1276651371
/workspace/coverage/default/49.sram_ctrl_stress_all.3558323510
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1147789668
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.4186790982
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3433005213
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2717622098
/workspace/coverage/default/5.sram_ctrl_alert_test.3016282063
/workspace/coverage/default/5.sram_ctrl_bijection.1190795575
/workspace/coverage/default/5.sram_ctrl_executable.1794313217
/workspace/coverage/default/5.sram_ctrl_lc_escalation.90189856
/workspace/coverage/default/5.sram_ctrl_max_throughput.791995069
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2308866729
/workspace/coverage/default/5.sram_ctrl_mem_walk.1948881121
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2023447430
/workspace/coverage/default/5.sram_ctrl_partial_access.224368667
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3237123041
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2760323370
/workspace/coverage/default/5.sram_ctrl_regwen.1906175153
/workspace/coverage/default/5.sram_ctrl_smoke.3060529526
/workspace/coverage/default/5.sram_ctrl_stress_all.3391549092
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2369486645
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2859938849
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2710155423
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2915184693
/workspace/coverage/default/6.sram_ctrl_alert_test.1941507694
/workspace/coverage/default/6.sram_ctrl_bijection.2846813894
/workspace/coverage/default/6.sram_ctrl_executable.90282404
/workspace/coverage/default/6.sram_ctrl_lc_escalation.29785385
/workspace/coverage/default/6.sram_ctrl_max_throughput.1034659836
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.579859504
/workspace/coverage/default/6.sram_ctrl_mem_walk.3456282275
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2114756867
/workspace/coverage/default/6.sram_ctrl_partial_access.1271774703
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1773921501
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2014976206
/workspace/coverage/default/6.sram_ctrl_regwen.618444031
/workspace/coverage/default/6.sram_ctrl_smoke.3685431779
/workspace/coverage/default/6.sram_ctrl_stress_all.114962764
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1411491474
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2284284959
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.888294811
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.724291366
/workspace/coverage/default/7.sram_ctrl_alert_test.40574162
/workspace/coverage/default/7.sram_ctrl_bijection.960264541
/workspace/coverage/default/7.sram_ctrl_executable.3507788193
/workspace/coverage/default/7.sram_ctrl_lc_escalation.515667956
/workspace/coverage/default/7.sram_ctrl_max_throughput.3639861932
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3477897602
/workspace/coverage/default/7.sram_ctrl_mem_walk.1120593004
/workspace/coverage/default/7.sram_ctrl_multiple_keys.4158858796
/workspace/coverage/default/7.sram_ctrl_partial_access.1914806115
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1701572787
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2245310631
/workspace/coverage/default/7.sram_ctrl_regwen.2311655735
/workspace/coverage/default/7.sram_ctrl_smoke.595255536
/workspace/coverage/default/7.sram_ctrl_stress_all.1457187899
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1741644059
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.830366406
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.684745895
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2262213440
/workspace/coverage/default/8.sram_ctrl_alert_test.886846616
/workspace/coverage/default/8.sram_ctrl_bijection.3753221146
/workspace/coverage/default/8.sram_ctrl_executable.599086415
/workspace/coverage/default/8.sram_ctrl_lc_escalation.499441251
/workspace/coverage/default/8.sram_ctrl_max_throughput.192153712
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1748256657
/workspace/coverage/default/8.sram_ctrl_mem_walk.3423804535
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1216053928
/workspace/coverage/default/8.sram_ctrl_partial_access.1739993619
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3615866788
/workspace/coverage/default/8.sram_ctrl_ram_cfg.298053293
/workspace/coverage/default/8.sram_ctrl_regwen.459560860
/workspace/coverage/default/8.sram_ctrl_smoke.255040410
/workspace/coverage/default/8.sram_ctrl_stress_all.1934042871
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3933416045
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1945811556
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.978083200
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.4208178497
/workspace/coverage/default/9.sram_ctrl_alert_test.1052520388
/workspace/coverage/default/9.sram_ctrl_bijection.3150801091
/workspace/coverage/default/9.sram_ctrl_executable.168651121
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2543173544
/workspace/coverage/default/9.sram_ctrl_max_throughput.61408628
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3357630336
/workspace/coverage/default/9.sram_ctrl_mem_walk.655089097
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3563125380
/workspace/coverage/default/9.sram_ctrl_partial_access.2002503789
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1712629917
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2743596247
/workspace/coverage/default/9.sram_ctrl_regwen.4108897785
/workspace/coverage/default/9.sram_ctrl_stress_all.310153458
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.696415897
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.57295822
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2678550363

Total test records in report: 1020

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/48.sram_ctrl_multiple_keys.2482692565	Aug 06 05:59:28 PM PDT 24	Aug 06 06:06:10 PM PDT 24	19095157865 ps
T2	/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2812829397	Aug 06 05:59:30 PM PDT 24	Aug 06 05:59:37 PM PDT 24	3464967215 ps
T3	/workspace/coverage/default/32.sram_ctrl_smoke.638698853	Aug 06 05:56:38 PM PDT 24	Aug 06 05:56:49 PM PDT 24	3740122945 ps
T4	/workspace/coverage/default/2.sram_ctrl_regwen.645931964	Aug 06 05:53:10 PM PDT 24	Aug 06 05:57:47 PM PDT 24	1192376405 ps
T5	/workspace/coverage/default/36.sram_ctrl_max_throughput.3293510871	Aug 06 05:57:20 PM PDT 24	Aug 06 05:57:21 PM PDT 24	61916176 ps
T10	/workspace/coverage/default/0.sram_ctrl_alert_test.4095374435	Aug 06 05:53:09 PM PDT 24	Aug 06 05:53:10 PM PDT 24	14342853 ps
T11	/workspace/coverage/default/40.sram_ctrl_mem_partial_access.2445301379	Aug 06 05:58:03 PM PDT 24	Aug 06 05:58:06 PM PDT 24	353415552 ps
T12	/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1019137015	Aug 06 05:53:54 PM PDT 24	Aug 06 05:55:57 PM PDT 24	1326520651 ps
T13	/workspace/coverage/default/40.sram_ctrl_executable.1334857247	Aug 06 05:58:02 PM PDT 24	Aug 06 05:58:35 PM PDT 24	2031686967 ps
T14	/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2710155423	Aug 06 05:53:29 PM PDT 24	Aug 06 05:55:53 PM PDT 24	778097979 ps
T29	/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.69797266	Aug 06 05:55:34 PM PDT 24	Aug 06 06:00:19 PM PDT 24	3793817952 ps
T31	/workspace/coverage/default/35.sram_ctrl_ram_cfg.499626447	Aug 06 05:57:19 PM PDT 24	Aug 06 05:57:20 PM PDT 24	47407736 ps
T30	/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1402178095	Aug 06 05:53:35 PM PDT 24	Aug 06 05:53:51 PM PDT 24	80312633 ps
T43	/workspace/coverage/default/26.sram_ctrl_mem_walk.3018840210	Aug 06 05:55:46 PM PDT 24	Aug 06 05:55:51 PM PDT 24	254221830 ps
T6	/workspace/coverage/default/42.sram_ctrl_stress_all.3101320238	Aug 06 05:58:30 PM PDT 24	Aug 06 06:43:19 PM PDT 24	36101033449 ps
T27	/workspace/coverage/default/33.sram_ctrl_access_during_key_req.603698017	Aug 06 05:56:51 PM PDT 24	Aug 06 06:19:39 PM PDT 24	25968138300 ps
T83	/workspace/coverage/default/43.sram_ctrl_stress_pipeline.669282775	Aug 06 05:58:28 PM PDT 24	Aug 06 06:05:37 PM PDT 24	8111247760 ps
T28	/workspace/coverage/default/41.sram_ctrl_multiple_keys.413646661	Aug 06 05:58:17 PM PDT 24	Aug 06 06:10:09 PM PDT 24	77336412816 ps
T61	/workspace/coverage/default/16.sram_ctrl_max_throughput.1942762983	Aug 06 05:54:28 PM PDT 24	Aug 06 05:56:41 PM PDT 24	147004798 ps
T7	/workspace/coverage/default/37.sram_ctrl_lc_escalation.600009635	Aug 06 05:57:33 PM PDT 24	Aug 06 05:57:41 PM PDT 24	659298502 ps
T173	/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.186779953	Aug 06 05:59:51 PM PDT 24	Aug 06 06:01:05 PM PDT 24	252508961 ps
T44	/workspace/coverage/default/23.sram_ctrl_access_during_key_req.671145851	Aug 06 05:55:21 PM PDT 24	Aug 06 06:05:28 PM PDT 24	13888882679 ps
T9	/workspace/coverage/default/3.sram_ctrl_sec_cm.358486876	Aug 06 05:53:38 PM PDT 24	Aug 06 05:53:41 PM PDT 24	317463364 ps
T8	/workspace/coverage/default/36.sram_ctrl_stress_all.2515848640	Aug 06 05:57:33 PM PDT 24	Aug 06 06:07:12 PM PDT 24	31682207011 ps
T36	/workspace/coverage/default/31.sram_ctrl_partial_access.825598295	Aug 06 05:56:23 PM PDT 24	Aug 06 05:57:53 PM PDT 24	584973970 ps
T37	/workspace/coverage/default/33.sram_ctrl_smoke.2639755470	Aug 06 05:56:40 PM PDT 24	Aug 06 05:56:56 PM PDT 24	1541812965 ps
T38	/workspace/coverage/default/20.sram_ctrl_lc_escalation.1407435518	Aug 06 05:55:06 PM PDT 24	Aug 06 05:55:11 PM PDT 24	2199460285 ps
T39	/workspace/coverage/default/20.sram_ctrl_max_throughput.3339226875	Aug 06 05:55:06 PM PDT 24	Aug 06 05:55:31 PM PDT 24	772404885 ps
T40	/workspace/coverage/default/38.sram_ctrl_smoke.4176910418	Aug 06 05:57:33 PM PDT 24	Aug 06 05:58:57 PM PDT 24	254870629 ps
T41	/workspace/coverage/default/2.sram_ctrl_access_during_key_req.2881612389	Aug 06 05:53:13 PM PDT 24	Aug 06 06:15:58 PM PDT 24	10261453699 ps
T42	/workspace/coverage/default/3.sram_ctrl_partial_access.1445831297	Aug 06 05:53:08 PM PDT 24	Aug 06 05:53:26 PM PDT 24	3648719445 ps
T15	/workspace/coverage/default/46.sram_ctrl_alert_test.4226863903	Aug 06 05:59:29 PM PDT 24	Aug 06 05:59:30 PM PDT 24	83577679 ps
T152	/workspace/coverage/default/25.sram_ctrl_multiple_keys.3729839503	Aug 06 05:55:30 PM PDT 24	Aug 06 06:23:43 PM PDT 24	3800751843 ps
T151	/workspace/coverage/default/30.sram_ctrl_bijection.1393694623	Aug 06 05:56:21 PM PDT 24	Aug 06 05:56:50 PM PDT 24	623335774 ps
T19	/workspace/coverage/default/25.sram_ctrl_stress_all.2695688737	Aug 06 05:55:30 PM PDT 24	Aug 06 07:15:07 PM PDT 24	308128247621 ps
T174	/workspace/coverage/default/46.sram_ctrl_max_throughput.4144061731	Aug 06 05:59:12 PM PDT 24	Aug 06 05:59:14 PM PDT 24	73960025 ps
T17	/workspace/coverage/default/2.sram_ctrl_sec_cm.3644501785	Aug 06 05:53:12 PM PDT 24	Aug 06 05:53:14 PM PDT 24	217014537 ps
T164	/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2406939789	Aug 06 05:58:28 PM PDT 24	Aug 06 06:00:02 PM PDT 24	245694111 ps
T175	/workspace/coverage/default/10.sram_ctrl_multiple_keys.3368815088	Aug 06 05:53:59 PM PDT 24	Aug 06 05:54:30 PM PDT 24	5837414651 ps
T105	/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.1564514601	Aug 06 05:53:11 PM PDT 24	Aug 06 05:58:52 PM PDT 24	51285316146 ps
T176	/workspace/coverage/default/26.sram_ctrl_smoke.3073933280	Aug 06 05:55:43 PM PDT 24	Aug 06 05:55:50 PM PDT 24	123327249 ps
T140	/workspace/coverage/default/20.sram_ctrl_smoke.1677615068	Aug 06 05:55:08 PM PDT 24	Aug 06 05:55:11 PM PDT 24	793600216 ps
T162	/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1353924391	Aug 06 05:54:15 PM PDT 24	Aug 06 05:54:28 PM PDT 24	284219094 ps
T106	/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.347255884	Aug 06 05:55:56 PM PDT 24	Aug 06 06:00:23 PM PDT 24	13985366880 ps
T16	/workspace/coverage/default/44.sram_ctrl_alert_test.1696040586	Aug 06 05:58:57 PM PDT 24	Aug 06 05:58:58 PM PDT 24	46597757 ps
T146	/workspace/coverage/default/8.sram_ctrl_multiple_keys.1216053928	Aug 06 05:53:50 PM PDT 24	Aug 06 05:59:01 PM PDT 24	21033282628 ps
T177	/workspace/coverage/default/15.sram_ctrl_max_throughput.3236761062	Aug 06 05:54:15 PM PDT 24	Aug 06 05:55:16 PM PDT 24	443015225 ps
T134	/workspace/coverage/default/4.sram_ctrl_executable.1166789843	Aug 06 05:53:26 PM PDT 24	Aug 06 05:57:02 PM PDT 24	25208484837 ps
T178	/workspace/coverage/default/1.sram_ctrl_partial_access.20882973	Aug 06 05:53:10 PM PDT 24	Aug 06 05:53:46 PM PDT 24	112633497 ps
T142	/workspace/coverage/default/2.sram_ctrl_multiple_keys.1858576969	Aug 06 05:53:06 PM PDT 24	Aug 06 06:13:04 PM PDT 24	61432766094 ps
T179	/workspace/coverage/default/39.sram_ctrl_max_throughput.1159883884	Aug 06 05:57:48 PM PDT 24	Aug 06 05:58:09 PM PDT 24	101344481 ps
T149	/workspace/coverage/default/2.sram_ctrl_bijection.3384587304	Aug 06 05:53:11 PM PDT 24	Aug 06 05:53:28 PM PDT 24	1106683501 ps
T21	/workspace/coverage/default/19.sram_ctrl_stress_all.2561994047	Aug 06 05:55:09 PM PDT 24	Aug 06 06:30:58 PM PDT 24	48893777015 ps
T170	/workspace/coverage/default/1.sram_ctrl_smoke.4109124082	Aug 06 05:53:12 PM PDT 24	Aug 06 05:54:42 PM PDT 24	178968492 ps
T22	/workspace/coverage/default/13.sram_ctrl_lc_escalation.2008067205	Aug 06 05:54:14 PM PDT 24	Aug 06 05:54:20 PM PDT 24	883946689 ps
T180	/workspace/coverage/default/20.sram_ctrl_partial_access.2607463166	Aug 06 05:55:07 PM PDT 24	Aug 06 05:55:37 PM PDT 24	446447417 ps
T131	/workspace/coverage/default/36.sram_ctrl_executable.3854685745	Aug 06 05:57:21 PM PDT 24	Aug 06 06:12:52 PM PDT 24	9100662824 ps
T135	/workspace/coverage/default/27.sram_ctrl_regwen.3042336910	Aug 06 05:55:57 PM PDT 24	Aug 06 06:11:15 PM PDT 24	16304561376 ps
T107	/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1175633519	Aug 06 05:53:56 PM PDT 24	Aug 06 05:58:23 PM PDT 24	11142815554 ps
T181	/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.458280587	Aug 06 05:58:40 PM PDT 24	Aug 06 06:00:35 PM PDT 24	135464554 ps
T182	/workspace/coverage/default/8.sram_ctrl_smoke.255040410	Aug 06 05:53:50 PM PDT 24	Aug 06 05:53:55 PM PDT 24	490991377 ps
T143	/workspace/coverage/default/39.sram_ctrl_multiple_keys.1643287519	Aug 06 05:57:48 PM PDT 24	Aug 06 06:11:15 PM PDT 24	69338053119 ps
T183	/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.464321875	Aug 06 05:58:01 PM PDT 24	Aug 06 05:58:04 PM PDT 24	56503239 ps
T108	/workspace/coverage/default/10.sram_ctrl_stress_pipeline.885925926	Aug 06 05:54:01 PM PDT 24	Aug 06 05:58:55 PM PDT 24	5844719257 ps
T184	/workspace/coverage/default/49.sram_ctrl_smoke.1276651371	Aug 06 05:59:52 PM PDT 24	Aug 06 06:00:01 PM PDT 24	519778199 ps
T132	/workspace/coverage/default/19.sram_ctrl_executable.1446966924	Aug 06 05:54:45 PM PDT 24	Aug 06 06:14:56 PM PDT 24	2430688339 ps
T45	/workspace/coverage/default/21.sram_ctrl_mem_walk.2472081325	Aug 06 05:55:16 PM PDT 24	Aug 06 05:55:27 PM PDT 24	1753833668 ps
T46	/workspace/coverage/default/23.sram_ctrl_mem_partial_access.4216963306	Aug 06 05:55:20 PM PDT 24	Aug 06 05:55:23 PM PDT 24	382057667 ps
T88	/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3233572159	Aug 06 05:53:59 PM PDT 24	Aug 06 06:24:50 PM PDT 24	17200351740 ps
T161	/workspace/coverage/default/15.sram_ctrl_alert_test.3756802303	Aug 06 05:54:32 PM PDT 24	Aug 06 05:54:32 PM PDT 24	22374531 ps
T166	/workspace/coverage/default/18.sram_ctrl_smoke.462006203	Aug 06 05:54:41 PM PDT 24	Aug 06 05:54:58 PM PDT 24	1799683569 ps
T133	/workspace/coverage/default/36.sram_ctrl_regwen.4131553231	Aug 06 05:57:20 PM PDT 24	Aug 06 06:23:18 PM PDT 24	93895422318 ps
T109	/workspace/coverage/default/37.sram_ctrl_stress_pipeline.3882698046	Aug 06 05:57:35 PM PDT 24	Aug 06 06:00:02 PM PDT 24	1629964877 ps
T147	/workspace/coverage/default/27.sram_ctrl_max_throughput.1440658633	Aug 06 05:55:57 PM PDT 24	Aug 06 05:56:31 PM PDT 24	363891131 ps
T185	/workspace/coverage/default/38.sram_ctrl_max_throughput.2899347208	Aug 06 05:57:48 PM PDT 24	Aug 06 05:57:53 PM PDT 24	67069464 ps
T169	/workspace/coverage/default/17.sram_ctrl_multiple_keys.135748915	Aug 06 05:54:28 PM PDT 24	Aug 06 06:02:04 PM PDT 24	5264323391 ps
T165	/workspace/coverage/default/23.sram_ctrl_bijection.3658551136	Aug 06 05:55:19 PM PDT 24	Aug 06 05:56:43 PM PDT 24	24373209475 ps
T153	/workspace/coverage/default/28.sram_ctrl_lc_escalation.3304335344	Aug 06 05:56:11 PM PDT 24	Aug 06 05:56:14 PM PDT 24	248941821 ps
T171	/workspace/coverage/default/34.sram_ctrl_alert_test.3207252222	Aug 06 05:57:00 PM PDT 24	Aug 06 05:57:01 PM PDT 24	14024020 ps
T139	/workspace/coverage/default/43.sram_ctrl_executable.3258040336	Aug 06 05:58:41 PM PDT 24	Aug 06 06:06:29 PM PDT 24	20638081041 ps
T50	/workspace/coverage/default/20.sram_ctrl_mem_walk.1689437918	Aug 06 05:55:08 PM PDT 24	Aug 06 05:55:13 PM PDT 24	379967388 ps
T32	/workspace/coverage/default/20.sram_ctrl_ram_cfg.2112287080	Aug 06 05:55:06 PM PDT 24	Aug 06 05:55:07 PM PDT 24	88369628 ps
T145	/workspace/coverage/default/47.sram_ctrl_executable.1144526743	Aug 06 05:59:30 PM PDT 24	Aug 06 06:07:07 PM PDT 24	1936719526 ps
T155	/workspace/coverage/default/29.sram_ctrl_alert_test.3221446773	Aug 06 05:56:13 PM PDT 24	Aug 06 05:56:14 PM PDT 24	19190850 ps
T130	/workspace/coverage/default/19.sram_ctrl_regwen.1119986133	Aug 06 05:54:42 PM PDT 24	Aug 06 06:16:55 PM PDT 24	46035238973 ps
T51	/workspace/coverage/default/28.sram_ctrl_mem_walk.1023755783	Aug 06 05:56:13 PM PDT 24	Aug 06 05:56:24 PM PDT 24	2190315237 ps
T156	/workspace/coverage/default/2.sram_ctrl_max_throughput.2004898539	Aug 06 05:53:05 PM PDT 24	Aug 06 05:54:31 PM PDT 24	477370216 ps
T186	/workspace/coverage/default/5.sram_ctrl_partial_access.224368667	Aug 06 05:53:35 PM PDT 24	Aug 06 05:53:47 PM PDT 24	432794658 ps
T187	/workspace/coverage/default/24.sram_ctrl_partial_access.4267815584	Aug 06 05:55:14 PM PDT 24	Aug 06 05:55:28 PM PDT 24	282238770 ps
T89	/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1024776525	Aug 06 05:53:55 PM PDT 24	Aug 06 05:53:59 PM PDT 24	335749422 ps
T90	/workspace/coverage/default/20.sram_ctrl_mem_partial_access.2010797954	Aug 06 05:55:06 PM PDT 24	Aug 06 05:55:09 PM PDT 24	201733530 ps
T172	/workspace/coverage/default/45.sram_ctrl_smoke.2204246124	Aug 06 05:58:57 PM PDT 24	Aug 06 05:59:14 PM PDT 24	1576332652 ps
T150	/workspace/coverage/default/15.sram_ctrl_lc_escalation.491707265	Aug 06 05:54:15 PM PDT 24	Aug 06 05:54:22 PM PDT 24	957655683 ps
T91	/workspace/coverage/default/24.sram_ctrl_mem_partial_access.888000815	Aug 06 05:55:31 PM PDT 24	Aug 06 05:55:35 PM PDT 24	188466353 ps
T110	/workspace/coverage/default/36.sram_ctrl_stress_pipeline.3421915310	Aug 06 05:57:20 PM PDT 24	Aug 06 06:00:11 PM PDT 24	1768943854 ps
T188	/workspace/coverage/default/48.sram_ctrl_max_throughput.259083325	Aug 06 05:59:51 PM PDT 24	Aug 06 06:01:31 PM PDT 24	121042629 ps
T189	/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2336234087	Aug 06 05:58:27 PM PDT 24	Aug 06 05:59:29 PM PDT 24	473609548 ps
T158	/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1739406764	Aug 06 05:59:51 PM PDT 24	Aug 06 06:06:57 PM PDT 24	2533672594 ps
T111	/workspace/coverage/default/19.sram_ctrl_stress_pipeline.3321931685	Aug 06 05:54:42 PM PDT 24	Aug 06 06:00:12 PM PDT 24	13005728945 ps
T47	/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3594506152	Aug 06 05:59:10 PM PDT 24	Aug 06 05:59:17 PM PDT 24	177952315 ps
T190	/workspace/coverage/default/38.sram_ctrl_mem_walk.3909404657	Aug 06 05:57:47 PM PDT 24	Aug 06 05:57:56 PM PDT 24	523058318 ps
T191	/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.3950077550	Aug 06 05:55:31 PM PDT 24	Aug 06 05:55:56 PM PDT 24	399534813 ps
T23	/workspace/coverage/default/24.sram_ctrl_stress_all.1347123619	Aug 06 05:55:28 PM PDT 24	Aug 06 06:25:56 PM PDT 24	77308581447 ps
T20	/workspace/coverage/default/41.sram_ctrl_regwen.1871361763	Aug 06 05:58:16 PM PDT 24	Aug 06 06:14:06 PM PDT 24	55583938544 ps
T138	/workspace/coverage/default/29.sram_ctrl_stress_all.3900671085	Aug 06 05:56:13 PM PDT 24	Aug 06 06:58:52 PM PDT 24	14873485204 ps
T154	/workspace/coverage/default/30.sram_ctrl_smoke.3834192378	Aug 06 05:56:26 PM PDT 24	Aug 06 05:56:47 PM PDT 24	1198180816 ps
T192	/workspace/coverage/default/38.sram_ctrl_alert_test.1710211598	Aug 06 05:57:46 PM PDT 24	Aug 06 05:57:47 PM PDT 24	20564612 ps
T163	/workspace/coverage/default/42.sram_ctrl_access_during_key_req.246980915	Aug 06 05:58:27 PM PDT 24	Aug 06 06:15:39 PM PDT 24	20701689409 ps
T160	/workspace/coverage/default/17.sram_ctrl_executable.3014486768	Aug 06 05:54:28 PM PDT 24	Aug 06 06:03:23 PM PDT 24	5224333138 ps
T193	/workspace/coverage/default/3.sram_ctrl_stress_pipeline.1307524888	Aug 06 05:53:07 PM PDT 24	Aug 06 05:56:34 PM PDT 24	2296257377 ps
T194	/workspace/coverage/default/30.sram_ctrl_stress_pipeline.2749279608	Aug 06 05:56:24 PM PDT 24	Aug 06 06:01:13 PM PDT 24	12022146477 ps
T159	/workspace/coverage/default/20.sram_ctrl_bijection.2450634638	Aug 06 05:55:11 PM PDT 24	Aug 06 05:55:50 PM PDT 24	9688696625 ps
T195	/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.970017549	Aug 06 05:53:58 PM PDT 24	Aug 06 05:54:22 PM PDT 24	91861389 ps
T144	/workspace/coverage/default/12.sram_ctrl_multiple_keys.1291763544	Aug 06 05:54:01 PM PDT 24	Aug 06 06:10:29 PM PDT 24	12977417139 ps
T167	/workspace/coverage/default/28.sram_ctrl_executable.3667638901	Aug 06 05:56:12 PM PDT 24	Aug 06 06:01:38 PM PDT 24	14591097252 ps
T196	/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1945811556	Aug 06 05:53:52 PM PDT 24	Aug 06 05:57:15 PM PDT 24	2057416607 ps
T148	/workspace/coverage/default/14.sram_ctrl_access_during_key_req.516820494	Aug 06 05:54:11 PM PDT 24	Aug 06 06:16:26 PM PDT 24	4158461993 ps
T197	/workspace/coverage/default/38.sram_ctrl_bijection.3565413818	Aug 06 05:57:34 PM PDT 24	Aug 06 05:57:57 PM PDT 24	1929773966 ps
T49	/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3945028970	Aug 06 05:59:51 PM PDT 24	Aug 06 05:59:55 PM PDT 24	315189846 ps
T24	/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.2622804041	Aug 06 05:54:15 PM PDT 24	Aug 06 05:54:25 PM PDT 24	2472243867 ps
T18	/workspace/coverage/default/4.sram_ctrl_sec_cm.1520861258	Aug 06 05:53:34 PM PDT 24	Aug 06 05:53:36 PM PDT 24	196175917 ps
T68	/workspace/coverage/default/0.sram_ctrl_multiple_keys.2156880916	Aug 06 05:53:06 PM PDT 24	Aug 06 06:08:27 PM PDT 24	55318788222 ps
T25	/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2734124338	Aug 06 05:57:33 PM PDT 24	Aug 06 05:58:56 PM PDT 24	2216134698 ps
T69	/workspace/coverage/default/8.sram_ctrl_max_throughput.192153712	Aug 06 05:53:57 PM PDT 24	Aug 06 05:54:21 PM PDT 24	163250466 ps
T70	/workspace/coverage/default/18.sram_ctrl_multiple_keys.2998140012	Aug 06 05:54:40 PM PDT 24	Aug 06 05:59:53 PM PDT 24	1333910790 ps
T71	/workspace/coverage/default/35.sram_ctrl_smoke.3296088798	Aug 06 05:57:03 PM PDT 24	Aug 06 05:57:49 PM PDT 24	106485626 ps
T72	/workspace/coverage/default/47.sram_ctrl_partial_access.864635651	Aug 06 05:59:28 PM PDT 24	Aug 06 05:59:45 PM PDT 24	1198207137 ps
T73	/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.888294811	Aug 06 05:53:41 PM PDT 24	Aug 06 05:56:00 PM PDT 24	1632898276 ps
T74	/workspace/coverage/default/18.sram_ctrl_access_during_key_req.2478676132	Aug 06 05:54:42 PM PDT 24	Aug 06 06:01:42 PM PDT 24	5536785189 ps
T119	/workspace/coverage/default/23.sram_ctrl_executable.645429671	Aug 06 05:55:21 PM PDT 24	Aug 06 06:22:16 PM PDT 24	54632282928 ps
T120	/workspace/coverage/default/0.sram_ctrl_max_throughput.43296766	Aug 06 05:53:10 PM PDT 24	Aug 06 05:53:59 PM PDT 24	96720128 ps
T121	/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3749189221	Aug 06 05:54:23 PM PDT 24	Aug 06 05:57:27 PM PDT 24	17260659646 ps
T198	/workspace/coverage/default/35.sram_ctrl_stress_all.4171996271	Aug 06 05:57:20 PM PDT 24	Aug 06 06:45:39 PM PDT 24	66822726041 ps
T199	/workspace/coverage/default/49.sram_ctrl_alert_test.3781180972	Aug 06 06:00:05 PM PDT 24	Aug 06 06:00:06 PM PDT 24	33302830 ps
T200	/workspace/coverage/default/39.sram_ctrl_executable.2570003707	Aug 06 05:57:48 PM PDT 24	Aug 06 06:08:32 PM PDT 24	4394609548 ps
T201	/workspace/coverage/default/10.sram_ctrl_alert_test.3514540125	Aug 06 05:54:05 PM PDT 24	Aug 06 05:54:06 PM PDT 24	85743908 ps
T202	/workspace/coverage/default/30.sram_ctrl_access_during_key_req.3829610302	Aug 06 05:56:23 PM PDT 24	Aug 06 06:15:37 PM PDT 24	3970853053 ps
T203	/workspace/coverage/default/4.sram_ctrl_multiple_keys.4212209416	Aug 06 05:53:27 PM PDT 24	Aug 06 05:55:21 PM PDT 24	30828114688 ps
T141	/workspace/coverage/default/3.sram_ctrl_multiple_keys.2531283913	Aug 06 05:53:05 PM PDT 24	Aug 06 06:15:33 PM PDT 24	26378680632 ps
T204	/workspace/coverage/default/27.sram_ctrl_mem_partial_access.2022218789	Aug 06 05:56:00 PM PDT 24	Aug 06 05:56:04 PM PDT 24	87124071 ps
T205	/workspace/coverage/default/4.sram_ctrl_max_throughput.541656634	Aug 06 05:53:27 PM PDT 24	Aug 06 05:54:38 PM PDT 24	448010493 ps
T206	/workspace/coverage/default/12.sram_ctrl_smoke.4273105400	Aug 06 05:53:57 PM PDT 24	Aug 06 05:53:59 PM PDT 24	49828085 ps
T207	/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2717622098	Aug 06 05:53:34 PM PDT 24	Aug 06 06:04:21 PM PDT 24	6833876376 ps
T208	/workspace/coverage/default/26.sram_ctrl_stress_all.1641232151	Aug 06 05:55:45 PM PDT 24	Aug 06 06:22:02 PM PDT 24	23803158563 ps
T33	/workspace/coverage/default/49.sram_ctrl_ram_cfg.3334699997	Aug 06 05:59:54 PM PDT 24	Aug 06 05:59:55 PM PDT 24	36733989 ps
T209	/workspace/coverage/default/6.sram_ctrl_max_throughput.1034659836	Aug 06 05:53:37 PM PDT 24	Aug 06 05:53:49 PM PDT 24	327391966 ps
T210	/workspace/coverage/default/14.sram_ctrl_alert_test.1149290934	Aug 06 05:54:15 PM PDT 24	Aug 06 05:54:16 PM PDT 24	13061394 ps
T211	/workspace/coverage/default/49.sram_ctrl_stress_pipeline.4186790982	Aug 06 05:59:53 PM PDT 24	Aug 06 06:03:50 PM PDT 24	10206148052 ps
T212	/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3183645454	Aug 06 05:56:15 PM PDT 24	Aug 06 05:56:20 PM PDT 24	51797832 ps
T136	/workspace/coverage/default/13.sram_ctrl_regwen.1877822422	Aug 06 05:54:16 PM PDT 24	Aug 06 06:05:22 PM PDT 24	108741369610 ps
T213	/workspace/coverage/default/26.sram_ctrl_access_during_key_req.2629931332	Aug 06 05:55:45 PM PDT 24	Aug 06 06:02:30 PM PDT 24	3015675481 ps
T214	/workspace/coverage/default/16.sram_ctrl_partial_access.2770290551	Aug 06 05:54:28 PM PDT 24	Aug 06 05:54:33 PM PDT 24	128742993 ps
T215	/workspace/coverage/default/24.sram_ctrl_stress_pipeline.2713283516	Aug 06 05:55:18 PM PDT 24	Aug 06 05:58:34 PM PDT 24	2127079821 ps
T157	/workspace/coverage/default/33.sram_ctrl_regwen.2026405717	Aug 06 05:56:52 PM PDT 24	Aug 06 06:16:18 PM PDT 24	53325416731 ps
T216	/workspace/coverage/default/7.sram_ctrl_partial_access.1914806115	Aug 06 05:53:43 PM PDT 24	Aug 06 05:54:23 PM PDT 24	1430312192 ps
T217	/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1187491582	Aug 06 05:59:29 PM PDT 24	Aug 06 06:00:12 PM PDT 24	383302815 ps
T218	/workspace/coverage/default/31.sram_ctrl_bijection.3885283297	Aug 06 05:56:22 PM PDT 24	Aug 06 05:56:59 PM PDT 24	1855871170 ps
T219	/workspace/coverage/default/32.sram_ctrl_ram_cfg.3901887088	Aug 06 05:56:40 PM PDT 24	Aug 06 05:56:41 PM PDT 24	88517205 ps
T220	/workspace/coverage/default/29.sram_ctrl_executable.2563588845	Aug 06 05:56:13 PM PDT 24	Aug 06 06:16:17 PM PDT 24	11031744602 ps
T221	/workspace/coverage/default/8.sram_ctrl_partial_access.1739993619	Aug 06 05:53:54 PM PDT 24	Aug 06 05:53:57 PM PDT 24	116086741 ps
T222	/workspace/coverage/default/48.sram_ctrl_partial_access.3249797119	Aug 06 05:59:51 PM PDT 24	Aug 06 06:00:03 PM PDT 24	993411207 ps
T223	/workspace/coverage/default/18.sram_ctrl_max_throughput.2508822363	Aug 06 05:54:41 PM PDT 24	Aug 06 05:54:44 PM PDT 24	164309120 ps
T224	/workspace/coverage/default/5.sram_ctrl_multiple_keys.2023447430	Aug 06 05:53:36 PM PDT 24	Aug 06 06:15:25 PM PDT 24	21625626269 ps
T225	/workspace/coverage/default/16.sram_ctrl_smoke.596423362	Aug 06 05:54:27 PM PDT 24	Aug 06 05:54:30 PM PDT 24	1174393645 ps
T226	/workspace/coverage/default/10.sram_ctrl_max_throughput.1953965957	Aug 06 05:54:05 PM PDT 24	Aug 06 05:54:12 PM PDT 24	67703685 ps
T52	/workspace/coverage/default/15.sram_ctrl_mem_walk.703281013	Aug 06 05:54:30 PM PDT 24	Aug 06 05:54:40 PM PDT 24	658279337 ps
T227	/workspace/coverage/default/6.sram_ctrl_multiple_keys.2114756867	Aug 06 05:53:37 PM PDT 24	Aug 06 06:02:44 PM PDT 24	32424387028 ps
T228	/workspace/coverage/default/36.sram_ctrl_ram_cfg.4007450788	Aug 06 05:57:21 PM PDT 24	Aug 06 05:57:22 PM PDT 24	92531976 ps
T229	/workspace/coverage/default/44.sram_ctrl_access_during_key_req.4028970660	Aug 06 05:58:41 PM PDT 24	Aug 06 06:06:04 PM PDT 24	2469685910 ps
T230	/workspace/coverage/default/34.sram_ctrl_bijection.3758497394	Aug 06 05:56:51 PM PDT 24	Aug 06 05:57:28 PM PDT 24	28805195330 ps
T231	/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3237123041	Aug 06 05:53:39 PM PDT 24	Aug 06 06:02:31 PM PDT 24	239536168171 ps
T137	/workspace/coverage/default/15.sram_ctrl_regwen.2578347877	Aug 06 05:54:14 PM PDT 24	Aug 06 06:07:32 PM PDT 24	51802354161 ps
T53	/workspace/coverage/default/37.sram_ctrl_mem_walk.3612265917	Aug 06 05:57:34 PM PDT 24	Aug 06 05:57:41 PM PDT 24	336337811 ps
T232	/workspace/coverage/default/31.sram_ctrl_alert_test.588820737	Aug 06 05:56:39 PM PDT 24	Aug 06 05:56:40 PM PDT 24	15122716 ps
T233	/workspace/coverage/default/42.sram_ctrl_executable.3731006246	Aug 06 05:58:29 PM PDT 24	Aug 06 06:11:54 PM PDT 24	3352993818 ps
T168	/workspace/coverage/default/6.sram_ctrl_alert_test.1941507694	Aug 06 05:53:39 PM PDT 24	Aug 06 05:53:40 PM PDT 24	44990864 ps
T234	/workspace/coverage/default/21.sram_ctrl_alert_test.74705076	Aug 06 05:55:16 PM PDT 24	Aug 06 05:55:17 PM PDT 24	43966839 ps
T235	/workspace/coverage/default/14.sram_ctrl_smoke.1849682616	Aug 06 05:54:16 PM PDT 24	Aug 06 05:54:32 PM PDT 24	3817520295 ps
T236	/workspace/coverage/default/13.sram_ctrl_stress_pipeline.450804581	Aug 06 05:54:19 PM PDT 24	Aug 06 05:56:31 PM PDT 24	9691501439 ps
T237	/workspace/coverage/default/41.sram_ctrl_smoke.1256166117	Aug 06 05:58:16 PM PDT 24	Aug 06 05:58:21 PM PDT 24	186260168 ps
T238	/workspace/coverage/default/18.sram_ctrl_partial_access.3279217150	Aug 06 05:54:41 PM PDT 24	Aug 06 05:54:49 PM PDT 24	181826346 ps
T239	/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1499985952	Aug 06 05:53:09 PM PDT 24	Aug 06 06:06:27 PM PDT 24	5115581367 ps
T240	/workspace/coverage/default/24.sram_ctrl_max_throughput.3679695228	Aug 06 05:55:15 PM PDT 24	Aug 06 05:55:59 PM PDT 24	1880149098 ps
T241	/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.1474240805	Aug 06 05:58:28 PM PDT 24	Aug 06 06:03:39 PM PDT 24	198334175301 ps
T242	/workspace/coverage/default/13.sram_ctrl_mem_walk.402164624	Aug 06 05:54:22 PM PDT 24	Aug 06 05:54:33 PM PDT 24	185516162 ps
T243	/workspace/coverage/default/42.sram_ctrl_max_throughput.3344373145	Aug 06 05:58:28 PM PDT 24	Aug 06 05:58:36 PM PDT 24	61625157 ps
T244	/workspace/coverage/default/11.sram_ctrl_lc_escalation.2134846854	Aug 06 05:53:54 PM PDT 24	Aug 06 05:53:56 PM PDT 24	354098078 ps
T245	/workspace/coverage/default/21.sram_ctrl_mem_partial_access.2672896738	Aug 06 05:55:16 PM PDT 24	Aug 06 05:55:19 PM PDT 24	174864174 ps
T26	/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1107089177	Aug 06 05:58:57 PM PDT 24	Aug 06 06:00:44 PM PDT 24	800709431 ps
T246	/workspace/coverage/default/32.sram_ctrl_executable.3547749428	Aug 06 05:56:38 PM PDT 24	Aug 06 06:19:26 PM PDT 24	50060649873 ps
T247	/workspace/coverage/default/7.sram_ctrl_regwen.2311655735	Aug 06 05:53:51 PM PDT 24	Aug 06 05:56:20 PM PDT 24	3367924290 ps
T248	/workspace/coverage/default/35.sram_ctrl_lc_escalation.2544920206	Aug 06 05:57:03 PM PDT 24	Aug 06 05:57:06 PM PDT 24	409296916 ps
T249	/workspace/coverage/default/20.sram_ctrl_regwen.3279624952	Aug 06 05:55:06 PM PDT 24	Aug 06 06:01:40 PM PDT 24	11512750637 ps
T250	/workspace/coverage/default/19.sram_ctrl_lc_escalation.460397936	Aug 06 05:54:42 PM PDT 24	Aug 06 05:54:48 PM PDT 24	466052016 ps
T251	/workspace/coverage/default/9.sram_ctrl_max_throughput.61408628	Aug 06 05:53:57 PM PDT 24	Aug 06 05:54:44 PM PDT 24	479396352 ps
T252	/workspace/coverage/default/21.sram_ctrl_stress_pipeline.3270412973	Aug 06 05:55:08 PM PDT 24	Aug 06 05:57:57 PM PDT 24	16365149636 ps
T253	/workspace/coverage/default/22.sram_ctrl_alert_test.3079424600	Aug 06 05:55:16 PM PDT 24	Aug 06 05:55:17 PM PDT 24	14509639 ps
T254	/workspace/coverage/default/17.sram_ctrl_smoke.4068983346	Aug 06 05:54:29 PM PDT 24	Aug 06 05:54:44 PM PDT 24	1084012480 ps
T255	/workspace/coverage/default/19.sram_ctrl_access_during_key_req.3324011211	Aug 06 05:54:41 PM PDT 24	Aug 06 05:57:18 PM PDT 24	557229651 ps
T54	/workspace/coverage/default/14.sram_ctrl_mem_partial_access.538588574	Aug 06 05:54:15 PM PDT 24	Aug 06 05:54:18 PM PDT 24	411907026 ps
T256	/workspace/coverage/default/0.sram_ctrl_bijection.623881615	Aug 06 05:53:06 PM PDT 24	Aug 06 05:53:33 PM PDT 24	442951144 ps
T257	/workspace/coverage/default/33.sram_ctrl_max_throughput.3549221627	Aug 06 05:56:52 PM PDT 24	Aug 06 05:56:58 PM PDT 24	114235752 ps
T258	/workspace/coverage/default/43.sram_ctrl_access_during_key_req.936385322	Aug 06 05:58:42 PM PDT 24	Aug 06 05:59:45 PM PDT 24	2031326945 ps
T259	/workspace/coverage/default/26.sram_ctrl_lc_escalation.881088749	Aug 06 05:55:48 PM PDT 24	Aug 06 05:55:53 PM PDT 24	392473859 ps
T260	/workspace/coverage/default/48.sram_ctrl_stress_all.1798451800	Aug 06 05:59:51 PM PDT 24	Aug 06 06:54:39 PM PDT 24	41772278472 ps
T261	/workspace/coverage/default/41.sram_ctrl_executable.4103582725	Aug 06 05:58:19 PM PDT 24	Aug 06 06:13:17 PM PDT 24	11462776357 ps
T262	/workspace/coverage/default/25.sram_ctrl_max_throughput.2496913818	Aug 06 05:55:30 PM PDT 24	Aug 06 05:56:00 PM PDT 24	257198531 ps
T263	/workspace/coverage/default/18.sram_ctrl_alert_test.4076672415	Aug 06 05:54:44 PM PDT 24	Aug 06 05:54:45 PM PDT 24	48095073 ps
T264	/workspace/coverage/default/7.sram_ctrl_stress_all.1457187899	Aug 06 05:53:53 PM PDT 24	Aug 06 06:09:54 PM PDT 24	103174300667 ps
T265	/workspace/coverage/default/5.sram_ctrl_executable.1794313217	Aug 06 05:53:38 PM PDT 24	Aug 06 06:02:56 PM PDT 24	38141857533 ps
T266	/workspace/coverage/default/12.sram_ctrl_ram_cfg.3085216170	Aug 06 05:54:01 PM PDT 24	Aug 06 05:54:02 PM PDT 24	80714559 ps
T267	/workspace/coverage/default/20.sram_ctrl_access_during_key_req.2258304263	Aug 06 05:55:09 PM PDT 24	Aug 06 06:22:26 PM PDT 24	12904402555 ps
T34	/workspace/coverage/default/1.sram_ctrl_sec_cm.885362600	Aug 06 05:53:08 PM PDT 24	Aug 06 05:53:12 PM PDT 24	1951926164 ps
T268	/workspace/coverage/default/13.sram_ctrl_alert_test.2637039142	Aug 06 05:54:15 PM PDT 24	Aug 06 05:54:16 PM PDT 24	16035915 ps
T269	/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3103175099	Aug 06 05:56:21 PM PDT 24	Aug 06 05:57:45 PM PDT 24	867412586 ps
T270	/workspace/coverage/default/21.sram_ctrl_stress_all.4027132125	Aug 06 05:55:16 PM PDT 24	Aug 06 06:51:30 PM PDT 24	8476726588 ps
T271	/workspace/coverage/default/40.sram_ctrl_multiple_keys.1794453752	Aug 06 05:58:03 PM PDT 24	Aug 06 06:04:22 PM PDT 24	8482435373 ps
T272	/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3802037243	Aug 06 05:53:04 PM PDT 24	Aug 06 05:53:06 PM PDT 24	43448116 ps
T273	/workspace/coverage/default/48.sram_ctrl_regwen.3906919763	Aug 06 05:59:49 PM PDT 24	Aug 06 06:16:39 PM PDT 24	134725212980 ps
T274	/workspace/coverage/default/14.sram_ctrl_ram_cfg.243615662	Aug 06 05:54:18 PM PDT 24	Aug 06 05:54:19 PM PDT 24	78617781 ps
T275	/workspace/coverage/default/10.sram_ctrl_regwen.3114350131	Aug 06 05:54:02 PM PDT 24	Aug 06 06:11:47 PM PDT 24	3082858504 ps
T55	/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3732551109	Aug 06 05:53:35 PM PDT 24	Aug 06 05:58:43 PM PDT 24	2306460755 ps
T276	/workspace/coverage/default/27.sram_ctrl_executable.2768141265	Aug 06 05:55:57 PM PDT 24	Aug 06 06:01:24 PM PDT 24	22888028405 ps
T277	/workspace/coverage/default/39.sram_ctrl_bijection.1918061611	Aug 06 05:57:47 PM PDT 24	Aug 06 05:58:57 PM PDT 24	37333334403 ps
T278	/workspace/coverage/default/29.sram_ctrl_mem_partial_access.1621291718	Aug 06 05:56:16 PM PDT 24	Aug 06 05:56:21 PM PDT 24	190293684 ps
T279	/workspace/coverage/default/45.sram_ctrl_multiple_keys.1401506403	Aug 06 05:58:57 PM PDT 24	Aug 06 06:16:39 PM PDT 24	20233176590 ps
T280	/workspace/coverage/default/13.sram_ctrl_access_during_key_req.3024804720	Aug 06 05:54:12 PM PDT 24	Aug 06 06:08:29 PM PDT 24	2341446597 ps
T281	/workspace/coverage/default/15.sram_ctrl_access_during_key_req.3605037942	Aug 06 05:54:21 PM PDT 24	Aug 06 06:08:38 PM PDT 24	2173730329 ps
T282	/workspace/coverage/default/4.sram_ctrl_access_during_key_req.3099229620	Aug 06 05:53:37 PM PDT 24	Aug 06 06:03:34 PM PDT 24	1289396926 ps
T283	/workspace/coverage/default/3.sram_ctrl_stress_all.3498781985	Aug 06 05:53:35 PM PDT 24	Aug 06 07:09:47 PM PDT 24	218251995691 ps
T284	/workspace/coverage/default/2.sram_ctrl_partial_access.68466765	Aug 06 05:53:05 PM PDT 24	Aug 06 05:53:22 PM PDT 24	1220627796 ps
T56	/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3285863048	Aug 06 05:55:30 PM PDT 24	Aug 06 05:55:41 PM PDT 24	771670015 ps
T285	/workspace/coverage/default/16.sram_ctrl_regwen.678875039	Aug 06 05:54:27 PM PDT 24	Aug 06 06:01:58 PM PDT 24	56383242385 ps
T286	/workspace/coverage/default/45.sram_ctrl_max_throughput.345428972	Aug 06 05:58:57 PM PDT 24	Aug 06 05:59:26 PM PDT 24	91836342 ps
T287	/workspace/coverage/default/14.sram_ctrl_bijection.2075969614	Aug 06 05:54:14 PM PDT 24	Aug 06 05:54:29 PM PDT 24	229023513 ps
T288	/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3328267209	Aug 06 05:53:55 PM PDT 24	Aug 06 06:00:36 PM PDT 24	69943793736 ps
T289	/workspace/coverage/default/6.sram_ctrl_ram_cfg.2014976206	Aug 06 05:53:39 PM PDT 24	Aug 06 05:53:40 PM PDT 24	42769186 ps
T290	/workspace/coverage/default/29.sram_ctrl_stress_pipeline.688707568	Aug 06 05:56:13 PM PDT 24	Aug 06 06:00:16 PM PDT 24	2493866093 ps
T291	/workspace/coverage/default/3.sram_ctrl_access_during_key_req.3489391710	Aug 06 05:53:09 PM PDT 24	Aug 06 06:07:52 PM PDT 24	51718989486 ps
T292	/workspace/coverage/default/7.sram_ctrl_executable.3507788193	Aug 06 05:53:55 PM PDT 24	Aug 06 06:15:55 PM PDT 24	15914628936 ps
T293	/workspace/coverage/default/30.sram_ctrl_max_throughput.3740531766	Aug 06 05:56:21 PM PDT 24	Aug 06 05:56:26 PM PDT 24	178982721 ps
T65	/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.4198830375	Aug 06 05:53:30 PM PDT 24	Aug 06 05:54:41 PM PDT 24	232424596 ps
T294	/workspace/coverage/default/47.sram_ctrl_multiple_keys.1991710541	Aug 06 05:59:26 PM PDT 24	Aug 06 06:21:29 PM PDT 24	64520378244 ps
T295	/workspace/coverage/default/11.sram_ctrl_executable.3266260795	Aug 06 05:53:58 PM PDT 24	Aug 06 05:59:55 PM PDT 24	13639936907 ps
T296	/workspace/coverage/default/10.sram_ctrl_lc_escalation.2008589930	Aug 06 05:54:00 PM PDT 24	Aug 06 05:54:07 PM PDT 24	884671825 ps
T297	/workspace/coverage/default/4.sram_ctrl_alert_test.305554144	Aug 06 05:53:37 PM PDT 24	Aug 06 05:53:38 PM PDT 24	16546486 ps
T298	/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1020586153	Aug 06 05:54:01 PM PDT 24	Aug 06 05:54:04 PM PDT 24	474703903 ps
T299	/workspace/coverage/default/48.sram_ctrl_lc_escalation.3467522132	Aug 06 05:59:52 PM PDT 24	Aug 06 06:00:00 PM PDT 24	2907109458 ps
T300	/workspace/coverage/default/17.sram_ctrl_regwen.296057712	Aug 06 05:54:29 PM PDT 24	Aug 06 06:25:03 PM PDT 24	13838775129 ps
T301	/workspace/coverage/default/1.sram_ctrl_executable.2170088261	Aug 06 05:53:05 PM PDT 24	Aug 06 06:16:04 PM PDT 24	47408427355 ps