Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1024
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
71.23 71.23 91.86 91.86 70.50 70.50 87.86 87.86 23.81 23.81 80.43 80.43 93.51 93.51 50.64 50.64 /workspace/coverage/default/4.sram_ctrl_stress_all.1925686134
87.71 16.48 96.53 4.66 83.77 13.27 95.21 7.35 71.43 47.62 89.13 8.70 96.17 2.65 81.72 31.08 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3776692116
90.92 3.21 97.54 1.02 83.77 0.00 96.19 0.97 90.48 19.05 90.58 1.45 96.17 0.00 81.72 0.00 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3941976450
94.05 3.13 98.73 1.19 86.97 3.20 97.78 1.60 100.00 9.52 93.72 3.14 96.17 0.00 85.01 3.29 /workspace/coverage/default/31.sram_ctrl_lc_escalation.296406582
95.03 0.98 98.90 0.17 87.80 0.83 97.99 0.21 100.00 0.00 94.44 0.72 96.17 0.00 89.95 4.94 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.377307755
95.61 0.58 99.07 0.17 89.57 1.78 98.40 0.42 100.00 0.00 95.17 0.72 96.76 0.59 90.31 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.3393074302
96.11 0.50 99.07 0.00 90.40 0.83 98.40 0.00 100.00 0.00 95.65 0.48 96.76 0.00 92.50 2.19 /workspace/coverage/default/24.sram_ctrl_stress_all.166492028
96.34 0.23 99.07 0.00 90.88 0.47 98.82 0.42 100.00 0.00 95.65 0.00 96.76 0.00 93.24 0.73 /workspace/coverage/default/43.sram_ctrl_alert_test.716345151
96.55 0.20 99.07 0.00 90.88 0.00 98.82 0.00 100.00 0.00 95.65 0.00 96.90 0.15 94.52 1.28 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4135824549
96.75 0.20 99.07 0.00 90.88 0.00 98.89 0.07 100.00 0.00 95.65 0.00 98.23 1.33 94.52 0.00 /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3945182513
96.93 0.18 99.07 0.00 90.88 0.00 98.89 0.00 100.00 0.00 95.65 0.00 99.12 0.88 94.88 0.37 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.1300017372
97.06 0.13 99.15 0.08 90.88 0.00 99.72 0.83 100.00 0.00 95.65 0.00 99.12 0.00 94.88 0.00 /workspace/coverage/default/1.sram_ctrl_ram_cfg.1703892097
97.16 0.10 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 95.65 0.00 99.12 0.00 95.61 0.73 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1309089791
97.27 0.10 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 95.65 0.00 99.12 0.00 96.34 0.73 /workspace/coverage/default/20.sram_ctrl_executable.3651021553
97.35 0.09 99.15 0.00 91.00 0.12 99.72 0.00 100.00 0.00 96.14 0.48 99.12 0.00 96.34 0.00 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3090726480
97.40 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.71 0.37 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1468947904
97.46 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.37 /workspace/coverage/default/20.sram_ctrl_stress_all.3881991734
97.48 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.3904032370
97.51 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2170479668

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1498509764
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1590972686
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2362072542
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1242224297
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.4052779773
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.4219927492
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2843379915
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.643739801
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1198120702
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1345983790
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.136852634
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3919110233
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1952816747
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1157611424
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.117573427
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2844800052
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2215168398
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3120188237
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2370979359
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.790506352
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1720496670
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2598661546
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.511969879
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.232214880
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3556750147
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2798492822
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2239734595
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.4262556621
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1184257370
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.4234938394
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1953442021
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2888885043
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.4139392329
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.318717046
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3502627247
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2824094680
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3710009936
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1722243721
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.814577305
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3103068059
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2357618290
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.4071414790
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2842008102
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3627717263
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3604417336
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3638299936
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.839298539
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3788591424
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.874440560
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2816018718
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2408369248
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1381015277
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1535754459
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1442745706
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.39108462
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2355905476
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1290904882
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.416002662
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1199029014
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.822487131
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2114775165
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2978793817
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2711583436
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.4101649475
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2955024534
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2615000742
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3267990445
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1975293061
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3957128136
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.32183251
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.4213844372
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2411129818
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1119323995
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3181504029
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1961081118
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1257332515
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2435818714
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2225284666
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.664010148
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.32277353
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3069264991
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.738515641
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3521139101
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2893327127
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1257893197
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.814900366
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3975742041
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.4153043431
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2224236991
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.193692879
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.703753897
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2505111554
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2704006882
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3694769220
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2846245119
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.4126619363
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2232693757
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3707195946
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1025802307
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.317983501
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1422294105
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3013606482
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.4219016203
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3468715188
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3153027660
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3241005863
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2994937772
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3368420538
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3840067240
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2793143737
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3087227837
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3538747406
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2901648042
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.4211661821
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2436720797
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.4183597935
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3516980328
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2518731707
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1550237774
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1884288039
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2141643108
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.945191560
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2754956826
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.4123048390
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.4175454390
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3303438627
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1397653311
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3245446509
/workspace/coverage/default/0.sram_ctrl_alert_test.4158803964
/workspace/coverage/default/0.sram_ctrl_bijection.1967692605
/workspace/coverage/default/0.sram_ctrl_executable.791017789
/workspace/coverage/default/0.sram_ctrl_lc_escalation.4184112504
/workspace/coverage/default/0.sram_ctrl_max_throughput.4250141452
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3981081157
/workspace/coverage/default/0.sram_ctrl_mem_walk.1364172260
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3804455725
/workspace/coverage/default/0.sram_ctrl_partial_access.321402043
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3482843037
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2648419233
/workspace/coverage/default/0.sram_ctrl_regwen.3265781462
/workspace/coverage/default/0.sram_ctrl_smoke.2062368819
/workspace/coverage/default/0.sram_ctrl_stress_all.324238402
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1931492403
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1213440262
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.252437017
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3445434447
/workspace/coverage/default/1.sram_ctrl_alert_test.308497981
/workspace/coverage/default/1.sram_ctrl_bijection.3756137687
/workspace/coverage/default/1.sram_ctrl_executable.1519233072
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2502034478
/workspace/coverage/default/1.sram_ctrl_max_throughput.1655086410
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.528708348
/workspace/coverage/default/1.sram_ctrl_mem_walk.12317206
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1383111759
/workspace/coverage/default/1.sram_ctrl_partial_access.3377862469
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2221382453
/workspace/coverage/default/1.sram_ctrl_regwen.2809483677
/workspace/coverage/default/1.sram_ctrl_sec_cm.1447870810
/workspace/coverage/default/1.sram_ctrl_smoke.462775633
/workspace/coverage/default/1.sram_ctrl_stress_all.2257497400
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1678202983
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1783683685
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3003901943
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3366262689
/workspace/coverage/default/10.sram_ctrl_alert_test.3867882093
/workspace/coverage/default/10.sram_ctrl_bijection.2127057057
/workspace/coverage/default/10.sram_ctrl_executable.77955972
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3045463801
/workspace/coverage/default/10.sram_ctrl_max_throughput.567855102
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1849403064
/workspace/coverage/default/10.sram_ctrl_mem_walk.2601300687
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2716750451
/workspace/coverage/default/10.sram_ctrl_partial_access.2212104469
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.878651318
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3590341021
/workspace/coverage/default/10.sram_ctrl_regwen.1868587260
/workspace/coverage/default/10.sram_ctrl_smoke.4183545213
/workspace/coverage/default/10.sram_ctrl_stress_all.428712212
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1440785999
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1703525637
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1006182546
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1293187242
/workspace/coverage/default/11.sram_ctrl_alert_test.1657016595
/workspace/coverage/default/11.sram_ctrl_bijection.1067811328
/workspace/coverage/default/11.sram_ctrl_executable.2521591558
/workspace/coverage/default/11.sram_ctrl_lc_escalation.595036878
/workspace/coverage/default/11.sram_ctrl_max_throughput.205013456
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3760920500
/workspace/coverage/default/11.sram_ctrl_mem_walk.669524563
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1357996317
/workspace/coverage/default/11.sram_ctrl_partial_access.81708990
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1487634285
/workspace/coverage/default/11.sram_ctrl_regwen.631889225
/workspace/coverage/default/11.sram_ctrl_smoke.1915453752
/workspace/coverage/default/11.sram_ctrl_stress_all.2044808141
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2002061044
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1407291337
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1454447207
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.877900994
/workspace/coverage/default/12.sram_ctrl_alert_test.1118640692
/workspace/coverage/default/12.sram_ctrl_bijection.76027389
/workspace/coverage/default/12.sram_ctrl_executable.3423241257
/workspace/coverage/default/12.sram_ctrl_lc_escalation.4188219568
/workspace/coverage/default/12.sram_ctrl_max_throughput.3185129886
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1857467335
/workspace/coverage/default/12.sram_ctrl_mem_walk.1329361687
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/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1534516490
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2410815881
/workspace/coverage/default/43.sram_ctrl_regwen.292310328
/workspace/coverage/default/43.sram_ctrl_smoke.152178481
/workspace/coverage/default/43.sram_ctrl_stress_all.301057228
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.768109882
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3072248785
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2202085535
/workspace/coverage/default/44.sram_ctrl_alert_test.1959585228
/workspace/coverage/default/44.sram_ctrl_bijection.3313195105
/workspace/coverage/default/44.sram_ctrl_executable.1859967460
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2237757226
/workspace/coverage/default/44.sram_ctrl_max_throughput.3228147586
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2091014594
/workspace/coverage/default/44.sram_ctrl_mem_walk.3568461332
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2761100185
/workspace/coverage/default/44.sram_ctrl_partial_access.2596674042
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.215356442
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1545560059
/workspace/coverage/default/44.sram_ctrl_regwen.535106081
/workspace/coverage/default/44.sram_ctrl_smoke.131022476
/workspace/coverage/default/44.sram_ctrl_stress_all.4256983639
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.4152517529
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2815914316
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.183675091
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3169934236
/workspace/coverage/default/45.sram_ctrl_alert_test.2485200904
/workspace/coverage/default/45.sram_ctrl_bijection.2752841010
/workspace/coverage/default/45.sram_ctrl_executable.1694788669
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1522037356
/workspace/coverage/default/45.sram_ctrl_max_throughput.1454815184
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2067268309
/workspace/coverage/default/45.sram_ctrl_mem_walk.2230909337
/workspace/coverage/default/45.sram_ctrl_multiple_keys.4145177676
/workspace/coverage/default/45.sram_ctrl_partial_access.2115071601
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1509378731
/workspace/coverage/default/45.sram_ctrl_ram_cfg.644224635
/workspace/coverage/default/45.sram_ctrl_regwen.1223148879
/workspace/coverage/default/45.sram_ctrl_smoke.3695375825
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3337033968
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1541500502
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.914835672
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2952913521
/workspace/coverage/default/46.sram_ctrl_alert_test.44707539
/workspace/coverage/default/46.sram_ctrl_bijection.577832277
/workspace/coverage/default/46.sram_ctrl_executable.570207978
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2567960905
/workspace/coverage/default/46.sram_ctrl_max_throughput.2166647196
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3535697315
/workspace/coverage/default/46.sram_ctrl_mem_walk.2444969961
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2616275194
/workspace/coverage/default/46.sram_ctrl_partial_access.3804456833
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3879294987
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2050083458
/workspace/coverage/default/46.sram_ctrl_regwen.4247423710
/workspace/coverage/default/46.sram_ctrl_smoke.4198231479
/workspace/coverage/default/46.sram_ctrl_stress_all.948407784
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2122273229
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1856232793
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3427594532
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.203298181
/workspace/coverage/default/47.sram_ctrl_alert_test.1872259684
/workspace/coverage/default/47.sram_ctrl_bijection.2557381091
/workspace/coverage/default/47.sram_ctrl_executable.4090960107
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3885054924
/workspace/coverage/default/47.sram_ctrl_max_throughput.4201204849
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.972045694
/workspace/coverage/default/47.sram_ctrl_mem_walk.4225657392
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1578654244
/workspace/coverage/default/47.sram_ctrl_partial_access.2020625390
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3848487434
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2047696459
/workspace/coverage/default/47.sram_ctrl_regwen.1894046467
/workspace/coverage/default/47.sram_ctrl_smoke.4136410372
/workspace/coverage/default/47.sram_ctrl_stress_all.2561686913
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2486471871
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2773469237
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2089068190
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.120393694
/workspace/coverage/default/48.sram_ctrl_alert_test.3363614705
/workspace/coverage/default/48.sram_ctrl_bijection.3603179068
/workspace/coverage/default/48.sram_ctrl_executable.3432149829
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2818383795
/workspace/coverage/default/48.sram_ctrl_max_throughput.2811286861
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3936415698
/workspace/coverage/default/48.sram_ctrl_mem_walk.169910334
/workspace/coverage/default/48.sram_ctrl_multiple_keys.4294412540
/workspace/coverage/default/48.sram_ctrl_partial_access.1696413804
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2763510058
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2169003254
/workspace/coverage/default/48.sram_ctrl_regwen.3966907608
/workspace/coverage/default/48.sram_ctrl_smoke.4189180757
/workspace/coverage/default/48.sram_ctrl_stress_all.4209682087
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1853111330
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1978346373
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3234129364
/workspace/coverage/default/49.sram_ctrl_alert_test.284142644
/workspace/coverage/default/49.sram_ctrl_bijection.816739740
/workspace/coverage/default/49.sram_ctrl_executable.3017518072
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3676325806
/workspace/coverage/default/49.sram_ctrl_max_throughput.2288335861
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3707449252
/workspace/coverage/default/49.sram_ctrl_mem_walk.1018450137
/workspace/coverage/default/49.sram_ctrl_multiple_keys.943817598
/workspace/coverage/default/49.sram_ctrl_partial_access.4013816639
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.684440027
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1574241211
/workspace/coverage/default/49.sram_ctrl_regwen.3342086417
/workspace/coverage/default/49.sram_ctrl_smoke.2683473256
/workspace/coverage/default/49.sram_ctrl_stress_all.967208415
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2316609612
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3585432148
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2633210232
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.860374987
/workspace/coverage/default/5.sram_ctrl_alert_test.342877297
/workspace/coverage/default/5.sram_ctrl_bijection.1910474087
/workspace/coverage/default/5.sram_ctrl_executable.345842008
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3575725210
/workspace/coverage/default/5.sram_ctrl_max_throughput.2040614039
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.134301951
/workspace/coverage/default/5.sram_ctrl_mem_walk.4269063855
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1695406579
/workspace/coverage/default/5.sram_ctrl_partial_access.1428218547
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.225821856
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3832108855
/workspace/coverage/default/5.sram_ctrl_regwen.3860191292
/workspace/coverage/default/5.sram_ctrl_smoke.3008064803
/workspace/coverage/default/5.sram_ctrl_stress_all.1897155596
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.75016015
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2509343413
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3539814330
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2980319846
/workspace/coverage/default/6.sram_ctrl_alert_test.2222581998
/workspace/coverage/default/6.sram_ctrl_bijection.2511540151
/workspace/coverage/default/6.sram_ctrl_executable.1436307323
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2413187757
/workspace/coverage/default/6.sram_ctrl_max_throughput.3096732256
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.942050274
/workspace/coverage/default/6.sram_ctrl_mem_walk.3888417714
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2022806246
/workspace/coverage/default/6.sram_ctrl_partial_access.1636464515
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3642101768
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3495146208
/workspace/coverage/default/6.sram_ctrl_regwen.2106369644
/workspace/coverage/default/6.sram_ctrl_smoke.516241606
/workspace/coverage/default/6.sram_ctrl_stress_all.1393249192
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2617320260
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.111295315
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3265065547
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1390465009
/workspace/coverage/default/7.sram_ctrl_alert_test.306539686
/workspace/coverage/default/7.sram_ctrl_bijection.254931253
/workspace/coverage/default/7.sram_ctrl_executable.1190565990
/workspace/coverage/default/7.sram_ctrl_lc_escalation.16028491
/workspace/coverage/default/7.sram_ctrl_max_throughput.1104912368
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.908392281
/workspace/coverage/default/7.sram_ctrl_mem_walk.1274238572
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1970652085
/workspace/coverage/default/7.sram_ctrl_partial_access.609702928
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2408047577
/workspace/coverage/default/7.sram_ctrl_ram_cfg.4015002814
/workspace/coverage/default/7.sram_ctrl_regwen.309692413
/workspace/coverage/default/7.sram_ctrl_smoke.2682388217
/workspace/coverage/default/7.sram_ctrl_stress_all.527292117
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3075172581
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1904499101
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.456079489
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2733041840
/workspace/coverage/default/8.sram_ctrl_alert_test.1927399440
/workspace/coverage/default/8.sram_ctrl_bijection.952288283
/workspace/coverage/default/8.sram_ctrl_executable.1187015049
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3948680202
/workspace/coverage/default/8.sram_ctrl_max_throughput.881595541
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.57145585
/workspace/coverage/default/8.sram_ctrl_mem_walk.1345373864
/workspace/coverage/default/8.sram_ctrl_multiple_keys.660728448
/workspace/coverage/default/8.sram_ctrl_partial_access.1327497365
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2514778257
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1711531302
/workspace/coverage/default/8.sram_ctrl_regwen.2501215699
/workspace/coverage/default/8.sram_ctrl_smoke.819584752
/workspace/coverage/default/8.sram_ctrl_stress_all.2719260831
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1778759894
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3321434788
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.119709124
/workspace/coverage/default/9.sram_ctrl_alert_test.590288048
/workspace/coverage/default/9.sram_ctrl_bijection.475047946
/workspace/coverage/default/9.sram_ctrl_executable.389095904
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1010286539
/workspace/coverage/default/9.sram_ctrl_max_throughput.997346702
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.136650023
/workspace/coverage/default/9.sram_ctrl_mem_walk.4128915270
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3478244387
/workspace/coverage/default/9.sram_ctrl_partial_access.1593151102
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.995106065
/workspace/coverage/default/9.sram_ctrl_ram_cfg.735159133
/workspace/coverage/default/9.sram_ctrl_regwen.3995363099
/workspace/coverage/default/9.sram_ctrl_smoke.1651345422
/workspace/coverage/default/9.sram_ctrl_stress_all.3951941467
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.786569531
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.4172223616
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3892991984



Total test records in report: 1024
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/36.sram_ctrl_max_throughput.3503238203 Aug 17 05:19:02 PM PDT 24 Aug 17 05:19:50 PM PDT 24 111673393 ps
T2 /workspace/coverage/default/29.sram_ctrl_alert_test.3433577786 Aug 17 05:17:16 PM PDT 24 Aug 17 05:17:17 PM PDT 24 26664718 ps
T3 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.4165684849 Aug 17 05:20:30 PM PDT 24 Aug 17 05:20:36 PM PDT 24 1209663798 ps
T9 /workspace/coverage/default/28.sram_ctrl_alert_test.2786970853 Aug 17 05:17:02 PM PDT 24 Aug 17 05:17:02 PM PDT 24 146670974 ps
T4 /workspace/coverage/default/37.sram_ctrl_executable.1338126950 Aug 17 05:19:25 PM PDT 24 Aug 17 05:26:38 PM PDT 24 1705981277 ps
T5 /workspace/coverage/default/4.sram_ctrl_stress_all.1925686134 Aug 17 05:10:28 PM PDT 24 Aug 17 05:45:15 PM PDT 24 8006242514 ps
T10 /workspace/coverage/default/49.sram_ctrl_alert_test.284142644 Aug 17 05:22:03 PM PDT 24 Aug 17 05:22:04 PM PDT 24 40952637 ps
T11 /workspace/coverage/default/44.sram_ctrl_bijection.3313195105 Aug 17 05:20:47 PM PDT 24 Aug 17 05:21:50 PM PDT 24 11006209820 ps
T12 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.3264404395 Aug 17 05:15:14 PM PDT 24 Aug 17 05:19:40 PM PDT 24 9715687901 ps
T13 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.1938021017 Aug 17 05:18:56 PM PDT 24 Aug 17 05:22:27 PM PDT 24 2356407103 ps
T38 /workspace/coverage/default/6.sram_ctrl_max_throughput.3096732256 Aug 17 05:10:51 PM PDT 24 Aug 17 05:12:33 PM PDT 24 544232496 ps
T19 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2632647463 Aug 17 05:15:52 PM PDT 24 Aug 17 05:18:08 PM PDT 24 247776013 ps
T39 /workspace/coverage/default/15.sram_ctrl_partial_access.4152271102 Aug 17 05:12:48 PM PDT 24 Aug 17 05:14:54 PM PDT 24 419299155 ps
T20 /workspace/coverage/default/35.sram_ctrl_smoke.318992102 Aug 17 05:18:38 PM PDT 24 Aug 17 05:18:45 PM PDT 24 195708182 ps
T71 /workspace/coverage/default/43.sram_ctrl_alert_test.716345151 Aug 17 05:20:48 PM PDT 24 Aug 17 05:20:48 PM PDT 24 14146927 ps
T6 /workspace/coverage/default/39.sram_ctrl_lc_escalation.696689547 Aug 17 05:19:50 PM PDT 24 Aug 17 05:19:57 PM PDT 24 1999662070 ps
T7 /workspace/coverage/default/49.sram_ctrl_stress_all.967208415 Aug 17 05:22:06 PM PDT 24 Aug 17 05:34:53 PM PDT 24 4579723476 ps
T8 /workspace/coverage/default/25.sram_ctrl_lc_escalation.3577974381 Aug 17 05:15:55 PM PDT 24 Aug 17 05:15:58 PM PDT 24 903649266 ps
T40 /workspace/coverage/default/14.sram_ctrl_multiple_keys.3787311309 Aug 17 05:12:32 PM PDT 24 Aug 17 05:18:32 PM PDT 24 34822322209 ps
T21 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3776692116 Aug 17 05:15:22 PM PDT 24 Aug 17 05:16:24 PM PDT 24 1318120027 ps
T45 /workspace/coverage/default/9.sram_ctrl_executable.389095904 Aug 17 05:11:27 PM PDT 24 Aug 17 05:21:44 PM PDT 24 39842144866 ps
T57 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.490764544 Aug 17 05:13:17 PM PDT 24 Aug 17 05:14:47 PM PDT 24 156770465 ps
T41 /workspace/coverage/default/3.sram_ctrl_executable.1676159376 Aug 17 05:10:20 PM PDT 24 Aug 17 05:31:40 PM PDT 24 39197088435 ps
T42 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.1300017372 Aug 17 05:16:13 PM PDT 24 Aug 17 05:33:53 PM PDT 24 84326618282 ps
T58 /workspace/coverage/default/26.sram_ctrl_executable.1843256826 Aug 17 05:16:13 PM PDT 24 Aug 17 05:26:38 PM PDT 24 5927715976 ps
T59 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.3126334899 Aug 17 05:18:46 PM PDT 24 Aug 17 05:21:14 PM PDT 24 189203388 ps
T43 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.860374987 Aug 17 05:10:43 PM PDT 24 Aug 17 05:21:27 PM PDT 24 13083708754 ps
T22 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.2069156930 Aug 17 05:17:23 PM PDT 24 Aug 17 05:19:16 PM PDT 24 3086002368 ps
T60 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.1714035747 Aug 17 05:17:41 PM PDT 24 Aug 17 05:17:53 PM PDT 24 585789282 ps
T139 /workspace/coverage/default/23.sram_ctrl_alert_test.3373412114 Aug 17 05:15:25 PM PDT 24 Aug 17 05:15:25 PM PDT 24 47083617 ps
T140 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.4179116994 Aug 17 05:16:27 PM PDT 24 Aug 17 05:17:12 PM PDT 24 98555508 ps
T69 /workspace/coverage/default/22.sram_ctrl_lc_escalation.592334373 Aug 17 05:14:58 PM PDT 24 Aug 17 05:15:02 PM PDT 24 1243781132 ps
T105 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3482843037 Aug 17 05:09:56 PM PDT 24 Aug 17 05:15:13 PM PDT 24 4257378096 ps
T106 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.2091668166 Aug 17 05:10:24 PM PDT 24 Aug 17 05:14:03 PM PDT 24 8779677221 ps
T138 /workspace/coverage/default/43.sram_ctrl_smoke.152178481 Aug 17 05:20:32 PM PDT 24 Aug 17 05:22:51 PM PDT 24 257745747 ps
T137 /workspace/coverage/default/4.sram_ctrl_multiple_keys.3790573019 Aug 17 05:10:18 PM PDT 24 Aug 17 05:20:58 PM PDT 24 3047947859 ps
T23 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.786569531 Aug 17 05:11:33 PM PDT 24 Aug 17 05:17:18 PM PDT 24 5998731411 ps
T17 /workspace/coverage/default/24.sram_ctrl_stress_all.166492028 Aug 17 05:15:44 PM PDT 24 Aug 17 06:29:36 PM PDT 24 133844618804 ps
T141 /workspace/coverage/default/10.sram_ctrl_partial_access.2212104469 Aug 17 05:11:41 PM PDT 24 Aug 17 05:11:56 PM PDT 24 3264818259 ps
T107 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4135824549 Aug 17 05:11:51 PM PDT 24 Aug 17 05:15:25 PM PDT 24 38698987688 ps
T135 /workspace/coverage/default/31.sram_ctrl_smoke.4143328619 Aug 17 05:17:30 PM PDT 24 Aug 17 05:17:59 PM PDT 24 1927273421 ps
T70 /workspace/coverage/default/31.sram_ctrl_lc_escalation.296406582 Aug 17 05:17:42 PM PDT 24 Aug 17 05:17:48 PM PDT 24 588284817 ps
T142 /workspace/coverage/default/26.sram_ctrl_smoke.4012601647 Aug 17 05:16:05 PM PDT 24 Aug 17 05:18:24 PM PDT 24 152267127 ps
T74 /workspace/coverage/default/19.sram_ctrl_stress_all.1650358348 Aug 17 05:14:11 PM PDT 24 Aug 17 05:49:19 PM PDT 24 69957769757 ps
T143 /workspace/coverage/default/30.sram_ctrl_smoke.1967889955 Aug 17 05:17:16 PM PDT 24 Aug 17 05:17:34 PM PDT 24 1080353118 ps
T108 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.1784289275 Aug 17 05:18:23 PM PDT 24 Aug 17 05:23:41 PM PDT 24 6549607073 ps
T24 /workspace/coverage/default/3.sram_ctrl_ram_cfg.1455039120 Aug 17 05:10:21 PM PDT 24 Aug 17 05:10:22 PM PDT 24 31679459 ps
T131 /workspace/coverage/default/20.sram_ctrl_executable.3651021553 Aug 17 05:14:23 PM PDT 24 Aug 17 05:37:33 PM PDT 24 65386940458 ps
T134 /workspace/coverage/default/39.sram_ctrl_executable.3959656551 Aug 17 05:19:51 PM PDT 24 Aug 17 05:41:43 PM PDT 24 96753765978 ps
T144 /workspace/coverage/default/40.sram_ctrl_alert_test.342235360 Aug 17 05:20:07 PM PDT 24 Aug 17 05:20:08 PM PDT 24 49799380 ps
T109 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2408047577 Aug 17 05:10:59 PM PDT 24 Aug 17 05:14:53 PM PDT 24 3284372923 ps
T133 /workspace/coverage/default/1.sram_ctrl_executable.1519233072 Aug 17 05:10:01 PM PDT 24 Aug 17 05:33:15 PM PDT 24 6485243664 ps
T18 /workspace/coverage/default/37.sram_ctrl_regwen.1005252199 Aug 17 05:19:24 PM PDT 24 Aug 17 05:45:19 PM PDT 24 2838414689 ps
T110 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.2543185898 Aug 17 05:18:31 PM PDT 24 Aug 17 05:23:28 PM PDT 24 26515945665 ps
T145 /workspace/coverage/default/5.sram_ctrl_multiple_keys.1695406579 Aug 17 05:10:26 PM PDT 24 Aug 17 05:21:24 PM PDT 24 10705110689 ps
T75 /workspace/coverage/default/39.sram_ctrl_regwen.874133116 Aug 17 05:19:52 PM PDT 24 Aug 17 05:31:23 PM PDT 24 50229477410 ps
T146 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.1546476949 Aug 17 05:12:55 PM PDT 24 Aug 17 05:13:58 PM PDT 24 262391745 ps
T44 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.4230760564 Aug 17 05:14:57 PM PDT 24 Aug 17 05:33:14 PM PDT 24 4687082268 ps
T54 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.128709694 Aug 17 05:18:21 PM PDT 24 Aug 17 05:23:58 PM PDT 24 1299086292 ps
T147 /workspace/coverage/default/23.sram_ctrl_partial_access.1713640896 Aug 17 05:15:14 PM PDT 24 Aug 17 05:15:24 PM PDT 24 192427763 ps
T50 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.433480090 Aug 17 05:20:14 PM PDT 24 Aug 17 05:20:18 PM PDT 24 1032646562 ps
T51 /workspace/coverage/default/42.sram_ctrl_mem_walk.1708074660 Aug 17 05:20:30 PM PDT 24 Aug 17 05:20:43 PM PDT 24 1531323415 ps
T148 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3265065547 Aug 17 05:10:50 PM PDT 24 Aug 17 05:11:05 PM PDT 24 315382825 ps
T111 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.1579196975 Aug 17 05:14:01 PM PDT 24 Aug 17 05:15:55 PM PDT 24 1228772395 ps
T112 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1000969925 Aug 17 05:14:41 PM PDT 24 Aug 17 05:19:05 PM PDT 24 108081511386 ps
T149 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.878651318 Aug 17 05:11:35 PM PDT 24 Aug 17 05:17:01 PM PDT 24 11978417396 ps
T150 /workspace/coverage/default/1.sram_ctrl_multiple_keys.1383111759 Aug 17 05:09:58 PM PDT 24 Aug 17 05:22:00 PM PDT 24 3546905326 ps
T151 /workspace/coverage/default/21.sram_ctrl_partial_access.2204274887 Aug 17 05:14:41 PM PDT 24 Aug 17 05:14:52 PM PDT 24 1999884051 ps
T90 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.733809074 Aug 17 05:10:18 PM PDT 24 Aug 17 05:20:01 PM PDT 24 1988409288 ps
T132 /workspace/coverage/default/20.sram_ctrl_stress_all.3881991734 Aug 17 05:14:31 PM PDT 24 Aug 17 06:36:17 PM PDT 24 121572920082 ps
T55 /workspace/coverage/default/8.sram_ctrl_mem_walk.1345373864 Aug 17 05:11:19 PM PDT 24 Aug 17 05:11:30 PM PDT 24 1908764465 ps
T152 /workspace/coverage/default/43.sram_ctrl_max_throughput.1065557551 Aug 17 05:20:38 PM PDT 24 Aug 17 05:22:47 PM PDT 24 563781634 ps
T153 /workspace/coverage/default/33.sram_ctrl_multiple_keys.910652292 Aug 17 05:18:07 PM PDT 24 Aug 17 05:37:04 PM PDT 24 31899991796 ps
T154 /workspace/coverage/default/44.sram_ctrl_executable.1859967460 Aug 17 05:20:58 PM PDT 24 Aug 17 05:26:42 PM PDT 24 11921880687 ps
T155 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3640677305 Aug 17 05:17:53 PM PDT 24 Aug 17 05:18:58 PM PDT 24 761563363 ps
T156 /workspace/coverage/default/3.sram_ctrl_bijection.2591365582 Aug 17 05:10:23 PM PDT 24 Aug 17 05:10:50 PM PDT 24 1564115029 ps
T56 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.4152517529 Aug 17 05:21:03 PM PDT 24 Aug 17 05:22:39 PM PDT 24 5045642980 ps
T157 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.225821856 Aug 17 05:10:35 PM PDT 24 Aug 17 05:14:49 PM PDT 24 3573625281 ps
T158 /workspace/coverage/default/28.sram_ctrl_partial_access.65860365 Aug 17 05:16:42 PM PDT 24 Aug 17 05:17:54 PM PDT 24 511675160 ps
T91 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.134301951 Aug 17 05:10:44 PM PDT 24 Aug 17 05:10:47 PM PDT 24 185989867 ps
T159 /workspace/coverage/default/13.sram_ctrl_executable.1140993972 Aug 17 05:12:23 PM PDT 24 Aug 17 05:26:28 PM PDT 24 57292726144 ps
T160 /workspace/coverage/default/16.sram_ctrl_lc_escalation.2533210001 Aug 17 05:13:12 PM PDT 24 Aug 17 05:13:18 PM PDT 24 500969370 ps
T52 /workspace/coverage/default/25.sram_ctrl_mem_walk.2176319624 Aug 17 05:15:56 PM PDT 24 Aug 17 05:16:02 PM PDT 24 2614617897 ps
T161 /workspace/coverage/default/10.sram_ctrl_alert_test.3867882093 Aug 17 05:11:57 PM PDT 24 Aug 17 05:11:58 PM PDT 24 21553357 ps
T162 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.911880447 Aug 17 05:18:39 PM PDT 24 Aug 17 05:25:23 PM PDT 24 4167947286 ps
T163 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.723859253 Aug 17 05:14:00 PM PDT 24 Aug 17 05:16:17 PM PDT 24 585415277 ps
T25 /workspace/coverage/default/45.sram_ctrl_ram_cfg.644224635 Aug 17 05:21:13 PM PDT 24 Aug 17 05:21:14 PM PDT 24 88092773 ps
T164 /workspace/coverage/default/8.sram_ctrl_max_throughput.881595541 Aug 17 05:11:07 PM PDT 24 Aug 17 05:11:09 PM PDT 24 92155223 ps
T165 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.1036099285 Aug 17 05:17:43 PM PDT 24 Aug 17 05:22:29 PM PDT 24 41167360889 ps
T26 /workspace/coverage/default/12.sram_ctrl_ram_cfg.1533576673 Aug 17 05:12:08 PM PDT 24 Aug 17 05:12:09 PM PDT 24 33041481 ps
T166 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.2594718050 Aug 17 05:16:08 PM PDT 24 Aug 17 05:23:10 PM PDT 24 19587858231 ps
T167 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3895859640 Aug 17 05:17:01 PM PDT 24 Aug 17 05:17:03 PM PDT 24 85071141 ps
T53 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.424072199 Aug 17 05:17:55 PM PDT 24 Aug 17 05:18:01 PM PDT 24 193316611 ps
T118 /workspace/coverage/default/43.sram_ctrl_stress_all.301057228 Aug 17 05:20:49 PM PDT 24 Aug 17 06:08:41 PM PDT 24 336700610225 ps
T168 /workspace/coverage/default/14.sram_ctrl_max_throughput.760373765 Aug 17 05:12:38 PM PDT 24 Aug 17 05:12:46 PM PDT 24 78763476 ps
T169 /workspace/coverage/default/41.sram_ctrl_regwen.2879838137 Aug 17 05:20:13 PM PDT 24 Aug 17 05:24:26 PM PDT 24 7578814228 ps
T170 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1454447207 Aug 17 05:11:50 PM PDT 24 Aug 17 05:12:11 PM PDT 24 212632186 ps
T171 /workspace/coverage/default/1.sram_ctrl_ram_cfg.1703892097 Aug 17 05:10:04 PM PDT 24 Aug 17 05:10:05 PM PDT 24 85770685 ps
T172 /workspace/coverage/default/17.sram_ctrl_ram_cfg.1886431160 Aug 17 05:13:37 PM PDT 24 Aug 17 05:13:38 PM PDT 24 79783809 ps
T173 /workspace/coverage/default/38.sram_ctrl_partial_access.2089966461 Aug 17 05:19:28 PM PDT 24 Aug 17 05:19:38 PM PDT 24 251487028 ps
T174 /workspace/coverage/default/21.sram_ctrl_ram_cfg.2027878366 Aug 17 05:14:48 PM PDT 24 Aug 17 05:14:49 PM PDT 24 45585364 ps
T175 /workspace/coverage/default/48.sram_ctrl_max_throughput.2811286861 Aug 17 05:21:47 PM PDT 24 Aug 17 05:21:52 PM PDT 24 123612987 ps
T176 /workspace/coverage/default/27.sram_ctrl_bijection.2519051673 Aug 17 05:16:28 PM PDT 24 Aug 17 05:17:50 PM PDT 24 15085256941 ps
T92 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.594139390 Aug 17 05:14:08 PM PDT 24 Aug 17 05:14:11 PM PDT 24 290622393 ps
T177 /workspace/coverage/default/33.sram_ctrl_max_throughput.1584089783 Aug 17 05:18:12 PM PDT 24 Aug 17 05:20:08 PM PDT 24 265487029 ps
T178 /workspace/coverage/default/5.sram_ctrl_regwen.3860191292 Aug 17 05:10:45 PM PDT 24 Aug 17 05:32:56 PM PDT 24 3435158737 ps
T179 /workspace/coverage/default/11.sram_ctrl_alert_test.1657016595 Aug 17 05:12:05 PM PDT 24 Aug 17 05:12:06 PM PDT 24 24455665 ps
T180 /workspace/coverage/default/15.sram_ctrl_executable.758449138 Aug 17 05:12:55 PM PDT 24 Aug 17 05:25:38 PM PDT 24 10025172210 ps
T181 /workspace/coverage/default/37.sram_ctrl_partial_access.1007671211 Aug 17 05:19:18 PM PDT 24 Aug 17 05:19:19 PM PDT 24 124263016 ps
T182 /workspace/coverage/default/30.sram_ctrl_max_throughput.2863684420 Aug 17 05:17:23 PM PDT 24 Aug 17 05:19:09 PM PDT 24 130944725 ps
T183 /workspace/coverage/default/5.sram_ctrl_mem_walk.4269063855 Aug 17 05:10:44 PM PDT 24 Aug 17 05:10:55 PM PDT 24 455600445 ps
T184 /workspace/coverage/default/41.sram_ctrl_alert_test.1977937359 Aug 17 05:20:17 PM PDT 24 Aug 17 05:20:17 PM PDT 24 33588424 ps
T185 /workspace/coverage/default/39.sram_ctrl_mem_walk.4218626592 Aug 17 05:19:51 PM PDT 24 Aug 17 05:20:02 PM PDT 24 2193516561 ps
T186 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.252437017 Aug 17 05:09:59 PM PDT 24 Aug 17 05:10:06 PM PDT 24 61993976 ps
T72 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3941976450 Aug 17 05:21:55 PM PDT 24 Aug 17 05:25:00 PM PDT 24 2165038999 ps
T187 /workspace/coverage/default/42.sram_ctrl_ram_cfg.2689420404 Aug 17 05:20:29 PM PDT 24 Aug 17 05:20:30 PM PDT 24 81686995 ps
T188 /workspace/coverage/default/34.sram_ctrl_regwen.1880964173 Aug 17 05:18:29 PM PDT 24 Aug 17 05:25:42 PM PDT 24 8585845914 ps
T189 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.4115147392 Aug 17 05:19:42 PM PDT 24 Aug 17 05:22:44 PM PDT 24 3598513493 ps
T190 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1324580971 Aug 17 05:15:14 PM PDT 24 Aug 17 05:17:05 PM PDT 24 283532842 ps
T93 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.1041353599 Aug 17 05:19:51 PM PDT 24 Aug 17 05:34:02 PM PDT 24 10676654910 ps
T191 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3321434788 Aug 17 05:11:07 PM PDT 24 Aug 17 05:11:13 PM PDT 24 109967066 ps
T192 /workspace/coverage/default/30.sram_ctrl_bijection.2902900581 Aug 17 05:17:16 PM PDT 24 Aug 17 05:17:41 PM PDT 24 3180237704 ps
T193 /workspace/coverage/default/25.sram_ctrl_bijection.3142231147 Aug 17 05:15:49 PM PDT 24 Aug 17 05:16:16 PM PDT 24 1552327264 ps
T194 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.3817165220 Aug 17 05:15:57 PM PDT 24 Aug 17 05:16:00 PM PDT 24 202575870 ps
T195 /workspace/coverage/default/0.sram_ctrl_alert_test.4158803964 Aug 17 05:09:57 PM PDT 24 Aug 17 05:09:58 PM PDT 24 43889028 ps
T196 /workspace/coverage/default/46.sram_ctrl_alert_test.44707539 Aug 17 05:21:31 PM PDT 24 Aug 17 05:21:31 PM PDT 24 19656600 ps
T197 /workspace/coverage/default/43.sram_ctrl_partial_access.43997061 Aug 17 05:20:37 PM PDT 24 Aug 17 05:22:18 PM PDT 24 2125161343 ps
T198 /workspace/coverage/default/1.sram_ctrl_alert_test.308497981 Aug 17 05:10:10 PM PDT 24 Aug 17 05:10:10 PM PDT 24 54919326 ps
T199 /workspace/coverage/default/11.sram_ctrl_ram_cfg.1487634285 Aug 17 05:12:07 PM PDT 24 Aug 17 05:12:08 PM PDT 24 236397713 ps
T200 /workspace/coverage/default/44.sram_ctrl_ram_cfg.1545560059 Aug 17 05:20:57 PM PDT 24 Aug 17 05:20:58 PM PDT 24 86692940 ps
T201 /workspace/coverage/default/18.sram_ctrl_lc_escalation.2228809701 Aug 17 05:13:45 PM PDT 24 Aug 17 05:13:53 PM PDT 24 6124003361 ps
T202 /workspace/coverage/default/40.sram_ctrl_ram_cfg.2396383651 Aug 17 05:19:58 PM PDT 24 Aug 17 05:19:59 PM PDT 24 40739324 ps
T136 /workspace/coverage/default/47.sram_ctrl_stress_all.2561686913 Aug 17 05:21:39 PM PDT 24 Aug 17 06:07:28 PM PDT 24 64132736048 ps
T203 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.3288334077 Aug 17 05:15:06 PM PDT 24 Aug 17 05:15:11 PM PDT 24 1627774400 ps
T204 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.2830900665 Aug 17 05:13:44 PM PDT 24 Aug 17 05:25:45 PM PDT 24 3136229187 ps
T205 /workspace/coverage/default/42.sram_ctrl_alert_test.3311062076 Aug 17 05:20:30 PM PDT 24 Aug 17 05:20:31 PM PDT 24 34045212 ps
T206 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2633210232 Aug 17 05:22:06 PM PDT 24 Aug 17 05:22:51 PM PDT 24 227207900 ps
T207 /workspace/coverage/default/15.sram_ctrl_alert_test.2140760577 Aug 17 05:13:03 PM PDT 24 Aug 17 05:13:04 PM PDT 24 35537738 ps
T208 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.654332773 Aug 17 05:13:54 PM PDT 24 Aug 17 05:17:45 PM PDT 24 12260569743 ps
T209 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.708873806 Aug 17 05:10:14 PM PDT 24 Aug 17 05:10:20 PM PDT 24 650977384 ps
T210 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.3494703147 Aug 17 05:15:53 PM PDT 24 Aug 17 05:20:51 PM PDT 24 3069807172 ps
T61 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.1272874181 Aug 17 05:16:38 PM PDT 24 Aug 17 05:16:43 PM PDT 24 379824403 ps
T211 /workspace/coverage/default/22.sram_ctrl_bijection.944471084 Aug 17 05:14:50 PM PDT 24 Aug 17 05:15:09 PM PDT 24 3652895537 ps
T212 /workspace/coverage/default/32.sram_ctrl_alert_test.871594243 Aug 17 05:18:07 PM PDT 24 Aug 17 05:18:07 PM PDT 24 113703668 ps
T213 /workspace/coverage/default/49.sram_ctrl_max_throughput.2288335861 Aug 17 05:22:03 PM PDT 24 Aug 17 05:22:44 PM PDT 24 484052983 ps
T214 /workspace/coverage/default/38.sram_ctrl_mem_walk.2551915661 Aug 17 05:19:33 PM PDT 24 Aug 17 05:19:40 PM PDT 24 1510735188 ps
T215 /workspace/coverage/default/44.sram_ctrl_partial_access.2596674042 Aug 17 05:20:58 PM PDT 24 Aug 17 05:21:48 PM PDT 24 157646364 ps
T216 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.2743229551 Aug 17 05:20:07 PM PDT 24 Aug 17 05:22:05 PM PDT 24 5073375465 ps
T217 /workspace/coverage/default/14.sram_ctrl_ram_cfg.3873258421 Aug 17 05:12:38 PM PDT 24 Aug 17 05:12:39 PM PDT 24 71838085 ps
T218 /workspace/coverage/default/42.sram_ctrl_bijection.2574121283 Aug 17 05:20:23 PM PDT 24 Aug 17 05:21:12 PM PDT 24 12134294174 ps
T219 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.3445434447 Aug 17 05:10:03 PM PDT 24 Aug 17 05:34:04 PM PDT 24 5919471682 ps
T220 /workspace/coverage/default/33.sram_ctrl_stress_all.1961214657 Aug 17 05:18:33 PM PDT 24 Aug 17 05:23:30 PM PDT 24 9174920170 ps
T221 /workspace/coverage/default/38.sram_ctrl_max_throughput.3885080181 Aug 17 05:19:32 PM PDT 24 Aug 17 05:19:40 PM PDT 24 62493741 ps
T222 /workspace/coverage/default/7.sram_ctrl_stress_all.527292117 Aug 17 05:11:09 PM PDT 24 Aug 17 05:40:44 PM PDT 24 30078052950 ps
T223 /workspace/coverage/default/15.sram_ctrl_bijection.2873179983 Aug 17 05:12:48 PM PDT 24 Aug 17 05:14:16 PM PDT 24 20010528285 ps
T224 /workspace/coverage/default/9.sram_ctrl_multiple_keys.3478244387 Aug 17 05:11:20 PM PDT 24 Aug 17 05:20:27 PM PDT 24 1366974994 ps
T225 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.1783683685 Aug 17 05:09:58 PM PDT 24 Aug 17 05:16:14 PM PDT 24 19453293705 ps
T226 /workspace/coverage/default/3.sram_ctrl_multiple_keys.1551390365 Aug 17 05:10:09 PM PDT 24 Aug 17 05:33:47 PM PDT 24 13003524540 ps
T227 /workspace/coverage/default/10.sram_ctrl_smoke.4183545213 Aug 17 05:11:36 PM PDT 24 Aug 17 05:11:53 PM PDT 24 3809296428 ps
T228 /workspace/coverage/default/28.sram_ctrl_ram_cfg.852913481 Aug 17 05:16:54 PM PDT 24 Aug 17 05:16:55 PM PDT 24 28980724 ps
T229 /workspace/coverage/default/17.sram_ctrl_regwen.1859772528 Aug 17 05:13:37 PM PDT 24 Aug 17 05:21:14 PM PDT 24 1011003874 ps
T230 /workspace/coverage/default/45.sram_ctrl_partial_access.2115071601 Aug 17 05:21:10 PM PDT 24 Aug 17 05:21:36 PM PDT 24 4002650033 ps
T231 /workspace/coverage/default/16.sram_ctrl_alert_test.2913673803 Aug 17 05:13:19 PM PDT 24 Aug 17 05:13:20 PM PDT 24 13686484 ps
T232 /workspace/coverage/default/27.sram_ctrl_ram_cfg.2280353471 Aug 17 05:16:37 PM PDT 24 Aug 17 05:16:38 PM PDT 24 80804614 ps
T233 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.459794320 Aug 17 05:12:14 PM PDT 24 Aug 17 05:19:59 PM PDT 24 17653413717 ps
T234 /workspace/coverage/default/22.sram_ctrl_smoke.2601553986 Aug 17 05:14:49 PM PDT 24 Aug 17 05:15:06 PM PDT 24 1033162268 ps
T235 /workspace/coverage/default/40.sram_ctrl_max_throughput.2336752532 Aug 17 05:20:03 PM PDT 24 Aug 17 05:20:58 PM PDT 24 380377296 ps
T62 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3549000666 Aug 17 05:10:12 PM PDT 24 Aug 17 05:10:24 PM PDT 24 1207270824 ps
T236 /workspace/coverage/default/9.sram_ctrl_max_throughput.997346702 Aug 17 05:11:28 PM PDT 24 Aug 17 05:12:17 PM PDT 24 204733958 ps
T237 /workspace/coverage/default/23.sram_ctrl_mem_walk.570761109 Aug 17 05:15:21 PM PDT 24 Aug 17 05:15:31 PM PDT 24 180077287 ps
T238 /workspace/coverage/default/27.sram_ctrl_executable.2308196782 Aug 17 05:16:35 PM PDT 24 Aug 17 05:21:20 PM PDT 24 3711097570 ps
T14 /workspace/coverage/default/2.sram_ctrl_sec_cm.2212710495 Aug 17 05:10:16 PM PDT 24 Aug 17 05:10:19 PM PDT 24 215219146 ps
T29 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.19477141 Aug 17 05:16:46 PM PDT 24 Aug 17 05:23:18 PM PDT 24 5249199272 ps
T30 /workspace/coverage/default/13.sram_ctrl_ram_cfg.201327121 Aug 17 05:12:25 PM PDT 24 Aug 17 05:12:26 PM PDT 24 33517907 ps
T31 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.1293187242 Aug 17 05:11:52 PM PDT 24 Aug 17 05:13:28 PM PDT 24 3568903436 ps
T32 /workspace/coverage/default/46.sram_ctrl_lc_escalation.2567960905 Aug 17 05:21:28 PM PDT 24 Aug 17 05:21:29 PM PDT 24 99457320 ps
T33 /workspace/coverage/default/34.sram_ctrl_partial_access.3649251636 Aug 17 05:18:33 PM PDT 24 Aug 17 05:18:48 PM PDT 24 265888636 ps
T34 /workspace/coverage/default/15.sram_ctrl_smoke.3765667560 Aug 17 05:12:48 PM PDT 24 Aug 17 05:14:30 PM PDT 24 490007341 ps
T35 /workspace/coverage/default/5.sram_ctrl_bijection.1910474087 Aug 17 05:10:36 PM PDT 24 Aug 17 05:11:10 PM PDT 24 2623823719 ps
T36 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.2036867258 Aug 17 05:13:43 PM PDT 24 Aug 17 05:18:54 PM PDT 24 12927409122 ps
T37 /workspace/coverage/default/24.sram_ctrl_mem_walk.282143368 Aug 17 05:15:41 PM PDT 24 Aug 17 05:15:48 PM PDT 24 1056275139 ps
T239 /workspace/coverage/default/47.sram_ctrl_smoke.4136410372 Aug 17 05:21:29 PM PDT 24 Aug 17 05:21:54 PM PDT 24 316861487 ps
T240 /workspace/coverage/default/33.sram_ctrl_ram_cfg.397041633 Aug 17 05:18:15 PM PDT 24 Aug 17 05:18:16 PM PDT 24 31336229 ps
T241 /workspace/coverage/default/22.sram_ctrl_alert_test.851998452 Aug 17 05:15:04 PM PDT 24 Aug 17 05:15:05 PM PDT 24 18394307 ps
T63 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.908392281 Aug 17 05:11:08 PM PDT 24 Aug 17 05:11:14 PM PDT 24 197133975 ps
T242 /workspace/coverage/default/27.sram_ctrl_multiple_keys.1047081587 Aug 17 05:16:28 PM PDT 24 Aug 17 05:37:53 PM PDT 24 14328182251 ps
T243 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.1742553276 Aug 17 05:17:22 PM PDT 24 Aug 17 05:17:26 PM PDT 24 101919908 ps
T46 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3090726480 Aug 17 05:12:10 PM PDT 24 Aug 17 05:14:27 PM PDT 24 2009346157 ps
T244 /workspace/coverage/default/7.sram_ctrl_smoke.2682388217 Aug 17 05:11:00 PM PDT 24 Aug 17 05:11:17 PM PDT 24 3683510493 ps
T73 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3337033968 Aug 17 05:21:15 PM PDT 24 Aug 17 05:30:56 PM PDT 24 5811488336 ps
T245 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.874822219 Aug 17 05:14:01 PM PDT 24 Aug 17 05:26:13 PM PDT 24 4389099954 ps
T246 /workspace/coverage/default/34.sram_ctrl_stress_all.2031004122 Aug 17 05:18:37 PM PDT 24 Aug 17 05:40:34 PM PDT 24 95624767804 ps
T247 /workspace/coverage/default/45.sram_ctrl_executable.1694788669 Aug 17 05:21:15 PM PDT 24 Aug 17 05:29:36 PM PDT 24 33959702619 ps
T248 /workspace/coverage/default/26.sram_ctrl_regwen.2498404848 Aug 17 05:16:14 PM PDT 24 Aug 17 05:31:40 PM PDT 24 10304423766 ps
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T289 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1509378731 Aug 17 05:21:07 PM PDT 24 Aug 17 05:27:20 PM PDT 24 5322364985 ps
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T293 /workspace/coverage/default/45.sram_ctrl_lc_escalation.1522037356 Aug 17 05:21:09 PM PDT 24 Aug 17 05:21:15 PM PDT 24 486283870 ps
T294 /workspace/coverage/default/8.sram_ctrl_stress_all.2719260831 Aug 17 05:11:18 PM PDT 24 Aug 17 06:22:49 PM PDT 24 497715991764 ps
T295 /workspace/coverage/default/26.sram_ctrl_bijection.409513966 Aug 17 05:16:04 PM PDT 24 Aug 17 05:17:08 PM PDT 24 945298541 ps
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T299 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.1530016001 Aug 17 05:16:57 PM PDT 24 Aug 17 05:17:11 PM PDT 24 210513191 ps
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T302 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.836987076 Aug 17 05:15:30 PM PDT 24 Aug 17 05:20:12 PM PDT 24 13197404533 ps
T48 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.2413273505 Aug 17 05:13:02 PM PDT 24 Aug 17 05:13:40 PM PDT 24 17980512978 ps
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