Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression/sram_ctrl_ret-sim-vcs/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	13371763	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

60836124

1

T1

3

T4

566

T5

72

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	37009963	1			T1	20		T4	319		T5	352
values[0x0]	17258620	1			T1	5		T4	153		T5	192
values[0x1]	19939304	1			T1	12		T4	156		T5	391

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	6662683	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

67545204

1

T1

18

T4

591

T5

453

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	326824	1			T5	7		T12	5		T6	2
valid_sources[0x01]	278299	1			T5	2		T12	7		T6	5
valid_sources[0x02]	294440	1			T12	16		T6	2		T10	7
valid_sources[0x03]	321024	1			T5	7		T12	14		T6	1
valid_sources[0x04]	302311	1			T5	4		T12	1		T6	8
valid_sources[0x05]	302011	1			T12	3		T6	1		T10	15
valid_sources[0x06]	280028	1			T5	8		T12	8		T6	5
valid_sources[0x07]	351668	1			T12	15		T6	3		T10	12
valid_sources[0x08]	261542	1			T5	1		T12	8		T6	2
valid_sources[0x09]	305395	1			T12	11		T6	6		T10	16
valid_sources[0x0a]	276643	1			T5	5		T12	21		T6	1
valid_sources[0x0b]	338378	1			T5	6		T12	10		T6	3
valid_sources[0x0c]	258338	1			T5	1		T12	10		T6	2
valid_sources[0x0d]	297918	1			T12	9		T6	5		T10	14
valid_sources[0x0e]	261080	1			T5	2		T12	27		T6	4
valid_sources[0x0f]	255692	1			T5	2		T12	8		T6	5
valid_sources[0x10]	323178	1			T5	15		T12	12		T6	5
valid_sources[0x11]	254636	1			T4	35		T5	1		T12	27
valid_sources[0x12]	261700	1			T5	1		T12	2		T6	1
valid_sources[0x13]	348893	1			T5	3		T12	22		T10	14
valid_sources[0x14]	299993	1			T5	1		T12	9		T6	3
valid_sources[0x15]	258670	1			T4	46		T12	5		T6	10
valid_sources[0x16]	306305	1			T12	46		T6	6		T10	18
valid_sources[0x17]	261828	1			T5	6		T12	5		T6	3
valid_sources[0x18]	290882	1			T5	2		T12	23		T6	3
valid_sources[0x19]	299715	1			T5	5		T12	15		T6	5
valid_sources[0x1a]	328002	1			T5	7		T12	8		T6	3
valid_sources[0x1b]	271057	1			T5	9		T12	6		T6	8
valid_sources[0x1c]	279377	1			T5	1		T12	13		T6	3
valid_sources[0x1d]	304790	1			T12	8		T10	9		T11	9
valid_sources[0x1e]	314365	1			T5	4		T12	4		T6	4
valid_sources[0x1f]	274554	1			T5	1		T12	9		T6	10
valid_sources[0x20]	246197	1			T1	11		T5	2		T12	28
valid_sources[0x21]	264128	1			T5	4		T12	40		T6	1
valid_sources[0x22]	276167	1			T5	2		T12	10		T6	1
valid_sources[0x23]	347951	1			T5	1		T12	22		T6	1
valid_sources[0x24]	263483	1			T5	1		T12	7		T6	3
valid_sources[0x25]	280964	1			T5	10		T12	9		T6	3
valid_sources[0x26]	376405	1			T5	2		T12	3		T6	2
valid_sources[0x27]	272562	1			T5	9		T12	11		T6	3
valid_sources[0x28]	260524	1			T5	6		T12	9		T6	9
valid_sources[0x29]	247697	1			T4	62		T12	26		T6	2
valid_sources[0x2a]	315972	1			T12	9		T6	4		T10	16
valid_sources[0x2b]	256447	1			T5	11		T12	3		T10	8
valid_sources[0x2c]	331056	1			T5	5		T12	3		T6	1
valid_sources[0x2d]	274634	1			T5	5		T12	27		T6	2
valid_sources[0x2e]	301548	1			T5	6		T12	11		T6	5
valid_sources[0x2f]	354220	1			T5	4		T12	12		T6	10
valid_sources[0x30]	257321	1			T5	4		T12	11		T6	1
valid_sources[0x31]	253375	1			T1	22		T5	8		T12	25
valid_sources[0x32]	286912	1			T5	4		T12	7		T6	1
valid_sources[0x33]	264825	1			T5	4		T12	8		T6	1
valid_sources[0x34]	275486	1			T5	3		T12	1		T6	8
valid_sources[0x35]	314543	1			T5	4		T12	12		T6	10
valid_sources[0x36]	312827	1			T5	12		T12	4		T6	7
valid_sources[0x37]	270365	1			T5	10		T12	14		T6	2
valid_sources[0x38]	414650	1			T4	33		T5	1		T6	4
valid_sources[0x39]	312255	1			T12	17		T6	9		T10	4
valid_sources[0x3a]	303873	1			T12	2		T10	11		T11	2
valid_sources[0x3b]	303684	1			T12	6		T6	2		T10	16
valid_sources[0x3c]	377518	1			T5	1		T12	15		T10	13
valid_sources[0x3d]	272752	1			T5	7		T12	11		T6	16
valid_sources[0x3e]	257900	1			T5	8		T12	19		T6	1
valid_sources[0x3f]	281007	1			T5	14		T12	14		T6	10
valid_sources[0x40]	259255	1			T12	3		T6	8		T10	15
valid_sources[0x41]	289899	1			T5	6		T12	6		T6	9
valid_sources[0x42]	278077	1			T5	3		T12	3		T6	5
valid_sources[0x43]	281646	1			T5	10		T12	19		T6	4
valid_sources[0x44]	260291	1			T5	1		T12	4		T6	10
valid_sources[0x45]	249525	1			T5	1		T12	16		T6	1
valid_sources[0x46]	272613	1			T4	54		T5	8		T12	7
valid_sources[0x47]	260003	1			T5	1		T12	22		T6	2
valid_sources[0x48]	274009	1			T12	3		T6	1		T10	15
valid_sources[0x49]	257786	1			T12	6		T6	9		T10	21
valid_sources[0x4a]	274253	1			T12	9		T6	2		T10	8
valid_sources[0x4b]	326318	1			T12	12		T6	8		T10	9
valid_sources[0x4c]	251949	1			T4	15		T12	6		T6	3
valid_sources[0x4d]	266223	1			T5	3		T12	11		T6	7
valid_sources[0x4e]	339911	1			T5	4		T12	4		T6	2
valid_sources[0x4f]	256783	1			T12	7		T6	2		T10	14
valid_sources[0x50]	305635	1			T5	2		T12	4		T6	4
valid_sources[0x51]	260743	1			T12	11		T10	14		T11	21
valid_sources[0x52]	287992	1			T5	11		T12	18		T6	1
valid_sources[0x53]	362710	1			T5	6		T12	14		T6	1
valid_sources[0x54]	284652	1			T5	5		T12	8		T6	4
valid_sources[0x55]	314370	1			T5	6		T12	12		T6	4
valid_sources[0x56]	256090	1			T12	18		T6	3		T10	10
valid_sources[0x57]	254347	1			T4	14		T5	1		T12	15
valid_sources[0x58]	256339	1			T12	14		T6	10		T10	12
valid_sources[0x59]	291404	1			T5	3		T12	4		T6	11
valid_sources[0x5a]	265343	1			T5	14		T12	7		T6	2
valid_sources[0x5b]	264286	1			T4	58		T5	8		T12	5
valid_sources[0x5c]	329088	1			T5	2		T12	25		T6	6
valid_sources[0x5d]	248740	1			T12	22		T6	3		T10	15
valid_sources[0x5e]	251987	1			T5	1		T12	2		T6	6
valid_sources[0x5f]	356802	1			T5	15		T12	24		T6	6
valid_sources[0x60]	289801	1			T12	10		T6	5		T10	14
valid_sources[0x61]	308622	1			T12	14		T6	17		T10	18
valid_sources[0x62]	289245	1			T5	10		T12	16		T6	2
valid_sources[0x63]	264416	1			T5	2		T12	13		T6	3
valid_sources[0x64]	256840	1			T12	5		T6	2		T10	18
valid_sources[0x65]	336266	1			T12	9		T10	9		T11	10
valid_sources[0x66]	283509	1			T12	9		T6	7		T10	9
valid_sources[0x67]	335392	1			T5	2		T12	3		T6	4
valid_sources[0x68]	251770	1			T5	19		T12	1		T6	6
valid_sources[0x69]	287445	1			T5	10		T12	22		T6	2
valid_sources[0x6a]	294575	1			T12	3		T6	1		T10	15
valid_sources[0x6b]	270445	1			T5	4		T12	20		T6	2
valid_sources[0x6c]	301485	1			T5	3		T12	10		T10	12
valid_sources[0x6d]	277837	1			T5	7		T12	22		T6	5
valid_sources[0x6e]	251256	1			T5	9		T6	7		T10	10
valid_sources[0x6f]	248243	1			T5	2		T12	8		T6	5
valid_sources[0x70]	302431	1			T5	1		T12	6		T6	2
valid_sources[0x71]	274226	1			T5	1		T12	1		T6	2
valid_sources[0x72]	259503	1			T5	1		T12	9		T6	2
valid_sources[0x73]	260900	1			T5	1		T12	5		T6	7
valid_sources[0x74]	286920	1			T5	3		T12	4		T10	13
valid_sources[0x75]	258102	1			T4	23		T5	1		T12	6
valid_sources[0x76]	396534	1			T5	1		T12	8		T6	6
valid_sources[0x77]	279537	1			T5	3		T12	17		T6	6
valid_sources[0x78]	268173	1			T5	8		T12	6		T6	14
valid_sources[0x79]	286753	1			T5	8		T12	24		T6	3
valid_sources[0x7a]	275409	1			T5	4		T12	6		T6	1
valid_sources[0x7b]	285776	1			T12	9		T6	1		T10	17
valid_sources[0x7c]	346454	1			T4	26		T5	1		T12	9
valid_sources[0x7d]	291972	1			T5	14		T12	10		T6	1
valid_sources[0x7e]	331587	1			T12	11		T6	1		T10	12
valid_sources[0x7f]	289588	1			T5	2		T12	14		T6	6
valid_sources[0x80]	280729	1			T12	12		T6	1		T10	19

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

30328837

1

T1

2

T4

294

T5

3

values[0x0]

all_enables

biggest_size

15252781

1

T1

1

T4

140

T5

37

values[0x1]

all_enables

biggest_size

15254506

1

T4

132

T5

32

T12

1025

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	35309	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

117795

1

T1

1

T3

6

T4

5

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	45063	1			T4	7		T6	80		T11	273
values[0x0]	52120	1			T2	1		T3	7		T4	3
values[0x1]	55921	1			T1	1		T3	7		T4	5

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	27212	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

125892

1

T1

1

T3

8

T4

5

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	818	1			T18	1		T26	15		T149	1
valid_sources[0x01]	835	1			T11	1		T17	1		T26	14
valid_sources[0x02]	1291	1			T139	1		T26	15		T28	7
valid_sources[0x03]	518	1			T26	10		T28	14		T23	1
valid_sources[0x04]	475	1			T17	1		T9	1		T26	10
valid_sources[0x05]	361	1			T6	1		T26	8		T27	22
valid_sources[0x06]	760	1			T26	6		T28	13		T150	1
valid_sources[0x07]	405	1			T26	14		T28	6		T23	1
valid_sources[0x08]	1115	1			T6	2		T26	11		T151	2
valid_sources[0x09]	454	1			T26	13		T16	1		T28	16
valid_sources[0x0a]	492	1			T26	10		T149	1		T34	8
valid_sources[0x0b]	477	1			T26	23		T28	6		T23	1
valid_sources[0x0c]	747	1			T26	10		T28	21		T84	1
valid_sources[0x0d]	624	1			T11	1		T8	1		T26	14
valid_sources[0x0e]	425	1			T26	16		T27	3		T28	12
valid_sources[0x0f]	664	1			T26	8		T83	1		T28	4
valid_sources[0x10]	398	1			T26	8		T149	1		T28	12
valid_sources[0x11]	701	1			T6	1		T26	10		T28	7
valid_sources[0x12]	548	1			T5	1		T26	13		T28	15
valid_sources[0x13]	570	1			T26	16		T28	16		T67	12
valid_sources[0x14]	841	1			T18	1		T26	12		T28	12
valid_sources[0x15]	367	1			T26	7		T67	10		T51	2
valid_sources[0x16]	801	1			T6	1		T26	8		T28	21
valid_sources[0x17]	494	1			T26	15		T28	13		T67	15
valid_sources[0x18]	524	1			T26	13		T28	35		T150	1
valid_sources[0x19]	421	1			T18	1		T26	9		T28	18
valid_sources[0x1a]	602	1			T6	2		T9	2		T26	16
valid_sources[0x1b]	492	1			T26	13		T28	16		T144	2
valid_sources[0x1c]	692	1			T26	11		T27	249		T28	5
valid_sources[0x1d]	562	1			T11	4		T39	2		T152	1
valid_sources[0x1e]	439	1			T6	1		T52	2		T26	8
valid_sources[0x1f]	471	1			T26	9		T28	8		T67	17
valid_sources[0x20]	436	1			T153	1		T18	1		T26	19
valid_sources[0x21]	523	1			T12	3		T26	8		T28	9
valid_sources[0x22]	580	1			T6	3		T26	18		T34	1
valid_sources[0x23]	726	1			T6	4		T19	2		T18	1
valid_sources[0x24]	502	1			T36	1		T26	5		T28	6
valid_sources[0x25]	397	1			T26	18		T149	1		T27	3
valid_sources[0x26]	613	1			T6	2		T11	1		T9	1
valid_sources[0x27]	352	1			T9	1		T26	10		T28	19
valid_sources[0x28]	429	1			T26	10		T28	2		T67	18
valid_sources[0x29]	699	1			T26	13		T28	15		T67	14
valid_sources[0x2a]	554	1			T26	16		T28	5		T101	7
valid_sources[0x2b]	349	1			T26	9		T28	14		T67	21
valid_sources[0x2c]	896	1			T6	1		T26	8		T28	11
valid_sources[0x2d]	782	1			T8	1		T26	8		T28	9
valid_sources[0x2e]	673	1			T17	1		T26	19		T34	1
valid_sources[0x2f]	559	1			T26	20		T28	21		T23	1
valid_sources[0x30]	402	1			T154	1		T26	12		T28	7
valid_sources[0x31]	665	1			T8	2		T26	20		T28	2
valid_sources[0x32]	712	1			T18	1		T26	11		T149	1
valid_sources[0x33]	410	1			T6	3		T17	2		T26	19
valid_sources[0x34]	602	1			T11	3		T26	9		T27	1
valid_sources[0x35]	723	1			T11	1		T26	22		T28	10
valid_sources[0x36]	712	1			T6	1		T17	2		T26	7
valid_sources[0x37]	539	1			T2	1		T26	17		T27	3
valid_sources[0x38]	659	1			T26	8		T28	24		T148	1
valid_sources[0x39]	605	1			T9	1		T26	3		T28	13
valid_sources[0x3a]	636	1			T17	1		T9	1		T26	13
valid_sources[0x3b]	585	1			T153	1		T9	2		T26	11
valid_sources[0x3c]	520	1			T3	14		T26	14		T28	12
valid_sources[0x3d]	549	1			T11	1		T26	15		T28	9
valid_sources[0x3e]	468	1			T11	69		T26	14		T28	7
valid_sources[0x3f]	428	1			T6	3		T18	1		T26	18
valid_sources[0x40]	425	1			T38	2		T17	3		T26	12
valid_sources[0x41]	506	1			T9	1		T26	12		T28	9
valid_sources[0x42]	466	1			T11	1		T37	2		T8	1
valid_sources[0x43]	534	1			T26	15		T28	16		T24	2
valid_sources[0x44]	636	1			T26	18		T28	9		T67	13
valid_sources[0x45]	632	1			T13	1		T46	1		T18	1
valid_sources[0x46]	594	1			T8	2		T9	1		T26	9
valid_sources[0x47]	821	1			T153	1		T9	1		T26	11
valid_sources[0x48]	659	1			T153	1		T26	14		T28	15
valid_sources[0x49]	825	1			T11	7		T17	1		T9	2
valid_sources[0x4a]	560	1			T26	9		T28	7		T102	1
valid_sources[0x4b]	514	1			T6	3		T18	1		T26	9
valid_sources[0x4c]	386	1			T26	24		T83	1		T28	19
valid_sources[0x4d]	641	1			T153	2		T26	6		T28	4
valid_sources[0x4e]	622	1			T18	1		T26	17		T28	11
valid_sources[0x4f]	429	1			T26	6		T28	1		T150	1
valid_sources[0x50]	389	1			T153	1		T26	19		T28	17
valid_sources[0x51]	524	1			T26	16		T28	12		T23	1
valid_sources[0x52]	806	1			T26	10		T28	13		T23	1
valid_sources[0x53]	452	1			T6	1		T26	17		T149	1
valid_sources[0x54]	714	1			T8	1		T26	18		T28	6
valid_sources[0x55]	785	1			T26	14		T28	15		T67	17
valid_sources[0x56]	534	1			T6	1		T33	1		T26	19
valid_sources[0x57]	406	1			T9	1		T26	10		T28	20
valid_sources[0x58]	863	1			T17	1		T26	9		T27	85
valid_sources[0x59]	815	1			T6	1		T26	16		T28	6
valid_sources[0x5a]	648	1			T153	1		T9	1		T26	14
valid_sources[0x5b]	589	1			T6	1		T9	1		T26	11
valid_sources[0x5c]	729	1			T26	13		T28	21		T67	11
valid_sources[0x5d]	532	1			T8	1		T18	1		T26	16
valid_sources[0x5e]	425	1			T26	11		T28	15		T67	11
valid_sources[0x5f]	456	1			T11	3		T7	2		T26	17
valid_sources[0x60]	665	1			T26	21		T83	1		T53	1
valid_sources[0x61]	484	1			T11	3		T26	13		T149	1
valid_sources[0x62]	585	1			T5	1		T26	15		T28	12
valid_sources[0x63]	554	1			T26	19		T28	19		T148	1
valid_sources[0x64]	564	1			T11	1		T17	2		T18	2
valid_sources[0x65]	425	1			T26	14		T28	10		T23	1
valid_sources[0x66]	402	1			T6	1		T26	9		T28	21
valid_sources[0x67]	367	1			T9	1		T26	14		T28	14
valid_sources[0x68]	706	1			T8	1		T18	1		T26	18
valid_sources[0x69]	622	1			T18	1		T9	2		T26	8
valid_sources[0x6a]	525	1			T6	1		T17	1		T26	9
valid_sources[0x6b]	529	1			T11	1		T155	1		T26	14
valid_sources[0x6c]	781	1			T11	195		T26	13		T28	11
valid_sources[0x6d]	826	1			T19	2		T26	11		T28	3
valid_sources[0x6e]	676	1			T26	20		T28	13		T23	2
valid_sources[0x6f]	450	1			T6	1		T8	1		T26	13
valid_sources[0x70]	444	1			T18	2		T9	2		T26	19
valid_sources[0x71]	712	1			T6	3		T11	1		T26	10
valid_sources[0x72]	1333	1			T6	4		T17	2		T9	1
valid_sources[0x73]	571	1			T9	2		T26	14		T28	15
valid_sources[0x74]	414	1			T26	12		T28	2		T67	12
valid_sources[0x75]	731	1			T18	1		T26	16		T27	3
valid_sources[0x76]	521	1			T6	1		T17	1		T26	6
valid_sources[0x77]	423	1			T17	1		T8	2		T153	1
valid_sources[0x78]	607	1			T11	97		T26	10		T28	6
valid_sources[0x79]	501	1			T9	1		T26	16		T28	18
valid_sources[0x7a]	467	1			T19	1		T9	1		T26	16
valid_sources[0x7b]	934	1			T11	2		T26	16		T28	4
valid_sources[0x7c]	731	1			T11	110		T26	13		T28	13
valid_sources[0x7d]	853	1			T153	1		T26	9		T27	242
valid_sources[0x7e]	725	1			T6	1		T13	1		T26	13
valid_sources[0x7f]	438	1			T19	1		T8	1		T26	11
valid_sources[0x80]	364	1			T7	2		T26	3		T28	14

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

32790

1

T4

2

T11

256

T7

4

values[0x0]

all_enables

biggest_size

43528

1

T3

3

T4

2

T5

1

values[0x1]

all_enables

biggest_size

41477

1

T1

1

T3

3

T4

1